--- 2020-04-11T03:17:03Z/2020-04-06T00:00:00Z/nm-bsd-ot14.txt	Sat Apr 11 09:38:26 2020
+++ 2020-04-11T03:17:03Z/2020-04-07T00:00:00Z/nm-bsd-ot14.txt	Sat Apr 11 11:02:58 2020
@@ -2,16 +2,16 @@
 00011006 A mp_pdirpa
 00014198 A acpi_pdirpa
 01000000 A __kernel_phys_base
-01ffb000 T __kernel_kutext_phys
-01fff000 C __kernel_cptext_phys
-02000000 C __kernel_rodata_phys
-025b2000 R __kernel_kutext_page_phys
-025b4000 C __kernel_randomdata_phys
-025b4000 R __retguard_start_phys
-02c15000 R __retguard_end_phys
-02c19000 R __kernel_data_phys
-02f33000 D __kernel_kudata_phys
-02f34000 C __kernel_bss_phys
+01ffc000 T __kernel_kutext_phys
+02000000 C __kernel_cptext_phys
+02001000 C __kernel_rodata_phys
+025b3000 R __kernel_kutext_page_phys
+025b5000 C __kernel_randomdata_phys
+025b5000 R __retguard_start_phys
+02c16000 R __retguard_end_phys
+02c1a000 R __kernel_data_phys
+02f34000 D __kernel_kudata_phys
+02f35000 C __kernel_bss_phys
 03200000 B __kernel_phys_end
 80000000 A __kernel_virt_to_phys
 ffffffff80000000 A __kernel_base
@@ -1133,39 +1133,39 @@ ffffffff81093210 T wi_get_fid_io
 ffffffff81093270 T wi_init_io
 ffffffff81093d90 T wi_start
 ffffffff810942b0 T wi_ioctl
-ffffffff81095cf0 T wi_watchdog
-ffffffff81095e00 T wi_inquire
-ffffffff81095eb0 T wi_attach
-ffffffff810967e0 T wi_reset
-ffffffff81096960 T wi_get_id
-ffffffff81096ce0 T wi_set_ssid
-ffffffff81096d30 T wi_media_change
-ffffffff81096ea0 T wi_media_status
-ffffffff81097010 T wi_stop
-ffffffff810970e0 T wi_intr_enable
-ffffffff81097150 T wi_intr_ack
-ffffffff810971c0 T wi_intr
-ffffffff810975c0 T wi_rxeof
-ffffffff81097b30 T wi_txeof
-ffffffff81097b80 T wi_update_stats
-ffffffff81097d30 T wi_do_hostdecrypt
-ffffffff81097ec0 T wi_cor_reset
-ffffffff81097fa0 T wi_seek
-ffffffff81098100 T wi_setmulti
-ffffffff810984d0 T wi_setdef
-ffffffff810988f0 T wi_sync_media
-ffffffff81098a10 T wi_mgmt_xmit
-ffffffff81098b90 T wi_get_debug
-ffffffff81098cf0 T wi_set_debug
-ffffffff81098ee0 T wi_set_nwkey
-ffffffff81099190 T wi_get_nwkey
-ffffffff81099200 T wi_set_pm
-ffffffff81099260 T wi_get_pm
-ffffffff810992a0 T wi_set_txpower
-ffffffff81099400 T wi_get_txpower
-ffffffff810994d0 T wi_scan_timeout
-ffffffff810995e0 T wi_do_hostencrypt
-ffffffff810997a0 T wi_detach
+ffffffff81095ce0 T wi_watchdog
+ffffffff81095df0 T wi_inquire
+ffffffff81095ea0 T wi_attach
+ffffffff810967d0 T wi_reset
+ffffffff81096950 T wi_get_id
+ffffffff81096cd0 T wi_set_ssid
+ffffffff81096d20 T wi_media_change
+ffffffff81096e90 T wi_media_status
+ffffffff81097000 T wi_stop
+ffffffff810970d0 T wi_intr_enable
+ffffffff81097140 T wi_intr_ack
+ffffffff810971b0 T wi_intr
+ffffffff810975b0 T wi_rxeof
+ffffffff81097b20 T wi_txeof
+ffffffff81097b70 T wi_update_stats
+ffffffff81097d20 T wi_do_hostdecrypt
+ffffffff81097eb0 T wi_cor_reset
+ffffffff81097f90 T wi_seek
+ffffffff810980f0 T wi_setmulti
+ffffffff810984c0 T wi_setdef
+ffffffff810988e0 T wi_sync_media
+ffffffff81098a00 T wi_mgmt_xmit
+ffffffff81098b80 T wi_get_debug
+ffffffff81098ce0 T wi_set_debug
+ffffffff81098ed0 T wi_set_nwkey
+ffffffff81099180 T wi_get_nwkey
+ffffffff810991f0 T wi_set_pm
+ffffffff81099250 T wi_get_pm
+ffffffff81099290 T wi_set_txpower
+ffffffff810993f0 T wi_get_txpower
+ffffffff810994c0 T wi_scan_timeout
+ffffffff810995d0 T wi_do_hostencrypt
+ffffffff81099790 T wi_detach
 ffffffff8109a000 T wihap_init
 ffffffff8109a140 T wihap_timeout
 ffffffff8109a3b0 T wihap_sta_disassoc
@@ -3914,43 +3914,43 @@ ffffffff811da8a0 T sr_ioctl_discipline
 ffffffff811da980 T sr_ioctl_installboot
 ffffffff811dae20 T sr_rebuild_percent
 ffffffff811dae90 T sr_hotspare
-ffffffff811db4b0 T sr_rebuild_init
-ffffffff811dba10 T sr_chunk_in_use
-ffffffff811dbae0 T sr_hotspare_rebuild_callback
-ffffffff811dbaf0 T sr_hotspare_rebuild
-ffffffff811dbe20 T sr_rebuild_start
-ffffffff811dbe90 T sr_roam_chunks
-ffffffff811dbf70 T sr_discipline_init
-ffffffff811dc130 T sr_already_assembled
-ffffffff811dc1c0 T sr_uuid_format
-ffffffff811dc2d0 T sr_sensors_create
-ffffffff811dc3a0 T sr_discipline_shutdown
-ffffffff811dc5e0 T sr_chunks_unwind
-ffffffff811dc6a0 T sr_discipline_free
-ffffffff811dc880 T sr_sensors_delete
-ffffffff811dc8d0 T sr_alloc_resources
-ffffffff811dc930 T sr_free_resources
-ffffffff811dca10 T sr_rebuild
-ffffffff811dd0f0 T sr_raid_inquiry
-ffffffff811dd250 T sr_raid_read_cap
-ffffffff811dd410 T sr_raid_tur
-ffffffff811dd480 T sr_raid_request_sense
-ffffffff811dd4f0 T sr_raid_start_stop
-ffffffff811dd520 T sr_raid_sync
-ffffffff811dd5f0 T sr_raid_intr
-ffffffff811dd650 T sr_set_chunk_state
-ffffffff811dd730 T sr_set_vol_state
-ffffffff811dd840 T sr_schedule_wu
-ffffffff811dd970 T sr_block_get
-ffffffff811dd990 T sr_block_put
-ffffffff811dd9b0 T sr_checksum_print
-ffffffff811ddb00 T sr_uuid_print
-ffffffff811ddc50 T sr_validate_stripsize
-ffffffff811ddcb0 T sr_quiesce
-ffffffff811ddd20 T sr_validate_io
-ffffffff811ddf10 T sr_rebuild_thread
-ffffffff811ddf50 T sr_sensors_refresh
-ffffffff811ddfd0 T sr_hibernate_io
+ffffffff811db480 T sr_rebuild_init
+ffffffff811db9e0 T sr_chunk_in_use
+ffffffff811dbab0 T sr_hotspare_rebuild_callback
+ffffffff811dbac0 T sr_hotspare_rebuild
+ffffffff811dbdf0 T sr_rebuild_start
+ffffffff811dbe60 T sr_roam_chunks
+ffffffff811dbf40 T sr_discipline_init
+ffffffff811dc100 T sr_already_assembled
+ffffffff811dc190 T sr_uuid_format
+ffffffff811dc2a0 T sr_sensors_create
+ffffffff811dc370 T sr_discipline_shutdown
+ffffffff811dc5b0 T sr_chunks_unwind
+ffffffff811dc670 T sr_discipline_free
+ffffffff811dc850 T sr_sensors_delete
+ffffffff811dc8a0 T sr_alloc_resources
+ffffffff811dc900 T sr_free_resources
+ffffffff811dc9e0 T sr_rebuild
+ffffffff811dd0c0 T sr_raid_inquiry
+ffffffff811dd220 T sr_raid_read_cap
+ffffffff811dd3e0 T sr_raid_tur
+ffffffff811dd450 T sr_raid_request_sense
+ffffffff811dd4c0 T sr_raid_start_stop
+ffffffff811dd4f0 T sr_raid_sync
+ffffffff811dd5c0 T sr_raid_intr
+ffffffff811dd620 T sr_set_chunk_state
+ffffffff811dd700 T sr_set_vol_state
+ffffffff811dd810 T sr_schedule_wu
+ffffffff811dd940 T sr_block_get
+ffffffff811dd960 T sr_block_put
+ffffffff811dd980 T sr_checksum_print
+ffffffff811ddad0 T sr_uuid_print
+ffffffff811ddc20 T sr_validate_stripsize
+ffffffff811ddc80 T sr_quiesce
+ffffffff811ddcf0 T sr_validate_io
+ffffffff811ddee0 T sr_rebuild_thread
+ffffffff811ddf20 T sr_sensors_refresh
+ffffffff811ddfa0 T sr_hibernate_io
 ffffffff811df000 T sr_concat_discipline_init
 ffffffff811df080 T sr_concat_assemble
 ffffffff811df0c0 T sr_concat_create
@@ -5721,33 +5721,33 @@ ffffffff812b4060 T tsleep
 ffffffff812b4200 T sleep_setup
 ffffffff812b4350 T sleep_setup_timeout
 ffffffff812b43d0 T sleep_setup_signal
-ffffffff812b4580 T sleep_finish_all
-ffffffff812b4650 T tsleep_nsec
-ffffffff812b4730 T msleep
-ffffffff812b4960 T msleep_nsec
-ffffffff812b4a60 T rwsleep
-ffffffff812b4bb0 T rwsleep_nsec
-ffffffff812b4cb0 T sleep_finish
-ffffffff812b4e90 T sleep_finish_timeout
-ffffffff812b4f30 T sleep_finish_signal
-ffffffff812b5070 T unsleep
-ffffffff812b5150 T wakeup_proc
-ffffffff812b52c0 T endtsleep
-ffffffff812b5320 T wakeup_n
-ffffffff812b5420 T wakeup
-ffffffff812b5440 T sys_sched_yield
-ffffffff812b5500 T thrsleep_unlock
-ffffffff812b5540 T thrsleep
-ffffffff812b5830 T sys___thrsleep
-ffffffff812b58c0 T sys___thrwakeup
-ffffffff812b59e0 T refcnt_init
-ffffffff812b5a10 T refcnt_take
-ffffffff812b5a70 T refcnt_rele
-ffffffff812b5ae0 T refcnt_rele_wake
-ffffffff812b5b50 T refcnt_finalize
-ffffffff812b5be0 T cond_init
-ffffffff812b5c10 T cond_signal
-ffffffff812b5c30 T cond_wait
+ffffffff812b45a0 T sleep_finish_all
+ffffffff812b4670 T tsleep_nsec
+ffffffff812b4750 T msleep
+ffffffff812b4980 T msleep_nsec
+ffffffff812b4a80 T rwsleep
+ffffffff812b4bd0 T rwsleep_nsec
+ffffffff812b4cd0 T sleep_finish
+ffffffff812b4eb0 T sleep_finish_timeout
+ffffffff812b4f50 T sleep_finish_signal
+ffffffff812b5090 T unsleep
+ffffffff812b5170 T wakeup_proc
+ffffffff812b52e0 T endtsleep
+ffffffff812b5340 T wakeup_n
+ffffffff812b5440 T wakeup
+ffffffff812b5460 T sys_sched_yield
+ffffffff812b5520 T thrsleep_unlock
+ffffffff812b5560 T thrsleep
+ffffffff812b5850 T sys___thrsleep
+ffffffff812b58e0 T sys___thrwakeup
+ffffffff812b5a00 T refcnt_init
+ffffffff812b5a30 T refcnt_take
+ffffffff812b5a90 T refcnt_rele
+ffffffff812b5b00 T refcnt_rele_wake
+ffffffff812b5b70 T refcnt_finalize
+ffffffff812b5c00 T cond_init
+ffffffff812b5c30 T cond_signal
+ffffffff812b5c50 T cond_wait
 ffffffff812b6000 T dummy_get_timecount
 ffffffff812b6040 T binboottime
 ffffffff812b60a0 T microboottime
@@ -7930,61 +7930,61 @@ ffffffff81399230 T pipex_iface_stop
 ffffffff813992a0 T pipex_destroy_session
 ffffffff81399470 T pipex_iface_fini
 ffffffff813994e0 T pipex_ioctl
-ffffffff81399760 T pipex_add_session
-ffffffff81399d70 T pipex_close_session
-ffffffff81399f10 T pipex_config_session
-ffffffff8139a020 T pipex_get_stat
-ffffffff8139a150 T pipex_get_closed
-ffffffff8139a270 T pipex_session_init_mppe_recv
-ffffffff8139a2c0 T pipex_session_init_mppe_send
-ffffffff8139a310 T pipex_lookup_by_ip_address
-ffffffff8139a390 T pipex_sockaddr_hash_key
-ffffffff8139a3e0 T pipex_timer_start
-ffffffff8139a410 T pipex_session_log
-ffffffff8139a530 T pipex_notify_close_session
-ffffffff8139a5e0 T pipex_notify_close_session_all
-ffffffff8139a700 T pipex_lookup_by_session_id
-ffffffff8139a7c0 T pipex_timer_stop
-ffffffff8139a7e0 T pipexintr
-ffffffff8139a990 T pipex_ppp_output
-ffffffff8139aaa0 T pipex_ppp_input
-ffffffff8139ad80 T pipex_ppp_enqueue
-ffffffff8139ae00 T pipex_timer
-ffffffff8139afc0 T pipex_output
-ffffffff8139b130 T pipex_ip_output
-ffffffff8139b260 T ip_is_idle_packet
-ffffffff8139b480 T adjust_tcp_mss
-ffffffff8139b660 T pipex_mppe_output
-ffffffff8139b850 T pipex_pppoe_output
-ffffffff8139b980 T pipex_pptp_output
-ffffffff8139bbe0 T pipex_l2tp_output
-ffffffff8139bed0 T pipex_ppp_proto
-ffffffff8139bfd0 T pipex_mppe_input
-ffffffff8139c3a0 T pipex_ccp_input
-ffffffff8139c420 T pipex_ip_input
-ffffffff8139c5f0 T pipex_ip6_input
-ffffffff8139c680 T pipex_common_input
-ffffffff8139c8c0 T pipex_pppoe_lookup_session
-ffffffff8139c9b0 T pipex_pppoe_input
-ffffffff8139ca60 T pipex_pptp_lookup_session
-ffffffff8139cb80 T pipex_pptp_input
-ffffffff8139cf30 T pipex_pptp_userland_lookup_session_ipv4
-ffffffff8139cf80 T pipex_pptp_userland_lookup_session
-ffffffff8139d0f0 T pipex_pptp_userland_lookup_session_ipv6
-ffffffff8139d180 T pipex_sockaddr_compar_addr
-ffffffff8139d200 T pipex_pptp_userland_output
-ffffffff8139d370 T pipex_l2tp_lookup_session
-ffffffff8139d470 T pipex_l2tp_input
-ffffffff8139d7f0 T pipex_l2tp_userland_lookup_session_ipv4
-ffffffff8139d840 T pipex_l2tp_userland_lookup_session
-ffffffff8139d9c0 T pipex_l2tp_userland_lookup_session_ipv6
-ffffffff8139da50 T pipex_l2tp_userland_output
-ffffffff8139db60 T pipex_mppe_init
-ffffffff8139dd10 T GetNewKeyFromSHA
-ffffffff8139dde0 T pipex_mppe_reduce_key
-ffffffff8139de30 T mppe_key_change
-ffffffff8139df90 T pipex_ccp_output
-ffffffff8139e030 T pipex_sysctl
+ffffffff81399660 T pipex_add_session
+ffffffff81399c70 T pipex_close_session
+ffffffff81399e10 T pipex_config_session
+ffffffff81399f40 T pipex_get_stat
+ffffffff8139a090 T pipex_get_closed
+ffffffff8139a1e0 T pipex_session_init_mppe_recv
+ffffffff8139a230 T pipex_session_init_mppe_send
+ffffffff8139a280 T pipex_lookup_by_ip_address
+ffffffff8139a300 T pipex_sockaddr_hash_key
+ffffffff8139a350 T pipex_timer_start
+ffffffff8139a380 T pipex_session_log
+ffffffff8139a4a0 T pipex_notify_close_session
+ffffffff8139a550 T pipex_notify_close_session_all
+ffffffff8139a670 T pipex_lookup_by_session_id
+ffffffff8139a730 T pipex_timer_stop
+ffffffff8139a750 T pipexintr
+ffffffff8139a900 T pipex_ppp_output
+ffffffff8139aa10 T pipex_ppp_input
+ffffffff8139ad00 T pipex_ppp_enqueue
+ffffffff8139ad80 T pipex_timer
+ffffffff8139af40 T pipex_output
+ffffffff8139b0b0 T pipex_ip_output
+ffffffff8139b1e0 T ip_is_idle_packet
+ffffffff8139b400 T adjust_tcp_mss
+ffffffff8139b5e0 T pipex_mppe_output
+ffffffff8139b7d0 T pipex_pppoe_output
+ffffffff8139b900 T pipex_pptp_output
+ffffffff8139bb60 T pipex_l2tp_output
+ffffffff8139be50 T pipex_ppp_proto
+ffffffff8139bf50 T pipex_mppe_input
+ffffffff8139c320 T pipex_ccp_input
+ffffffff8139c3a0 T pipex_ip_input
+ffffffff8139c570 T pipex_ip6_input
+ffffffff8139c600 T pipex_common_input
+ffffffff8139c840 T pipex_pppoe_lookup_session
+ffffffff8139c930 T pipex_pppoe_input
+ffffffff8139c9e0 T pipex_pptp_lookup_session
+ffffffff8139cb00 T pipex_pptp_input
+ffffffff8139ceb0 T pipex_pptp_userland_lookup_session_ipv4
+ffffffff8139cf00 T pipex_pptp_userland_lookup_session
+ffffffff8139d070 T pipex_pptp_userland_lookup_session_ipv6
+ffffffff8139d100 T pipex_sockaddr_compar_addr
+ffffffff8139d180 T pipex_pptp_userland_output
+ffffffff8139d2f0 T pipex_l2tp_lookup_session
+ffffffff8139d3f0 T pipex_l2tp_input
+ffffffff8139d770 T pipex_l2tp_userland_lookup_session_ipv4
+ffffffff8139d7c0 T pipex_l2tp_userland_lookup_session
+ffffffff8139d940 T pipex_l2tp_userland_lookup_session_ipv6
+ffffffff8139d9d0 T pipex_l2tp_userland_output
+ffffffff8139dae0 T pipex_mppe_init
+ffffffff8139dc90 T GetNewKeyFromSHA
+ffffffff8139dd60 T pipex_mppe_reduce_key
+ffffffff8139ddb0 T mppe_key_change
+ffffffff8139df10 T pipex_ccp_output
+ffffffff8139dfb0 T pipex_sysctl
 ffffffff8139f000 T rn_search_m
 ffffffff8139f060 T rn_refines
 ffffffff8139f150 T rn_lookup
@@ -8405,33 +8405,36 @@ ffffffff813cd3d0 T pppxread
 ffffffff813cd590 T pppxwrite
 ffffffff813cd8c0 T pppx_if_find
 ffffffff813cd970 T pppxioctl
-ffffffff813cdb30 T pppx_add_session
-ffffffff813ce290 T pppx_del_session
-ffffffff813ce3a0 T pppx_set_session_descr
-ffffffff813ce4e0 T pppxpoll
-ffffffff813ce5c0 T pppxkqfilter
-ffffffff813ce6b0 T pppxclose
-ffffffff813ce7f0 T pppx_if_destroy
-ffffffff813ce9d0 T pppx_if_next_unit
-ffffffff813cea50 T pppx_if_start
-ffffffff813ceb00 T pppx_if_output
-ffffffff813ced10 T pppx_if_ioctl
-ffffffff813ceda0 T pppacattach
-ffffffff813cedb0 T pppacopen
-ffffffff813cef90 t pppac_output
-ffffffff813cf000 t pppac_start
-ffffffff813cf160 t pppac_ioctl
-ffffffff813cf230 T pppacread
-ffffffff813cf380 T pppacwrite
-ffffffff813cf590 T pppacioctl
-ffffffff813cf640 T pppacpoll
-ffffffff813cf6d0 T pppackqfilter
-ffffffff813cf7a0 T pppacclose
-ffffffff813cf8d0 t pppx_ifs_RBT_COMPARE
-ffffffff813cf8f0 t filt_pppac_rdetach
-ffffffff813cf970 t filt_pppac_read
-ffffffff813cf9c0 t filt_pppac_wdetach
-ffffffff813cfa40 t filt_pppac_write
+ffffffff813cdb40 T pppx_add_session
+ffffffff813ce2a0 T pppx_del_session
+ffffffff813ce3b0 T pppx_config_session
+ffffffff813ce490 T pppx_get_stat
+ffffffff813ce570 T pppx_get_closed
+ffffffff813ce5b0 T pppx_set_session_descr
+ffffffff813ce6f0 T pppxpoll
+ffffffff813ce7d0 T pppxkqfilter
+ffffffff813ce8c0 T pppxclose
+ffffffff813cea00 T pppx_if_destroy
+ffffffff813cebe0 T pppx_if_next_unit
+ffffffff813cec60 T pppx_if_start
+ffffffff813ced10 T pppx_if_output
+ffffffff813cef20 T pppx_if_ioctl
+ffffffff813cefb0 T pppacattach
+ffffffff813cefc0 T pppacopen
+ffffffff813cf1a0 t pppac_output
+ffffffff813cf210 t pppac_start
+ffffffff813cf370 t pppac_ioctl
+ffffffff813cf440 T pppacread
+ffffffff813cf590 T pppacwrite
+ffffffff813cf7a0 T pppacioctl
+ffffffff813cf850 T pppacpoll
+ffffffff813cf8e0 T pppackqfilter
+ffffffff813cf9b0 T pppacclose
+ffffffff813cfae0 t pppx_ifs_RBT_COMPARE
+ffffffff813cfb00 t filt_pppac_rdetach
+ffffffff813cfb80 t filt_pppac_read
+ffffffff813cfbd0 t filt_pppac_wdetach
+ffffffff813cfc50 t filt_pppac_write
 ffffffff813d0000 T vxlan_clone_create
 ffffffff813d0210 T vxlan_clone_destroy
 ffffffff813d0340 T vxlanattach
@@ -14592,8952 +14595,8946 @@ ffffffff81744980 T ixgb_led_on
 ffffffff817449d0 T ixgb_led_off
 ffffffff81745000 T ixgbe_probe
 ffffffff81745020 T ixgbe_attach
-ffffffff81745690 T ixgbe_detach
-ffffffff817458c0 T ixgbe_local_timer
-ffffffff81745980 T ixgbe_rxrefill
-ffffffff81745a20 T ixgbe_identify_hardware
-ffffffff81745af0 T ixgbe_allocate_pci_resources
-ffffffff81745be0 T ixgbe_allocate_queues
-ffffffff81746080 T ixgbe_allocate_legacy
-ffffffff817461a0 T ixgbe_setup_interface
-ffffffff817462b0 T ixgbe_update_stats_counters
-ffffffff81746360 T ixgbe_free_transmit_structures
-ffffffff817463d0 T ixgbe_free_receive_structures
-ffffffff81746490 T ixgbe_free_pci_resources
-ffffffff81746570 T ixgbe_stop
-ffffffff81746800 T ixgbe_start
-ffffffff817469e0 T ixgbe_encap
-ffffffff81746be0 T ixgbe_ioctl
-ffffffff81746eb0 T ixgbe_init
-ffffffff81747a00 T ixgbe_rxrinfo
-ffffffff81747b50 T ixgbe_get_sffpage
-ffffffff81747cf0 T ixgbe_disable_intr
-ffffffff81747dc0 T ixgbe_iff
-ffffffff81747f40 T ixgbe_enable_intr
-ffffffff81748120 T ixgbe_watchdog
-ffffffff81748340 T ixgbe_setup_transmit_structures
-ffffffff81748450 T ixgbe_initialize_transmit_units
-ffffffff81748730 T ixgbe_setup_receive_structures
-ffffffff81748850 T ixgbe_initialize_receive_units
-ffffffff81748ba0 T ixgbe_config_gpie
-ffffffff81748c80 T ixgbe_setup_vlan_hw_support
-ffffffff81748e00 T ixgbe_configure_ivars
-ffffffff81748e30 T ixgbe_set_ivar
-ffffffff81748fd0 T ixgbe_config_link
-ffffffff81749170 T ixgbe_config_delay_values
-ffffffff81749280 T ixgbe_enable_queue
-ffffffff81749350 T ixgbe_disable_queue
-ffffffff81749420 T ixgbe_intr
-ffffffff817499a0 T ixgbe_rxeof
-ffffffff81749d30 T ixgbe_txeof
-ffffffff81749ed0 T ixgbe_rxfill
-ffffffff8174a000 T ixgbe_update_link_status
-ffffffff8174a100 T ixgbe_handle_mod
-ffffffff8174a220 T ixgbe_handle_msf
-ffffffff8174a2f0 T ixgbe_handle_phy
-ffffffff8174a380 T ixgbe_media_status
-ffffffff8174a620 T ixgbe_media_change
-ffffffff8174a6c0 T ixgbe_tx_ctx_setup
-ffffffff8174a8a0 T ixgbe_mc_array_itr
-ffffffff8174a8e0 T ixgbe_add_media_types
-ffffffff8174ab80 T ixgbe_dma_malloc
-ffffffff8174ada0 T ixgbe_dma_free
-ffffffff8174ae50 T ixgbe_allocate_transmit_buffers
-ffffffff8174afb0 T ixgbe_setup_transmit_ring
-ffffffff8174b040 T ixgbe_free_transmit_buffers
-ffffffff8174b160 T ixgbe_get_buf
-ffffffff8174b2a0 T ixgbe_allocate_receive_buffers
-ffffffff8174b3d0 T ixgbe_setup_receive_ring
-ffffffff8174b4c0 T ixgbe_initialize_rss_mapping
-ffffffff8174b740 T ixgbe_free_receive_buffers
-ffffffff8174b860 T ixgbe_rx_checksum
-ffffffff8174b8b0 T ixgbe_read_pci_cfg
-ffffffff8174b910 T ixgbe_write_pci_cfg
-ffffffff8174c000 T ixgbe_init_ops_generic
-ffffffff8174c260 T ixgbe_init_eeprom_params_generic
-ffffffff8174c310 T ixgbe_read_eerd_generic
-ffffffff8174c420 T ixgbe_read_eeprom_bit_bang_generic
-ffffffff8174c750 T ixgbe_write_eeprom_generic
-ffffffff8174cc40 T ixgbe_validate_eeprom_checksum_generic
-ffffffff8174cd00 T ixgbe_update_eeprom_checksum_generic
-ffffffff8174cd80 T ixgbe_calc_eeprom_checksum_generic
-ffffffff8174cf30 T ixgbe_init_hw_generic
-ffffffff8174cf80 T ixgbe_start_hw_generic
-ffffffff8174d0a0 T ixgbe_clear_hw_cntrs_generic
-ffffffff8174dac0 T ixgbe_enable_rx_dma_generic
-ffffffff8174db20 T ixgbe_get_mac_addr_generic
-ffffffff8174dbb0 T ixgbe_stop_adapter_generic
-ffffffff8174dd30 T ixgbe_get_bus_info_generic
-ffffffff8174dde0 T ixgbe_set_lan_id_multi_port_pcie
-ffffffff8174deb0 T ixgbe_acquire_swfw_sync
-ffffffff8174e100 T ixgbe_release_swfw_sync
-ffffffff8174e1b0 T prot_autoc_read_generic
-ffffffff8174e210 T prot_autoc_write_generic
-ffffffff8174e260 T ixgbe_led_on_generic
-ffffffff8174e320 T ixgbe_led_off_generic
-ffffffff8174e3d0 T ixgbe_blink_led_start_generic
-ffffffff8174e550 T ixgbe_blink_led_stop_generic
-ffffffff8174e660 T ixgbe_set_rar_generic
-ffffffff8174e780 T ixgbe_clear_rar_generic
-ffffffff8174e870 T ixgbe_init_rx_addrs_generic
-ffffffff8174ea80 T ixgbe_update_mc_addr_list_generic
-ffffffff8174ec80 T ixgbe_enable_mc_generic
-ffffffff8174ecf0 T ixgbe_disable_mc_generic
-ffffffff8174ed50 T ixgbe_enable_rx_generic
-ffffffff8174ee20 T ixgbe_disable_rx_generic
-ffffffff8174ef10 T ixgbe_fc_enable_generic
-ffffffff8174f350 T ixgbe_setup_fc_generic
-ffffffff8174f620 T ixgbe_fc_autoneg
-ffffffff8174f910 T ixgbe_device_supports_autoneg_fc
-ffffffff8174fa10 T ixgbe_start_hw_gen2
-ffffffff8174fbf0 T ixgbe_identify_phy
-ffffffff8174fc40 T ixgbe_set_pci_config_data_generic
-ffffffff8174fcc0 T ixgbe_disable_rx
-ffffffff8174fd00 T ixgbe_disable_pcie_master
-ffffffff8174fe50 T ixgbe_read_eerd_buffer_generic
-ffffffff8174ff90 T ixgbe_poll_eerd_eewr_done
-ffffffff81750040 T ixgbe_write_eewr_buffer_generic
-ffffffff817501d0 T ixgbe_write_eewr_generic
-ffffffff81750210 T ixgbe_acquire_eeprom
-ffffffff817503a0 T ixgbe_get_eeprom_semaphore
-ffffffff817505c0 T ixgbe_release_eeprom_semaphore
-ffffffff81750630 T ixgbe_ready_eeprom
-ffffffff817507a0 T ixgbe_shift_out_eeprom_bits
-ffffffff81750960 T ixgbe_shift_in_eeprom_bits
-ffffffff81750ac0 T ixgbe_standby_eeprom
-ffffffff81750ba0 T ixgbe_raise_eeprom_clk
-ffffffff81750c10 T ixgbe_lower_eeprom_clk
-ffffffff81750c80 T ixgbe_release_eeprom
-ffffffff81750d60 T ixgbe_validate_mac_addr
-ffffffff81750de0 T ixgbe_init_uta_tables
-ffffffff81750e20 T ixgbe_add_uc_addr
-ffffffff81750e90 T ixgbe_mta_vector
-ffffffff81750f30 T ixgbe_set_mta
-ffffffff81750ff0 T ixgbe_negotiate_fc
-ffffffff817510b0 T ixgbe_fc_autoneg_fiber
-ffffffff817511d0 T ixgbe_fc_autoneg_backplane
-ffffffff81751340 T ixgbe_fc_autoneg_copper
-ffffffff81751460 T ixgbe_disable_sec_rx_path_generic
-ffffffff81751520 T ixgbe_enable_sec_rx_path_generic
-ffffffff817515b0 T ixgbe_enable_rx
-ffffffff817515f0 T ixgbe_get_pcie_msix_count_generic
-ffffffff81751670 T ixgbe_insert_mac_addr_generic
-ffffffff81751890 T ixgbe_set_vmdq
-ffffffff817518d0 T ixgbe_set_rar
-ffffffff81751910 T ixgbe_clear_vmdq
-ffffffff81751950 T ixgbe_clear_vmdq_generic
-ffffffff81751ae0 T ixgbe_set_vmdq_generic
-ffffffff81751b90 T ixgbe_init_uta_tables_generic
-ffffffff81751c10 T ixgbe_find_vlvf_slot
-ffffffff81751cd0 T ixgbe_set_vfta_generic
-ffffffff81751de0 T ixgbe_set_vlvf_generic
-ffffffff81752080 T ixgbe_clear_vfta_generic
-ffffffff81752170 T ixgbe_need_crosstalk_fix
-ffffffff817521c0 T ixgbe_check_mac_link_generic
-ffffffff817523e0 T ixgbe_get_device_caps_generic
-ffffffff81752430 T ixgbe_calculate_checksum
-ffffffff817524f0 T ixgbe_hic_unlocked
-ffffffff817526d0 T ixgbe_host_interface_command
-ffffffff817528a0 T ixgbe_clear_tx_pending
-ffffffff81752a90 T ixgbe_mng_present
-ffffffff81752af0 T ixgbe_mng_enabled
-ffffffff81752bb0 T ixgbe_setup_mac_link_multispeed_fiber
-ffffffff81752f80 T ixgbe_flap_tx_laser
-ffffffff81752fc0 T ixgbe_check_link
-ffffffff81753000 T ixgbe_set_soft_rate_select_speed
-ffffffff817530f0 T ixgbe_init_shared_code
-ffffffff817531a0 T ixgbe_set_mac_type
-ffffffff81753350 T ixgbe_init_hw
-ffffffff81753390 T ixgbe_get_media_type
-ffffffff817533d0 T ixgbe_read_mbx
-ffffffff81753420 T ixgbe_write_mbx
-ffffffff81753470 T ixgbe_check_for_msg
-ffffffff817534b0 T ixgbe_check_for_ack
-ffffffff817534f0 T ixgbe_check_for_rst
-ffffffff81753530 T ixgbe_poll_for_msg
-ffffffff817535e0 T ixgbe_poll_for_ack
-ffffffff81753690 T ixgbe_read_posted_mbx
-ffffffff81753780 T ixgbe_write_posted_mbx
-ffffffff81753850 T ixgbe_init_mbx_ops_generic
-ffffffff81753890 T ixgbe_read_v2p_mailbox
-ffffffff81753900 T ixgbe_check_for_bit_pf
-ffffffff81753990 T ixgbe_check_for_msg_pf
-ffffffff81753a40 T ixgbe_check_for_ack_pf
-ffffffff81753ae0 T ixgbe_check_for_rst_pf
-ffffffff81753bc0 T ixgbe_obtain_mbx_lock_pf
-ffffffff81753c50 T ixgbe_write_mbx_pf
-ffffffff81753e30 T ixgbe_read_mbx_pf
-ffffffff81753f50 T ixgbe_init_mbx_params_pf
-ffffffff81755000 T ixgbe_set_pcie_completion_timeout
-ffffffff81755090 T ixgbe_init_ops_82598
-ffffffff817551e0 T ixgbe_init_phy_ops_82598
-ffffffff817552d0 T ixgbe_start_hw_82598
-ffffffff81755490 T ixgbe_reset_hw_82598
-ffffffff817557d0 T ixgbe_get_media_type_82598
-ffffffff81755890 T ixgbe_get_supported_physical_layer_82598
-ffffffff81755a80 T ixgbe_read_analog_reg8_82598
-ffffffff81755b30 T ixgbe_write_analog_reg8_82598
-ffffffff81755bb0 T ixgbe_set_lan_id_multi_port_pcie_82598
-ffffffff81755c50 T ixgbe_enable_rx_dma_82598
-ffffffff81755ca0 T ixgbe_set_vmdq_82598
-ffffffff81755d50 T ixgbe_clear_vmdq_82598
-ffffffff81755e00 T ixgbe_set_vfta_82598
-ffffffff81755f30 T ixgbe_clear_vfta_82598
-ffffffff817560e0 T ixgbe_fc_enable_82598
-ffffffff81756540 T ixgbe_read_i2c_eeprom_82598
-ffffffff81756560 T ixgbe_check_mac_link_82598
-ffffffff81756800 T ixgbe_setup_mac_link_82598
-ffffffff817569d0 T ixgbe_get_link_capabilities_82598
-ffffffff81756aa0 T ixgbe_setup_copper_link_82598
-ffffffff81756bc0 T ixgbe_start_mac_link_82598
-ffffffff81756ce0 T ixgbe_validate_link_ready
-ffffffff81756da0 T ixgbe_read_i2c_phy_82598
-ffffffff81757000 T ixgbe_init_mac_link_ops_82599
-ffffffff81757190 T ixgbe_disable_tx_laser_multispeed_fiber
-ffffffff81757250 T ixgbe_enable_tx_laser_multispeed_fiber
-ffffffff817572d0 T ixgbe_flap_tx_laser_multispeed_fiber
-ffffffff81757410 T ixgbe_setup_mac_link_82599
-ffffffff817576c0 T ixgbe_set_hard_rate_select_speed
-ffffffff81757780 T ixgbe_verify_lesm_fw_enabled_82599
-ffffffff81757840 T ixgbe_setup_mac_link_smartspeed
-ffffffff81757bd0 T ixgbe_init_phy_ops_82599
-ffffffff81757d20 T ixgbe_read_i2c_byte_82599
-ffffffff81757eb0 T ixgbe_write_i2c_byte_82599
-ffffffff81758040 T ixgbe_setup_copper_link_82599
-ffffffff817580a0 T ixgbe_setup_sfp_modules_82599
-ffffffff81758260 T prot_autoc_read_82599
-ffffffff81758370 T prot_autoc_write_82599
-ffffffff817584e0 T ixgbe_reset_pipeline_82599
-ffffffff81758660 T ixgbe_init_ops_82599
-ffffffff81758840 T ixgbe_identify_phy_82599
-ffffffff817588d0 T ixgbe_reset_hw_82599
-ffffffff81758c80 T ixgbe_get_media_type_82599
-ffffffff81758db0 T ixgbe_get_supported_physical_layer_82599
-ffffffff81758f70 T ixgbe_enable_rx_dma_82599
-ffffffff81758fe0 T ixgbe_read_analog_reg8_82599
-ffffffff81759090 T ixgbe_write_analog_reg8_82599
-ffffffff81759110 T ixgbe_start_hw_82599
-ffffffff81759210 T ixgbe_get_link_capabilities_82599
-ffffffff81759340 T ixgbe_stop_mac_link_on_d3_82599
-ffffffff81759400 T ixgbe_read_eeprom_82599
-ffffffff81759430 T ixgbe_start_mac_link_82599
-ffffffff81759610 T ixgbe_verify_fw_version_82599
-ffffffff8175a000 T ixgbe_init_ops_X540
-ffffffff8175a220 T ixgbe_init_eeprom_params_X540
-ffffffff8175a2a0 T ixgbe_read_eerd_X540
-ffffffff8175a330 T ixgbe_write_eewr_X540
-ffffffff8175a3c0 T ixgbe_update_eeprom_checksum_X540
-ffffffff8175a490 T ixgbe_validate_eeprom_checksum_X540
-ffffffff8175a580 T ixgbe_calc_eeprom_checksum_X540
-ffffffff8175a720 T ixgbe_reset_hw_X540
-ffffffff8175a900 T ixgbe_get_media_type_X540
-ffffffff8175a930 T ixgbe_get_supported_physical_layer_X540
-ffffffff8175a9b0 T ixgbe_start_hw_X540
-ffffffff8175aa00 T ixgbe_acquire_swfw_sync_X540
-ffffffff8175aea0 T ixgbe_release_swfw_sync_X540
-ffffffff8175afe0 T ixgbe_init_swfw_sync_X540
-ffffffff8175b0c0 T ixgbe_setup_mac_link_X540
-ffffffff8175b0e0 T ixgbe_blink_led_start_X540
-ffffffff8175b200 T ixgbe_blink_led_stop_X540
-ffffffff8175b300 T ixgbe_get_link_capabilities_X540
-ffffffff8175b340 T ixgbe_update_flash_X540
-ffffffff8175b530 T ixgbe_poll_flash_update_done_X540
-ffffffff8175b5d0 T ixgbe_get_swfw_sync_semaphore
-ffffffff8175b760 T ixgbe_release_swfw_sync_semaphore
-ffffffff8175c000 T ixgbe_init_ops_X550
-ffffffff8175c110 T ixgbe_dmac_config_X550
-ffffffff8175c1f0 T ixgbe_dmac_config_tcs_X550
-ffffffff8175c340 T ixgbe_dmac_update_tcs_X550
-ffffffff8175c400 T ixgbe_set_source_address_pruning_X550
-ffffffff8175c4e0 T ixgbe_init_eeprom_params_X550
-ffffffff8175c560 T ixgbe_calc_eeprom_checksum_X550
-ffffffff8175c570 T ixgbe_read_ee_hostif_X550
-ffffffff8175c640 T ixgbe_write_ee_hostif_X550
-ffffffff8175c700 T ixgbe_update_eeprom_checksum_X550
-ffffffff8175c890 T ixgbe_validate_eeprom_checksum_X550
-ffffffff8175c9d0 T ixgbe_disable_rx_x550
-ffffffff8175caf0 T ixgbe_led_on_t_X550em
-ffffffff8175cbb0 T ixgbe_led_off_t_X550em
-ffffffff8175cc70 T ixgbe_read_cs4227
-ffffffff8175cca0 T ixgbe_write_cs4227
-ffffffff8175ccc0 T ixgbe_read_pe
-ffffffff8175cd10 T ixgbe_write_pe
-ffffffff8175cd60 T ixgbe_reset_cs4227
-ffffffff8175cff0 T ixgbe_check_cs4227
-ffffffff8175d1c0 T ixgbe_setup_mux_ctl
-ffffffff8175d240 T ixgbe_identify_phy_x550em
-ffffffff8175d450 T ixgbe_read_mng_if_sel_x550em
-ffffffff8175d4c0 T ixgbe_fw_phy_activity
-ffffffff8175d5f0 T ixgbe_get_phy_id_fw
-ffffffff8175d710 T ixgbe_identify_phy_fw
-ffffffff8175d760 T ixgbe_shutdown_fw_phy
-ffffffff8175d7c0 T ixgbe_read_phy_reg_x550em
-ffffffff8175d7f0 T ixgbe_write_phy_reg_x550em
-ffffffff8175d820 T ixgbe_init_ops_X550EM
-ffffffff8175daf0 T ixgbe_get_bus_info_X550em
-ffffffff8175db40 T ixgbe_get_media_type_X550em
-ffffffff8175dc30 T ixgbe_setup_sfp_modules_X550em
-ffffffff8175ddc0 T ixgbe_get_link_capabilities_X550em
-ffffffff8175de90 T ixgbe_reset_hw_X550em
-ffffffff8175e390 T ixgbe_get_supported_physical_layer_X550em
-ffffffff8175e510 T ixgbe_setup_fc_X550em
-ffffffff8175e680 T ixgbe_init_phy_ops_X550em
-ffffffff8175eb40 T ixgbe_setup_fw_link
-ffffffff8175ec70 T ixgbe_fc_autoneg_fw
-ffffffff8175ec90 T ixgbe_setup_eee_fw
-ffffffff8175ecf0 T ixgbe_init_ops_X550EM_a
-ffffffff8175ee20 T ixgbe_read_iosf_sb_reg_x550
-ffffffff8175efa0 T ixgbe_write_iosf_sb_reg_x550
-ffffffff8175f110 T ixgbe_read_iosf_sb_reg_x550a
-ffffffff8175f1a0 T ixgbe_write_iosf_sb_reg_x550a
-ffffffff8175f230 T ixgbe_acquire_swfw_sync_X550a
-ffffffff8175f380 T ixgbe_release_swfw_sync_X550a
-ffffffff8175f410 T ixgbe_fc_autoneg_fiber_x550em_a
-ffffffff8175f450 T ixgbe_fc_autoneg_backplane_x550em_a
-ffffffff8175f5b0 T ixgbe_setup_fc_backplane_x550em_a
-ffffffff8175f7a0 T ixgbe_fc_autoneg_sgmii_x550em_a
-ffffffff8175f890 T ixgbe_init_ops_X550EM_x
-ffffffff8175f950 T ixgbe_acquire_swfw_sync_X550em
-ffffffff8175fa10 T ixgbe_release_swfw_sync_X550em
-ffffffff8175faa0 T ixgbe_iosf_wait
-ffffffff8175fb50 T ixgbe_get_phy_token
-ffffffff8175fbe0 T ixgbe_put_phy_token
-ffffffff8175fc50 T ixgbe_supported_sfp_modules_X550em
-ffffffff8175fcd0 T ixgbe_identify_sfp_module_X550em
-ffffffff8175fd40 T ixgbe_init_mac_link_ops_X550em
-ffffffff8175fe80 T ixgbe_restart_an_internal_phy_x550em
-ffffffff8175ff90 T ixgbe_setup_sgmii
-ffffffff81760230 T ixgbe_setup_sgmii_fw
-ffffffff81760500 T ixgbe_setup_mac_link_sfp_x550a
-ffffffff817606f0 T ixgbe_setup_mac_link_sfp_x550em
-ffffffff817607b0 T ixgbe_setup_mac_link_t_X550em
-ffffffff81760850 T ixgbe_check_link_t_X550em
-ffffffff81760920 T ixgbe_get_lasi_ext_t_x550em
-ffffffff81760aa0 T ixgbe_enable_lasi_ext_t_x550em
-ffffffff81760c30 T ixgbe_setup_kr_speed_x550em
-ffffffff81760e40 T ixgbe_reset_phy_fw
-ffffffff81760ef0 T ixgbe_check_overtemp_fw
-ffffffff81760f80 T ixgbe_read_phy_reg_x550a
-ffffffff81761020 T ixgbe_write_phy_reg_x550a
-ffffffff817610d0 T ixgbe_setup_kr_x550em
-ffffffff81761140 T ixgbe_setup_internal_phy_t_x550em
-ffffffff817612d0 T ixgbe_enter_lplu_t_x550em
-ffffffff817615a0 T ixgbe_handle_lasi_ext_t_x550em
-ffffffff81761600 T ixgbe_reset_phy_t_X550em
-ffffffff81761650 T ixgbe_set_mdio_speed
-ffffffff81761720 T ixgbe_init_ext_t_x550em
-ffffffff817617d0 T ixgbe_setup_sfi_x550a
-ffffffff81761980 T ixgbe_setup_ixfi_x550em_x
-ffffffff81761b60 T ixgbe_setup_ixfi_x550em
-ffffffff81761d40 T ixgbe_ext_phy_t_x550em_get_link
-ffffffff81761dd0 T ixgbe_setup_phy_loopback_x550em
-ffffffff81761fc0 T ixgbe_read_ee_hostif_buffer_X550
-ffffffff81762160 T ixgbe_write_ee_hostif_data_X550
-ffffffff817621c0 T ixgbe_checksum_ptr_x550
-ffffffff81762350 T ixgbe_calc_checksum_X550
-ffffffff817624e0 T ixgbe_update_flash_X550
-ffffffff81762530 T ixgbe_get_lcd_t_x550em
-ffffffff817625f0 T ixgbe_set_mux
-ffffffff81763000 T ixgbe_read_i2c_combined_generic_int
-ffffffff81763250 T ixgbe_i2c_start
-ffffffff817633b0 T ixgbe_clock_in_i2c_byte
-ffffffff817634a0 T ixgbe_clock_out_i2c_bit
-ffffffff817635b0 T ixgbe_i2c_stop
-ffffffff81763710 T ixgbe_i2c_bus_clear
-ffffffff81763830 T ixgbe_read_i2c_combined_generic
-ffffffff81763850 T ixgbe_read_i2c_combined_generic_unlocked
-ffffffff81763870 T ixgbe_write_i2c_combined_generic_int
-ffffffff81763a50 T ixgbe_write_i2c_combined_generic
-ffffffff81763a70 T ixgbe_write_i2c_combined_generic_unlocked
-ffffffff81763a90 T ixgbe_init_phy_ops_generic
-ffffffff81763bc0 T ixgbe_identify_phy_generic
-ffffffff817640a0 T ixgbe_reset_phy_generic
-ffffffff81764230 T ixgbe_read_phy_reg_generic
-ffffffff817642d0 T ixgbe_write_phy_reg_generic
-ffffffff81764380 T ixgbe_read_phy_reg_mdi
-ffffffff81764510 T ixgbe_write_phy_reg_mdi
-ffffffff817646a0 T ixgbe_setup_phy_link_generic
-ffffffff81764960 T ixgbe_setup_phy_link_speed_generic
-ffffffff817649e0 T ixgbe_get_phy_firmware_version_generic
-ffffffff81764a00 T ixgbe_read_i2c_byte_generic
-ffffffff81764a20 T ixgbe_write_i2c_byte_generic
-ffffffff81764a40 T ixgbe_read_i2c_eeprom_generic
-ffffffff81764a60 T ixgbe_write_i2c_eeprom_generic
-ffffffff81764a80 T ixgbe_identify_module_generic
-ffffffff81764af0 T ixgbe_read_i2c_byte_generic_unlocked
-ffffffff81764b10 T ixgbe_write_i2c_byte_generic_unlocked
-ffffffff81764b30 T ixgbe_tn_check_overtemp
-ffffffff81764ba0 T ixgbe_check_reset_blocked
-ffffffff81764c00 T ixgbe_validate_phy_addr
-ffffffff81764c70 T ixgbe_get_phy_id
-ffffffff81764d20 T ixgbe_get_phy_type_from_id
-ffffffff81764de0 T ixgbe_get_copper_link_capabilities_generic
-ffffffff81764ec0 T ixgbe_get_copper_speeds_supported
-ffffffff81764f70 T ixgbe_check_phy_link_tnx
-ffffffff81765230 T ixgbe_setup_phy_link_tnx
-ffffffff817654d0 T ixgbe_get_phy_firmware_version_tnx
-ffffffff817654f0 T ixgbe_reset_phy_nl
-ffffffff81765790 T ixgbe_get_sfp_init_sequence_offsets
-ffffffff81765970 T ixgbe_is_sfp
-ffffffff817659b0 T ixgbe_identify_sfp_module_generic
-ffffffff81765dc0 T ixgbe_identify_qsfp_module_generic
-ffffffff817660a0 T ixgbe_get_supported_phy_sfp_layer_generic
-ffffffff81766240 T ixgbe_is_sfp_probe
-ffffffff81766280 T ixgbe_read_i2c_byte_generic_int
-ffffffff81766480 T ixgbe_clock_out_i2c_byte
-ffffffff817665e0 T ixgbe_get_i2c_ack
-ffffffff817667f0 T ixgbe_write_i2c_byte_generic_int
-ffffffff81766950 T ixgbe_set_i2c_data
-ffffffff81766b10 T ixgbe_raise_i2c_clk
-ffffffff81766c20 T ixgbe_lower_i2c_clk
-ffffffff81766cb0 T ixgbe_clock_in_i2c_bit
-ffffffff81766e90 T ixgbe_get_i2c_data
-ffffffff81766f40 T ixgbe_set_copper_phy_power
-ffffffff81768000 t ixl_match
-ffffffff81768020 t ixl_attach
-ffffffff8176a920 t ixl_dmamem_alloc
-ffffffff8176aa80 t ixl_arq
-ffffffff8176ae30 t ixl_arq_fill
-ffffffff8176b0c0 t ixl_intr
-ffffffff8176b690 t ixl_ioctl
-ffffffff8176d350 t ixl_start
-ffffffff8176d690 t ixl_watchdog
-ffffffff8176d6c0 t ixl_media_change
-ffffffff8176d6f0 t ixl_media_status
-ffffffff8176d780 t ixl_link_state_update
-ffffffff8176d8c0 t ixl_atq_poll
-ffffffff8176dab0 t ixl_rxfill
-ffffffff8176dcc0 t ixl_down
-ffffffff8176e4b0 t ixl_rxrefill
-ffffffff8176e4d0 t ixl_sfp_open
-ffffffff8176e880 t ixl_sfp_get
-ffffffff8176ea80 t ixl_sfp_close
-ffffffff8176ec80 t ixl_wakeup
-ffffffff8176ec90 t ixl_qsfp_open
-ffffffff8176ecc0 t ixl_qsfp_get
-ffffffff8176eec0 t ixl_qsfp_close
-ffffffff8176eef0 t ixl_link_state_update_done
-ffffffff8176f000 T xge_match
-ffffffff8176f020 T xge_attach
-ffffffff8176fdb0 T xge_setup_xgxs_xena
-ffffffff8176fe30 T xge_setup_xgxs_herc
-ffffffff8176feb0 T xge_alloc_txmem
-ffffffff817700c0 T xge_alloc_rxmem
-ffffffff817703a0 T xge_add_rxbuf
-ffffffff81770580 T xge_xgmii_mediachange
-ffffffff817705b0 T xge_ifmedia_status
-ffffffff81770620 T xge_ioctl
-ffffffff817708a0 T xge_start
-ffffffff81770c10 T xge_intr
-ffffffff81771200 T xge_enable
-ffffffff817712b0 T xge_init
-ffffffff81771740 T xge_stop
-ffffffff81771810 T xge_setpromisc
-ffffffff81771890 T xge_setmulti
-ffffffff81772000 T thtc_match
-ffffffff81772080 T thtc_attach
-ffffffff817722a0 T tht_match
-ffffffff817722d0 T tht_attach
-ffffffff817724f0 T thtc_lookup
-ffffffff81772570 T tht_intr
-ffffffff81772750 T thtc_print
-ffffffff817727c0 T tht_sw_reset
-ffffffff81772cb0 T tht_lladdr_read
-ffffffff81772d60 T tht_ioctl
-ffffffff81772ef0 T tht_start
-ffffffff817734c0 T tht_watchdog
-ffffffff817734f0 T tht_media_change
-ffffffff81773520 T tht_media_status
-ffffffff81773600 T tht_mountroot
-ffffffff817737d0 T tht_fifo_alloc
-ffffffff817738e0 T tht_fw_load
-ffffffff81773c70 T tht_fifo_free
-ffffffff81773d20 T tht_link_state
-ffffffff81773dd0 T tht_write
-ffffffff81773e20 T tht_read
-ffffffff81773e40 T tht_rxd
-ffffffff81774240 T tht_rxf_fill
-ffffffff817747e0 T tht_txf
-ffffffff81774ae0 T tht_up
-ffffffff817751b0 T tht_down
-ffffffff81775810 T tht_iff
-ffffffff817759e0 T tht_pkt_alloc
-ffffffff81775c30 T tht_lladdr_write
-ffffffff81775ce0 T tht_pkt_free
-ffffffff81775db0 T tht_write_region
-ffffffff81775e00 T tht_fifo_writable
-ffffffff81775e70 T tht_fifo_readable
-ffffffff81775ee0 T tht_rxf_drain
-ffffffff81775fe0 T tht_fifo_pre
-ffffffff81776030 T tht_pkt_get
-ffffffff817760b0 T tht_load_pkt
-ffffffff81776200 T tht_pkt_put
-ffffffff81776280 T tht_fifo_write
-ffffffff81776330 T tht_fifo_write_dmap
-ffffffff81776480 T tht_fifo_write_pad
-ffffffff81776550 T tht_fifo_post
-ffffffff81776610 T tht_fifo_read
-ffffffff817766b0 T tht_pkt_used
-ffffffff817766e0 T tht_dmamem_alloc
-ffffffff81776860 T tht_dmamem_free
-ffffffff817768d0 T tht_wait_eq
-ffffffff817769a0 T tht_fw_tick
-ffffffff817769d0 T tht_wait_ne
-ffffffff81777000 T myx_match
-ffffffff81777020 T myx_attach
-ffffffff81777270 T myx_mcl_small
-ffffffff817772c0 T myx_refill
-ffffffff81777320 T myx_mcl_big
-ffffffff817773d0 T myx_query
-ffffffff817776a0 T myx_pcie_dc
-ffffffff81777780 T myx_attachhook
-ffffffff81777a70 T myx_ether_aton
-ffffffff81777b20 T myx_read
-ffffffff81777b50 T myx_loadfirmware
-ffffffff81777d60 T myx_write
-ffffffff81777db0 T myx_boot
-ffffffff81777f40 T myx_dmamem_alloc
-ffffffff817780a0 T myx_cmd
-ffffffff817781f0 T myx_probe_firmware
-ffffffff817785e0 T myx_intr
-ffffffff81778870 T myx_ioctl
-ffffffff81778b20 T myx_start
-ffffffff81779010 T myx_watchdog
-ffffffff81779040 T myx_media_change
-ffffffff81779070 T myx_media_status
-ffffffff817791a0 T myx_dmamem_free
-ffffffff81779210 T myx_rdma
-ffffffff81779360 T myx_link_state
-ffffffff817793e0 T myx_up
-ffffffff8177a470 T myx_down
-ffffffff8177aaf0 T myx_rxrinfo
-ffffffff8177abd0 T myx_get_sffpage
-ffffffff8177aed0 T myx_iff
-ffffffff8177b0e0 T myx_setlladdr
-ffffffff8177b1b0 T myx_tx_init
-ffffffff8177b360 T myx_rx_init
-ffffffff8177b580 T myx_rx_fill
-ffffffff8177b870 T myx_rx_empty
-ffffffff8177b940 T myx_rx_free
-ffffffff8177b9d0 T myx_tx_free
-ffffffff8177ba50 T myx_tx_empty
-ffffffff8177bb20 T myx_write_txd_tail
-ffffffff8177bce0 T myx_load_mbuf
-ffffffff8177bd90 T myx_txeof
-ffffffff8177bee0 T myx_rxeof
-ffffffff8177c130 T myx_buf_fill
-ffffffff8177d000 T oce_match
-ffffffff8177d020 T oce_attach
-ffffffff8177d6d0 T oce_pci_alloc
-ffffffff8177d980 T oce_dma_alloc
-ffffffff8177dba0 T oce_init_fw
-ffffffff8177ddc0 T oce_mbox_init
-ffffffff8177de10 T oce_get_fw_config
-ffffffff8177e030 T oce_check_native_mode
-ffffffff8177e1c0 T oce_macaddr_get
-ffffffff8177e320 T oce_intr
-ffffffff8177e510 T oce_init_stats
-ffffffff8177e580 T oce_init_queues
-ffffffff8177e720 T oce_attach_ifp
-ffffffff8177e810 T oce_tick
-ffffffff8177e860 T oce_refill_rx
-ffffffff8177e8e0 T oce_attachhook
-ffffffff8177ea80 T oce_dma_free
-ffffffff8177eb30 T oce_get_link_status
-ffffffff8177ece0 T oce_first_mcc
-ffffffff8177edd0 T oce_media_change
-ffffffff8177ee00 T oce_media_status
-ffffffff8177ef70 T oce_ioctl
-ffffffff8177f110 T oce_start
-ffffffff8177f210 T oce_watchdog
-ffffffff8177f270 T oce_init
-ffffffff8177f7a0 T oce_stop
-ffffffff8177fad0 T oce_rxrinfo
-ffffffff8177fc20 T oce_iff
-ffffffff8177fd60 T oce_update_mcast
-ffffffff8177ff00 T oce_set_promisc
-ffffffff8177ffa0 T oce_link_status
-ffffffff81780070 T oce_update_stats
-ffffffff81780140 T oce_macaddr_set
-ffffffff817802d0 T oce_config_vlan
-ffffffff81780510 T oce_set_flow_control
-ffffffff81780740 T oce_new_rq
-ffffffff81780990 T oce_alloc_rx_bufs
-ffffffff81780ae0 T oce_drain_eq
-ffffffff81780bf0 T oce_cmd
-ffffffff81780e40 T oce_drain_rq
-ffffffff81780f60 T oce_free_posted_rxbuf
-ffffffff81781040 T oce_drain_wq
-ffffffff81781160 T oce_encap
-ffffffff81781540 T oce_intr_wq
-ffffffff817816e0 T oce_txeof
-ffffffff817817e0 T oce_intr_rq
-ffffffff817819b0 T oce_rxeoc
-ffffffff81781b10 T oce_rxeof
-ffffffff81781e20 T oce_port_valid
-ffffffff81781e70 T oce_vtp_valid
-ffffffff81781ed0 T oce_get_buf
-ffffffff81782080 T oce_intr_mq
-ffffffff817822f0 T oce_link_event
-ffffffff817823d0 T oce_create_iface
-ffffffff817825b0 T oce_create_eq
-ffffffff81782720 T oce_create_wq
-ffffffff817829e0 T oce_create_rq
-ffffffff81782c90 T oce_create_mq
-ffffffff81782e60 T oce_release_queues
-ffffffff81782f70 T oce_destroy_rq
-ffffffff817831c0 T oce_destroy_wq
-ffffffff81783410 T oce_destroy_mq
-ffffffff817835f0 T oce_destroy_eq
-ffffffff817837c0 T oce_create_ring
-ffffffff817839b0 T oce_create_cq
-ffffffff81783b50 T oce_destroy_ring
-ffffffff81783bf0 T oce_pkt_alloc
-ffffffff81783ca0 T oce_new_wq
-ffffffff81783e80 T oce_destroy_cq
-ffffffff81784050 T oce_pkt_free
-ffffffff817840a0 T oce_new_eq
-ffffffff81784330 T oce_new_mq
-ffffffff817845a0 T oce_drain_mq
-ffffffff817846c0 T oce_new_cq
-ffffffff81784a40 T oce_load_ring
-ffffffff81784b50 T oce_mbox_dispatch
-ffffffff81784d30 T oce_macaddr_add
-ffffffff81784eb0 T oce_macaddr_del
-ffffffff81784ff0 T oce_stats_be2
-ffffffff81785130 T oce_stats_be3
-ffffffff81785250 T oce_stats_xe
-ffffffff81786000 T dc_pci_match
-ffffffff817860a0 T dc_pci_attach
-ffffffff81786930 T dc_pci_detach
-ffffffff81787000 T epic_pci_match
-ffffffff81787020 T epic_pci_attach
-ffffffff81788000 T ti_pci_match
-ffffffff81788020 T ti_pci_attach
-ffffffff81789000 T ne_pci_match
-ffffffff81789120 T ne_pci_attach
-ffffffff81789490 T ne_pci_lookup
-ffffffff8178a000 T gem_match_pci
-ffffffff8178a020 T gem_attach_pci
-ffffffff8178a260 T gem_detach_pci
-ffffffff8178a2e0 T gem_pci_enaddr
-ffffffff8178b000 T cas_match
-ffffffff8178b020 T cas_attach
-ffffffff8178b1b0 T cas_pci_enaddr
-ffffffff8178b4c0 T cas_intr
-ffffffff8178b630 T cas_config
-ffffffff8178bd60 T cas_reset
-ffffffff8178be20 T cas_start
-ffffffff8178bf70 T cas_ioctl
-ffffffff8178c0c0 T cas_watchdog
-ffffffff8178c110 T cas_mii_readreg
-ffffffff8178c1f0 T cas_mii_writereg
-ffffffff8178c2e0 T cas_mii_statchg
-ffffffff8178c3a0 T cas_mediachange
-ffffffff8178c3f0 T cas_mediastatus
-ffffffff8178c450 T cas_mifinit
-ffffffff8178c4b0 T cas_pcs_readreg
-ffffffff8178c540 T cas_pcs_writereg
-ffffffff8178c6a0 T cas_tick
-ffffffff8178c860 T cas_bitwait
-ffffffff8178c910 T cas_reset_rx
-ffffffff8178cac0 T cas_reset_tx
-ffffffff8178cc70 T cas_rxdrain
-ffffffff8178cca0 T cas_stop
-ffffffff8178cde0 T cas_disable_rx
-ffffffff8178cea0 T cas_disable_tx
-ffffffff8178cf60 T cas_meminit
-ffffffff8178d120 T cas_ringsize
-ffffffff8178d200 T cas_cringsize
-ffffffff8178d2e0 T cas_init
-ffffffff8178d760 T cas_init_regs
-ffffffff8178dc10 T cas_iff
-ffffffff8178df90 T cas_rint
-ffffffff8178e4f0 T cas_add_rxbuf
-ffffffff8178e5f0 T cas_eint
-ffffffff8178e650 T cas_pint
-ffffffff8178e6c0 T cas_tint
-ffffffff8178e850 T cas_encap
-ffffffff8178f000 T hifn_probe
-ffffffff8178f020 T hifn_attach
-ffffffff8178f970 T hifn_set_retry
-ffffffff8178f9c0 T hifn_reset_board
-ffffffff8178fd20 T hifn_enable_crypto
-ffffffff81790410 T hifn_reset_puc
-ffffffff81790530 T hifn_init_dma
-ffffffff81790720 T hifn_init_pci_registers
-ffffffff81790e20 T hifn_ramtype
-ffffffff81790f10 T hifn_sramsize
-ffffffff81791030 T hifn_dramsize
-ffffffff817910c0 T hifn_intr
-ffffffff81791700 T hifn_sessions
-ffffffff817917d0 T hifn_write_4
-ffffffff81791870 T hifn_read_4
-ffffffff817918c0 T hifn_newsession
-ffffffff81791b10 T hifn_freesession
-ffffffff81791b80 T hifn_process
-ffffffff81792000 T hifn_init_pubrng
-ffffffff817924a0 T hifn_tick
-ffffffff81792870 T hifn_rng
-ffffffff81792a50 T hifn_puc_wait
-ffffffff81792b10 T hifn_next_signature
-ffffffff81792ba0 T hifn_writeramaddr
-ffffffff81792e90 T hifn_readramaddr
-ffffffff81793190 T hifn_alloc_slot
-ffffffff817933b0 T hifn_write_command
-ffffffff81793670 T hifn_dmamap_aligned
-ffffffff817936e0 T hifn_dmamap_load_dst
-ffffffff817939c0 T hifn_dmamap_load_src
-ffffffff81793b20 T hifn_crypto
-ffffffff817947f0 T hifn_callback
-ffffffff81794b80 T hifn_abort
-ffffffff81794d90 T hifn_compression
-ffffffff81795150 T hifn_mkmbuf_chain
-ffffffff817952c0 T hifn_compress_enter
-ffffffff81795b20 T hifn_callback_comp
-ffffffff81796000 T ubsec_probe
-ffffffff81796020 T ubsec_attach
-ffffffff81796840 T ubsec_intr
-ffffffff81796b50 T ubsec_dma_malloc
-ffffffff81796d10 T ubsec_newsession
-ffffffff817972f0 T ubsec_freesession
-ffffffff81797370 T ubsec_process
-ffffffff817985c0 T ubsec_reset_board
-ffffffff81798680 T ubsec_init_pciregs
-ffffffff817986c0 T ubsec_init_board
-ffffffff81798770 T ubsec_dma_free
-ffffffff817987e0 T ubsec_rng
-ffffffff81798970 T ubsec_callback
-ffffffff81798b70 T ubsec_feed
-ffffffff81798ed0 T ubsec_callback2
-ffffffff81799030 T ubsec_feed2
-ffffffff81799160 T ubsec_feed4
-ffffffff81799290 T ubsec_totalreset
-ffffffff81799430 T ubsec_dmamap_aligned
-ffffffff817994a0 T ubsec_cleanchip
-ffffffff81799520 T ubsec_free_q
-ffffffff8179a000 T safe_probe
-ffffffff8179a030 T safe_attach
-ffffffff8179a6c0 T safe_intr
-ffffffff8179a7f0 T safe_dma_malloc
-ffffffff8179a9b0 T safe_dma_free
-ffffffff8179aa20 T safe_newsession
-ffffffff8179afb0 T safe_freesession
-ffffffff8179b040 T safe_process
-ffffffff8179c1b0 T safe_reset_board
-ffffffff8179c220 T safe_init_pciregs
-ffffffff8179c250 T safe_init_board
-ffffffff8179c4f0 T safe_rng_init
-ffffffff8179c630 T safe_rng
-ffffffff8179c920 T safe_dmamap_aligned
-ffffffff8179c990 T safe_dmamap_uniform
-ffffffff8179ca10 T safe_mcopy
-ffffffff8179cb30 T safe_feed
-ffffffff8179cc30 T safe_cleanchip
-ffffffff8179cd00 T safe_free_entry
-ffffffff8179cd70 T safe_callback
-ffffffff8179d000 T sf_pci_match
-ffffffff8179d020 T sf_pci_attach
-ffffffff8179e000 T sis_probe
-ffffffff8179e020 T sis_attach
-ffffffff8179eaa0 T sis_activate
-ffffffff8179eb20 T sis_reverse
-ffffffff8179eb80 T sis_delay
-ffffffff8179ec90 T sis_eeprom_idle
-ffffffff8179f210 T sis_eeprom_putbyte
-ffffffff8179f530 T sis_eeprom_getword
-ffffffff8179fbd0 T sis_read_eeprom
-ffffffff8179fc70 T sis_read_cmos
-ffffffff8179fd30 T sis_read_mac
-ffffffff8179ff00 T sis_read96x_mac
-ffffffff817a0050 T sis_mii_sync
-ffffffff817a0190 T sis_mii_send
-ffffffff817a0330 T sis_mii_readreg
-ffffffff817a0920 T sis_mii_writereg
-ffffffff817a0c20 T sis_miibus_readreg
-ffffffff817a0e00 T sis_miibus_writereg
-ffffffff817a0f80 T sis_miibus_statchg
-ffffffff817a1350 T sis_mchash
-ffffffff817a13c0 T sis_iff
-ffffffff817a13e0 T sis_iff_ns
-ffffffff817a1670 T sis_iff_sis
-ffffffff817a1910 T sis_reset
-ffffffff817a1a40 T sis_intr
-ffffffff817a1b90 T sis_tick
-ffffffff817a1bf0 T sis_ioctl
-ffffffff817a1da0 T sis_start
-ffffffff817a1f10 T sis_watchdog
-ffffffff817a1fb0 T sis_ifmedia_upd
-ffffffff817a2030 T sis_ifmedia_sts
-ffffffff817a2090 T sis_stop
-ffffffff817a2370 T sis_init
-ffffffff817a27e0 T sis_ring_init
-ffffffff817a2990 T sis_fill_rx_ring
-ffffffff817a2a40 T sis_newbuf
-ffffffff817a2ba0 T sis_rxeof
-ffffffff817a2dd0 T sis_txeof
-ffffffff817a2fb0 T sis_encap
-ffffffff817a4000 T se_match
-ffffffff817a4020 T se_attach
-ffffffff817a47c0 T se_activate
-ffffffff817a4840 T se_read_eeprom
-ffffffff817a4950 T se_get_mac_addr_eeprom
-ffffffff817a4d20 T se_pcib_match
-ffffffff817a4d80 T se_get_mac_addr_apc
-ffffffff817a5050 T se_miibus_cmd
-ffffffff817a5100 T se_miibus_readreg
-ffffffff817a51f0 T se_miibus_writereg
-ffffffff817a52e0 T se_miibus_statchg
-ffffffff817a5460 T se_iff
-ffffffff817a55c0 T se_reset
-ffffffff817a56e0 T se_intr
-ffffffff817a5870 T se_tick
-ffffffff817a58f0 T se_ioctl
-ffffffff817a5a30 T se_start
-ffffffff817a5b80 T se_watchdog
-ffffffff817a5be0 T se_ifmedia_upd
-ffffffff817a5c40 T se_ifmedia_sts
-ffffffff817a5ca0 T se_stop
-ffffffff817a5e80 T se_init
-ffffffff817a62f0 T se_list_tx_init
-ffffffff817a6380 T se_list_tx_free
-ffffffff817a6410 T se_list_rx_init
-ffffffff817a64c0 T se_newbuf
-ffffffff817a6640 T se_list_rx_free
-ffffffff817a66d0 T se_discard_rxbuf
-ffffffff817a6730 T se_rxeof
-ffffffff817a69a0 T se_txeof
-ffffffff817a6b70 T se_encap
-ffffffff817a7000 T uhci_pci_match
-ffffffff817a7040 T uhci_pci_attach
-ffffffff817a7310 T uhci_pci_detach
-ffffffff817a73b0 T uhci_pci_activate
-ffffffff817a7450 T uhci_pci_attach_deferred
-ffffffff817a8000 T ohci_pci_match
-ffffffff817a8040 T ohci_pci_attach
-ffffffff817a8320 T ohci_pci_detach
-ffffffff817a83c0 T ohci_pci_attach_deferred
-ffffffff817a9000 T ehci_pci_match
-ffffffff817a9040 T ehci_pci_attach
-ffffffff817a9470 T ehci_pci_detach
-ffffffff817a9510 T ehci_pci_activate
-ffffffff817a9580 T ehci_sb700_match
-ffffffff817a95c0 T ehci_pci_takecontroller
-ffffffff817aa000 T xhci_pci_match
-ffffffff817aa040 T xhci_pci_attach
-ffffffff817aa380 T xhci_pci_detach
-ffffffff817aa420 T xhci_pci_activate
-ffffffff817aa4f0 T xhci_pci_takecontroller
-ffffffff817ab000 T pcicbbmatch
-ffffffff817ab040 T pccbbattach
-ffffffff817ab3c0 T pccbbactivate
-ffffffff817ab820 T cb_chipset
-ffffffff817ab870 T pccbb_shutdown
-ffffffff817ab960 T pccbb_power
-ffffffff817abb00 T pccbbintr
-ffffffff817abcc0 T pccbb_legacy_disable
-ffffffff817abd20 T pci113x_insert
-ffffffff817abdd0 T pccbb_pci_callback
-ffffffff817ac110 T pccbb_chipinit
-ffffffff817ac580 T pccbb_pcmcia_attach_setup
-ffffffff817ac6e0 T cbbprint
-ffffffff817ac710 T pccbb_pcmcia_read
-ffffffff817ac740 T pccbb_pcmcia_write
-ffffffff817ac770 T pccbb_checksockstat
-ffffffff817ac840 T pccbbintr_function
-ffffffff817ac8f0 T pccbb_ctrl
-ffffffff817aca30 T pccbb_detect_card
-ffffffff817aca90 T cb_detect_voltage
-ffffffff817acae0 T cb_reset
-ffffffff817acc30 T pccbb_cardenable
-ffffffff817accf0 T pccbb_cb_intr_establish
-ffffffff817acd00 T pccbb_intr_establish
-ffffffff817ace50 T pccbb_cb_intr_disestablish
-ffffffff817ace60 T pccbb_intr_disestablish
-ffffffff817acf90 T pccbb_pcmcia_io_alloc
-ffffffff817ad090 T pccbb_pcmcia_io_free
-ffffffff817ad0b0 T pccbb_pcmcia_io_map
-ffffffff817ad160 T pccbb_pcmcia_do_io_map
-ffffffff817ad2c0 T pccbb_pcmcia_io_unmap
-ffffffff817ad360 T pccbb_pcmcia_wait_ready
-ffffffff817ad400 T pccbb_pcmcia_socket_enable
-ffffffff817ad780 T pccbb_pcmcia_do_mem_map
-ffffffff817ad900 T pccbb_pcmcia_socket_disable
-ffffffff817ada20 T pccbb_pcmcia_card_detect
-ffffffff817ada80 T pccbb_pcmcia_mem_alloc
-ffffffff817adb50 T pccbb_pcmcia_mem_free
-ffffffff817adb70 T pccbb_pcmcia_mem_map
-ffffffff817adca0 T pccbb_pcmcia_mem_unmap
-ffffffff817add30 T pccbb_pcmcia_intr_establish
-ffffffff817add50 T pccbb_pcmcia_intr_disestablish
-ffffffff817add60 T pccbb_pcmcia_intr_string
-ffffffff817adda0 T pccbb_rbus_cb_space_alloc
-ffffffff817adec0 T pccbb_open_win
-ffffffff817ae040 T pccbb_rbus_cb_space_free
-ffffffff817ae150 T pccbb_close_win
-ffffffff817ae210 T pccbb_winlist_insert
-ffffffff817ae310 T pccbb_winset
-ffffffff817ae610 T pccbb_winlist_delete
-ffffffff817af000 T sk_xmac_miibus_readreg
-ffffffff817af170 T sk_xmac_miibus_writereg
-ffffffff817af2f0 T sk_xmac_miibus_statchg
-ffffffff817af3c0 T sk_marv_miibus_readreg
-ffffffff817af500 T sk_marv_miibus_writereg
-ffffffff817af630 T sk_marv_miibus_statchg
-ffffffff817af660 T sk_setfilt
-ffffffff817af720 T sk_iff
-ffffffff817af740 T sk_iff_xmac
-ffffffff817af980 T sk_iff_yukon
-ffffffff817afba0 T sk_init_rx_ring
-ffffffff817afce0 T sk_fill_rx_ring
-ffffffff817afd60 T sk_newbuf
-ffffffff817afec0 T sk_init_tx_ring
-ffffffff817b00a0 T sk_ifmedia_upd
-ffffffff817b00e0 T sk_ifmedia_sts
-ffffffff817b0140 T sk_ioctl
-ffffffff817b02f0 T sk_init
-ffffffff817b0bb0 T sk_stop
-ffffffff817b1290 T skc_probe
-ffffffff817b1320 T skc_reset
-ffffffff817b1520 T sk_probe
-ffffffff817b1570 T sk_attach
-ffffffff817b1ca0 T sk_start
-ffffffff817b1e10 T sk_watchdog
-ffffffff817b1e90 T sk_reset
-ffffffff817b1ef0 T sk_tick
-ffffffff817b20d0 T sk_yukon_tick
-ffffffff817b2130 T sk_init_xmac
-ffffffff817b28e0 T sk_init_yukon
-ffffffff817b2fa0 T sk_detach
-ffffffff817b30c0 T sk_activate
-ffffffff817b3150 T skcprint
-ffffffff817b31c0 T skc_attach
-ffffffff817b3670 T sk_intr
-ffffffff817b3ab0 T skc_detach
-ffffffff817b3b30 T skc_activate
-ffffffff817b3b60 T sk_encap
-ffffffff817b3e80 T sk_txeof
-ffffffff817b4120 T sk_rxeof
-ffffffff817b4440 T sk_intr_bcom
-ffffffff817b4620 T sk_intr_xmac
-ffffffff817b47d0 T sk_intr_yukon
-ffffffff817b5000 T msk_miibus_readreg
-ffffffff817b5130 T msk_miibus_writereg
-ffffffff817b5260 T msk_miibus_statchg
-ffffffff817b5350 T msk_iff
-ffffffff817b5570 T msk_init_rx_ring
-ffffffff817b5610 T msk_fill_rx_ring
-ffffffff817b5890 T msk_init_tx_ring
-ffffffff817b59b0 T msk_ifmedia_upd
-ffffffff817b59f0 T msk_ifmedia_sts
-ffffffff817b5a50 T msk_ioctl
-ffffffff817b5c00 T msk_init
-ffffffff817b65a0 T msk_stop
-ffffffff817b69d0 T mskc_probe
-ffffffff817b69f0 T mskc_reset
-ffffffff817b7240 T msk_probe
-ffffffff817b7290 T msk_reset
-ffffffff817b7380 T msk_attach
-ffffffff817b7a20 T msk_start
-ffffffff817b7dd0 T msk_watchdog
-ffffffff817b7f40 T msk_init_yukon
-ffffffff817b8440 T msk_tick
-ffffffff817b84a0 T msk_fill_rx_tick
-ffffffff817b8510 T msk_detach
-ffffffff817b8630 T msk_activate
-ffffffff817b8760 T mskcprint
-ffffffff817b87d0 T mskc_attach
-ffffffff817b8fc0 T msk_intr
-ffffffff817b9490 T mskc_detach
-ffffffff817b9570 T mskc_activate
-ffffffff817b95a0 T msk_txeof
-ffffffff817b9700 T msk_rxeof
-ffffffff817b9880 T msk_intr_yukon
-ffffffff817ba000 T puc_pci_match
-ffffffff817ba100 T puc_pci_attach
-ffffffff817ba400 T puc_pci_detach
-ffffffff817ba550 T puc_find_description
-ffffffff817ba5f0 T puc_pci_intr_string
-ffffffff817ba620 T puc_pci_intr_establish
-ffffffff817ba6b0 T puc_print_ports
-ffffffff817ba8b0 T puc_common_attach
-ffffffff817baa40 T puc_port_type_name
-ffffffff817baa80 T puc_print
-ffffffff817baaf0 T puc_submatch
-ffffffff817bb000 T com_puc_match
-ffffffff817bb030 T com_puc_attach
-ffffffff817bb130 T com_puc_detach
-ffffffff817bc000 T lpt_puc_probe
-ffffffff817bc030 T lpt_puc_attach
-ffffffff817bc100 T lpt_puc_detach
-ffffffff817bd000 T wi_pci_match
-ffffffff817bd040 T wi_pci_attach
-ffffffff817bd0d0 T wi_pci_activate
-ffffffff817bd1d0 T wi_pci_lookup
-ffffffff817bd3e0 T wi_pci_wakeup
-ffffffff817bd490 T wi_pci_acex_attach
-ffffffff817bd790 T wi_pci_common_attach
-ffffffff817bd8f0 T wi_pci_plx_attach
-ffffffff817bdbf0 T wi_pci_plx_print_cis
-ffffffff817bddf0 T wi_pci_tmd_attach
-ffffffff817bdf60 T wi_pci_native_attach
-ffffffff817bf000 T an_pci_match
-ffffffff817bf020 T an_pci_attach
-ffffffff817c0000 T iwi_match
-ffffffff817c0020 T iwi_attach
-ffffffff817c0960 T iwi_activate
-ffffffff817c09b0 T iwi_intr
-ffffffff817c0c20 T iwi_reset
-ffffffff817c0e20 T iwi_alloc_cmd_ring
-ffffffff817c1000 T iwi_alloc_tx_ring
-ffffffff817c1200 T iwi_alloc_rx_ring
-ffffffff817c1410 T iwi_read_prom_word
-ffffffff817c1ab0 T iwi_ioctl
-ffffffff817c1c40 T iwi_start
-ffffffff817c1d90 T iwi_watchdog
-ffffffff817c1e20 T iwi_newstate
-ffffffff817c2030 T iwi_send_mgmt
-ffffffff817c2060 T iwi_media_change
-ffffffff817c20c0 T iwi_media_status
-ffffffff817c2230 T iwi_init_task
-ffffffff817c22a0 T iwi_free_tx_ring
-ffffffff817c2390 T iwi_free_cmd_ring
-ffffffff817c2440 T iwi_stop
-ffffffff817c26c0 T iwi_wakeup
-ffffffff817c2760 T iwi_init
-ffffffff817c2c90 T iwi_reset_cmd_ring
-ffffffff817c2cd0 T iwi_reset_tx_ring
-ffffffff817c2d70 T iwi_free_rx_ring
-ffffffff817c2e00 T iwi_reset_rx_ring
-ffffffff817c2e30 T iwi_rate
-ffffffff817c2ed0 T iwi_find_txnode
-ffffffff817c2ff0 T iwi_scan
-ffffffff817c32c0 T iwi_auth_and_assoc
-ffffffff817c3b70 T iwi_set_chan
-ffffffff817c3d20 T iwi_frame_intr
-ffffffff817c4040 T iwi_notification_intr
-ffffffff817c4140 T iwi_rx_intr
-ffffffff817c4300 T iwi_tx_intr
-ffffffff817c4400 T iwi_cmd
-ffffffff817c4560 T iwi_tx_start
-ffffffff817c4a30 T iwi_stop_master
-ffffffff817c4bf0 T iwi_load_ucode
-ffffffff817c5230 T iwi_load_firmware
-ffffffff817c5870 T iwi_config
-ffffffff817c5c30 T iwi_update_edca
-ffffffff817c6000 T wpi_match
-ffffffff817c6020 T wpi_attach
-ffffffff817c67d0 T wpi_detach
-ffffffff817c6a70 T wpi_activate
-ffffffff817c6b10 T wpi_intr
-ffffffff817c6d00 T wpi_apm_init
-ffffffff817c7010 T wpi_read_eeprom
-ffffffff817c7290 T wpi_alloc_fwmem
-ffffffff817c72c0 T wpi_alloc_shared
-ffffffff817c72f0 T wpi_alloc_tx_ring
-ffffffff817c74b0 T wpi_alloc_rx_ring
-ffffffff817c76a0 T wpi_apm_stop
-ffffffff817c77c0 T wpi_ioctl
-ffffffff817c7a20 T wpi_start
-ffffffff817c7bb0 T wpi_watchdog
-ffffffff817c7c90 T wpi_node_alloc
-ffffffff817c7cb0 T wpi_newassoc
-ffffffff817c7de0 T wpi_updateedca
-ffffffff817c8080 T wpi_set_key
-ffffffff817c82e0 T wpi_delete_key
-ffffffff817c8500 T wpi_newstate
-ffffffff817c87d0 T wpi_media_change
-ffffffff817c8930 T wpi_radiotap_attach
-ffffffff817c89c0 T wpi_calib_timeout
-ffffffff817c8ac0 T wpi_init_task
-ffffffff817c8b30 T wpi_free_tx_ring
-ffffffff817c8d10 T wpi_free_shared
-ffffffff817c8e00 T wpi_free_fwmem
-ffffffff817c8ef0 T wpi_free_rx_ring
-ffffffff817c9030 T wpi_stop
-ffffffff817c9090 T wpi_wakeup
-ffffffff817c9130 T wpi_init
-ffffffff817c9290 T wpi_nic_lock
-ffffffff817c9360 T wpi_read_prom_data
-ffffffff817c9780 T wpi_dma_contig_alloc
-ffffffff817c9970 T wpi_dma_contig_free
-ffffffff817c9a30 T wpi_reset_rx_ring
-ffffffff817c9bc0 T wpi_reset_tx_ring
-ffffffff817c9cb0 T wpi_read_eeprom_channels
-ffffffff817c9df0 T wpi_read_eeprom_group
-ffffffff817c9ef0 T wpi_set_led
-ffffffff817ca040 T wpi_scan
-ffffffff817ca320 T wpi_auth
-ffffffff817ca7a0 T wpi_run
-ffffffff817cafe0 T wpi_iter_func
-ffffffff817cb000 T wpi_power_calibration
-ffffffff817cb090 T wpi_ccmp_decap
-ffffffff817cb1a0 T wpi_rx_done
-ffffffff817cb660 T wpi_tx_done
-ffffffff817cb7f0 T wpi_cmd_done
-ffffffff817cb8d0 T wpi_notif_intr
-ffffffff817cbcc0 T wpi_tx
-ffffffff817cc430 T wpi_set_pslevel
-ffffffff817cc5c0 T wpi_cmd
-ffffffff817cc900 T wpi_mrr_setup
-ffffffff817ccd00 T wpi_set_timing
-ffffffff817cce90 T wpi_set_txpower
-ffffffff817cd030 T wpi_get_power_index
-ffffffff817cd1e0 T wpi_config
-ffffffff817cd8c0 T wpi_post_alive
-ffffffff817cdae0 T wpi_load_bootcode
-ffffffff817cdeb0 T wpi_load_firmware
-ffffffff817ce4b0 T wpi_read_firmware
-ffffffff817ce670 T wpi_clock_wait
-ffffffff817ce750 T wpi_apm_stop_master
-ffffffff817ce860 T wpi_nic_config
-ffffffff817cea20 T wpi_hw_init
-ffffffff817cf300 T wpi_hw_stop
-ffffffff817d0000 T iwn_match
-ffffffff817d0020 T iwn_attach
-ffffffff817d0c00 T iwn_detach
-ffffffff817d0ff0 T iwn_activate
-ffffffff817d10a0 T iwn_intr
-ffffffff817d1570 T iwn4965_attach
-ffffffff817d16c0 T iwn5000_attach
-ffffffff817d19f0 T iwn_hw_prepare
-ffffffff817d1d80 T iwn_read_eeprom
-ffffffff817d2030 T iwn_alloc_fwmem
-ffffffff817d2060 T iwn_alloc_kw
-ffffffff817d2090 T iwn_alloc_ict
-ffffffff817d20c0 T iwn_alloc_sched
-ffffffff817d2100 T iwn_alloc_tx_ring
-ffffffff817d2270 T iwn_alloc_rx_ring
-ffffffff817d2480 T iwn_ioctl
-ffffffff817d2720 T iwn_start
-ffffffff817d28c0 T iwn_watchdog
-ffffffff817d29b0 T iwn_node_alloc
-ffffffff817d29d0 T iwn_bgscan
-ffffffff817d2a50 T iwn_newassoc
-ffffffff817d2b30 T iwn_updateedca
-ffffffff817d2df0 T iwn_set_key
-ffffffff817d2f20 T iwn_delete_key
-ffffffff817d3020 T iwn_update_htprot
-ffffffff817d32e0 T iwn_ampdu_rx_start
-ffffffff817d33c0 T iwn_ampdu_rx_stop
-ffffffff817d3490 T iwn_ampdu_tx_start
-ffffffff817d3740 T iwn_ampdu_tx_stop
-ffffffff817d39e0 T iwn_newstate
-ffffffff817d3cc0 T iwn_media_change
-ffffffff817d3e20 T iwn_radiotap_attach
-ffffffff817d3eb0 T iwn_calib_timeout
-ffffffff817d40c0 T iwn_init_task
-ffffffff817d4130 T iwn_free_tx_ring
-ffffffff817d4310 T iwn_free_sched
-ffffffff817d4400 T iwn_free_ict
-ffffffff817d44f0 T iwn_free_kw
-ffffffff817d45e0 T iwn_free_fwmem
-ffffffff817d46d0 T iwn4965_load_firmware
-ffffffff817d4d40 T iwn4965_read_eeprom
-ffffffff817d4e70 T iwn4965_post_alive
-ffffffff817d5340 T iwn4965_nic_config
-ffffffff817d5420 T iwn4965_reset_sched
-ffffffff817d5450 T iwn4965_update_sched
-ffffffff817d5530 T iwn4965_get_temperature
-ffffffff817d55a0 T iwn4965_get_rssi
-ffffffff817d5610 T iwn4965_set_txpower
-ffffffff817d5ae0 T iwn4965_init_gains
-ffffffff817d5c80 T iwn4965_set_gains
-ffffffff817d5f90 T iwn4965_add_node
-ffffffff817d6020 T iwn4965_tx_done
-ffffffff817d6180 T iwn4965_ampdu_tx_start
-ffffffff817d65b0 T iwn4965_ampdu_tx_stop
-ffffffff817d67c0 T iwn5000_load_firmware
-ffffffff817d68c0 T iwn5000_read_eeprom
-ffffffff817d6ae0 T iwn5000_post_alive
-ffffffff817d7480 T iwn5000_nic_config
-ffffffff817d7880 T iwn5000_reset_sched
-ffffffff817d7970 T iwn5000_update_sched
-ffffffff817d7a50 T iwn5000_get_temperature
-ffffffff817d7ab0 T iwn5000_get_rssi
-ffffffff817d7b10 T iwn5000_set_txpower
-ffffffff817d7b60 T iwn5000_init_gains
-ffffffff817d7d00 T iwn5000_set_gains
-ffffffff817d7f30 T iwn5000_add_node
-ffffffff817d7f50 T iwn5000_tx_done
-ffffffff817d8140 T iwn5000_ampdu_tx_start
-ffffffff817d85a0 T iwn5000_ampdu_tx_stop
-ffffffff817d8840 T iwn_free_rx_ring
-ffffffff817d8a20 T iwn_stop
-ffffffff817d8aa0 T iwn_wakeup
-ffffffff817d8b50 T iwn_init
-ffffffff817d8e60 T iwn_nic_lock
-ffffffff817d8f30 T iwn_eeprom_lock
-ffffffff817d9010 T iwn_init_otprom
-ffffffff817d94a0 T iwn_clock_wait
-ffffffff817d9580 T iwn_read_prom_data
-ffffffff817d99e0 T iwn_dma_contig_alloc
-ffffffff817d9bd0 T iwn_dma_contig_free
-ffffffff817d9c90 T iwn_reset_rx_ring
-ffffffff817d9e30 T iwn_reset_tx_ring
-ffffffff817d9f30 T iwn5000_ict_reset
-ffffffff817da010 T iwn_apm_init
-ffffffff817da470 T iwn_apm_stop
-ffffffff817da5c0 T iwn_read_eeprom_channels
-ffffffff817da720 T iwn_read_eeprom_enhinfo
-ffffffff817da8b0 T iwn_scan_abort
-ffffffff817daa50 T iwn_set_led
-ffffffff817dac20 T iwn_cmd
-ffffffff817daf80 T iwn_scan
-ffffffff817db450 T iwn_auth
-ffffffff817db690 T iwn_run
-ffffffff817dbab0 T iwn_iter_func
-ffffffff817dbaf0 T iwn_ccmp_decap
-ffffffff817dbc70 T iwn_rx_phy
-ffffffff817dbd50 T iwn_rx_done
-ffffffff817dc380 T iwn_rx_compressed_ba
-ffffffff817dc640 T iwn_ampdu_txq_advance
-ffffffff817dc7b0 T iwn_clear_oactive
-ffffffff817dc830 T iwn5000_rx_calib_results
-ffffffff817dc990 T iwn_rx_statistics
-ffffffff817dcb30 T iwn4965_power_calibration
-ffffffff817dcb80 T iwn_get_noise
-ffffffff817dcbf0 T iwn_collect_noise
-ffffffff817dcd50 T iwn_tune_sensitivity
-ffffffff817dd440 T iwn_tx_done_free_txdata
-ffffffff817dd4e0 T iwn_ampdu_tx_done
-ffffffff817dd7f0 T iwn_tx_done
-ffffffff817dda10 T iwn_cmd_done
-ffffffff817ddaf0 T iwn_notif_intr
-ffffffff817de150 T iwn_init_sensitivity
-ffffffff817de410 T iwn_wakeup_intr
-ffffffff817de4d0 T iwn_rval2ridx
-ffffffff817de550 T iwn_tx
-ffffffff817df070 T iwn_set_pslevel
-ffffffff817df230 T iwn_set_link_quality
-ffffffff817df5d0 T iwn_add_broadcast_node
-ffffffff817df810 T iwn_set_critical_temp
-ffffffff817df8c0 T iwn_set_timing
-ffffffff817dfa80 T iwn_send_sensitivity
-ffffffff817dfb80 T iwn_send_btcoex
-ffffffff817dfbe0 T iwn_send_advanced_btcoex
-ffffffff817e0450 T iwn5000_runtime_calib
-ffffffff817e0500 T iwn_config
-ffffffff817e0a90 T iwn6000_temp_offset_calib
-ffffffff817e0af0 T iwn2000_temp_offset_calib
-ffffffff817e0b80 T iwn_get_active_dwell_time
-ffffffff817e0bc0 T iwn_limit_dwell
-ffffffff817e0c20 T iwn_get_passive_dwell_time
-ffffffff817e0c90 T iwn5000_query_calibration
-ffffffff817e0d80 T iwn5000_send_calibration
-ffffffff817e0ec0 T iwn5000_send_wimax_coex
-ffffffff817e0f50 T iwn5000_crystal_calib
-ffffffff817e0fb0 T iwn_hw_stop
-ffffffff817e13e0 T iwn_hw_init
-ffffffff817e1b50 T iwn4965_load_bootcode
-ffffffff817e1f20 T iwn5000_load_firmware_section
-ffffffff817e2190 T iwn_read_firmware_leg
-ffffffff817e22a0 T iwn_read_firmware_tlv
-ffffffff817e2510 T iwn_read_firmware
-ffffffff817e2740 T iwn_apm_stop_master
-ffffffff817e3000 T iwm_is_mimo_ht_plcp
-ffffffff817e3040 T iwm_is_mimo_mcs
-ffffffff817e3080 T iwm_store_cscheme
-ffffffff817e30d0 T iwm_firmware_store_section
-ffffffff817e3170 T iwm_set_default_calib
-ffffffff817e31c0 T iwm_fw_info_free
-ffffffff817e3210 T iwm_read_firmware
-ffffffff817e39b0 T iwm_read_prph
-ffffffff817e3a80 T iwm_nic_assert_locked
-ffffffff817e3b20 T iwm_write_prph
-ffffffff817e3c00 T iwm_write_prph64
-ffffffff817e3c40 T iwm_read_mem
-ffffffff817e3d80 T iwm_nic_lock
-ffffffff817e3f50 T iwm_nic_unlock
-ffffffff817e4000 T iwm_write_mem
-ffffffff817e4140 T iwm_write_mem32
-ffffffff817e4250 T iwm_poll_bit
-ffffffff817e4320 T iwm_set_bits_mask_prph
-ffffffff817e4430 T iwm_set_bits_prph
-ffffffff817e4520 T iwm_clear_bits_prph
-ffffffff817e4610 T iwm_dma_contig_alloc
-ffffffff817e4800 T iwm_dma_contig_free
-ffffffff817e48c0 T iwm_alloc_rx_ring
-ffffffff817e4aa0 T iwm_rx_addbuf
-ffffffff817e4c80 T iwm_free_rx_ring
-ffffffff817e4f30 T iwm_disable_rx_dma
-ffffffff817e50d0 T iwm_reset_rx_ring
-ffffffff817e5150 T iwm_alloc_tx_ring
-ffffffff817e5330 T iwm_free_tx_ring
-ffffffff817e5500 T iwm_reset_tx_ring
-ffffffff817e56a0 T iwm_enable_rfkill_int
-ffffffff817e57d0 T iwm_check_rfkill
-ffffffff817e5870 T iwm_enable_interrupts
-ffffffff817e5920 T iwm_enable_fwload_interrupt
-ffffffff817e59f0 T iwm_restore_interrupts
-ffffffff817e5a20 T iwm_disable_interrupts
-ffffffff817e5af0 T iwm_ict_reset
-ffffffff817e5cc0 T iwm_set_hw_ready
-ffffffff817e5de0 T iwm_prepare_card_hw
-ffffffff817e60c0 T iwm_apm_config
-ffffffff817e61a0 T iwm_apm_init
-ffffffff817e6710 T iwm_apm_stop
-ffffffff817e6910 T iwm_init_msix_hw
-ffffffff817e69b0 T iwm_conf_msix_hw
-ffffffff817e6e70 T iwm_start_hw
-ffffffff817e70a0 T iwm_stop_device
-ffffffff817e7690 T iwm_nic_config
-ffffffff817e7760 T iwm_nic_rx_init
-ffffffff817e7780 T iwm_nic_rx_mq_init
-ffffffff817e79a0 T iwm_nic_rx_legacy_init
-ffffffff817e7bf0 T iwm_nic_tx_init
-ffffffff817e7d70 T iwm_nic_init
-ffffffff817e7f60 T iwm_enable_ac_txq
-ffffffff817e8290 T iwm_enable_txq
-ffffffff817e8410 T iwm_send_cmd_pdu
-ffffffff817e8490 T iwm_post_alive
-ffffffff817e8870 T iwm_phy_db_get_section
-ffffffff817e8920 T iwm_phy_db_set_section
-ffffffff817e8a70 T iwm_is_valid_channel
-ffffffff817e8ae0 T iwm_ch_id_to_ch_index
-ffffffff817e8b80 T iwm_channel_id_to_papd
-ffffffff817e8c30 T iwm_channel_id_to_txp
-ffffffff817e8e20 T iwm_phy_db_get_section_data
-ffffffff817e8fa0 T iwm_send_phy_db_cmd
-ffffffff817e9040 T iwm_send_cmd
-ffffffff817e96b0 T iwm_phy_db_send_all_channel_groups
-ffffffff817e9890 T iwm_send_phy_db_data
-ffffffff817e9b80 T iwm_send_time_event_cmd
-ffffffff817e9c90 T iwm_free_resp
-ffffffff817e9d00 T iwm_protect_session
-ffffffff817e9db0 T iwm_unprotect_session
-ffffffff817e9e60 T iwm_nvm_read_chunk
-ffffffff817e9fe0 T iwm_nvm_read_section
-ffffffff817ea0a0 T iwm_fw_valid_tx_ant
-ffffffff817ea0e0 T iwm_fw_valid_rx_ant
-ffffffff817ea120 T iwm_init_channel_map
-ffffffff817ea230 T iwm_setup_ht_rates
-ffffffff817ea2c0 T iwm_sta_rx_agg
-ffffffff817ea4f0 T iwm_send_cmd_pdu_status
-ffffffff817ea580 T iwm_htprot_task
-ffffffff817ea610 T iwm_mac_ctxt_cmd
-ffffffff817ea810 T iwm_update_htprot
-ffffffff817ea880 T iwm_add_task
-ffffffff817ea8f0 T iwm_ba_task
-ffffffff817eaaf0 T iwm_ampdu_rx_start
-ffffffff817eabe0 T iwm_ampdu_rx_stop
-ffffffff817eac70 T iwm_set_hw_address_8000
-ffffffff817eae50 T iwm_parse_nvm_data
-ffffffff817eb2d0 T iwm_parse_nvm_sections
-ffffffff817eb3d0 T iwm_nvm_init
-ffffffff817eb670 T iwm_firmware_load_sect
-ffffffff817eb730 T iwm_firmware_load_chunk
-ffffffff817eb9d0 T iwm_load_firmware_7000
-ffffffff817ebc40 T iwm_load_cpu_sections_8000
-ffffffff817ebff0 T iwm_load_firmware_8000
-ffffffff817ec1a0 T iwm_load_firmware
-ffffffff817ec290 T iwm_start_fw
-ffffffff817ec450 T iwm_send_tx_ant_cfg
-ffffffff817ec4e0 T iwm_send_phy_cfg_cmd
-ffffffff817ec590 T iwm_send_dqa_cmd
-ffffffff817ec620 T iwm_load_ucode_wait_alive
-ffffffff817ec860 T iwm_save_fw_paging
-ffffffff817ec8d0 T iwm_send_paging_cmd
-ffffffff817eca20 T iwm_free_fw_paging
-ffffffff817ecb70 T iwm_run_init_mvm_ucode
-ffffffff817ecfa0 T iwm_send_bt_init_conf
-ffffffff817ed030 T iwm_sf_config
-ffffffff817ed290 T iwm_config_ltr
-ffffffff817ed350 T iwm_get_signal_strength
-ffffffff817ed3c0 T iwm_rxmq_get_signal_strength
-ffffffff817ed410 T iwm_rx_rx_phy_cmd
-ffffffff817ed470 T iwm_get_noise
-ffffffff817ed4e0 T iwm_rx_frame
-ffffffff817ed7c0 T iwm_rx_mpdu
-ffffffff817ed930 T iwm_rx_mpdu_mq
-ffffffff817edac0 T iwm_rx_tx_cmd_single
-ffffffff817edc40 T iwm_setrates
-ffffffff817ee120 T iwm_txd_done
-ffffffff817ee1e0 T iwm_rx_tx_cmd
-ffffffff817ee4e0 T iwm_rx_bmiss
-ffffffff817ee5e0 T iwm_binding_cmd
-ffffffff817ee740 T iwm_phy_ctxt_cmd_hdr
-ffffffff817ee7b0 T iwm_phy_ctxt_cmd_data
-ffffffff817ee870 T iwm_phy_ctxt_cmd
-ffffffff817ee9d0 T iwm_send_cmd_status
-ffffffff817eeaf0 T iwm_cmd_done
-ffffffff817eeca0 T iwm_tx_fill_cmd
-ffffffff817eefa0 T iwm_rval2ridx
-ffffffff817ef020 T iwm_tx
-ffffffff817ef810 T iwm_flush_tx_path
-ffffffff817ef8d0 T iwm_led_enable
-ffffffff817ef900 T iwm_led_disable
-ffffffff817ef930 T iwm_led_is_enabled
-ffffffff817ef990 T iwm_led_blink_timeout
-ffffffff817efa00 T iwm_led_blink_start
-ffffffff817efa50 T iwm_led_blink_stop
-ffffffff817efa90 T iwm_beacon_filter_send_cmd
-ffffffff817efb10 T iwm_beacon_filter_set_cqm_params
-ffffffff817efb40 T iwm_update_beacon_abort
-ffffffff817efc30 T iwm_power_build_cmd
-ffffffff817efcc0 T iwm_power_mac_update_mode
-ffffffff817efed0 T iwm_power_update_device
-ffffffff817eff70 T iwm_enable_beacon_filter
-ffffffff817f0060 T iwm_disable_beacon_filter
-ffffffff817f0130 T iwm_add_sta_cmd
-ffffffff817f0400 T iwm_add_aux_sta
-ffffffff817f0580 T iwm_rm_sta_cmd
-ffffffff817f0640 T iwm_scan_rx_chain
-ffffffff817f06c0 T iwm_scan_rate_n_flags
-ffffffff817f07e0 T iwm_lmac_scan_fill_channels
-ffffffff817f08b0 T iwm_umac_scan_fill_channels
-ffffffff817f0990 T iwm_fill_probe_req_v1
-ffffffff817f0a30 T iwm_fill_probe_req
-ffffffff817f0cf0 T iwm_lmac_scan
-ffffffff817f11f0 T iwm_config_umac_scan
-ffffffff817f13f0 T iwm_umac_scan_size
-ffffffff817f1450 T iwm_get_scan_req_umac_chan_param
-ffffffff817f14a0 T iwm_get_scan_req_umac_data
-ffffffff817f14f0 T iwm_umac_scan
-ffffffff817f19c0 T iwm_ridx2rate
-ffffffff817f1a20 T iwm_ack_rates
-ffffffff817f1d00 T iwm_mac_ctxt_cmd_common
-ffffffff817f2030 T iwm_mac_ctxt_cmd_fill_sta
-ffffffff817f20e0 T iwm_update_quotas
-ffffffff817f23e0 T iwm_del_task
-ffffffff817f2440 T iwm_scan
-ffffffff817f26b0 T iwm_scan_abort
-ffffffff817f27d0 T iwm_bgscan
-ffffffff817f2870 T iwm_umac_scan_abort
-ffffffff817f2900 T iwm_lmac_scan_abort
-ffffffff817f29a0 T iwm_auth
-ffffffff817f2ed0 T iwm_deauth
-ffffffff817f3280 T iwm_assoc
-ffffffff817f3330 T iwm_disassoc
-ffffffff817f3440 T iwm_run
-ffffffff817f3b30 T iwm_allow_mcast
-ffffffff817f3c30 T iwm_run_stop
-ffffffff817f40f0 T iwm_node_alloc
-ffffffff817f4110 T iwm_calib_timeout
-ffffffff817f41d0 T iwm_media_change
-ffffffff817f43b0 T iwm_stop
-ffffffff817f45d0 T iwm_init
-ffffffff817f4740 T iwm_newstate_task
-ffffffff817f49b0 T iwm_newstate
-ffffffff817f4ad0 T iwm_endscan
-ffffffff817f4b20 T iwm_fill_sf_command
-ffffffff817f4c20 T iwm_send_update_mcc_cmd
-ffffffff817f4d80 T iwm_tt_tx_backoff
-ffffffff817f4e10 T iwm_fill_paging_mem
-ffffffff817f4f60 T iwm_alloc_fw_paging_mem
-ffffffff817f5110 T iwm_init_hw
-ffffffff817f5a10 T iwm_preinit
-ffffffff817f5c00 T iwm_start
-ffffffff817f5de0 T iwm_watchdog
-ffffffff817f5ea0 T iwm_ioctl
-ffffffff817f6010 T iwm_rx_pkt_valid
-ffffffff817f6060 T iwm_rx_pkt
-ffffffff817f6f50 T iwm_notif_intr
-ffffffff817f70b0 T iwm_intr
-ffffffff817f7470 T iwm_intr_msix
-ffffffff817f76a0 T iwm_match
-ffffffff817f76c0 T iwm_attach_hook
-ffffffff817f7700 T iwm_attach
-ffffffff817f8540 T iwm_radiotap_attach
-ffffffff817f85d0 T iwm_init_task
-ffffffff817f8690 T iwm_resume
-ffffffff817f8840 T iwm_activate
-ffffffff817f9000 T iwx_is_mimo_ht_plcp
-ffffffff817f9040 T iwx_is_mimo_mcs
-ffffffff817f9080 T iwx_store_cscheme
-ffffffff817f90d0 T iwx_ctxt_info_alloc_dma
-ffffffff817f9160 T iwx_dma_contig_alloc
-ffffffff817f9350 T iwx_ctxt_info_free_paging
-ffffffff817f9480 T iwx_dma_contig_free
-ffffffff817f9540 T iwx_get_num_sections
-ffffffff817f95c0 T iwx_init_fw_sec
-ffffffff817f99d0 T iwx_alloc_fw_monitor_block
-ffffffff817f9a70 T iwx_alloc_fw_monitor
-ffffffff817f9b20 T iwx_apply_debug_destination
-ffffffff817f9eb0 T iwx_nic_lock
-ffffffff817fa070 T iwx_write_prph
-ffffffff817fa150 T iwx_set_bits_prph
-ffffffff817fa240 T iwx_clear_bits_prph
-ffffffff817fa330 T iwx_read_prph
-ffffffff817fa400 T iwx_nic_unlock
-ffffffff817fa4b0 T iwx_ctxt_info_init
-ffffffff817fa7e0 T iwx_ctxt_info_free
-ffffffff817fa8c0 T iwx_ctxt_info_free_fw_img
-ffffffff817faa40 T iwx_firmware_store_section
-ffffffff817faae0 T iwx_set_default_calib
-ffffffff817fab30 T iwx_fw_info_free
-ffffffff817fab80 T iwx_read_firmware
-ffffffff817fb4e0 T iwx_nic_assert_locked
-ffffffff817fb580 T iwx_write_prph64
-ffffffff817fb5c0 T iwx_read_mem
-ffffffff817fb700 T iwx_write_mem
-ffffffff817fb840 T iwx_write_mem32
-ffffffff817fb950 T iwx_poll_bit
-ffffffff817fba20 T iwx_set_bits_mask_prph
-ffffffff817fbb30 T iwx_alloc_rx_ring
-ffffffff817fbcd0 T iwx_rx_addbuf
-ffffffff817fbe90 T iwx_free_rx_ring
-ffffffff817fc140 T iwx_disable_rx_dma
-ffffffff817fc260 T iwx_reset_rx_ring
-ffffffff817fc2e0 T iwx_alloc_tx_ring
-ffffffff817fc500 T iwx_free_tx_ring
-ffffffff817fc7b0 T iwx_reset_tx_ring
-ffffffff817fc8e0 T iwx_enable_rfkill_int
-ffffffff817fc9c0 T iwx_check_rfkill
-ffffffff817fca60 T iwx_enable_interrupts
-ffffffff817fcb10 T iwx_enable_fwload_interrupt
-ffffffff817fcbf0 T iwx_restore_interrupts
-ffffffff817fcc20 T iwx_disable_interrupts
-ffffffff817fccf0 T iwx_ict_reset
-ffffffff817fcec0 T iwx_set_hw_ready
-ffffffff817fcfe0 T iwx_prepare_card_hw
-ffffffff817fd2c0 T iwx_apm_config
-ffffffff817fd3a0 T iwx_apm_init
-ffffffff817fd620 T iwx_apm_stop
-ffffffff817fd820 T iwx_init_msix_hw
-ffffffff817fd8c0 T iwx_conf_msix_hw
-ffffffff817fdd80 T iwx_start_hw
-ffffffff817fdfc0 T iwx_stop_device
-ffffffff817fe3f0 T iwx_nic_config
-ffffffff817fe470 T iwx_nic_rx_init
-ffffffff817fe4c0 T iwx_nic_init
-ffffffff817fe5d0 T iwx_enable_txq
-ffffffff817fe790 T iwx_send_cmd
-ffffffff817fed50 T iwx_free_resp
-ffffffff817fedc0 T iwx_post_alive
-ffffffff817feea0 T iwx_send_time_event_cmd
-ffffffff817fefb0 T iwx_protect_session
-ffffffff817ff060 T iwx_unprotect_session
-ffffffff817ff110 T iwx_nvm_read_chunk
-ffffffff817ff290 T iwx_nvm_read_section
-ffffffff817ff350 T iwx_fw_valid_tx_ant
-ffffffff817ff390 T iwx_fw_valid_rx_ant
-ffffffff817ff3d0 T iwx_init_channel_map
-ffffffff817ff4e0 T iwx_setup_ht_rates
-ffffffff817ff570 T iwx_sta_rx_agg
-ffffffff817ff790 T iwx_send_cmd_pdu_status
-ffffffff817ff820 T iwx_htprot_task
-ffffffff817ff8b0 T iwx_mac_ctxt_cmd
-ffffffff817ffab0 T iwx_update_htprot
-ffffffff817ffb20 T iwx_add_task
-ffffffff817ffb90 T iwx_ba_task
-ffffffff817ffd80 T iwx_ampdu_rx_start
-ffffffff817ffe70 T iwx_ampdu_rx_stop
-ffffffff817fff00 T iwx_set_hw_address_8000
-ffffffff818000e0 T iwx_parse_nvm_data
-ffffffff818002c0 T iwx_parse_nvm_sections
-ffffffff81800340 T iwx_nvm_init
-ffffffff81800550 T iwx_load_firmware
-ffffffff81800650 T iwx_start_fw
-ffffffff81800870 T iwx_send_tx_ant_cfg
-ffffffff81800900 T iwx_send_cmd_pdu
-ffffffff81800980 T iwx_send_phy_cfg_cmd
-ffffffff81800a20 T iwx_send_dqa_cmd
-ffffffff81800ab0 T iwx_load_ucode_wait_alive
-ffffffff81800b00 T iwx_run_init_mvm_ucode
-ffffffff81800d40 T iwx_config_ltr
-ffffffff81800e00 T iwx_update_rx_desc
-ffffffff81800e60 T iwx_rxmq_get_signal_strength
-ffffffff81800eb0 T iwx_rx_rx_phy_cmd
-ffffffff81800f10 T iwx_get_noise
-ffffffff81800f80 T iwx_rx_frame
-ffffffff81801260 T iwx_rx_mpdu_mq
-ffffffff818013f0 T iwx_enable_ht_cck_fallback
-ffffffff818014c0 T iwx_rx_tx_cmd_single
-ffffffff818016f0 T iwx_txd_done
-ffffffff818017b0 T iwx_rx_tx_cmd
-ffffffff81801ac0 T iwx_rx_bmiss
-ffffffff81801bc0 T iwx_binding_cmd
-ffffffff81801d40 T iwx_phy_ctxt_cmd_hdr
-ffffffff81801db0 T iwx_phy_ctxt_cmd_data
-ffffffff81801ec0 T iwx_phy_ctxt_cmd
-ffffffff81802070 T iwx_send_cmd_status
-ffffffff81802190 T iwx_cmd_done
-ffffffff81802270 T iwx_tx_fill_cmd
-ffffffff818024c0 T iwx_rval2ridx
-ffffffff81802540 T iwx_tx
-ffffffff81802ab0 T iwx_flush_tx_path
-ffffffff81802b70 T iwx_beacon_filter_send_cmd
-ffffffff81802bf0 T iwx_update_beacon_abort
-ffffffff81802ce0 T iwx_power_build_cmd
-ffffffff81802d70 T iwx_power_mac_update_mode
-ffffffff81802f80 T iwx_power_update_device
-ffffffff81803020 T iwx_enable_beacon_filter
-ffffffff81803110 T iwx_disable_beacon_filter
-ffffffff818031e0 T iwx_add_sta_cmd
-ffffffff818033e0 T iwx_add_aux_sta
-ffffffff81803500 T iwx_rm_sta_cmd
-ffffffff818035c0 T iwx_umac_scan_fill_channels
-ffffffff818036a0 T iwx_fill_probe_req_v1
-ffffffff81803740 T iwx_fill_probe_req
-ffffffff81803a00 T iwx_config_umac_scan
-ffffffff81803c10 T iwx_umac_scan_size
-ffffffff81803c70 T iwx_get_scan_req_umac_chan_param
-ffffffff81803cc0 T iwx_get_scan_req_umac_data
-ffffffff81803d10 T iwx_umac_scan
-ffffffff81804190 T iwx_ridx2rate
-ffffffff818041f0 T iwx_ack_rates
-ffffffff818044d0 T iwx_mac_ctxt_cmd_common
-ffffffff81804800 T iwx_mac_ctxt_cmd_fill_sta
-ffffffff818048b0 T iwx_clear_statistics
-ffffffff81804990 T iwx_update_quotas
-ffffffff81804c90 T iwx_del_task
-ffffffff81804cf0 T iwx_scan
-ffffffff81804e90 T iwx_scan_abort
-ffffffff81804f30 T iwx_bgscan
-ffffffff81804fb0 T iwx_umac_scan_abort
-ffffffff81805040 T iwx_enable_data_tx_queues
-ffffffff818050f0 T iwx_auth
-ffffffff81805720 T iwx_deauth
-ffffffff81805ac0 T iwx_assoc
-ffffffff81805bf0 T iwx_disassoc
-ffffffff81805d00 T iwx_run
-ffffffff81806230 T iwx_sf_config
-ffffffff81806490 T iwx_allow_mcast
-ffffffff81806590 T iwx_run_stop
-ffffffff81806930 T iwx_node_alloc
-ffffffff81806950 T iwx_calib_timeout
-ffffffff81806a20 T iwx_media_change
-ffffffff81806c00 T iwx_stop
-ffffffff81806df0 T iwx_init
-ffffffff81806f60 T iwx_newstate_task
-ffffffff818070e0 T iwx_newstate
-ffffffff81807200 T iwx_endscan
-ffffffff81807250 T iwx_fill_sf_command
-ffffffff81807350 T iwx_send_bt_init_conf
-ffffffff818073e0 T iwx_send_update_mcc_cmd
-ffffffff81807510 T iwx_init_hw
-ffffffff81807c40 T iwx_preinit
-ffffffff81807e30 T iwx_start
-ffffffff81808010 T iwx_watchdog
-ffffffff818080d0 T iwx_ioctl
-ffffffff81808240 T iwx_nic_umac_error
-ffffffff818086f0 T iwx_desc_lookup
-ffffffff81808880 T iwx_nic_error
-ffffffff81808d40 T iwx_rx_pkt_valid
-ffffffff81808d90 T iwx_rx_pkt
-ffffffff818098b0 T iwx_notif_intr
-ffffffff818099e0 T iwx_intr
-ffffffff81809ec0 T iwx_intr_msix
-ffffffff8180a220 T iwx_match
-ffffffff8180a240 T iwx_attach_hook
-ffffffff8180a280 T iwx_attach
-ffffffff8180ae60 T iwx_radiotap_attach
-ffffffff8180af00 T iwx_init_task
-ffffffff8180afc0 T iwx_resume
-ffffffff8180b150 T iwx_activate
-ffffffff8180c000 T cmpci_match
-ffffffff8180c020 T cmpci_attach
-ffffffff8180c500 T cmpci_activate
-ffffffff8180c580 T cmpci_open
-ffffffff8180c5b0 T cmpci_close
-ffffffff8180c5e0 T cmpci_set_params
-ffffffff8180d060 T cmpci_round_blocksize
-ffffffff8180d090 T cmpci_halt_output
-ffffffff8180d250 T cmpci_halt_input
-ffffffff8180d3e0 T cmpci_set_port
-ffffffff8180d540 T cmpci_get_port
-ffffffff8180d610 T cmpci_query_devinfo
-ffffffff8180de20 T cmpci_malloc
-ffffffff8180de80 T cmpci_free
-ffffffff8180df50 T cmpci_round_buffersize
-ffffffff8180df90 T cmpci_get_props
-ffffffff8180dfc0 T cmpci_trigger_output
-ffffffff8180e2a0 T cmpci_trigger_input
-ffffffff8180e540 T cmpci_mixerreg_read
-ffffffff8180e5d0 T cmpci_mixerreg_write
-ffffffff8180e640 T cmpci_reg_partial_write_1
-ffffffff8180e6d0 T cmpci_reg_partial_write_4
-ffffffff8180e760 T cmpci_reg_set_1
-ffffffff8180e7c0 T cmpci_reg_clear_1
-ffffffff8180e830 T cmpci_reg_set_4
-ffffffff8180e890 T cmpci_reg_clear_4
-ffffffff8180e900 T cmpci_reg_set_reg_misc
-ffffffff8180e940 T cmpci_reg_clear_reg_misc
-ffffffff8180e980 T cmpci_rate_to_index
-ffffffff8180ea00 T cmpci_index_to_rate
-ffffffff8180ea30 T cmpci_index_to_divider
-ffffffff8180ea60 T cmpci_intr
-ffffffff8180ed90 T cmpci_set_mixer_gain
-ffffffff8180f560 T cmpci_resume
-ffffffff8180f5d0 T cmpci_alloc_dmamem
-ffffffff8180f7b0 T cmpci_free_dmamem
-ffffffff8180f870 T cmpci_find_dmamem
-ffffffff8180f8c0 T cmpci_adjust
-ffffffff8180f900 T cmpci_set_out_ports
-ffffffff8180ff60 T cmpci_set_in_ports
-ffffffff81811000 T iha_pci_probe
-ffffffff81811060 T iha_pci_attach
-ffffffff81812000 T pcscp_match
-ffffffff81812030 T pcscp_attach
-ffffffff81812420 T pcscp_read_reg
-ffffffff81812450 T pcscp_write_reg
-ffffffff81812480 T pcscp_dma_isintr
-ffffffff818124d0 T pcscp_dma_reset
-ffffffff81812530 T pcscp_dma_intr
-ffffffff81812b00 T pcscp_dma_setup
-ffffffff81812d70 T pcscp_dma_go
-ffffffff81812ea0 T pcscp_dma_stop
-ffffffff81812f30 T pcscp_dma_isactive
-ffffffff81813000 T bge_probe
-ffffffff81813020 T bge_attach
-ffffffff818145e0 T bge_detach
-ffffffff81814730 T bge_activate
-ffffffff818147d0 T bge_readmem_ind
-ffffffff81814880 T bge_writemem_ind
-ffffffff81814940 T bge_writereg_ind
-ffffffff81814990 T bge_writembx
-ffffffff818149d0 T bge_ape_lock_init
-ffffffff81814bf0 T bge_ape_read_fw_ver
-ffffffff81814d50 T bge_ape_lock
-ffffffff81814f10 T bge_ape_unlock
-ffffffff81814fe0 T bge_ape_send_event
-ffffffff818151e0 T bge_ape_driver_state_change
-ffffffff818153c0 T bge_nvram_getbyte
-ffffffff81815620 T bge_read_nvram
-ffffffff818156d0 T bge_eeprom_getbyte
-ffffffff81815870 T bge_read_eeprom
-ffffffff81815900 T bge_miibus_readreg
-ffffffff81815be0 T bge_miibus_writereg
-ffffffff81815ef0 T bge_miibus_statchg
-ffffffff818160e0 T bge_newbuf
-ffffffff81816260 T bge_newbuf_jumbo
-ffffffff818164d0 T bge_init_rx_ring_std
-ffffffff81816640 T bge_fill_rx_ring_std
-ffffffff81816790 T bge_rxtick
-ffffffff818167d0 T bge_rxtick_jumbo
-ffffffff81816810 T bge_fill_rx_ring_jumbo
-ffffffff81816960 T bge_free_rx_ring_std
-ffffffff81816a70 T bge_init_rx_ring_jumbo
-ffffffff81816c70 T bge_free_rx_ring_jumbo
-ffffffff81816dc0 T bge_free_tx_ring
-ffffffff81816e90 T bge_init_tx_ring
-ffffffff818170a0 T bge_iff
-ffffffff81817200 T bge_sig_pre_reset
-ffffffff81817230 T bge_sig_post_reset
-ffffffff818172b0 T bge_sig_legacy
-ffffffff818172e0 T bge_stop_fw
-ffffffff81817310 T bge_dma_swap_options
-ffffffff81817350 T bge_phy_addr
-ffffffff81817410 T bge_chipinit
-ffffffff81817890 T bge_blockinit
-ffffffff81818fe0 T bge_lookup_rev
-ffffffff818192a0 T bge_can_use_msi
-ffffffff81819300 T bge_reset
-ffffffff81819d00 T bge_ioctl
-ffffffff8181a070 T bge_start
-ffffffff8181a250 T bge_watchdog
-ffffffff8181a2b0 T bge_intr
-ffffffff8181a4b0 T bge_ifmedia_upd
-ffffffff8181a790 T bge_ifmedia_sts
-ffffffff8181a880 T bge_tick
-ffffffff8181aa40 T bge_stop
-ffffffff8181b8b0 T bge_init
-ffffffff8181bde0 T bge_rxeof
-ffffffff8181c200 T bge_rxcsum
-ffffffff8181c2a0 T bge_txeof
-ffffffff8181c4a0 T bge_link_upd
-ffffffff8181c800 T bge_stats_update_regs
-ffffffff8181c9f0 T bge_stats_update
-ffffffff8181cb10 T bge_compact_dma_runt
-ffffffff8181ccf0 T bge_cksum_pad
-ffffffff8181cdd0 T bge_encap
-ffffffff8181d120 T bge_rxrinfo
-ffffffff8181d280 T bge_stop_block
-ffffffff8181e000 T bnx_probe
-ffffffff8181e020 T bnx_attach
-ffffffff8181e430 T nswaph
-ffffffff8181e480 T bnx_read_firmware
-ffffffff8181f060 T bnx_read_rv2p
-ffffffff8181f180 T bnx_reg_rd_ind
-ffffffff8181f1d0 T bnx_intr
-ffffffff8181f430 T bnx_attachhook
-ffffffff8181f8a0 T bnx_release_resources
-ffffffff8181f910 T bnx_reset
-ffffffff8181fe10 T bnx_chipinit
-ffffffff818200a0 T bnx_nvram_test
-ffffffff81820200 T bnx_get_mac_addr
-ffffffff81820320 T bnx_get_media
-ffffffff818204c0 T bnx_dma_alloc
-ffffffff81820e40 T bnx_ioctl
-ffffffff81821070 T bnx_start
-ffffffff81821210 T bnx_watchdog
-ffffffff81821290 T bnx_miibus_read_reg
-ffffffff81821500 T bnx_miibus_write_reg
-ffffffff81821750 T bnx_miibus_statchg
-ffffffff81821950 T bnx_init_media
-ffffffff818219e0 T bnx_ifmedia_upd
-ffffffff81821a70 T bnx_ifmedia_sts
-ffffffff81821ae0 T bnx_tick
-ffffffff81821bf0 T bnx_rxrefill
-ffffffff81821c40 T bnx_mgmt_init
-ffffffff81821d50 T bnx_reg_wr_ind
-ffffffff81821da0 T bnx_ctx_wr
-ffffffff81821f90 T bnx_acquire_nvram_lock
-ffffffff81822040 T bnx_release_nvram_lock
-ffffffff818220f0 T bnx_enable_nvram_access
-ffffffff81822150 T bnx_disable_nvram_access
-ffffffff818221b0 T bnx_nvram_read_dword
-ffffffff81822330 T bnx_init_nvram
-ffffffff81822ae0 T bnx_nvram_read
-ffffffff81822e30 T bnx_dma_free
-ffffffff81823360 T bnx_fw_sync
-ffffffff81823540 T bnx_load_rv2p_fw
-ffffffff81823660 T bnx_load_cpu_fw
-ffffffff81823ad0 T bnx_init_cpus
-ffffffff81824270 T bnx_init_context
-ffffffff81824920 T bnx_set_mac_addr
-ffffffff818249a0 T bnx_stop
-ffffffff81824c70 T bnx_disable_intr
-ffffffff81824cc0 T bnx_free_rx_chain
-ffffffff81824d70 T bnx_free_tx_chain
-ffffffff81824e50 T bnx_blockinit
-ffffffff81825440 T bnx_get_buf
-ffffffff81825620 T bnx_init_tx_context
-ffffffff81825700 T bnx_init_tx_chain
-ffffffff81825790 T bnx_init_rx_context
-ffffffff81825850 T bnx_fill_rx_chain
-ffffffff81825990 T bnx_init_rx_chain
-ffffffff81825a80 T bnx_phy_intr
-ffffffff81825b20 T bnx_rx_intr
-ffffffff81825e50 T bnx_tx_intr
-ffffffff81825fb0 T bnx_enable_intr
-ffffffff81826070 T bnx_init
-ffffffff81826400 T bnx_iff
-ffffffff81826810 T bnx_tx_encap
-ffffffff81826a60 T bnx_stats_update
-ffffffff81827000 T vge_probe
-ffffffff81827020 T vge_attach
-ffffffff818273f0 T vge_detach
-ffffffff818274a0 T vge_read_eeprom
-ffffffff818275a0 T vge_miipoll_stop
-ffffffff81827660 T vge_miipoll_start
-ffffffff818277c0 T vge_miibus_readreg
-ffffffff818279b0 T vge_miibus_writereg
-ffffffff81827b90 T vge_cam_clear
-ffffffff81827ef0 T vge_cam_set
-ffffffff818282b0 T vge_iff
-ffffffff81828470 T vge_reset
-ffffffff81828620 T vge_allocmem
-ffffffff81828a40 T vge_freemem
-ffffffff81828b80 T vge_intr
-ffffffff81828d80 T vge_ioctl
-ffffffff81828ed0 T vge_start
-ffffffff818290e0 T vge_watchdog
-ffffffff81829150 T vge_miibus_statchg
-ffffffff81829380 T vge_ifmedia_upd
-ffffffff818293a0 T vge_ifmedia_sts
-ffffffff81829400 T vge_tick
-ffffffff818294d0 T vge_stop
-ffffffff818296c0 T vge_newbuf
-ffffffff818298e0 T vge_tx_list_init
-ffffffff81829980 T vge_rx_list_init
-ffffffff81829a70 T vge_rxeof
-ffffffff81829f10 T vge_txeof
-ffffffff8182a0a0 T vge_init
-ffffffff8182a830 T vge_encap
-ffffffff8182b000 T stge_match
-ffffffff8182b020 T stge_attach
-ffffffff8182b8a0 T stge_mii_bitbang_read
-ffffffff8182b8f0 T stge_mii_bitbang_write
-ffffffff8182b920 T stge_tick
-ffffffff8182ba50 T stge_intr
-ffffffff8182bd40 T stge_reset
-ffffffff8182be30 T stge_read_eeprom
-ffffffff8182bf70 T stge_mii_readreg
-ffffffff8182bf90 T stge_mii_writereg
-ffffffff8182bfb0 T stge_mii_statchg
-ffffffff8182c000 T stge_mediachange
-ffffffff8182c050 T stge_mediastatus
-ffffffff8182c0b0 T stge_ioctl
-ffffffff8182c200 T stge_start
-ffffffff8182c500 T stge_watchdog
-ffffffff8182c590 T stge_txintr
-ffffffff8182c6d0 T stge_init
-ffffffff8182cef0 T stge_stop
-ffffffff8182d110 T stge_iff
-ffffffff8182d240 T stge_rxintr
-ffffffff8182d740 T stge_stats_update
-ffffffff8182d860 T stge_add_rxbuf
-ffffffff8182da70 T stge_rxdrain
-ffffffff8182e000 T nfe_match
-ffffffff8182e020 T nfe_attach
-ffffffff8182e6a0 T nfe_activate
-ffffffff8182e720 T nfe_stop
-ffffffff8182e8b0 T nfe_init
-ffffffff8182ee70 T nfe_intr
-ffffffff8182ef60 T nfe_get_macaddr
-ffffffff8182f050 T nfe_alloc_tx_ring
-ffffffff8182f280 T nfe_alloc_rx_ring
-ffffffff8182f600 T nfe_free_tx_ring
-ffffffff8182f760 T nfe_ioctl
-ffffffff8182f8b0 T nfe_start
-ffffffff8182fa80 T nfe_watchdog
-ffffffff8182fae0 T nfe_wol
-ffffffff8182fb70 T nfe_miibus_readreg
-ffffffff8182fd00 T nfe_miibus_writereg
-ffffffff8182fe70 T nfe_miibus_statchg
-ffffffff8182ffe0 T nfe_ifmedia_upd
-ffffffff81830030 T nfe_ifmedia_sts
-ffffffff81830090 T nfe_tick
-ffffffff818300e0 T nfe_rxeof
-ffffffff81830510 T nfe_txeof
-ffffffff818307c0 T nfe_iff
-ffffffff81830ac0 T nfe_txdesc32_sync
-ffffffff81830b00 T nfe_txdesc64_sync
-ffffffff81830b40 T nfe_txdesc32_rsync
-ffffffff81830bd0 T nfe_txdesc64_rsync
-ffffffff81830c60 T nfe_rxdesc32_sync
-ffffffff81830ca0 T nfe_rxdesc64_sync
-ffffffff81830ce0 T nfe_encap
-ffffffff81830fa0 T nfe_set_macaddr
-ffffffff81831010 T nfe_reset_tx_ring
-ffffffff81831140 T nfe_reset_rx_ring
-ffffffff81831210 T nfe_free_rx_ring
-ffffffff81832000 T et_match
-ffffffff81832020 T et_attach
-ffffffff818325c0 T et_detach
-ffffffff818326a0 T et_intr
-ffffffff818327b0 T et_bus_config
-ffffffff81832840 T et_get_eaddr
-ffffffff818328c0 T et_reset
-ffffffff81832960 T et_disable_intrs
-ffffffff81832990 T et_dma_alloc
-ffffffff81832b80 T et_ioctl
-ffffffff81832cf0 T et_start
-ffffffff81832e10 T et_watchdog
-ffffffff81832e50 T et_chip_attach
-ffffffff81832f50 T et_miibus_readreg
-ffffffff818330a0 T et_miibus_writereg
-ffffffff818331d0 T et_miibus_statchg
-ffffffff818332c0 T et_ifmedia_upd
-ffffffff81833340 T et_ifmedia_sts
-ffffffff818333a0 T et_tick
-ffffffff818333f0 T et_txtick
-ffffffff81833420 T et_stop
-ffffffff81833650 T et_dma_free
-ffffffff81833810 T et_stop_rxdma
-ffffffff818338c0 T et_stop_txdma
-ffffffff81833910 T et_free_tx_ring
-ffffffff818339b0 T et_free_rx_ring
-ffffffff81833ae0 T et_enable_intrs
-ffffffff81833b10 T et_dma_mem_create
-ffffffff81833cd0 T et_dma_mbuf_create
-ffffffff81834000 T et_dma_mem_destroy
-ffffffff81834070 T et_dma_mbuf_destroy
-ffffffff818341d0 T et_rxeof
-ffffffff81834580 T et_txeof
-ffffffff81834790 T et_init
-ffffffff818349f0 T et_init_tx_ring
-ffffffff81834aa0 T et_init_rx_ring
-ffffffff81834bf0 T et_chip_init
-ffffffff81834ed0 T et_enable_txrx
-ffffffff81835000 T et_start_rxdma
-ffffffff818350d0 T et_start_txdma
-ffffffff81835120 T et_setmulti
-ffffffff818353d0 T et_encap
-ffffffff818357f0 T et_init_mac
-ffffffff81835950 T et_init_rxmac
-ffffffff81835bf0 T et_init_txmac
-ffffffff81835c70 T et_init_rxdma
-ffffffff81835fe0 T et_init_txdma
-ffffffff81836110 T et_newbuf_cluster
-ffffffff81836120 T et_newbuf
-ffffffff81836360 T et_newbuf_hdr
-ffffffff81837000 T jme_match
-ffffffff81837020 T jme_attach
-ffffffff818375c0 T jme_miibus_readreg
-ffffffff818376d0 T jme_miibus_writereg
-ffffffff818377f0 T jme_miibus_statchg
-ffffffff81837d20 T jme_stop_rx
-ffffffff81837e10 T jme_stop_tx
-ffffffff81837ef0 T jme_rxeof
-ffffffff81838030 T jme_txeof
-ffffffff81838260 T jme_init_tx_ring
-ffffffff81838310 T jme_init_ssb
-ffffffff81838370 T jme_mac_config
-ffffffff81838770 T jme_mediastatus
-ffffffff818387d0 T jme_mediachange
-ffffffff81838820 T jme_eeprom_read_byte
-ffffffff81838970 T jme_eeprom_macaddr
-ffffffff81838ac0 T jme_reg_macaddr
-ffffffff81838b60 T jme_map_intr_vector
-ffffffff81838c00 T jme_intr
-ffffffff81838db0 T jme_reset
-ffffffff81838e20 T jme_dma_alloc
-ffffffff818393f0 T jme_ioctl
-ffffffff81839540 T jme_start
-ffffffff81839690 T jme_watchdog
-ffffffff81839730 T jme_tick
-ffffffff81839790 T jme_detach
-ffffffff81839850 T jme_stop
-ffffffff81839b40 T jme_dma_free
-ffffffff81839c70 T jme_encap
-ffffffff81839f00 T jme_init
-ffffffff8183a690 T jme_iff
-ffffffff8183a800 T jme_discard_rxbufs
-ffffffff8183a880 T jme_rxpkt
-ffffffff8183ac20 T jme_newbuf
-ffffffff8183ad90 T jme_init_rx_ring
-ffffffff8183aec0 T jme_set_vlan
-ffffffff8183b000 T age_match
-ffffffff8183b020 T age_attach
-ffffffff8183b4c0 T age_intr
-ffffffff8183b6b0 T age_phy_reset
-ffffffff8183bf60 T age_reset
-ffffffff8183c090 T age_dma_alloc
-ffffffff8183c7f0 T age_get_macaddr
-ffffffff8183c9e0 T age_ioctl
-ffffffff8183cb30 T age_start
-ffffffff8183cca0 T age_watchdog
-ffffffff8183cd30 T age_miibus_readreg
-ffffffff8183ce30 T age_miibus_writereg
-ffffffff8183cf30 T age_miibus_statchg
-ffffffff8183d110 T age_mediachange
-ffffffff8183d160 T age_mediastatus
-ffffffff8183d1c0 T age_tick
-ffffffff8183d220 T age_dma_free
-ffffffff8183d4d0 T age_detach
-ffffffff8183d590 T age_stop
-ffffffff8183d8a0 T age_stop_rxmac
-ffffffff8183d9e0 T age_stop_txmac
-ffffffff8183db20 T age_mac_config
-ffffffff8183dbd0 T age_rxintr
-ffffffff8183dda0 T age_txintr
-ffffffff8183df60 T age_init
-ffffffff8183e960 T age_stats_update
-ffffffff8183ec80 T age_encap
-ffffffff8183ef00 T age_iff
-ffffffff8183f070 T age_rxeof
-ffffffff8183f3c0 T age_newbuf
-ffffffff8183f550 T age_init_rx_ring
-ffffffff8183f630 T age_init_rr_ring
-ffffffff8183f6b0 T age_init_tx_ring
-ffffffff8183f760 T age_init_cmb_block
-ffffffff8183f7b0 T age_init_smb_block
-ffffffff8183f800 T age_rxvlan
-ffffffff81840000 T alc_match
-ffffffff81840020 T alc_attach
-ffffffff818408a0 T alc_detach
-ffffffff81840970 T alc_activate
-ffffffff818409f0 T alc_miibus_readreg
-ffffffff81840ba0 T alc_mii_readreg_816x
-ffffffff81840ca0 T alc_mii_readreg_813x
-ffffffff81840db0 T alc_miibus_writereg
-ffffffff81840f70 T alc_mii_writereg_816x
-ffffffff81841080 T alc_mii_writereg_813x
-ffffffff81841180 T alc_miibus_statchg
-ffffffff81841570 T alc_stop_mac
-ffffffff81841660 T alc_start_queue
-ffffffff81841720 T alc_mac_config
-ffffffff81841800 T alc_aspm
-ffffffff818418d0 T alc_dsp_fixup
-ffffffff81841eb0 T alc_miidbg_readreg
-ffffffff81841ef0 T alc_miidbg_writereg
-ffffffff81841f30 T alc_miiext_readreg
-ffffffff81842060 T alc_miiext_writereg
-ffffffff818421a0 T alc_mediastatus
-ffffffff81842210 T alc_mediachange
-ffffffff81842260 T alc_get_macaddr
-ffffffff81842280 T alc_get_macaddr_816x
-ffffffff81842510 T alc_get_macaddr_813x
-ffffffff818429d0 T alc_get_macaddr_par
-ffffffff81842a80 T alc_disable_l0s_l1
-ffffffff81842b00 T alc_phy_reset
-ffffffff81842b20 T alc_phy_reset_816x
-ffffffff81843390 T alc_phy_reset_813x
-ffffffff81843780 T alc_phy_down
-ffffffff818438b0 T alc_aspm_816x
-ffffffff81843960 T alc_aspm_813x
-ffffffff81843b50 T alc_init_pcie
-ffffffff81843f00 T alc_config_msi
-ffffffff81843fd0 T alc_intr
-ffffffff818441b0 T alc_reset
-ffffffff81844580 T alc_dma_alloc
-ffffffff81844ce0 T alc_ioctl
-ffffffff81844e30 T alc_start
-ffffffff81844fd0 T alc_watchdog
-ffffffff81845040 T alc_tick
-ffffffff818450a0 T alc_dma_free
-ffffffff81845350 T alc_stop
-ffffffff81845690 T alc_init
-ffffffff818465e0 T alc_encap
-ffffffff81846820 T alc_txeof
-ffffffff81846a20 T alc_iff
-ffffffff81846b90 T alc_stats_clear
-ffffffff81846cc0 T alc_stats_update
-ffffffff81847130 T alc_rxintr
-ffffffff81847350 T alc_newbuf
-ffffffff818474c0 T alc_rxeof
-ffffffff81847750 T alc_osc_reset
-ffffffff818478f0 T alc_init_rx_ring
-ffffffff818479f0 T alc_init_rr_ring
-ffffffff81847a70 T alc_init_tx_ring
-ffffffff81847b20 T alc_init_cmb
-ffffffff81847b60 T alc_init_smb
-ffffffff81847bb0 T alc_rxvlan
-ffffffff81847c20 T alc_stop_queue
-ffffffff81848000 T ale_match
-ffffffff81848020 T ale_attach
-ffffffff81848580 T ale_activate
-ffffffff81848600 T ale_miibus_readreg
-ffffffff81848720 T ale_miibus_writereg
-ffffffff81848820 T ale_miibus_statchg
-ffffffff81848a60 T ale_stop_mac
-ffffffff81848b50 T ale_mac_config
-ffffffff81848c00 T ale_mediastatus
-ffffffff81848c70 T ale_mediachange
-ffffffff81848cc0 T ale_get_macaddr
-ffffffff81848eb0 T ale_phy_reset
-ffffffff818494f0 T ale_intr
-ffffffff81849640 T ale_reset
-ffffffff818497a0 T ale_dma_alloc
-ffffffff81849f10 T ale_ioctl
-ffffffff8184a060 T ale_start
-ffffffff8184a1c0 T ale_watchdog
-ffffffff8184a230 T ale_tick
-ffffffff8184a290 T ale_dma_free
-ffffffff8184a530 T ale_detach
-ffffffff8184a5f0 T ale_stop
-ffffffff8184a8c0 T ale_init
-ffffffff8184b2e0 T ale_encap
-ffffffff8184b540 T ale_txeof
-ffffffff8184b700 T ale_iff
-ffffffff8184b870 T ale_stats_clear
-ffffffff8184b940 T ale_stats_update
-ffffffff8184bcb0 T ale_rxeof
-ffffffff8184bf70 T ale_rx_update_page
-ffffffff8184c0b0 T ale_rxcsum
-ffffffff8184c170 T ale_init_rx_pages
-ffffffff8184c2a0 T ale_init_tx_ring
-ffffffff8184c390 T ale_rxvlan
-ffffffff8184d000 T amdpm_match
-ffffffff8184d020 T amdpm_attach
-ffffffff8184d380 T amdpm_activate
-ffffffff8184d3e0 T amdpm_rnd_callout
-ffffffff8184d440 T amdpm_i2c_acquire_bus
-ffffffff8184d4a0 T amdpm_i2c_release_bus
-ffffffff8184d4f0 T amdpm_i2c_exec
-ffffffff8184d870 T amdpm_get_timecount
-ffffffff8184d8a0 T amdpm_intr
-ffffffff8184e000 T bce_probe
-ffffffff8184e020 T bce_attach
-ffffffff8184ead0 T bce_activate
-ffffffff8184eb40 T bce_intr
-ffffffff8184ee20 T bce_reset
-ffffffff8184f460 T bce_ioctl
-ffffffff8184f5c0 T bce_start
-ffffffff8184f810 T bce_watchdog
-ffffffff8184f850 T bce_mii_read
-ffffffff8184f970 T bce_mii_write
-ffffffff8184faa0 T bce_statchg
-ffffffff8184fe30 T bce_mediachange
-ffffffff8184fe80 T bce_mediastatus
-ffffffff8184fee0 T bce_tick
-ffffffff8184ff30 T bce_stop
-ffffffff81850050 T bce_init
-ffffffff81850470 T bce_iff
-ffffffff81850570 T bce_rxintr
-ffffffff81850710 T bce_txintr
-ffffffff818507f0 T bce_add_rxbuf
-ffffffff818508b0 T bce_add_mac
-ffffffff81851000 T ath_pci_match
-ffffffff81851060 T ath_pci_attach
-ffffffff81851260 T ath_pci_detach
-ffffffff81852000 T athn_pci_match
-ffffffff81852020 T athn_pci_attach
-ffffffff818522a0 T athn_pci_detach
-ffffffff81852320 T athn_pci_activate
-ffffffff818523d0 T athn_pci_read
-ffffffff818523f0 T athn_pci_write
-ffffffff81852420 T athn_pci_write_barrier
-ffffffff81852450 T athn_pci_disable_aspm
-ffffffff818524b0 T athn_pci_wakeup
-ffffffff81853000 T atw_pci_match
-ffffffff81853020 T atw_pci_attach
-ffffffff818532a0 T atw_pci_detach
-ffffffff81853320 t atw_pci_enable
-ffffffff818533b0 t atw_pci_disable
-ffffffff81854000 T rtw_pci_match
-ffffffff81854020 T rtw_pci_attach
-ffffffff81854240 T rtw_pci_detach
-ffffffff818542c0 T rtw_pci_enable
-ffffffff81854350 T rtw_pci_disable
-ffffffff81855000 T rtwn_pci_match
-ffffffff81855020 T rtwn_pci_attach
-ffffffff81855590 T rtwn_pci_detach
-ffffffff818556a0 T rtwn_pci_activate
-ffffffff818556b0 T rtwn_calib_to
-ffffffff81855710 T rtwn_scan_to
-ffffffff81855720 T rtwn_intr
-ffffffff81855a10 T rtwn_alloc_rx_list
-ffffffff81855d50 T rtwn_alloc_tx_list
-ffffffff81855fd0 T rtwn_free_rx_list
-ffffffff81856110 T rtwn_pci_write_1
-ffffffff81856140 T rtwn_pci_write_2
-ffffffff81856170 T rtwn_pci_write_4
-ffffffff818561a0 T rtwn_pci_read_1
-ffffffff818561c0 T rtwn_pci_read_2
-ffffffff818561e0 T rtwn_pci_read_4
-ffffffff81856200 T rtwn_tx
-ffffffff818567f0 T rtwn_power_on
-ffffffff81856820 T rtwn_dma_init
-ffffffff81856bc0 T rtwn_pci_load_firmware
-ffffffff81856c70 T rtwn_fw_loadpage
-ffffffff81856db0 T rtwn_mac_init
-ffffffff81856f10 T rtwn_bb_init
-ffffffff818573b0 T rtwn_alloc_buffers
-ffffffff818573e0 T rtwn_pci_init
-ffffffff818574b0 T rtwn_pci_stop
-ffffffff81857600 T rtwn_is_oactive
-ffffffff81857630 T rtwn_next_calib
-ffffffff81857650 T rtwn_cancel_calib
-ffffffff81857690 T rtwn_pci_next_scan
-ffffffff818576b0 T rtwn_cancel_scan
-ffffffff818576f0 T rtwn_wait_async
-ffffffff81857720 T rtwn_free_tx_list
-ffffffff81857880 T rtwn_setup_rx_desc
-ffffffff818578f0 T rtwn_reset_rx_list
-ffffffff81857990 T rtwn_reset_tx_list
-ffffffff81857ae0 T rtwn_rx_frame
-ffffffff81858010 T rtwn_tx_done
-ffffffff818581a0 T rtwn_poll_c2h_events
-ffffffff81858330 T rtwn_pci_92c_stop
-ffffffff81858520 T rtwn_pci_88e_stop
-ffffffff81858910 T rtwn_pci_23a_stop
-ffffffff81858cd0 T rtwn_88e_intr
-ffffffff81859020 T rtwn_llt_write
-ffffffff818590f0 T rtwn_llt_init
-ffffffff818593b0 T rtwn_92c_power_on
-ffffffff81859870 T rtwn_88e_power_on
-ffffffff81859c90 T rtwn_23a_power_on
-ffffffff8185a140 T rtwn_tx_report
-ffffffff8185b000 T ral_pci_match
-ffffffff8185b020 T ral_pci_attach
-ffffffff8185b200 T ral_pci_detach
-ffffffff8185b290 T ral_pci_activate
-ffffffff8185b310 T ral_pci_wakeup
-ffffffff8185c000 T acx_pci_match
-ffffffff8185c020 T acx_pci_attach
-ffffffff8185c240 T acx_pci_detach
-ffffffff8185d000 T pgt_pci_match
-ffffffff8185d020 T pgt_pci_attach
-ffffffff8185d1f0 T pgt_pci_detach
-ffffffff8185e000 T malo_pci_match
-ffffffff8185e020 T malo_pci_attach
-ffffffff8185e1c0 T malo_pci_detach
-ffffffff8185e210 T malo_pci_activate
-ffffffff8185e270 T malo_pci_wakeup
-ffffffff8185f000 T bwi_pci_match
-ffffffff8185f070 T bwi_pci_attach
-ffffffff8185f280 T bwi_pci_detach
-ffffffff8185f2d0 T bwi_pci_activate
-ffffffff8185f330 T bwi_reset_bcm4331
-ffffffff8185f450 T bwi_pci_conf_write
-ffffffff8185f480 T bwi_pci_conf_read
-ffffffff8185f4a0 T bwi_pci_wakeup
-ffffffff81860000 T piixpm_match
-ffffffff81860020 T piixpm_attach
-ffffffff818604b0 T piixpm_intr
-ffffffff818605c0 T piixpm_i2c_acquire_bus
-ffffffff818606c0 T piixpm_i2c_release_bus
-ffffffff81860790 T piixpm_i2c_exec
-ffffffff81861000 T vic_match
-ffffffff818610a0 T vic_attach
-ffffffff81861430 T vic_intr
-ffffffff818614a0 T vic_query
-ffffffff81861700 T vic_alloc_data
-ffffffff81861a00 T vic_tick
-ffffffff81861a70 T vic_ioctl
-ffffffff81861cb0 T vic_start
-ffffffff81861ff0 T vic_watchdog
-ffffffff81862020 T vic_media_change
-ffffffff81862050 T vic_media_status
-ffffffff81862100 T vic_read
-ffffffff81862120 T vic_read_cmd
-ffffffff81862170 T vic_getlladdr
-ffffffff81862220 T vic_alloc_dmamem
-ffffffff81862390 T vic_rx_fill
-ffffffff81862570 T vic_alloc_mbuf
-ffffffff81862630 T vic_init_data
-ffffffff818629e0 T vic_uninit_data
-ffffffff81862ba0 T vic_link_state
-ffffffff81862c20 T vic_write
-ffffffff81862c70 T vic_rx_proc
-ffffffff81862ed0 T vic_tx_proc
-ffffffff81863040 T vic_iff
-ffffffff81863180 T vic_setlladdr
-ffffffff818631e0 T vic_load_txb
-ffffffff81863290 T vic_init
-ffffffff81863430 T vic_stop
-ffffffff81863560 T vic_rxrinfo
-ffffffff81863640 T vic_free_dmamem
-ffffffff81864000 T vmxnet3_match
-ffffffff81864020 T vmxnet3_attach
-ffffffff81864560 T vmxnet3_dma_init
-ffffffff81864700 T vmxnet3_intr
-ffffffff818647a0 T vmxnet3_intr_intx
-ffffffff81864870 T vmxnet3_ioctl
-ffffffff81864a00 T vmxnet3_start
-ffffffff81864d20 T vmxnet3_watchdog
-ffffffff81864d70 T vmxnet3_media_change
-ffffffff81864da0 T vmxnet3_media_status
-ffffffff81864ea0 T vmxnet3_link_state
-ffffffff81864f60 T vmxnet3_dma_allocmem
-ffffffff818650b0 T vmxnet3_alloc_txring
-ffffffff81865210 T vmxnet3_alloc_rxring
-ffffffff818654a0 T vmxnet3_rxfill_tick
-ffffffff81865510 T vmxnet3_txinit
-ffffffff81865570 T vmxnet3_rxfill
-ffffffff818657e0 T vmxnet3_rxinit
-ffffffff818658a0 T vmxnet3_txstop
-ffffffff81865930 T vmxnet3_rxstop
-ffffffff81865a20 T vmxnet3_enable_all_intrs
-ffffffff81865a50 T vmxnet3_disable_all_intrs
-ffffffff81865a80 T vmxnet3_evintr
-ffffffff81865c40 T vmxnet3_rxintr
-ffffffff81865fd0 T vmxnet3_txintr
-ffffffff81866170 T vmxnet3_init
-ffffffff81866410 T vmxnet3_rx_csum
-ffffffff81866470 T vmxnet3_iff
-ffffffff818665b0 T vmxnet3_stop
-ffffffff818666a0 T vmxnet3_reset
-ffffffff81867000 T vmwpvs_match
-ffffffff81867030 T vmwpvs_attach
-ffffffff81867dd0 T vmwpvs_scsi_cmd
-ffffffff81868220 T vmwpvs_intx
-ffffffff818682a0 T vmwpvs_msg_task
-ffffffff81868520 T vmwpvs_intr
-ffffffff81868700 T vmwpvs_get_config
-ffffffff81868900 T vmwpvs_dmamem_zalloc
-ffffffff81868960 T vmwpvs_dmamem_alloc
-ffffffff81868ae0 T vmwpvs_ccb_put
-ffffffff81868b40 T vmwpvs_setup_rings
-ffffffff81868c70 T vmwpvs_setup_msg_ring
-ffffffff81868d60 T vmwpvs_ccb_get
-ffffffff81868de0 T vmwpvs_dmamem_free
-ffffffff81868e60 T vmwpvs_cmd
-ffffffff81868f00 T vmwpvs_scsi_cmd_done
-ffffffff818690d0 T vmwpvs_scsi_cmd_poll
-ffffffff8186a000 T lii_match
-ffffffff8186a020 T lii_attach
-ffffffff8186a430 T lii_activate
-ffffffff8186a520 T lii_reset
-ffffffff8186a800 T lii_spi_configure
-ffffffff8186a8f0 T lii_eeprom_present
-ffffffff8186a980 T lii_eeprom_read
-ffffffff8186a9b0 T lii_spi_read
-ffffffff8186ac70 T lii_read_macaddr
-ffffffff8186adf0 T lii_intr
-ffffffff8186af00 T lii_alloc_rings
-ffffffff8186b110 T lii_tick
-ffffffff8186b160 T lii_mii_readreg
-ffffffff8186b400 T lii_mii_writereg
-ffffffff8186b6a0 T lii_mii_statchg
-ffffffff8186b720 T lii_media_change
-ffffffff8186b770 T lii_media_status
-ffffffff8186b7d0 T lii_ioctl
-ffffffff8186b960 T lii_start
-ffffffff8186bb10 T lii_watchdog
-ffffffff8186bb50 T lii_stop
-ffffffff8186bbc0 T lii_init
-ffffffff8186c0d0 T lii_iff
-ffffffff8186c220 T lii_tx_put
-ffffffff8186c330 T lii_free_tx_space
-ffffffff8186c380 T lii_rxintr
-ffffffff8186c530 T lii_txintr
-ffffffff8186d000 T ichiic_match
-ffffffff8186d020 T ichiic_attach
-ffffffff8186d200 T ichiic_intr
-ffffffff8186d310 T ichiic_i2c_acquire_bus
-ffffffff8186d370 T ichiic_i2c_release_bus
-ffffffff8186d3c0 T ichiic_i2c_exec
-ffffffff8186e000 T viapm_match
-ffffffff8186e020 T viapm_attach
-ffffffff8186e640 T viapm_intr
-ffffffff8186e750 T viapm_i2c_acquire_bus
-ffffffff8186e7b0 T viapm_i2c_release_bus
-ffffffff8186e800 T viapm_i2c_exec
-ffffffff8186eb30 T viapm_refresh_sensor_data
-ffffffff8186ee50 T viapm_refresh
-ffffffff8186ee70 T val_to_uK
-ffffffff8186ef10 T val_to_rpm
-ffffffff8186ef50 T val_to_uV
-ffffffff8186eff0 T viapm_get_timecount
-ffffffff81870000 T amdiic_match
-ffffffff81870020 T amdiic_attach
-ffffffff818701f0 T amdiic_intr
-ffffffff818702c0 T amdiic_i2c_acquire_bus
-ffffffff81870320 T amdiic_i2c_release_bus
-ffffffff81870370 T amdiic_i2c_exec
-ffffffff818705e0 T amdiic_read
-ffffffff81870730 T amdiic_wait
-ffffffff818707d0 T amdiic_write
-ffffffff81871000 T nviic_match
-ffffffff81871020 T nviic_attach
-ffffffff81871270 T nviic_i2c_acquire_bus
-ffffffff818712b0 T nviic_i2c_release_bus
-ffffffff818712f0 T nviic_i2c_exec
-ffffffff81871510 T nviic_write
-ffffffff81871560 T nviic_read
-ffffffff81872000 T sdhc_pci_match
-ffffffff81872060 T sdhc_pci_attach
-ffffffff818723a0 T sdhc_pci_activate
-ffffffff818723f0 T sdhc_takecontroller
-ffffffff81872490 T sdhc_ricohfix
-ffffffff818725f0 T sdhc_pci_conf_write
-ffffffff81873000 T kate_match
-ffffffff81873190 T kate_attach
-ffffffff81873440 T kate_refresh
-ffffffff81874000 T km_match
-ffffffff81874050 T km_attach
-ffffffff818740e0 T km_refresh
-ffffffff81875000 T ksmn_match
-ffffffff81875050 T ksmn_attach
-ffffffff81875140 T ksmn_refresh
-ffffffff81876000 T itherm_probe
-ffffffff81876020 T itherm_attach
-ffffffff81876380 T itherm_activate
-ffffffff81876400 T itherm_enable
-ffffffff81876460 T itherm_refresh
-ffffffff81876470 T itherm_refresh_sensor_data
-ffffffff818768a0 T itherm_bias_temperature_sensor
-ffffffff81877000 T pchtemp_match
-ffffffff81877020 T pchtemp_attach
-ffffffff81877180 T pchtemp_refresh
-ffffffff81878000 T rtsx_pci_match
-ffffffff81878090 T rtsx_pci_attach
-ffffffff81879000 T xspd_match
-ffffffff81879020 T xspd_attach
-ffffffff818791e0 T xspd_intr
-ffffffff8187a000 T virtio_pci_match
-ffffffff8187a070 T virtio_pci_attach
-ffffffff8187a400 T virtio_pci_detach
-ffffffff8187a4d0 T virtio_pci_kick
-ffffffff8187a520 T virtio_pci_read_device_config_1
-ffffffff8187a540 T virtio_pci_read_device_config_2
-ffffffff8187a570 T virtio_pci_read_device_config_4
-ffffffff8187a5a0 T virtio_pci_read_device_config_8
-ffffffff8187a620 T virtio_pci_write_device_config_1
-ffffffff8187a650 T virtio_pci_write_device_config_2
-ffffffff8187a680 T virtio_pci_write_device_config_4
-ffffffff8187a6b0 T virtio_pci_write_device_config_8
-ffffffff8187a720 T virtio_pci_read_queue_size
-ffffffff8187a7a0 T virtio_pci_setup_queue
-ffffffff8187aa90 T virtio_pci_set_status
-ffffffff8187ab40 T virtio_pci_negotiate_features
-ffffffff8187ac70 T virtio_pci_poll_intr
-ffffffff8187acd0 T virtio_pci_find_cap
-ffffffff8187aeb0 T virtio_pci_attach_10
-ffffffff8187b320 T virtio_pci_attach_09
-ffffffff8187b440 T virtio_pci_adjust_config_region
-ffffffff8187b4e0 T virtio_pci_setup_msix
-ffffffff8187b880 T virtio_pci_legacy_intr
-ffffffff8187b930 T virtio_pci_legacy_intr_mpsafe
-ffffffff8187b9c0 T virtio_pci_free_irqs
-ffffffff8187bc20 T virtio_pci_negotiate_features_10
-ffffffff8187be90 T virtio_pci_msix_establish
-ffffffff8187bf60 T virtio_pci_set_msix_queue_vector
-ffffffff8187bff0 T virtio_pci_set_msix_config_vector
-ffffffff8187c030 T virtio_pci_config_intr
-ffffffff8187c070 T virtio_pci_shared_queue_intr
-ffffffff8187c080 T virtio_pci_queue_intr
-ffffffff8187d000 T dwiic_pci_match
-ffffffff8187d020 T dwiic_pci_attach
-ffffffff8187d320 T dwiic_pci_activate
-ffffffff8187d390 T dwiic_pci_bus_scan
-ffffffff8187e000 T bwfm_pci_buscore_read
-ffffffff8187e060 T bwfm_pci_buscore_write
-ffffffff8187e0d0 T bwfm_pci_buscore_prepare
-ffffffff8187e100 T bwfm_pci_buscore_reset
-ffffffff8187e2b0 T bwfm_pci_buscore_activate
-ffffffff8187e2e0 T bwfm_pci_preinit
-ffffffff8187f350 T bwfm_pci_stop
-ffffffff8187f3e0 T bwfm_pci_txcheck
-ffffffff8187f4b0 T bwfm_pci_txdata
-ffffffff8187f800 T bwfm_pci_msgbuf_query_dcmd
-ffffffff8187fc40 T bwfm_pci_msgbuf_set_dcmd
-ffffffff8187fc80 T bwfm_pci_match
-ffffffff8187fca0 T bwfm_pci_attach
-ffffffff8187ff10 T bwfm_pci_detach
-ffffffff81880240 T bwfm_pci_intr
-ffffffff818803a0 T bwfm_pci_select_core
-ffffffff81880470 T bwfm_pci_load_microcode
-ffffffff81880750 T bwfm_pci_dmamem_alloc
-ffffffff818808f0 T bwfm_pci_setup_ring
-ffffffff81880af0 T bwfm_pci_intr_enable
-ffffffff81880b20 T bwfm_pci_fill_rx_rings
-ffffffff81880b60 T bwfm_pci_dmamem_free
-ffffffff81880bd0 T bwfm_pci_pktid_avail
-ffffffff81880c40 T bwfm_pci_pktid_new
-ffffffff81880db0 T bwfm_pci_pktid_free
-ffffffff81880e50 T bwfm_pci_fill_rx_buf_ring
-ffffffff818811a0 T bwfm_pci_fill_rx_ioctl_ring
-ffffffff81881510 T bwfm_pci_ring_write_reserve
-ffffffff81881600 T bwfm_pci_ring_write_cancel
-ffffffff81881640 T bwfm_pci_ring_write_commit
-ffffffff81881710 T bwfm_pci_ring_write_rptr
-ffffffff81881790 T bwfm_pci_ring_write_wptr
-ffffffff81881810 T bwfm_pci_setup_flowring
-ffffffff81881970 T bwfm_pci_ring_bell
-ffffffff818819a0 T bwfm_pci_ring_update_rptr
-ffffffff81881a50 T bwfm_pci_ring_update_wptr
-ffffffff81881af0 T bwfm_pci_ring_write_reserve_multi
-ffffffff81881c10 T bwfm_pci_ring_read_avail
-ffffffff81881d10 T bwfm_pci_ring_read_commit
-ffffffff81881da0 T bwfm_pci_ring_rx
-ffffffff81881fa0 T bwfm_pci_msg_rx
-ffffffff81882570 T bwfm_pci_msgbuf_rxioctl
-ffffffff81882660 T bwfm_pci_flowring_lookup
-ffffffff818827c0 T bwfm_pci_flowring_create
-ffffffff818828e0 T bwfm_pci_flowring_create_cb
-ffffffff81882c10 T bwfm_pci_flowring_delete
-ffffffff81882e60 T bwfm_pci_intr_disable
-ffffffff81883000 T ccp_pci_match
-ffffffff81883020 T ccp_pci_attach
-ffffffff81884000 T bnxt_match
-ffffffff81884020 T bnxt_attach
-ffffffff81884d10 T bnxt_dmamem_alloc
-ffffffff81884ea0 T bnxt_dmamem_free
-ffffffff81884f10 T bnxt_hwrm_ver_get
-ffffffff81885060 T bnxt_hwrm_nvm_get_dev_info
-ffffffff818851a0 T bnxt_hwrm_func_drv_rgtr
-ffffffff818852c0 T bnxt_hwrm_func_rgtr_async_events
-ffffffff818853e0 T bnxt_hwrm_func_qcaps
-ffffffff818854c0 T bnxt_intr
-ffffffff81885950 T bnxt_hwrm_func_qcfg
-ffffffff81885a00 T bnxt_hwrm_queue_qportcfg
-ffffffff81885be0 T bnxt_hwrm_func_reset
-ffffffff81885c90 T bnxt_mark_cpr_invalid
-ffffffff81885cf0 T bnxt_hwrm_ring_alloc
-ffffffff81885ea0 T bnxt_cfg_async_cr
-ffffffff81885fa0 T bnxt_write_cp_doorbell
-ffffffff81885fe0 T bnxt_hwrm_cmd_hdr_init
-ffffffff81886030 T hwrm_send_message
-ffffffff818860b0 T bnxt_ioctl
-ffffffff81886310 T bnxt_start
-ffffffff81886710 T bnxt_watchdog
-ffffffff81886740 T bnxt_media_change
-ffffffff818868a0 T bnxt_media_status
-ffffffff818868b0 T bnxt_refill
-ffffffff81886910 T bnxt_media_autonegotiate
-ffffffff81886a00 T bnxt_hwrm_port_phy_qcfg
-ffffffff81886f30 T bnxt_free_slots
-ffffffff81886fc0 T bnxt_up
-ffffffff818881c0 T bnxt_hwrm_stat_ctx_alloc
-ffffffff818882c0 T bnxt_write_tx_doorbell
-ffffffff81888330 T bnxt_write_rx_doorbell
-ffffffff818883a0 T bnxt_hwrm_ring_grp_alloc
-ffffffff818884b0 T bnxt_hwrm_vnic_ctx_alloc
-ffffffff81888590 T bnxt_hwrm_vnic_alloc
-ffffffff81888680 T bnxt_hwrm_vnic_cfg
-ffffffff818887c0 T bnxt_hwrm_vnic_cfg_placement
-ffffffff81888890 T bnxt_hwrm_set_filter
-ffffffff81888a10 T bnxt_iff
-ffffffff81888b80 T bnxt_rx_fill
-ffffffff81888c80 T bnxt_hwrm_free_filter
-ffffffff81888d70 T bnxt_hwrm_vnic_free
-ffffffff81888e50 T bnxt_hwrm_vnic_ctx_free
-ffffffff81888f30 T bnxt_hwrm_ring_grp_free
-ffffffff81889010 T bnxt_hwrm_ring_free
-ffffffff81889100 T bnxt_hwrm_stat_ctx_free
-ffffffff818891f0 T bnxt_down
-ffffffff81889a30 T bnxt_hwrm_cfa_l2_set_rx_mask
-ffffffff81889b00 T bnxt_rxrinfo
-ffffffff81889be0 T bnxt_get_sffpage
-ffffffff81889ef0 T bnxt_load_mbuf
-ffffffff81889fa0 T bnxt_handle_async_event
-ffffffff81889fe0 T bnxt_cpr_next_cmpl
-ffffffff8188a060 T bnxt_cpr_commit
-ffffffff8188a090 T bnxt_cpr_rollback
-ffffffff8188a0c0 T bnxt_rx
-ffffffff8188a2d0 T bnxt_txeof
-ffffffff8188a3f0 T bnxt_write_cp_doorbell_index
-ffffffff8188a460 T bnxt_get_media_type
-ffffffff8188a9b0 T bnxt_add_media_type
-ffffffff8188ab80 T _hwrm_send_message
-ffffffff8188d9c0 T bnxt_rx_fill_slots
-ffffffff8188db70 T bnxt_hwrm_err_map
-ffffffff8188dbb0 T _bnxt_hwrm_set_async_event_bit
-ffffffff8188e000 t mcx_match
-ffffffff8188e020 t mcx_attach
-ffffffff81890da0 T mcx_rx_fill_slots
-ffffffff81890f30 T mcx_rx_fill
-ffffffff81890fb0 T mcx_load_mbuf
-ffffffff81891060 t mcx_dmamem_alloc
-ffffffff818911c0 t mcx_pages
-ffffffff81891aa0 t mcx_iff
-ffffffff81891ec0 t mcx_intr
-ffffffff81892430 t mcx_ioctl
-ffffffff81894f90 t mcx_start
-ffffffff818953e0 t mcx_watchdog
-ffffffff81895410 t mcx_media_change
-ffffffff81895670 t mcx_media_status
-ffffffff818957a0 t mcx_refill
-ffffffff81895850 t mcx_calibrate
-ffffffff818959f0 t mcx_port_change
-ffffffff81895b60 t mcx_set_flow_table_entry
-ffffffff81896030 t mcx_delete_flow_table_entry
-ffffffff818964b0 t mcx_arm_cq
-ffffffff81896550 t mcx_access_hca_reg
-ffffffff81896b50 t mcx_down
-ffffffff81897f10 t mcx_create_flow_group
-ffffffff81899000 t iavf_match
-ffffffff81899020 t iavf_attach
-ffffffff81899920 t iavf_reset
-ffffffff81899c10 t iavf_dmamem_alloc
-ffffffff81899d70 t iavf_arq_fill
-ffffffff8189a020 t iavf_arq_timeout
-ffffffff8189a040 t iavf_init_admin_queue
-ffffffff8189a1f0 t iavf_get_version
-ffffffff8189a420 t iavf_get_vf_resources
-ffffffff8189a600 t iavf_config_irq_map
-ffffffff8189a800 t iavf_intr
-ffffffff8189ae70 t iavf_ioctl
-ffffffff8189ba70 t iavf_start
-ffffffff8189bdb0 t iavf_watchdog
-ffffffff8189bde0 t iavf_media_change
-ffffffff8189be10 t iavf_media_status
-ffffffff8189bea0 t iavf_arq_unfill
-ffffffff8189bf90 t iavf_down
-ffffffff8189c4c0 t iavf_up
-ffffffff8189d130 t iavf_queue_select
-ffffffff8189d340 t iavf_rxfill
-ffffffff8189d570 t iavf_rxrefill
-ffffffff8189d590 t iavf_process_arq
-ffffffff8189e000 T rge_match
-ffffffff8189e020 T rge_attach
-ffffffff8189e4a0 T rge_intr
-ffffffff8189e770 T rge_config_imtype
-ffffffff8189e7f0 T rge_exit_oob
-ffffffff8189ec10 T rge_hw_init
-ffffffff8189f0a0 T rge_get_macaddr
-ffffffff8189f120 T rge_set_phy_power
-ffffffff8189f310 T rge_phy_config
-ffffffff818a40b0 T rge_allocmem
-ffffffff818a44c0 T rge_ioctl
-ffffffff818a4660 T rge_start
-ffffffff818a4820 T rge_watchdog
-ffffffff818a4860 T rge_tick
-ffffffff818a48e0 T rge_txstart
-ffffffff818a4910 T rge_ifmedia_upd
-ffffffff818a4e20 T rge_ifmedia_sts
-ffffffff818a4f10 T rge_add_media_types
-ffffffff818a4fc0 T rge_rxeof
-ffffffff818a5300 T rge_txeof
-ffffffff818a54e0 T rge_init
-ffffffff818a67f0 T rge_setup_intr
-ffffffff818a6940 T rge_encap
-ffffffff818a6be0 T rge_stop
-ffffffff818a6dc0 T rge_iff
-ffffffff818a6f40 T rge_set_macaddr
-ffffffff818a7020 T rge_rx_list_init
-ffffffff818a70d0 T rge_tx_list_init
-ffffffff818a7180 T rge_read_csi
-ffffffff818a7250 T rge_write_csi
-ffffffff818a7320 T rge_write_mac_ocp
-ffffffff818a7360 T rge_read_mac_ocp
-ffffffff818a73d0 T rge_reset
-ffffffff818a7530 T rge_write_phy_ocp
-ffffffff818a75f0 T rge_read_phy_ocp
-ffffffff818a76a0 T rge_write_phy
-ffffffff818a7780 T rge_get_link_status
-ffffffff818a77d0 T rge_newbuf
-ffffffff818a7960 T rge_discard_rxbuf
-ffffffff818a79d0 T rge_write_ephy
-ffffffff818a7a80 T rge_patch_phy_mcu
-ffffffff818a7cf0 T rge_disable_phy_ocp_pwrsave
-ffffffff818a7ec0 T rge_disable_sim_im
-ffffffff818a7f20 T rge_setup_sim_im
-ffffffff818a7fa0 T rge_link_state
-ffffffff818a9000 T com_pci_match
-ffffffff818a9020 T com_pci_attach
-ffffffff818a92e0 T com_pci_detach
-ffffffff818a9370 T com_pci_activate
-ffffffff818a9460 T com_pci_intr_designware
-ffffffff818aa000 T agpdev_print
-ffffffff818aa050 T agpbus_probe
-ffffffff818aa0b0 T agpvga_match
-ffffffff818aa110 T agp_attach_bus
-ffffffff818aa190 T agp_probe
-ffffffff818aa1c0 T agp_attach
-ffffffff818aa2d0 T agp_alloc_gatt
-ffffffff818aa490 T agp_alloc_dmamem
-ffffffff818aa5c0 T agp_free_dmamem
-ffffffff818aa620 T agp_free_gatt
-ffffffff818aa6a0 T agp_generic_enable
-ffffffff818aa820 T agp_find_device
-ffffffff818aa860 T agp_state
-ffffffff818aa890 T agp_get_info
-ffffffff818aa930 T agp_acquire
-ffffffff818aa980 T agp_release
-ffffffff818aa9d0 T agp_enable
-ffffffff818aaa00 T agp_mmap
-ffffffff818ab000 T agp_i810_probe
-ffffffff818ab050 T agp_i810_attach
-ffffffff818ab670 T agp_i810_activate
-ffffffff818ab6b0 T agp_i810_bind_page
-ffffffff818ab770 T agp_i810_unbind_page
-ffffffff818ab830 T agp_i810_flush_tlb
-ffffffff818ab860 T agp_i810_enable
-ffffffff818ab890 T agp_i810_get_chiptype
-ffffffff818abb00 T intagp_gmch_match
-ffffffff818abb60 T agp_i810_configure
-ffffffff818abcb0 T intagp_write_gtt
-ffffffff818ac000 T drm_agp_info
-ffffffff818ac0a0 T drm_agp_acquire
-ffffffff818ac100 T drm_agp_release
-ffffffff818ac160 T drm_agp_enable
-ffffffff818ac1d0 T drm_agp_takedown
-ffffffff818ac240 T drm_agp_init
-ffffffff818ad000 T __drm_crtc_commit_free
-ffffffff818ad020 T drm_atomic_state_default_release
-ffffffff818ad080 T drm_atomic_state_init
-ffffffff818ad190 T drm_atomic_state_alloc
-ffffffff818ad230 T drm_atomic_state_default_clear
-ffffffff818ad530 T drm_atomic_state_clear
-ffffffff818ad560 T __drm_atomic_state_free
-ffffffff818ad620 T drm_atomic_get_crtc_state
-ffffffff818ad750 T drm_atomic_set_mode_for_crtc
-ffffffff818ad890 T drm_atomic_set_mode_prop_for_crtc
-ffffffff818ada10 T drm_atomic_crtc_set_property
-ffffffff818adcb0 T drm_atomic_get_plane_state
-ffffffff818adea0 T drm_atomic_private_obj_init
-ffffffff818aded0 T drm_atomic_private_obj_fini
-ffffffff818adef0 T drm_atomic_get_private_obj_state
-ffffffff818ae050 T drm_atomic_get_connector_state
-ffffffff818ae250 T drm_atomic_get_property
-ffffffff818ae820 T drm_atomic_set_crtc_for_plane
-ffffffff818ae960 T drm_atomic_set_fb_for_plane
-ffffffff818aea10 T drm_atomic_set_fence_for_plane
-ffffffff818aea80 T drm_atomic_set_crtc_for_connector
-ffffffff818aebb0 T drm_atomic_set_writeback_fb_for_connector
-ffffffff818aecb0 T drm_atomic_add_affected_connectors
-ffffffff818aedc0 T drm_atomic_add_affected_planes
-ffffffff818aeed0 T drm_atomic_check_only
-ffffffff818af5b0 T drm_atomic_commit
-ffffffff818af640 T drm_atomic_nonblocking_commit
-ffffffff818af6d0 T drm_state_dump
-ffffffff818af890 T drm_atomic_connector_commit_dpms
-ffffffff818afa00 T drm_atomic_set_property
-ffffffff818b0030 T drm_mode_atomic_ioctl
-ffffffff818b0ba0 t drm_atomic_plane_print_state
-ffffffff818b0de0 t drm_atomic_crtc_print_state
-ffffffff818b2000 T drm_atomic_helper_check_modeset
-ffffffff818b2c20 t handle_conflicting_encoders
-ffffffff818b2f40 T drm_atomic_helper_check_plane_state
-ffffffff818b3240 T drm_atomic_helper_check_planes
-ffffffff818b34b0 T drm_atomic_helper_check
-ffffffff818b3560 T drm_atomic_helper_async_check
-ffffffff818b3750 T drm_atomic_helper_update_legacy_modeset_state
-ffffffff818b39f0 T drm_atomic_helper_commit_modeset_disables
-ffffffff818b3e70 T drm_atomic_helper_commit_modeset_enables
-ffffffff818b40f0 T drm_atomic_helper_wait_for_fences
-ffffffff818b4240 T drm_atomic_helper_wait_for_vblanks
-ffffffff818b45f0 T drm_atomic_helper_wait_for_flip_done
-ffffffff818b47a0 T drm_atomic_helper_commit_tail
-ffffffff818b4920 T drm_atomic_helper_commit_planes
-ffffffff818b4bc0 T drm_atomic_helper_fake_vblank
-ffffffff818b4ca0 T drm_atomic_helper_commit_hw_done
-ffffffff818b4e50 T drm_atomic_helper_cleanup_planes
-ffffffff818b4f00 T drm_atomic_helper_commit_tail_rpm
-ffffffff818b5080 T drm_atomic_helper_async_commit
-ffffffff818b5310 T drm_atomic_helper_commit
-ffffffff818b56a0 T drm_atomic_helper_prepare_planes
-ffffffff818b57c0 T drm_atomic_helper_setup_commit
-ffffffff818b5f70 t commit_work
-ffffffff818b5f80 T drm_atomic_helper_swap_state
-ffffffff818b65a0 t commit_tail
-ffffffff818b6640 t release_crtc_commit
-ffffffff818b6680 T drm_atomic_helper_wait_for_dependencies
-ffffffff818b6c30 T drm_atomic_helper_commit_cleanup_done
-ffffffff818b6e10 T drm_atomic_helper_commit_planes_on_crtc
-ffffffff818b7050 T drm_atomic_helper_disable_planes_on_crtc
-ffffffff818b71a0 T drm_atomic_helper_update_plane
-ffffffff818b72e0 T drm_atomic_helper_disable_plane
-ffffffff818b73d0 T __drm_atomic_helper_disable_plane
-ffffffff818b7450 T drm_atomic_helper_set_config
-ffffffff818b7500 T __drm_atomic_helper_set_config
-ffffffff818b7870 T drm_atomic_helper_disable_all
-ffffffff818b7880 t __drm_atomic_helper_disable_all
-ffffffff818b7a30 T drm_atomic_helper_shutdown
-ffffffff818b7ae0 T drm_atomic_helper_suspend
-ffffffff818b7be0 T drm_atomic_helper_duplicate_state
-ffffffff818b7d40 T drm_atomic_helper_commit_duplicated_state
-ffffffff818b7e70 T drm_atomic_helper_resume
-ffffffff818b7f50 T drm_atomic_helper_page_flip
-ffffffff818b8010 t page_flip_common
-ffffffff818b8110 T drm_atomic_helper_page_flip_target
-ffffffff818b8220 T drm_atomic_helper_best_encoder
-ffffffff818b82a0 T drm_atomic_helper_crtc_reset
-ffffffff818b8320 T __drm_atomic_helper_crtc_destroy_state
-ffffffff818b83f0 T __drm_atomic_helper_crtc_duplicate_state
-ffffffff818b84a0 T drm_atomic_helper_crtc_duplicate_state
-ffffffff818b85c0 T drm_atomic_helper_crtc_destroy_state
-ffffffff818b85f0 T drm_atomic_helper_plane_reset
-ffffffff818b86a0 T __drm_atomic_helper_plane_destroy_state
-ffffffff818b8750 T __drm_atomic_helper_plane_duplicate_state
-ffffffff818b87c0 T drm_atomic_helper_plane_duplicate_state
-ffffffff818b8890 T drm_atomic_helper_plane_destroy_state
-ffffffff818b88c0 T __drm_atomic_helper_connector_reset
-ffffffff818b8900 T drm_atomic_helper_connector_reset
-ffffffff818b89c0 T __drm_atomic_helper_connector_destroy_state
-ffffffff818b8a30 T __drm_atomic_helper_connector_duplicate_state
-ffffffff818b8aa0 T drm_atomic_helper_connector_duplicate_state
-ffffffff818b8b70 T drm_atomic_helper_connector_destroy_state
-ffffffff818b8bd0 T drm_atomic_helper_legacy_gamma_set
-ffffffff818b8db0 T __drm_atomic_helper_private_obj_duplicate_state
-ffffffff818b8de0 t set_best_encoder
-ffffffff818b9000 T drm_plane_create_alpha_property
-ffffffff818b90a0 T drm_plane_create_rotation_property
-ffffffff818b91e0 T drm_rotation_simplify
-ffffffff818b9250 T drm_plane_create_zpos_property
-ffffffff818b9300 T drm_plane_create_zpos_immutable_property
-ffffffff818b93b0 T drm_atomic_normalize_zpos
-ffffffff818ba000 T drm_bridge_add
-ffffffff818ba050 T drm_bridge_remove
-ffffffff818ba0a0 T drm_bridge_attach
-ffffffff818ba150 T drm_bridge_detach
-ffffffff818ba200 T drm_bridge_mode_fixup
-ffffffff818ba280 T drm_bridge_mode_valid
-ffffffff818ba300 T drm_bridge_disable
-ffffffff818ba360 T drm_bridge_post_disable
-ffffffff818ba3c0 T drm_bridge_mode_set
-ffffffff818ba430 T drm_bridge_pre_enable
-ffffffff818ba490 T drm_bridge_enable
-ffffffff818bb000 T drm_clflush_pages
-ffffffff818bb090 T drm_clflush_sg
-ffffffff818bb160 T drm_clflush_virt_range
-ffffffff818bc000 T drm_color_lut_extract
-ffffffff818bc050 T drm_crtc_enable_color_mgmt
-ffffffff818bc130 T drm_mode_crtc_set_gamma_size
-ffffffff818bc260 T drm_mode_gamma_set_ioctl
-ffffffff818bc470 T drm_mode_gamma_get_ioctl
-ffffffff818bc5c0 T drm_get_color_encoding_name
-ffffffff818bc630 T drm_get_color_range_name
-ffffffff818bc6a0 T drm_plane_create_color_properties
-ffffffff818bd000 T drm_connector_ida_init
-ffffffff818bd0f0 T drm_connector_ida_destroy
-ffffffff818bd1e0 T drm_connector_free_work_fn
-ffffffff818bd2a0 T drm_connector_init
-ffffffff818bd590 t drm_connector_free
-ffffffff818bd5d0 t kasprintf
-ffffffff818bd6b0 T drm_connector_attach_encoder
-ffffffff818bd750 T drm_connector_has_possible_encoder
-ffffffff818bd830 T drm_connector_cleanup
-ffffffff818bdab0 T drm_connector_unregister
-ffffffff818bdb00 T drm_mode_put_tile_group
-ffffffff818bdb80 T drm_connector_register
-ffffffff818bdc20 T drm_connector_unregister_all
-ffffffff818bdd70 T drm_connector_list_iter_begin
-ffffffff818bdda0 T drm_connector_list_iter_next
-ffffffff818bdea0 T drm_connector_list_iter_end
-ffffffff818bdf60 T drm_connector_register_all
-ffffffff818be160 T drm_get_connector_status_name
-ffffffff818be1b0 T drm_get_connector_force_name
-ffffffff818be1f0 T drm_get_subpixel_order_name
-ffffffff818be220 T drm_get_dpms_name
-ffffffff818be260 T drm_display_info_set_bus_formats
-ffffffff818be330 T drm_get_dvi_i_select_name
-ffffffff818be390 T drm_get_dvi_i_subconnector_name
-ffffffff818be3f0 T drm_get_tv_select_name
-ffffffff818be440 T drm_get_tv_subconnector_name
-ffffffff818be490 T drm_get_content_protection_name
-ffffffff818be4f0 T drm_connector_create_standard_properties
-ffffffff818be640 T drm_mode_create_dvi_i_properties
-ffffffff818be6d0 T drm_connector_attach_content_type_property
-ffffffff818be760 T drm_mode_create_content_type_property
-ffffffff818be7e0 T drm_hdmi_avi_infoframe_content_type
-ffffffff818be820 T drm_mode_create_tv_properties
-ffffffff818beb20 T drm_mode_create_scaling_mode_property
-ffffffff818beb90 T drm_connector_attach_scaling_mode_property
-ffffffff818bed70 T drm_connector_attach_content_protection_property
-ffffffff818bee00 T drm_mode_create_aspect_ratio_property
-ffffffff818bee80 T drm_mode_create_suggested_offset_properties
-ffffffff818bef40 T drm_connector_set_path_property
-ffffffff818bef90 T drm_connector_set_tile_property
-ffffffff818bf0b0 T drm_connector_update_edid_property
-ffffffff818bf170 T drm_connector_set_link_status_property
-ffffffff818bf1c0 T drm_connector_init_panel_orientation_property
-ffffffff818bf290 T drm_connector_set_obj_prop
-ffffffff818bf360 T drm_connector_property_set_ioctl
-ffffffff818bf3c0 T drm_mode_getconnector
-ffffffff818bf950 T drm_mode_get_tile_group
-ffffffff818bfa30 T drm_mode_create_tile_group
-ffffffff818c0000 T drm_crtc_from_index
-ffffffff818c0060 T drm_crtc_force_disable
-ffffffff818c0170 T drm_mode_set_config_internal
-ffffffff818c01e0 T drm_crtc_force_disable_all
-ffffffff818c0270 T drm_crtc_register_all
-ffffffff818c0300 T drm_crtc_unregister_all
-ffffffff818c0370 T drm_crtc_create_fence
-ffffffff818c0420 T drm_crtc_init_with_planes
-ffffffff818c0810 t kasprintf
-ffffffff818c08f0 T drm_crtc_cleanup
-ffffffff818c0a10 T drm_mode_getcrtc
-ffffffff818c0ba0 t __drm_mode_set_config_internal
-ffffffff818c0d30 T drm_crtc_check_viewport
-ffffffff818c0de0 T drm_mode_setcrtc
-ffffffff818c13b0 T drm_mode_crtc_set_obj_prop
-ffffffff818c1430 t drm_crtc_fence_get_driver_name
-ffffffff818c14a0 t drm_crtc_fence_get_timeline_name
-ffffffff818c2000 T drm_helper_encoder_in_use
-ffffffff818c2120 T drm_helper_crtc_in_use
-ffffffff818c21f0 T drm_helper_disable_unused_functions
-ffffffff818c2240 t __drm_helper_disable_unused_functions
-ffffffff818c2340 T drm_crtc_helper_set_mode
-ffffffff818c28b0 T drm_crtc_helper_set_config
-ffffffff818c3220 T drm_helper_connector_dpms
-ffffffff818c3500 T drm_helper_resume_force_mode
-ffffffff818c37f0 T drm_helper_crtc_mode_set
-ffffffff818c3940 T drm_helper_crtc_mode_set_base
-ffffffff818c3a70 t drm_encoder_disable
-ffffffff818c4000 T drm_dp_dual_mode_read
-ffffffff818c4090 T drm_dp_dual_mode_write
-ffffffff818c4180 T drm_dp_dual_mode_detect
-ffffffff818c4330 T drm_dp_dual_mode_max_tmds_clock
-ffffffff818c4400 T drm_dp_dual_mode_get_tmds_output
-ffffffff818c44d0 T drm_dp_dual_mode_set_tmds_output
-ffffffff818c4820 T drm_dp_get_dual_mode_type_name
-ffffffff818c4890 T drm_lspcon_get_mode
-ffffffff818c49a0 T drm_lspcon_set_mode
-ffffffff818c5000 T drm_dp_channel_eq_ok
-ffffffff818c5070 T drm_dp_clock_recovery_ok
-ffffffff818c50d0 T drm_dp_get_adjust_request_voltage
-ffffffff818c5110 T drm_dp_get_adjust_request_pre_emphasis
-ffffffff818c5150 T drm_dp_link_train_clock_recovery_delay
-ffffffff818c51d0 T drm_dp_link_train_channel_eq_delay
-ffffffff818c5250 T drm_dp_link_rate_to_bw_code
-ffffffff818c52d0 T drm_dp_bw_code_to_link_rate
-ffffffff818c5350 T drm_dp_dpcd_read
-ffffffff818c5570 T drm_dp_dpcd_write
-ffffffff818c56d0 T drm_dp_dpcd_read_link_status
-ffffffff818c56f0 T drm_dp_link_probe
-ffffffff818c57c0 T drm_dp_link_power_up
-ffffffff818c5850 T drm_dp_link_power_down
-ffffffff818c58d0 T drm_dp_link_configure
-ffffffff818c5990 T drm_dp_downstream_max_clock
-ffffffff818c59f0 T drm_dp_downstream_max_bpc
-ffffffff818c5a40 T drm_dp_downstream_id
-ffffffff818c5a60 T drm_dp_downstream_debug
-ffffffff818c5b00 T drm_dp_aux_init
-ffffffff818c5ba0 t drm_dp_aux_crc_work
-ffffffff818c5c80 T drm_dp_aux_register
-ffffffff818c5d50 T drm_dp_aux_unregister
-ffffffff818c5d80 T drm_dp_psr_setup_time
-ffffffff818c5dc0 T drm_dp_start_crc
-ffffffff818c5e60 T drm_dp_stop_crc
-ffffffff818c5ef0 T drm_dp_read_desc
-ffffffff818c5f90 t drm_dp_aux_get_crc
-ffffffff818c6060 t drm_dp_i2c_xfer
-ffffffff818c6280 t drm_dp_i2c_functionality
-ffffffff818c62b0 t drm_dp_i2c_do_msg
-ffffffff818c7000 T drm_dp_send_power_updown_phy
-ffffffff818c71b0 t drm_dp_put_port
-ffffffff818c72f0 t drm_dp_mst_wait_tx_reply
-ffffffff818c74f0 T drm_dp_update_payload_part1
-ffffffff818c78d0 T drm_dp_update_payload_part2
-ffffffff818c79d0 T drm_dp_mst_topology_mgr_set_mst
-ffffffff818c7cd0 t drm_dp_dpcd_write_payload
-ffffffff818c7de0 T drm_dp_mst_topology_mgr_suspend
-ffffffff818c7e70 T drm_dp_mst_topology_mgr_resume
-ffffffff818c7f50 t drm_dp_check_mstb_guid
-ffffffff818c8170 T drm_dp_mst_hpd_irq
-ffffffff818c8c30 T drm_dp_mst_detect_port
-ffffffff818c8d20 T drm_dp_mst_port_has_audio
-ffffffff818c8db0 T drm_dp_mst_get_edid
-ffffffff818c8e80 T drm_dp_find_vcpi_slots
-ffffffff818c8ec0 T drm_dp_atomic_find_vcpi_slots
-ffffffff818c9000 T drm_atomic_get_mst_topology_state
-ffffffff818c9080 T drm_dp_atomic_release_vcpi_slots
-ffffffff818c9130 T drm_dp_mst_allocate_vcpi
-ffffffff818c9380 T drm_dp_mst_get_vcpi_slots
-ffffffff818c9410 T drm_dp_mst_reset_vcpi_slots
-ffffffff818c94b0 T drm_dp_mst_deallocate_vcpi
-ffffffff818c9620 T drm_dp_check_act_status
-ffffffff818c96c0 T drm_dp_calc_pbn_mode
-ffffffff818c97f0 T drm_dp_mst_topology_mgr_init
-ffffffff818c9a50 t drm_dp_mst_link_probe_work
-ffffffff818c9af0 t drm_dp_tx_work
-ffffffff818c9b40 t drm_dp_destroy_connector_work
-ffffffff818c9dd0 T drm_dp_mst_topology_mgr_destroy
-ffffffff818c9ea0 t drm_dp_mst_get_port_ref_locked
-ffffffff818c9f30 t kref_put
-ffffffff818c9f70 t drm_dp_encode_sideband_req
-ffffffff818ca320 t process_single_down_tx_qlock
-ffffffff818ca470 t process_single_tx_qlock
-ffffffff818ca8a0 t drm_dp_msg_data_crc4
-ffffffff818ca9a0 t drm_dp_payload_send_msg
-ffffffff818cadb0 t drm_dp_mst_get_validated_mstb_ref_locked
-ffffffff818cae40 t drm_dp_destroy_mst_branch_device
-ffffffff818caff0 t drm_dp_free_mst_branch_device
-ffffffff818cb060 t drm_dp_free_mst_port
-ffffffff818cb100 t drm_dp_get_one_sb_msg
-ffffffff818cb580 t drm_dp_get_mst_branch_device
-ffffffff818cb6a0 t drm_dp_send_up_ack_reply
-ffffffff818cb7c0 t get_mst_branch_device_by_guid_helper
-ffffffff818cb850 t drm_dp_port_setup_pdt
-ffffffff818cb9f0 t drm_dp_mst_i2c_xfer
-ffffffff818cbd50 t drm_dp_mst_i2c_functionality
-ffffffff818cbd80 t drm_dp_check_and_send_link_address
-ffffffff818cbeb0 t drm_dp_send_link_address
-ffffffff818cc440 t drm_dp_send_enum_path_resources
-ffffffff818cc5a0 t drm_dp_mst_duplicate_state
-ffffffff818cc630 t drm_dp_mst_destroy_state
-ffffffff818cd000 T drm_attach_pci
-ffffffff818cd110 T drmprint
-ffffffff818cd160 T drmsubmatch
-ffffffff818cd1b0 T drm_pciprobe
-ffffffff818cd250 T drm_find_description
-ffffffff818cd300 T drm_probe
-ffffffff818cd350 T drm_attach
-ffffffff818cd700 T drm_lastclose
-ffffffff818cd780 T drm_detach
-ffffffff818cd8c0 T drm_quiesce
-ffffffff818cd940 T drm_wakeup
-ffffffff818cd990 T drm_activate
-ffffffff818cda70 T drm_file_cmp
-ffffffff818cdab0 T drm_file_tree_SPLAY_INSERT
-ffffffff818cdb70 T drm_file_tree_SPLAY
-ffffffff818cdcf0 T drm_file_tree_SPLAY_REMOVE
-ffffffff818cdd90 T drm_file_tree_SPLAY_MINMAX
-ffffffff818cded0 T drm_find_file_by_minor
-ffffffff818cdf50 T drm_get_device_from_kdev
-ffffffff818cdfc0 T drm_firstopen
-ffffffff818ce030 T filt_drmdetach
-ffffffff818ce0a0 T filt_drmkms
-ffffffff818ce0e0 T drmkqfilter
-ffffffff818ce1b0 T drmopen
-ffffffff818ce680 T drmclose
-ffffffff818ce980 T drmread
-ffffffff818cec80 T drm_dequeue_event
-ffffffff818ced70 T drmpoll
-ffffffff818ceed0 T drmmmap
-ffffffff818cef00 T drm_dmamem_alloc
-ffffffff818cf0c0 T drm_dmamem_free
-ffffffff818cf150 T drm_pci_alloc
-ffffffff818cf210 T drm_pci_free
-ffffffff818cf2d0 T drm_getmagic
-ffffffff818cf370 T drm_authmagic
-ffffffff818cf530 T drm_order
-ffffffff818cf590 T drm_getpciinfo
-ffffffff818cf640 T drm_dev_register
-ffffffff818cf690 T drm_dev_unregister
-ffffffff818d0000 T drm_mode_create_dumb
-ffffffff818d0100 T drm_mode_create_dumb_ioctl
-ffffffff818d0200 T drm_mode_mmap_dumb_ioctl
-ffffffff818d0280 T drm_mode_destroy_dumb
-ffffffff818d02f0 T drm_mode_destroy_dumb_ioctl
-ffffffff818d1000 T drm_edid_header_is_valid
-ffffffff818d1080 T drm_edid_block_valid
-ffffffff818d12d0 T drm_edid_is_valid
-ffffffff818d1360 T drm_add_override_edid_modes
-ffffffff818d1440 T drm_add_edid_modes
-ffffffff818d3ee0 T drm_do_get_edid
-ffffffff818d4310 t connector_bad_edid
-ffffffff818d44a0 T drm_probe_ddc
-ffffffff818d44e0 t drm_do_probe_ddc_edid
-ffffffff818d4750 T drm_get_edid
-ffffffff818d4b00 T drm_get_edid_switcheroo
-ffffffff818d4b10 T drm_edid_duplicate
-ffffffff818d4b80 T drm_mode_find_dmt
-ffffffff818d4c80 T drm_mode_fixup_1366x768
-ffffffff818d4cd0 T drm_match_cea_mode
-ffffffff818d4ec0 T drm_get_cea_aspect_ratio
-ffffffff818d4f00 T drm_edid_get_monitor_name
-ffffffff818d4f90 t get_monitor_name
-ffffffff818d5320 T drm_edid_to_sad
-ffffffff818d54b0 t drm_find_cea_extension
-ffffffff818d56d0 T drm_edid_to_speaker_allocation
-ffffffff818d5810 T drm_av_sync_delay
-ffffffff818d58d0 T drm_detect_hdmi_monitor
-ffffffff818d59f0 T drm_detect_monitor_audio
-ffffffff818d5ab0 T drm_rgb_quant_range_selectable
-ffffffff818d5ba0 T drm_default_rgb_quant_range
-ffffffff818d5be0 T drm_reset_display_info
-ffffffff818d5c90 T drm_add_display_info
-ffffffff818d6320 T drm_add_modes_noedid
-ffffffff818d6410 T drm_set_preferred_mode
-ffffffff818d6470 T drm_hdmi_avi_infoframe_from_display_mode
-ffffffff818d66d0 T drm_hdmi_avi_infoframe_quant_range
-ffffffff818d6750 T drm_hdmi_vendor_infoframe_from_display_mode
-ffffffff818d6940 t drm_for_each_detailed_block
-ffffffff818d6b00 t do_detailed_mode
-ffffffff818d72c0 t drm_cvt_modes
-ffffffff818d7500 t drm_mode_std
-ffffffff818d8300 t do_standard_modes
-ffffffff818d8440 t drm_monitor_supports_rb
-ffffffff818d86a0 t drm_gtf2_hbreak
-ffffffff818d8930 t do_inferred_modes
-ffffffff818d8df0 t mode_in_range
-ffffffff818d9000 T drm_encoder_register_all
-ffffffff818d9090 T drm_encoder_unregister_all
-ffffffff818d9100 T drm_encoder_init
-ffffffff818d92d0 t kasprintf
-ffffffff818d93b0 T drm_encoder_cleanup
-ffffffff818d94c0 T drm_mode_getencoder
-ffffffff818da000 T drm_fb_helper_add_one_connector
-ffffffff818da070 t __drm_fb_helper_add_one_connector
-ffffffff818da150 T drm_fb_helper_single_add_all_connectors
-ffffffff818da290 T drm_fb_helper_remove_one_connector
-ffffffff818da3c0 T drm_fb_helper_debug_enter
-ffffffff818da4d0 T drm_fb_helper_debug_leave
-ffffffff818da650 T drm_fb_helper_restore_fbdev_mode_unlocked
-ffffffff818da840 T drm_fb_helper_hotplug_event
-ffffffff818da9e0 T drm_fb_helper_blank
-ffffffff818daa70 t drm_fb_helper_dpms
-ffffffff818dac30 T drm_fb_helper_prepare
-ffffffff818dad10 t drm_fb_helper_resume_worker
-ffffffff818dad40 t drm_fb_helper_dirty_work
-ffffffff818dae20 T drm_fb_helper_init
-ffffffff818db020 t drm_fb_helper_crtc_free
-ffffffff818db190 T drm_fb_helper_alloc_fbi
-ffffffff818db1f0 T drm_fb_helper_unregister_fbi
-ffffffff818db220 T drm_fb_helper_fini
-ffffffff818db2e0 T drm_fb_helper_set_suspend
-ffffffff818db310 T drm_fb_helper_set_suspend_unlocked
-ffffffff818db340 T drm_fb_helper_set_par
-ffffffff818db3a0 T drm_has_preferred_mode
-ffffffff818db400 T drm_pick_cmdline_mode
-ffffffff818db540 T drm_fb_helper_initial_config
-ffffffff818db570 t __drm_fb_helper_initial_config_and_unlock
-ffffffff818db8b0 t drm_setup_crtcs
-ffffffff818dc360 t drm_setup_crtcs_fb
-ffffffff818dc460 T drm_fb_helper_lastclose
-ffffffff818dc480 T drm_fb_helper_output_poll_changed
-ffffffff818dc4a0 T drm_fb_helper_modinit
-ffffffff818dc4d0 t restore_fbdev_mode_atomic
-ffffffff818dc6f0 t drm_pick_crtcs
-ffffffff818dd000 T drm_events_release
-ffffffff818dd0d0 T drm_event_reserve_init_locked
-ffffffff818dd140 T drm_event_reserve_init
-ffffffff818dd200 T drm_event_cancel_free
-ffffffff818dd2b0 T drm_send_event_locked
-ffffffff818dd510 T drm_send_event
-ffffffff818de000 T drm_mode_legacy_fb_format
-ffffffff818de0a0 T drm_get_format_name
-ffffffff818de1c0 T __drm_format_info
-ffffffff818de240 T drm_format_info
-ffffffff818de300 T drm_get_format_info
-ffffffff818de400 T drm_format_num_planes
-ffffffff818de4e0 T drm_format_plane_cpp
-ffffffff818de5e0 T drm_format_horz_chroma_subsampling
-ffffffff818de6c0 T drm_format_vert_chroma_subsampling
-ffffffff818de7a0 T drm_format_plane_width
-ffffffff818de8b0 T drm_format_plane_height
-ffffffff818df000 T drm_framebuffer_check_src_coords
-ffffffff818df090 T drm_mode_addfb
-ffffffff818df230 T drm_mode_addfb2
-ffffffff818df2e0 T drm_mode_addfb_ioctl
-ffffffff818df2f0 T drm_internal_framebuffer_create
-ffffffff818df650 T drm_mode_rmfb
-ffffffff818df7f0 T drm_framebuffer_lookup
-ffffffff818df840 t drm_mode_rmfb_work_fn
-ffffffff818df8c0 T drm_mode_rmfb_ioctl
-ffffffff818df8d0 T drm_mode_getfb
-ffffffff818dfa10 T drm_mode_dirtyfb_ioctl
-ffffffff818dfbc0 T drm_fb_release
-ffffffff818dfcc0 T drm_framebuffer_free
-ffffffff818dfcf0 T drm_framebuffer_init
-ffffffff818dfe50 T drm_framebuffer_unregister_private
-ffffffff818dfe90 T drm_framebuffer_cleanup
-ffffffff818dfef0 T drm_framebuffer_remove
-ffffffff818e02e0 T drm_framebuffer_plane_width
-ffffffff818e0330 T drm_framebuffer_plane_height
-ffffffff818e0380 T drm_framebuffer_print_info
-ffffffff818e1000 T drm_ref
-ffffffff818e1030 T drm_unref
-ffffffff818e1050 T drm_fault
-ffffffff818e1220 T drm_flush
-ffffffff818e1250 T drm_gem_object_put_unlocked
-ffffffff818e13e0 T udv_attach_drm
-ffffffff818e1550 T drm_gem_init
-ffffffff818e1600 T drm_gem_destroy
-ffffffff818e1660 T drm_gem_object_init
-ffffffff818e1770 T drm_gem_private_object_init
-ffffffff818e1800 T drm_gem_handle_delete
-ffffffff818e18c0 t drm_gem_object_release_handle
-ffffffff818e1970 T drm_gem_dumb_map_offset
-ffffffff818e1a50 T drm_gem_object_lookup
-ffffffff818e1ac0 T drm_gem_create_mmap_offset
-ffffffff818e1af0 T drm_gem_dumb_destroy
-ffffffff818e1b00 T drm_gem_handle_create_tail
-ffffffff818e1c80 t drm_gem_object_handle_put_unlocked
-ffffffff818e1d40 T drm_gem_handle_create
-ffffffff818e1d80 T drm_gem_free_mmap_offset
-ffffffff818e1da0 T drm_gem_create_mmap_offset_size
-ffffffff818e1dd0 T drm_gem_close_ioctl
-ffffffff818e1e20 T drm_gem_flink_ioctl
-ffffffff818e1f40 T drm_gem_open_ioctl
-ffffffff818e2010 T drm_gem_open
-ffffffff818e2040 T drm_gem_release
-ffffffff818e2070 T drm_gem_object_release
-ffffffff818e2100 T drm_gem_object_free
-ffffffff818e21b0 T drm_gem_object_put
-ffffffff818e22b0 T drm_gem_print_info
-ffffffff818e3000 T drm_gem_fb_destroy
-ffffffff818e3060 T drm_gem_fb_create_handle
-ffffffff818e4000 T drm_global_init
-ffffffff818e40c0 T drm_global_release
-ffffffff818e4170 T drm_global_item_ref
-ffffffff818e4260 T drm_global_item_unref
-ffffffff818e5000 T drm_ht_create
-ffffffff818e5050 T drm_ht_verbose_list
-ffffffff818e5070 T drm_ht_find_key
-ffffffff818e50c0 T drm_ht_find_key_rcu
-ffffffff818e5110 T drm_ht_insert_item
-ffffffff818e5160 T drm_ht_just_insert_please
-ffffffff818e51b0 T drm_ht_find_item
-ffffffff818e5200 T drm_ht_remove_key
-ffffffff818e5250 T drm_ht_remove_item
-ffffffff818e52a0 T drm_ht_remove
-ffffffff818e6000 T drm_getunique
-ffffffff818e6070 T drm_getclient
-ffffffff818e60e0 T drm_noop
-ffffffff818e6110 T drm_invalid_op
-ffffffff818e6140 T drm_version
-ffffffff818e62d0 T pledge_ioctl_drm
-ffffffff818e6380 T drm_setunique
-ffffffff818e63b0 T drm_do_ioctl
-ffffffff818e6540 T drmioctl
-ffffffff818e66a0 t drm_getstats
-ffffffff818e66e0 t drm_setversion
-ffffffff818e67a0 t drm_getcap
-ffffffff818e6990 t drm_setclientcap
-ffffffff818e7000 T drm_irq_install
-ffffffff818e70b0 T drm_irq_uninstall
-ffffffff818e7260 T drm_legacy_irq_control
-ffffffff818e8000 T tasklet_run
-ffffffff818e8060 T set_current_state
-ffffffff818e8140 T __set_current_state
-ffffffff818e8220 T schedule
-ffffffff818e8230 T schedule_timeout
-ffffffff818e8400 T wake_up_process
-ffffffff818e8420 T flush_workqueue
-ffffffff818e8460 T flush_work
-ffffffff818e84a0 T flush_delayed_work
-ffffffff818e8540 T kthread_func
-ffffffff818e8570 T kthread_run
-ffffffff818e8640 T kthread_lookup
-ffffffff818e86b0 T kthread_should_park
-ffffffff818e8730 T kthread_parkme
-ffffffff818e87e0 T kthread_park
-ffffffff818e88b0 T kthread_unpark
-ffffffff818e8910 T kthread_should_stop
-ffffffff818e8990 T kthread_stop
-ffffffff818e8a80 T ns_to_timespec
-ffffffff818e8b20 T timeval_to_ns
-ffffffff818e8b60 T ns_to_timeval
-ffffffff818e8c10 T timeval_to_ms
-ffffffff818e8c60 T timeval_to_us
-ffffffff818e8c90 T dmi_match
-ffffffff818e8d40 T dmi_first_match
-ffffffff818e8e20 T dmi_get_system_info
-ffffffff818e8e90 T dmi_check_system
-ffffffff818e8f80 T alloc_pages
-ffffffff818e9050 T __free_pages
-ffffffff818e90e0 T __pagevec_release
-ffffffff818e9190 T kmap
-ffffffff818e91c0 T kunmap
-ffffffff818e91e0 T vmap
-ffffffff818e92c0 T vunmap
-ffffffff818e9300 T print_hex_dump
-ffffffff818e93c0 T memchr_inv
-ffffffff818e9410 T panic_cmp
-ffffffff818e9430 T linux_root_RB_INSERT_COLOR
-ffffffff818e9650 T linux_root_RB_REMOVE_COLOR
-ffffffff818e9990 T linux_root_RB_REMOVE
-ffffffff818e9af0 T linux_root_RB_INSERT
-ffffffff818e9b60 T linux_root_RB_FIND
-ffffffff818e9bb0 T linux_root_RB_NFIND
-ffffffff818e9c00 T linux_root_RB_NEXT
-ffffffff818e9c70 T linux_root_RB_PREV
-ffffffff818e9ce0 T linux_root_RB_MINMAX
-ffffffff818e9d30 T idr_init
-ffffffff818e9db0 T idr_destroy
-ffffffff818e9ed0 T idr_tree_SPLAY_REMOVE
-ffffffff818e9f60 T idr_preload
-ffffffff818e9ff0 T idr_alloc
-ffffffff818ea180 T idr_tree_SPLAY_INSERT
-ffffffff818ea220 T idr_replace
-ffffffff818ea2a0 T idr_remove
-ffffffff818ea360 T idr_find
-ffffffff818ea3d0 T idr_get_next
-ffffffff818ea4f0 T idr_for_each
-ffffffff818ea610 T idr_cmp
-ffffffff818ea650 T idr_tree_SPLAY
-ffffffff818ea780 T idr_tree_SPLAY_MINMAX
-ffffffff818ea870 T ida_init
-ffffffff818ea8a0 T ida_destroy
-ffffffff818ea8d0 T ida_remove
-ffffffff818ea900 T ida_simple_get
-ffffffff818ea980 T ida_simple_remove
-ffffffff818ea9b0 T sg_alloc_table
-ffffffff818eaa20 T sg_free_table
-ffffffff818eaa50 T sg_copy_from_buffer
-ffffffff818eaa70 T i2c_master_xfer
-ffffffff818eabc0 T i2c_transfer
-ffffffff818eabf0 T i2c_bb_master_xfer
-ffffffff818eac90 T i2c_bb_functionality
-ffffffff818eacc0 T i2c_bit_add_bus
-ffffffff818ead00 T vga_disable_bridge
-ffffffff818eadb0 T vga_get_uninterruptible
-ffffffff818eae00 T vga_put
-ffffffff818eae80 T acpi_get_table
-ffffffff818eaf50 T acpi_get_handle
-ffffffff818eafa0 T acpi_get_name
-ffffffff818eb040 T acpi_evaluate_object
-ffffffff818eb240 T drm_linux_acpi_notify
-ffffffff818eb2c0 T register_acpi_notifier
-ffffffff818eb300 T unregister_acpi_notifier
-ffffffff818eb390 T acpi_format_exception
-ffffffff818eb3e0 T backlight_do_update_status
-ffffffff818eb400 T backlight_device_register
-ffffffff818eb490 T backlight_device_unregister
-ffffffff818eb4b0 T backlight_schedule_update_status
-ffffffff818eb4d0 T drm_sysfs_hotplug_event
-ffffffff818eb4f0 T dma_fence_context_alloc
-ffffffff818eb520 T dma_fence_default_wait
-ffffffff818eb720 t dma_fence_default_wait_cb
-ffffffff818eb750 T dma_fence_wait_any_timeout
-ffffffff818eba90 t dma_fence_add_callback
-ffffffff818ebc10 T dma_fence_array_create
-ffffffff818ebd30 t irq_dma_fence_array_work
-ffffffff818ebe40 t dma_fence_array_get_driver_name
-ffffffff818ebe70 t dma_fence_array_get_timeline_name
-ffffffff818ebea0 t dma_fence_array_enable_signaling
-ffffffff818ebfb0 t dma_fence_array_signaled
-ffffffff818ebff0 t dma_fence_array_release
-ffffffff818ec0b0 T dmabuf_read
-ffffffff818ec0e0 T dmabuf_write
-ffffffff818ec110 T dmabuf_ioctl
-ffffffff818ec140 T dmabuf_poll
-ffffffff818ec170 T dmabuf_kqfilter
-ffffffff818ec1a0 T dmabuf_stat
-ffffffff818ec260 T dmabuf_close
-ffffffff818ec2d0 T dmabuf_seek
-ffffffff818ec350 T dma_buf_export
-ffffffff818ec3f0 T dma_buf_get
-ffffffff818ec480 T dma_buf_put
-ffffffff818ec530 T dma_buf_fd
-ffffffff818ec640 T get_dma_buf
-ffffffff818ec680 T pcie_get_speed_cap
-ffffffff818ec7d0 T pcie_get_width_cap
-ffffffff818ec880 T default_wake_function
-ffffffff818ec8e0 T autoremove_wake_function
-ffffffff818ec960 T wait_on_bit
-ffffffff818eca20 T wait_on_bit_timeout
-ffffffff818ecaf0 T wake_up_bit
-ffffffff818ecb30 T drm_linux_init
-ffffffff818ecc40 T pci_resize_resource
-ffffffff818ecd80 T register_shrinker
-ffffffff818ecdd0 T unregister_shrinker
-ffffffff818ece30 T drmbackoff
-ffffffff818ecec0 t dma_fence_array_cb_func
-ffffffff818ed000 T drm_mtrr_add
-ffffffff818ed070 T drm_mtrr_del
-ffffffff818ee000 T mipi_dsi_attach
-ffffffff818ee050 T mipi_dsi_detach
-ffffffff818ee0a0 T mipi_dsi_packet_format_is_short
-ffffffff818ee0f0 T mipi_dsi_packet_format_is_long
-ffffffff818ee140 T mipi_dsi_create_packet
-ffffffff818ee240 T mipi_dsi_shutdown_peripheral
-ffffffff818ee2e0 T mipi_dsi_turn_on_peripheral
-ffffffff818ee380 T mipi_dsi_set_maximum_return_packet_size
-ffffffff818ee430 T mipi_dsi_generic_write
-ffffffff818ee4e0 T mipi_dsi_generic_read
-ffffffff818ee590 T mipi_dsi_dcs_write_buffer
-ffffffff818ee650 T mipi_dsi_dcs_write
-ffffffff818ee7b0 T mipi_dsi_dcs_read
-ffffffff818ee840 T mipi_dsi_dcs_nop
-ffffffff818ee8f0 T mipi_dsi_dcs_soft_reset
-ffffffff818ee9a0 T mipi_dsi_dcs_get_power_mode
-ffffffff818eea60 T mipi_dsi_dcs_get_pixel_format
-ffffffff818eeb20 T mipi_dsi_dcs_enter_sleep_mode
-ffffffff818eebd0 T mipi_dsi_dcs_exit_sleep_mode
-ffffffff818eec80 T mipi_dsi_dcs_set_display_off
-ffffffff818eed30 T mipi_dsi_dcs_set_display_on
-ffffffff818eede0 T mipi_dsi_dcs_set_column_address
-ffffffff818eeef0 T mipi_dsi_dcs_set_page_address
-ffffffff818ef000 T mipi_dsi_dcs_set_tear_off
-ffffffff818ef0b0 T mipi_dsi_dcs_set_tear_on
-ffffffff818ef1a0 T mipi_dsi_dcs_set_pixel_format
-ffffffff818f0000 T drm_mm_interval_tree_iter_first
-ffffffff818f0070 T __drm_mm_interval_first
-ffffffff818f00e0 T drm_mm_reserve_node
-ffffffff818f0280 T drm_mm_insert_node_in_range_generic
-ffffffff818f0600 T drm_mm_remove_node
-ffffffff818f06d0 T drm_mm_replace_node
-ffffffff818f0770 T drm_mm_scan_init_with_range
-ffffffff818f07f0 T drm_mm_scan_add_block
-ffffffff818f0930 T drm_mm_scan_remove_block
-ffffffff818f09a0 T drm_mm_scan_color_evict
-ffffffff818f0a50 T drm_mm_init
-ffffffff818f0ae0 T drm_mm_takedown
-ffffffff818f0b20 T drm_mm_print
-ffffffff818f1000 T drm_modeset_register_all
-ffffffff818f10a0 T drm_modeset_unregister_all
-ffffffff818f10d0 T drm_mode_getresources
-ffffffff818f1350 T drm_mode_config_reset
-ffffffff818f14b0 T drm_mode_config_init
-ffffffff818f1a90 T drm_mode_config_cleanup
-ffffffff818f2000 T __drm_mode_object_add
-ffffffff818f20d0 T drm_mode_object_add
-ffffffff818f2170 T drm_mode_object_register
-ffffffff818f21c0 T drm_mode_object_unregister
-ffffffff818f2220 T drm_mode_object_lease_required
-ffffffff818f2260 T __drm_mode_object_find
-ffffffff818f2310 T drm_mode_object_find
-ffffffff818f23c0 T drm_mode_object_put
-ffffffff818f2410 T drm_mode_object_get
-ffffffff818f2440 T drm_object_attach_property
-ffffffff818f24a0 T drm_object_property_set_value
-ffffffff818f2570 T drm_object_property_get_value
-ffffffff818f25f0 t __drm_object_property_get_value
-ffffffff818f26d0 T drm_mode_object_get_properties
-ffffffff818f2830 T drm_mode_obj_get_properties_ioctl
-ffffffff818f2980 T drm_mode_obj_find_prop_id
-ffffffff818f29d0 T drm_mode_obj_set_property_ioctl
-ffffffff818f3000 T drm_mode_debug_printmodeline
-ffffffff818f3030 T drm_mode_create
-ffffffff818f30b0 T drm_mode_destroy
-ffffffff818f3100 T drm_mode_probed_add
-ffffffff818f31a0 T drm_cvt_mode
-ffffffff818f3690 T drm_mode_set_name
-ffffffff818f36e0 T drm_gtf_mode_complex
-ffffffff818f3a10 T drm_gtf_mode
-ffffffff818f3a60 T drm_mode_hsync
-ffffffff818f3ac0 T drm_mode_vrefresh
-ffffffff818f3b50 T drm_mode_get_hv_timing
-ffffffff818f3ba0 T drm_mode_set_crtcinfo
-ffffffff818f3dd0 T drm_mode_copy
-ffffffff818f3e40 T drm_mode_duplicate
-ffffffff818f3f10 T drm_mode_match
-ffffffff818f4090 T drm_mode_equal
-ffffffff818f40b0 T drm_mode_equal_no_clocks
-ffffffff818f40d0 T drm_mode_equal_no_clocks_no_stereo
-ffffffff818f4180 T drm_mode_validate_driver
-ffffffff818f4250 T drm_mode_validate_size
-ffffffff818f42a0 T drm_mode_validate_ycbcr420
-ffffffff818f4300 T drm_get_mode_status_name
-ffffffff818f4370 T drm_mode_prune_invalid
-ffffffff818f4410 T drm_mode_sort
-ffffffff818f4430 t drm_mode_compare
-ffffffff818f4490 T drm_connector_list_update
-ffffffff818f4660 T drm_mode_parse_command_line_for_connector
-ffffffff818f4690 T drm_mode_create_from_cmdline_mode
-ffffffff818f4770 T drm_mode_convert_to_umode
-ffffffff818f48f0 T drm_mode_convert_umode
-ffffffff818f4b50 T drm_mode_is_420_only
-ffffffff818f4ba0 T drm_mode_is_420_also
-ffffffff818f4bf0 T drm_mode_is_420
-ffffffff818f5000 T drm_helper_move_panel_connectors_to_head
-ffffffff818f50f0 T drm_helper_mode_fill_fb_struct
-ffffffff818f51b0 T drm_crtc_init
-ffffffff818f5260 T drm_mode_config_helper_suspend
-ffffffff818f52f0 T drm_mode_config_helper_resume
-ffffffff818f6000 T drm_modeset_lock_all
-ffffffff818f6270 T drm_modeset_acquire_init
-ffffffff818f6300 T drm_modeset_lock_all_ctx
-ffffffff818f63d0 T drm_modeset_backoff
-ffffffff818f6490 T drm_modeset_acquire_fini
-ffffffff818f64c0 T drm_warn_on_modeset_not_all_locked
-ffffffff818f6610 T drm_modeset_unlock_all
-ffffffff818f66f0 T drm_modeset_drop_locks
-ffffffff818f6780 T drm_modeset_unlock
-ffffffff818f6840 t modeset_lock
-ffffffff818f6ac0 T drm_modeset_lock_init
-ffffffff818f6b20 T drm_modeset_lock
-ffffffff818f6c40 T drm_modeset_lock_single_interruptible
-ffffffff818f6d60 t __ww_mutex_lock
-ffffffff818f7000 T drm_panel_init
-ffffffff818f7030 T drm_panel_add
-ffffffff818f70a0 T drm_panel_remove
-ffffffff818f70f0 T drm_panel_attach
-ffffffff818f7130 T drm_panel_detach
-ffffffff818f8000 T drm_get_panel_orientation_quirk
-ffffffff818f9000 T drm_universal_plane_init
-ffffffff818f9680 t kasprintf
-ffffffff818f9760 T drm_plane_register_all
-ffffffff818f97f0 T drm_plane_unregister_all
-ffffffff818f9860 T drm_plane_init
-ffffffff818f98b0 T drm_plane_cleanup
-ffffffff818f9a00 T drm_plane_from_index
-ffffffff818f9a60 T drm_plane_force_disable
-ffffffff818f9b60 T drm_mode_plane_set_obj_prop
-ffffffff818f9be0 T drm_mode_getplane_res
-ffffffff818f9cc0 T drm_mode_getplane
-ffffffff818f9e20 T drm_plane_check_pixel_format
-ffffffff818f9ee0 T drm_mode_setplane
-ffffffff818fa0f0 T drm_mode_cursor_ioctl
-ffffffff818fa150 t drm_mode_cursor_common
-ffffffff818fa690 T drm_mode_cursor2_ioctl
-ffffffff818fa6a0 T drm_mode_page_flip_ioctl
-ffffffff818fabb0 t __setplane_atomic
-ffffffff818fae60 t __setplane_internal
-ffffffff818fc000 T drm_plane_helper_check_update
-ffffffff818fc260 T drm_primary_helper_update
-ffffffff818fc450 t get_connectors_for_crtc
-ffffffff818fc560 T drm_primary_helper_disable
-ffffffff818fc590 T drm_primary_helper_destroy
-ffffffff818fc5c0 T drm_plane_helper_commit
-ffffffff818fc870 T drm_plane_helper_update
-ffffffff818fc9a0 T drm_plane_helper_disable
-ffffffff818fd000 T drm_prime_remove_buf_handle_locked
-ffffffff818fd0c0 T drm_gem_dmabuf_export
-ffffffff818fd110 T drm_gem_dmabuf_release
-ffffffff818fd120 T drm_gem_prime_export
-ffffffff818fd1b0 T drm_gem_prime_handle_to_fd
-ffffffff818fd360 t drm_prime_add_buf_handle
-ffffffff818fd4b0 T drm_gem_prime_import_dev
-ffffffff818fd510 T drm_gem_prime_import
-ffffffff818fd570 T drm_gem_prime_fd_to_handle
-ffffffff818fd730 T drm_prime_handle_to_fd_ioctl
-ffffffff818fd7a0 T drm_prime_fd_to_handle_ioctl
-ffffffff818fd800 T drm_prime_gem_destroy
-ffffffff818fd830 T drm_prime_init_file_private
-ffffffff818fd880 T drm_prime_destroy_file_private
-ffffffff818fe000 T __drm_puts_coredump
-ffffffff818fe0e0 T __drm_printfn_coredump
-ffffffff818fe200 T __drm_puts_seq_file
-ffffffff818fe230 T __drm_printfn_seq_file
-ffffffff818fe260 T __drm_printfn_info
-ffffffff818fe290 T __drm_printfn_debug
-ffffffff818fe2c0 T drm_puts
-ffffffff818fe2f0 T drm_printf
-ffffffff818fe370 T drm_dev_printk
-ffffffff818fe3f0 T drm_dev_dbg
-ffffffff818fe480 T drm_dbg
-ffffffff818fe510 T drm_err
-ffffffff818ff000 T drm_crtc_mode_valid
-ffffffff818ff040 T drm_encoder_mode_valid
-ffffffff818ff080 T drm_connector_mode_valid
-ffffffff818ff0c0 T drm_kms_helper_poll_enable
-ffffffff818ff1b0 T drm_helper_probe_detect
-ffffffff818ff380 T drm_helper_probe_single_connector_modes
-ffffffff818ffa60 T drm_kms_helper_hotplug_event
-ffffffff818ffab0 T drm_kms_helper_poll_disable
-ffffffff818ffb20 T drm_kms_helper_poll_init
-ffffffff818ffb80 t output_poll_execute
-ffffffff818ffda0 T drm_kms_helper_poll_fini
-ffffffff818ffe10 T drm_helper_hpd_irq_event
-ffffffff818fff20 t __delayed_work_tick
-ffffffff81900000 T drm_property_create
-ffffffff819001e0 T drm_property_create_enum
-ffffffff81900290 T drm_property_add_enum
-ffffffff81900490 T drm_property_destroy
-ffffffff81900540 T drm_property_create_bitmask
-ffffffff81900670 T drm_property_create_range
-ffffffff819006d0 T drm_property_create_signed_range
-ffffffff81900740 T drm_property_create_object
-ffffffff819007d0 T drm_property_create_bool
-ffffffff81900830 T drm_mode_getproperty_ioctl
-ffffffff81900a20 T drm_property_create_blob
-ffffffff81900b50 t drm_property_free_blob
-ffffffff81900bc0 T drm_property_blob_put
-ffffffff81900bf0 T drm_property_destroy_user_blobs
-ffffffff81900c70 T drm_property_blob_get
-ffffffff81900cb0 T drm_property_lookup_blob
-ffffffff81900cd0 T drm_property_replace_global_blob
-ffffffff81900de0 T drm_property_replace_blob
-ffffffff81900e50 T drm_mode_getblob_ioctl
-ffffffff81900f00 T drm_mode_createblob_ioctl
-ffffffff81901000 T drm_mode_destroyblob_ioctl
-ffffffff81901110 T drm_property_change_valid_get
-ffffffff81901380 T drm_property_change_valid_put
-ffffffff81902000 T drm_rect_intersect
-ffffffff81902090 T drm_rect_clip_scaled
-ffffffff819022a0 T drm_rect_calc_hscale
-ffffffff81902360 T drm_rect_calc_vscale
-ffffffff81902420 T drm_rect_calc_hscale_relaxed
-ffffffff81902540 T drm_rect_calc_vscale_relaxed
-ffffffff81902660 T drm_rect_debug_print
-ffffffff81902690 T drm_rect_rotate
-ffffffff81902750 T drm_rect_rotate_inv
-ffffffff81903000 T drm_scdc_read
-ffffffff81903090 T drm_scdc_write
-ffffffff81903180 T drm_scdc_get_scrambling_status
-ffffffff81903210 T drm_scdc_set_scrambling
-ffffffff81903330 T drm_scdc_set_high_tmds_clock_ratio
-ffffffff81904000 T drm_syncobj_find
-ffffffff81904070 T drm_syncobj_add_callback
-ffffffff819040d0 T drm_syncobj_remove_callback
-ffffffff81904120 T drm_syncobj_replace_fence
-ffffffff81904230 T drm_syncobj_find_fence
-ffffffff81904300 T drm_syncobj_free
-ffffffff81904330 T drm_syncobj_create
-ffffffff81904550 T drm_syncobj_get_handle
-ffffffff81904610 T drm_syncobj_get_fd
-ffffffff81904660 T drm_syncobj_open
-ffffffff81904690 T drm_syncobj_release
-ffffffff819046c0 t drm_syncobj_release_handle
-ffffffff81904720 T drm_syncobj_create_ioctl
-ffffffff819047e0 T drm_syncobj_destroy_ioctl
-ffffffff819048b0 T drm_syncobj_handle_to_fd_ioctl
-ffffffff819049d0 T drm_syncobj_fd_to_handle_ioctl
-ffffffff81904a60 T drm_syncobj_wait_ioctl
-ffffffff81905380 t drm_syncobj_array_find
-ffffffff81905570 T drm_syncobj_reset_ioctl
-ffffffff819056b0 T drm_syncobj_signal_ioctl
-ffffffff81905940 t drm_syncobj_null_fence_get_name
-ffffffff81905970 t drm_syncobj_null_fence_enable_signaling
-ffffffff81905b10 t syncobj_wait_syncobj_func
-ffffffff81905b30 t syncobj_wait_fence_func
-ffffffff81906000 T drm_crtc_accurate_vblank_count
-ffffffff819060f0 t drm_update_vblank_count
-ffffffff81906580 T drm_vblank_disable_and_save
-ffffffff819066d0 T drm_vblank_cleanup
-ffffffff819067c0 T drm_vblank_init
-ffffffff81906950 t vblank_disable_fn
-ffffffff819069b0 T drm_crtc_vblank_waitqueue
-ffffffff819069f0 T drm_calc_timestamping_constants
-ffffffff81906b40 T drm_calc_vbltimestamp_from_scanoutpos
-ffffffff81906ff0 T drm_crtc_vblank_count
-ffffffff81907070 T drm_crtc_vblank_count_and_time
-ffffffff81907140 T drm_crtc_arm_vblank_event
-ffffffff81907220 T drm_crtc_send_vblank_event
-ffffffff81907360 T drm_crtc_vblank_get
-ffffffff81907460 T drm_crtc_vblank_put
-ffffffff81907560 T drm_wait_one_vblank
-ffffffff81907ae0 T drm_crtc_wait_one_vblank
-ffffffff81907b00 T drm_crtc_vblank_off
-ffffffff81907f20 T drm_crtc_vblank_reset
-ffffffff81908000 T drm_crtc_set_max_vblank_count
-ffffffff819080c0 T drm_crtc_vblank_on
-ffffffff819081f0 t drm_reset_vblank_timestamp
-ffffffff81908470 t drm_vblank_enable
-ffffffff81908620 T drm_vblank_restore
-ffffffff81908a40 t __get_vblank_counter
-ffffffff81908b80 T drm_crtc_vblank_restore
-ffffffff81908ba0 T drm_legacy_modeset_ctl_ioctl
-ffffffff81908e70 T drm_wait_vblank_ioctl
-ffffffff81909900 T drm_handle_vblank
-ffffffff81909b80 t drm_handle_vblank_events
-ffffffff81909e90 T drm_crtc_handle_vblank
-ffffffff81909eb0 T drm_crtc_get_sequence_ioctl
-ffffffff8190a180 T drm_crtc_queue_sequence_ioctl
-ffffffff8190b000 T drm_vma_offset_manager_init
-ffffffff8190b050 T drm_vma_offset_manager_destroy
-ffffffff8190b080 T drm_vma_offset_lookup
-ffffffff8190b130 T drm_vma_offset_lookup_locked
-ffffffff8190b1b0 T drm_vma_offset_add
-ffffffff8190b300 T drm_vma_offset_remove
-ffffffff8190b3d0 T drm_vma_node_allow
-ffffffff8190b500 T drm_vma_node_revoke
-ffffffff8190b580 T drm_vma_node_is_allowed
-ffffffff8190c000 T hdmi_avi_infoframe_init
-ffffffff8190c080 T hdmi_avi_infoframe_pack
-ffffffff8190c2d0 T hdmi_spd_infoframe_init
-ffffffff8190c370 T hdmi_spd_infoframe_pack
-ffffffff8190c4b0 T hdmi_audio_infoframe_init
-ffffffff8190c500 T hdmi_audio_infoframe_pack
-ffffffff8190c690 T hdmi_vendor_infoframe_init
-ffffffff8190c6f0 T hdmi_vendor_infoframe_pack
-ffffffff8190c8a0 T hdmi_infoframe_pack
-ffffffff8190cbd0 T hdmi_infoframe_log
-ffffffff8190d790 T hdmi_infoframe_unpack
-ffffffff8190e000 T list_sort
-ffffffff8190f000 T radix_tree_lookup
-ffffffff8190f0b0 T radix_tree_iter_find
-ffffffff8190f1c0 T radix_tree_delete
-ffffffff8190f360 T radix_tree_iter_delete
-ffffffff8190f380 T radix_tree_insert
-ffffffff81910000 T reservation_object_reserve_shared
-ffffffff819100e0 T reservation_object_add_shared_fence
-ffffffff81910570 T reservation_object_add_excl_fence
-ffffffff819106c0 T reservation_object_copy_fences
-ffffffff819109c0 T reservation_object_get_fences_rcu
-ffffffff81910ea0 T reservation_object_wait_timeout_rcu
-ffffffff819112c0 T reservation_object_test_signaled_rcu
-ffffffff81911400 t reservation_object_test_signaled_single
-ffffffff81912000 T ttm_agp_tt_create
-ffffffff819120a0 T ttm_agp_tt_populate
-ffffffff819120d0 T ttm_agp_tt_unpopulate
-ffffffff819120e0 t ttm_agp_bind
-ffffffff819121e0 t ttm_agp_unbind
-ffffffff819122a0 t ttm_agp_destroy
-ffffffff81913000 T ttm_get_kobj
-ffffffff81913030 T ttm_bo_add_to_lru
-ffffffff81913150 T ttm_bo_del_from_lru
-ffffffff81913240 t kref_put
-ffffffff81913280 T ttm_bo_del_sub_from_lru
-ffffffff81913370 T ttm_bo_move_to_lru_tail
-ffffffff81913540 T ttm_bo_put
-ffffffff819135f0 T ttm_bo_unref
-ffffffff81913610 T ttm_bo_lock_delayed_workqueue
-ffffffff81913680 T ttm_bo_unlock_delayed_workqueue
-ffffffff819136f0 T ttm_bo_eviction_valuable
-ffffffff81913750 T ttm_bo_mem_put
-ffffffff819137a0 T ttm_bo_mem_space
-ffffffff81913c70 t ttm_bo_add_move_fence
-ffffffff81913d10 T ttm_bo_mem_compat
-ffffffff81913ea0 T ttm_bo_validate
-ffffffff81913ff0 T ttm_bo_init_reserved
-ffffffff819146d0 t ttm_bo_default_destroy
-ffffffff819146f0 T ttm_bo_init
-ffffffff81914960 T ttm_bo_acc_size
-ffffffff819149d0 T ttm_bo_dma_acc_size
-ffffffff81914a50 T ttm_bo_create
-ffffffff81914b60 T ttm_bo_clean_mm
-ffffffff81914c80 t ttm_bo_force_list_clean
-ffffffff81914f30 t dma_fence_put
-ffffffff81914f90 T ttm_bo_evict_mm
-ffffffff81915010 T ttm_bo_init_mm
-ffffffff819151d0 T ttm_bo_global_release
-ffffffff81915220 T ttm_bo_global_init
-ffffffff81915320 T ttm_bo_device_release
-ffffffff81915450 t ttm_bo_delayed_delete
-ffffffff81915750 T ttm_bo_device_init
-ffffffff81915890 t ttm_bo_delayed_workqueue
-ffffffff81915920 T ttm_mem_reg_is_pci
-ffffffff81915980 T ttm_bo_unmap_virtual_locked
-ffffffff81915a90 T ttm_bo_unmap_virtual
-ffffffff81915ae0 T ttm_bo_wait
-ffffffff81915b90 T ttm_bo_synccpu_write_grab
-ffffffff81915ef0 T ttm_bo_synccpu_write_release
-ffffffff81915f20 T ttm_bo_swapout
-ffffffff81916490 t ttm_bo_cleanup_refs
-ffffffff81916940 t ttm_bo_release_list
-ffffffff81916c50 t ttm_bo_handle_move_mem
-ffffffff81917030 T ttm_bo_swapout_all
-ffffffff819170b0 T ttm_bo_wait_unreserved
-ffffffff81917200 t reservation_object_lock_interruptible
-ffffffff81917320 t ttm_bo_cleanup_refs_or_queue
-ffffffff81917bc0 t ttm_mem_evict_first
-ffffffff81918480 t ttm_bo_global_kobj_release
-ffffffff819184a0 t __delayed_work_tick
-ffffffff81919000 t ttm_bo_man_init
-ffffffff81919090 t ttm_bo_man_takedown
-ffffffff81919120 t ttm_bo_man_get_node
-ffffffff81919240 t ttm_bo_man_put_node
-ffffffff819192c0 t ttm_bo_man_debug
-ffffffff8191a000 T ttm_bo_free_old_node
-ffffffff8191a010 T ttm_bo_move_ttm
-ffffffff8191a120 T ttm_mem_io_lock
-ffffffff8191a190 T ttm_mem_io_unlock
-ffffffff8191a1d0 T ttm_mem_io_reserve
-ffffffff8191a2e0 T ttm_mem_io_free
-ffffffff8191a350 T ttm_mem_io_reserve_vm
-ffffffff8191a420 T ttm_mem_io_free_vm
-ffffffff8191a4e0 T ttm_kmap_atomic_prot
-ffffffff8191a540 T ttm_kunmap_atomic_prot
-ffffffff8191a570 T ttm_bo_move_memcpy
-ffffffff8191ac20 t ttm_mem_reg_ioremap
-ffffffff8191adf0 T ttm_io_prot
-ffffffff8191ae30 T ttm_bo_kmap
-ffffffff8191b100 T ttm_bo_kunmap
-ffffffff8191b280 T ttm_bo_move_accel_cleanup
-ffffffff8191b410 t ttm_buffer_object_transfer
-ffffffff8191b680 t ttm_bo_unreserve
-ffffffff8191b760 T ttm_bo_pipeline_move
-ffffffff8191ba10 T ttm_bo_pipeline_gutting
-ffffffff8191bb30 t ttm_transfered_destroy
-ffffffff8191c000 T ttm_bo_vm_fault
-ffffffff8191c5c0 t ttm_bo_unreserve
-ffffffff8191c6a0 T ttm_bo_vm_reference
-ffffffff8191c6d0 T ttm_bo_vm_detach
-ffffffff8191c710 T ttm_bo_mmap
-ffffffff8191d000 T ttm_eu_backoff_reservation
-ffffffff8191d140 T ttm_eu_reserve_buffers
-ffffffff8191d600 T ttm_eu_fence_buffer_objects
-ffffffff8191d760 t __ww_mutex_lock
-ffffffff8191e000 T ttm_mem_global_init
-ffffffff8191e220 t ttm_shrink_work
-ffffffff8191e2f0 T ttm_mem_global_release
-ffffffff8191e3d0 T ttm_mem_global_free
-ffffffff8191e430 T ttm_check_under_lowerlimit
-ffffffff8191e490 T ttm_mem_global_alloc
-ffffffff8191e4b0 t ttm_mem_global_alloc_zone
-ffffffff8191e740 T ttm_mem_global_alloc_page
-ffffffff8191e780 T ttm_mem_global_free_page
-ffffffff8191e820 T ttm_round_pot
-ffffffff8191e880 T ttm_get_kernel_zone_memory_size
-ffffffff8191e8b0 t ttm_mem_zone_kobj_release
-ffffffff8191f000 T ttm_page_alloc_init
-ffffffff8191f380 T ttm_page_alloc_fini
-ffffffff8191f4a0 t ttm_page_pool_free
-ffffffff8191f7e0 T ttm_pool_populate
-ffffffff8191fe20 T ttm_pool_unpopulate
-ffffffff8191fed0 T ttm_populate_and_map_pages
-ffffffff81920080 T ttm_unmap_and_unpopulate_pages
-ffffffff81920130 T ttm_page_alloc_debugfs
-ffffffff81920160 t ttm_pool_kobj_release
-ffffffff81920180 t ttm_pool_shrink_count
-ffffffff81920210 t ttm_pool_shrink_scan
-ffffffff819203a0 t ttm_put_pages
-ffffffff81920540 t ttm_alloc_new_pages
-ffffffff81921000 T ttm_tt_create
-ffffffff819210d0 T ttm_tt_set_placement_caching
-ffffffff819211a0 T ttm_tt_destroy
-ffffffff819212e0 T ttm_tt_unbind
-ffffffff81921350 T ttm_tt_unpopulate
-ffffffff81921410 T ttm_tt_init_fields
-ffffffff81921470 T ttm_tt_init
-ffffffff81921530 T ttm_tt_fini
-ffffffff81921580 T ttm_dma_tt_init
-ffffffff81921720 T ttm_sg_tt_init
-ffffffff81921900 T ttm_dma_tt_fini
-ffffffff81921980 T ttm_tt_bind
-ffffffff81921a20 T ttm_tt_populate
-ffffffff81921a70 T ttm_tt_swapin
-ffffffff81921ba0 T ttm_tt_swapout
-ffffffff81922000 T drm_sched_entity_init
-ffffffff81922130 T drm_sched_entity_flush
-ffffffff819224a0 T drm_sched_entity_fini
-ffffffff819228d0 t drm_sched_entity_kill_jobs_cb
-ffffffff81922980 T drm_sched_entity_destroy
-ffffffff819229d0 T drm_sched_entity_set_rq
-ffffffff81922af0 T drm_sched_dependency_optimized
-ffffffff81922c10 T drm_sched_entity_push_job
-ffffffff81922d80 T drm_sched_hw_job_reset
-ffffffff81923050 T drm_sched_job_recovery
-ffffffff81923360 t drm_sched_process_job
-ffffffff81923440 T drm_sched_job_init
-ffffffff81923550 t drm_sched_job_finish
-ffffffff81923730 t drm_sched_job_timedout
-ffffffff81923750 T drm_sched_init
-ffffffff81923980 t drm_sched_main
-ffffffff819243f0 T drm_sched_fini
-ffffffff81924430 t __delayed_work_tick
-ffffffff81924450 t drm_sched_select_entity
-ffffffff81924570 t drm_sched_entity_clear_dep
-ffffffff819245e0 t drm_sched_entity_wakeup
-ffffffff819246e0 t drm_sched_job_finish_cb
-ffffffff81925000 T drm_sched_fence_slab_init
-ffffffff81925060 T drm_sched_fence_slab_fini
-ffffffff81925080 T drm_sched_fence_scheduled
-ffffffff81925160 T drm_sched_fence_finished
-ffffffff81925240 t drm_sched_fence_get_driver_name
-ffffffff81925270 t drm_sched_fence_get_timeline_name
-ffffffff819252b0 t drm_sched_fence_release_scheduled
-ffffffff81925340 t drm_sched_fence_release_finished
-ffffffff819253c0 T to_drm_sched_fence
-ffffffff81925420 T drm_sched_fence_create
-ffffffff81926000 T chash_table_alloc
-ffffffff81926150 T chash_table_free
-ffffffff81926170 T __chash_table_copy_in
-ffffffff81926330 t chash_table_find
-ffffffff81926770 T __chash_table_copy_out
-ffffffff819268c0 t chash_iter_relocate
-ffffffff81927000 t ch7017_init
-ffffffff819270e0 t ch7017_dpms
-ffffffff81927330 t ch7017_mode_valid
-ffffffff81927370 t ch7017_mode_set
-ffffffff819275e0 t ch7017_detect
-ffffffff81927610 t ch7017_get_hw_state
-ffffffff81927690 t ch7017_destroy
-ffffffff819276e0 t ch7017_dump_regs
-ffffffff81928000 t ch7xxx_init
-ffffffff81928150 t ch7xxx_dpms
-ffffffff819281e0 t ch7xxx_mode_valid
-ffffffff81928220 t ch7xxx_mode_set
-ffffffff81928490 t ch7xxx_detect
-ffffffff819285e0 t ch7xxx_get_hw_state
-ffffffff81928660 t ch7xxx_destroy
-ffffffff819286b0 t ch7xxx_dump_regs
-ffffffff81929000 t ivch_init
-ffffffff81929250 t ivch_dpms
-ffffffff819294a0 t ivch_mode_valid
-ffffffff819294e0 t ivch_mode_set
-ffffffff81929710 t ivch_detect
-ffffffff81929740 t ivch_get_hw_state
-ffffffff81929870 t ivch_destroy
-ffffffff819298c0 t ivch_dump_regs
-ffffffff8192a000 t ns2501_init
-ffffffff8192a130 t ns2501_dpms
-ffffffff8192a5d0 t ns2501_mode_valid
-ffffffff8192a650 t ns2501_mode_set
-ffffffff8192ada0 t ns2501_detect
-ffffffff8192add0 t ns2501_get_hw_state
-ffffffff8192ae60 t ns2501_destroy
-ffffffff8192b000 t sil164_init
-ffffffff8192b130 t sil164_dpms
-ffffffff8192b200 t sil164_mode_valid
-ffffffff8192b230 t sil164_mode_set
-ffffffff8192b260 t sil164_detect
-ffffffff8192b2f0 t sil164_get_hw_state
-ffffffff8192b380 t sil164_destroy
-ffffffff8192b3d0 t sil164_dump_regs
-ffffffff8192c000 t tfp410_init
-ffffffff8192c1d0 t tfp410_dpms
-ffffffff8192c2a0 t tfp410_mode_valid
-ffffffff8192c2d0 t tfp410_mode_set
-ffffffff8192c300 t tfp410_detect
-ffffffff8192c3a0 t tfp410_get_hw_state
-ffffffff8192c430 t tfp410_destroy
-ffffffff8192c480 t tfp410_dump_regs
-ffffffff8192d000 T intel_engine_init_cmd_parser
-ffffffff8192d610 t gen7_render_get_cmd_length_mask
-ffffffff8192d670 t gen7_bsd_get_cmd_length_mask
-ffffffff8192d6e0 t gen7_blt_get_cmd_length_mask
-ffffffff8192d720 t gen9_blt_get_cmd_length_mask
-ffffffff8192d760 T intel_engine_cleanup_cmd_parser
-ffffffff8192d830 T intel_engine_cmd_parser
-ffffffff8192e330 T i915_cmd_parser_get_version
-ffffffff8192f000 T __i915_printk
-ffffffff8192f070 T i915_get_bridge_dev
-ffffffff8192f0f0 T i915_driver_load
-ffffffff8192fc00 T i915_reset
-ffffffff8192ff40 T i915_reset_engine
-ffffffff819300b0 T vlv_force_gfx_clock
-ffffffff819301a0 T intagpsubmatch
-ffffffff819301f0 T intagp_print
-ffffffff81930240 T inteldrm_wsioctl
-ffffffff819303a0 T inteldrm_wsmmap
-ffffffff819303d0 T inteldrm_alloc_screen
-ffffffff81930400 T inteldrm_free_screen
-ffffffff81930420 T inteldrm_show_screen
-ffffffff819304f0 T inteldrm_load_font
-ffffffff81930510 T inteldrm_list_font
-ffffffff81930530 T inteldrm_scrollback
-ffffffff81930550 T inteldrm_getchar
-ffffffff81930570 T inteldrm_burner
-ffffffff819305f0 T inteldrm_enter_ddb
-ffffffff81930650 T inteldrm_doswitch
-ffffffff819306e0 T inteldrm_burner_cb
-ffffffff81930700 T inteldrm_backlight_update_status
-ffffffff81930750 T inteldrm_backlight_get_brightness
-ffffffff819307a0 T inteldrm_match
-ffffffff81930820 T inteldrm_attach
-ffffffff81930bd0 T inteldrm_detach
-ffffffff81930c00 T inteldrm_activate
-ffffffff819325a0 T inteldrm_intr
-ffffffff819325f0 T inteldrm_attachhook
-ffffffff81932830 T inteldrm_forcedetach
-ffffffff81932870 T inteldrm_init_backlight
-ffffffff81932a50 T inteldrm_native_backlight
-ffffffff81932b30 T inteldrm_firmware_backlight
-ffffffff81932c30 t i915_engines_cleanup
-ffffffff81932d30 t intel_pch_match
-ffffffff81932d80 t intel_pch_type
-ffffffff819331a0 t i915_driver_open
-ffffffff819331b0 t i915_driver_postclose
-ffffffff81933210 t i915_driver_lastclose
-ffffffff81933220 t i915_getparam_ioctl
-ffffffff81933870 t i915_gem_reject_pin_ioctl
-ffffffff819338a0 t vlv_wait_for_pw_status
-ffffffff81934000 T i915_mutex_lock_interruptible
-ffffffff819341c0 T i915_gem_park
-ffffffff81934290 T i915_gem_unpark
-ffffffff81934440 T i915_gem_get_aperture_ioctl
-ffffffff81934520 T i915_gem_object_unbind
-ffffffff819345f0 T i915_gem_object_set_to_cpu_domain
-ffffffff819346f0 T i915_gem_object_wait_priority
-ffffffff81934910 T i915_gem_object_wait
-ffffffff81934cf0 T i915_gem_object_alloc
-ffffffff81934d10 T i915_gem_object_free
-ffffffff81934d30 T i915_gem_dumb_create
-ffffffff81934e10 T i915_gem_create_ioctl
-ffffffff81934f40 T i915_gem_flush_ggtt_writes
-ffffffff81934fa0 T i915_gem_obj_prepare_shmem_read
-ffffffff81935150 t flush_write_domain
-ffffffff819352d0 T i915_gem_obj_prepare_shmem_write
-ffffffff819354a0 T i915_gem_pread_ioctl
-ffffffff81935ee0 T i915_gem_pwrite_ioctl
-ffffffff81936af0 T i915_gem_set_domain_ioctl
-ffffffff81936d50 T i915_gem_object_set_to_wc_domain
-ffffffff81936f20 T i915_gem_object_set_to_gtt_domain
-ffffffff819370e0 t i915_gem_object_bump_inactive_ggtt
-ffffffff81937260 T i915_gem_sw_finish_ioctl
-ffffffff81937330 T i915_gem_object_flush_if_display
-ffffffff819373c0 T i915_gem_mmap_ioctl
-ffffffff819375a0 T i915_gem_mmap_gtt_version
-ffffffff819375d0 T i915_gem_fault
-ffffffff81937d40 T i915_gem_object_ggtt_pin
-ffffffff81937d70 T i915_gem_release_mmap
-ffffffff81937db0 t __i915_gem_object_release_mmap
-ffffffff81937f50 T i915_gem_runtime_suspend
-ffffffff81938030 T i915_gem_mmap_gtt
-ffffffff81938150 T i915_gem_mmap_gtt_ioctl
-ffffffff81938170 T __i915_gem_object_invalidate
-ffffffff81938250 T __i915_gem_object_put_pages
-ffffffff81938350 t __i915_gem_object_unset_pages
-ffffffff81938490 T __i915_gem_object_set_pages
-ffffffff819387b0 T __i915_gem_object_get_pages
-ffffffff81938910 T i915_gem_object_pin_map
-ffffffff81938db0 T i915_gem_find_active_request
-ffffffff81938ea0 T i915_gem_reset_prepare_engine
-ffffffff81938f10 T i915_gem_reset_prepare
-ffffffff81938fe0 T i915_gem_reset_engine
-ffffffff81939300 T i915_gem_reset
-ffffffff81939460 T i915_gem_reset_finish_engine
-ffffffff81939490 T i915_gem_reset_finish
-ffffffff81939670 T i915_gem_set_wedged
-ffffffff81939c30 t nop_submit_request
-ffffffff81939c50 t nop_complete_submit_request
-ffffffff81939ca0 T i915_gem_unset_wedged
-ffffffff81939de0 T i915_gem_close_object
-ffffffff8193a020 T __i915_gem_object_release_unless_active
-ffffffff8193a080 T i915_gem_wait_ioctl
-ffffffff8193a2a0 T i915_gem_wait_for_idle
-ffffffff8193a670 t wait_for_timeline
-ffffffff8193a810 T i915_gem_object_set_cache_level
-ffffffff8193aa00 T i915_gem_get_caching_ioctl
-ffffffff8193aa80 T i915_gem_set_caching_ioctl
-ffffffff8193abf0 T i915_gem_object_pin_to_display_plane
-ffffffff8193ad40 T i915_gem_object_unpin_from_display_plane
-ffffffff8193ae50 T i915_gem_object_pin
-ffffffff8193b0b0 t i915_ggtt_offset
-ffffffff8193b200 T i915_gem_busy_ioctl
-ffffffff8193b380 T i915_gem_throttle_ioctl
-ffffffff8193b570 T i915_gem_madvise_ioctl
-ffffffff8193b8f0 T i915_gem_object_init
-ffffffff8193ba70 t frontbuffer_retire
-ffffffff8193bab0 T i915_gem_object_create
-ffffffff8193bb80 T i915_gem_free_object
-ffffffff8193bcf0 T i915_gem_sanitize
-ffffffff8193bdb0 T i915_gem_suspend
-ffffffff8193bf40 t assert_kernel_context_is_current
-ffffffff8193c210 T i915_gem_suspend_late
-ffffffff8193c2e0 T i915_gem_resume
-ffffffff8193c3a0 T i915_gem_init_hw
-ffffffff8193cb30 T i915_gem_init_swizzling
-ffffffff8193cca0 T i915_gem_init
-ffffffff8193d350 T i915_gem_cleanup_engines
-ffffffff8193d450 T i915_gem_fini
-ffffffff8193d610 T i915_gem_init_mmio
-ffffffff8193d620 T i915_gem_load_init_fences
-ffffffff8193d720 T i915_gem_init_early
-ffffffff8193da50 t i915_gem_retire_work_handler
-ffffffff8193db10 t i915_gem_idle_work_handler
-ffffffff8193dfc0 T i915_gem_cleanup_early
-ffffffff8193e0d0 T i915_gem_freeze
-ffffffff8193e110 T i915_gem_freeze_late
-ffffffff8193e220 T i915_gem_release
-ffffffff8193e270 T i915_gem_open
-ffffffff8193e340 T i915_gem_track_fb
-ffffffff8193e3e0 T i915_gem_object_create_from_data
-ffffffff8193e430 T i915_gem_object_get_sg
-ffffffff8193e760 T i915_gem_object_get_page
-ffffffff8193e800 T i915_gem_object_get_dirty_page
-ffffffff8193e8b0 T i915_gem_object_get_dma_address
-ffffffff8193e8f0 T i915_gem_object_attach_phys
-ffffffff8193ec70 t __fence_set_priority
-ffffffff8193ed90 t i915_gem_object_wait_fence
-ffffffff8193ef00 t i915_gem_object_get_pages_gtt
-ffffffff8193f2b0 t i915_gem_object_put_pages_gtt
-ffffffff8193f3f0 t i915_gem_object_pwrite_gtt
-ffffffff8193f570 t __i915_gem_object_release_shmem
-ffffffff8193f650 t __i915_gem_free_objects
-ffffffff8193fd00 t __i915_gem_free_work
-ffffffff8193fdb0 t __delayed_work_tick
-ffffffff8193fdd0 t __sleep_work
-ffffffff8193fe20 t i915_gem_object_get_pages_phys
-ffffffff819400a0 t i915_gem_object_put_pages_phys
-ffffffff819402e0 t i915_gem_object_release_phys
-ffffffff81941000 T i915_gem_batch_pool_init
-ffffffff81941060 T i915_gem_batch_pool_fini
-ffffffff81941160 T i915_gem_batch_pool_get
-ffffffff81942000 T i915_gem_clflush_object
-ffffffff81942440 t i915_clflush_notify
-ffffffff819424d0 t i915_clflush_work
-ffffffff81942750 t i915_clflush_get_driver_name
-ffffffff81942780 t i915_clflush_get_timeline_name
-ffffffff819427b0 t i915_clflush_enable_signaling
-ffffffff819427e0 t i915_clflush_release
-ffffffff81943000 T i915_gem_context_release
-ffffffff81943080 T i915_gem_context_create_gvt
-ffffffff819430b0 T i915_gem_context_create_kernel
-ffffffff81943150 t i915_gem_create_context
-ffffffff819435f0 T i915_gem_contexts_init
-ffffffff81943850 t contexts_free_worker
-ffffffff819438c0 T i915_gem_contexts_lost
-ffffffff81943980 T i915_gem_contexts_fini
-ffffffff81943a40 T i915_gem_context_open
-ffffffff81943b10 T i915_gem_context_close
-ffffffff81943b50 t context_idr_cleanup
-ffffffff81943b90 T i915_gem_switch_to_kernel_context
-ffffffff81943ed0 T i915_gem_context_create_ioctl
-ffffffff81943fd0 T i915_gem_context_destroy_ioctl
-ffffffff81944120 T i915_gem_context_getparam_ioctl
-ffffffff81944280 T i915_gem_context_setparam_ioctl
-ffffffff819444c0 T i915_gem_context_reset_stats_ioctl
-ffffffff81944570 t i915_gem_context_free
-ffffffff81944730 t kasprintf
-ffffffff81944810 t context_close
-ffffffff81945000 T i915_gem_prime_export
-ffffffff81945090 T i915_gem_prime_import
-ffffffff81946000 T i915_gem_evict_something
-ffffffff81946400 t ggtt_is_idle
-ffffffff81946510 T i915_gem_evict_for_node
-ffffffff81946860 T i915_gem_evict_vm
-ffffffff81947000 T i915_gem_execbuffer_ioctl
-ffffffff819472f0 t i915_gem_do_execbuffer
-ffffffff81948260 T i915_gem_execbuffer2_ioctl
-ffffffff81948620 t eb_release_vmas
-ffffffff81948790 t eb_lookup_vmas
-ffffffff81949670 t eb_relocate_vma
-ffffffff81949890 t eb_relocate_slow
-ffffffff81949fb0 t eb_relocate_entry
-ffffffff8194ad10 t reloc_cache_reset
-ffffffff8194af40 t reloc_gpu_flush
-ffffffff8194c000 T i915_vma_put_fence
-ffffffff8194c040 t fence_update
-ffffffff8194c330 T i915_vma_pin_fence
-ffffffff8194c670 T i915_reserve_fence
-ffffffff8194c7b0 T i915_unreserve_fence
-ffffffff8194c800 T i915_gem_revoke_fences
-ffffffff8194c8c0 T i915_gem_restore_fences
-ffffffff8194ca90 t fence_write
-ffffffff8194d150 T i915_gem_detect_bit_6_swizzle
-ffffffff8194d420 T i915_gem_object_do_bit_17_swizzle
-ffffffff8194da50 T i915_gem_object_save_bit_17_swizzle
-ffffffff8194e000 T intel_sanitize_enable_ppgtt
-ffffffff8194e150 T gen6_ppgtt_pin
-ffffffff8194e290 T gen6_ppgtt_unpin
-ffffffff8194e3c0 T i915_ppgtt_init_hw
-ffffffff8194ea70 T i915_ppgtt_create
-ffffffff8194fb70 T i915_ppgtt_close
-ffffffff8194fbf0 T i915_ppgtt_release
-ffffffff8194fd90 t i915_address_space_fini
-ffffffff8194fe20 T i915_check_and_clear_faults
-ffffffff8194ff90 T i915_gem_suspend_gtt_mappings
-ffffffff81950010 T i915_gem_gtt_prepare_pages
-ffffffff81950040 T i915_gem_gtt_finish_pages
-ffffffff819500c0 T i915_gem_init_aliasing_ppgtt
-ffffffff81950240 t ggtt_bind_vma
-ffffffff819502e0 t aliasing_gtt_bind_vma
-ffffffff819503e0 t ggtt_unbind_vma
-ffffffff81950430 t aliasing_gtt_unbind_vma
-ffffffff819504f0 T i915_gem_fini_aliasing_ppgtt
-ffffffff81950570 T i915_gem_init_ggtt
-ffffffff819506c0 T i915_ggtt_cleanup_hw
-ffffffff81950880 T intel_ppat_get
-ffffffff81950b20 t __alloc_ppat_entry
-ffffffff81950c20 T intel_ppat_put
-ffffffff81950d00 T i915_ggtt_probe_hw
-ffffffff819515c0 T i915_ggtt_init_hw
-ffffffff819517b0 t i915_address_space_init
-ffffffff819518c0 t i915_gtt_color_adjust
-ffffffff81951910 T i915_ggtt_enable_hw
-ffffffff81951960 T i915_ggtt_enable_guc
-ffffffff81951a10 t gen6_ggtt_invalidate
-ffffffff81951a40 t guc_ggtt_invalidate
-ffffffff81951a90 T i915_ggtt_disable_guc
-ffffffff81951b10 T i915_gem_restore_gtt_mappings
-ffffffff81951d40 T i915_gem_gtt_reserve
-ffffffff81951fa0 T i915_gem_gtt_insert
-ffffffff81952500 t gen6_alloc_va_range
-ffffffff81952850 t gen6_ppgtt_clear_range
-ffffffff819529d0 t gen6_ppgtt_insert_entries
-ffffffff81952bb0 t gen6_ppgtt_cleanup
-ffffffff81952cc0 t gen6_dump_ppgtt
-ffffffff81952d40 t ppgtt_bind_vma
-ffffffff81952dd0 t ppgtt_unbind_vma
-ffffffff81952e00 t ppgtt_set_pages
-ffffffff81952eb0 t clear_pages
-ffffffff81952f70 t setup_page_dma
-ffffffff81953550 t vm_free_pages_release
-ffffffff81953710 t pd_vma_bind
-ffffffff819539a0 t pd_vma_unbind
-ffffffff81953aa0 t pd_vma_set_pages
-ffffffff81953ad0 t pd_vma_clear_pages
-ffffffff81953b50 t gen8_ppgtt_alloc_4lvl
-ffffffff81953d60 t gen8_ppgtt_insert_4lvl
-ffffffff81954270 t gen8_ppgtt_clear_4lvl
-ffffffff81954420 t gen8_ppgtt_alloc_3lvl
-ffffffff81954440 t gen8_ppgtt_insert_3lvl
-ffffffff81954510 t gen8_ppgtt_clear_3lvl
-ffffffff81954530 t gen8_ppgtt_notify_vgt
-ffffffff81954710 t gen8_ppgtt_cleanup
-ffffffff819548d0 t gen8_dump_ppgtt
-ffffffff81954be0 t alloc_pdp
-ffffffff81954da0 t gen8_ppgtt_alloc_pdp
-ffffffff81955480 t free_pdp
-ffffffff81955550 t gen8_ppgtt_clear_pdp
-ffffffff81955790 t gen8_ppgtt_clear_pd
-ffffffff81955b30 t gen8_ppgtt_insert_pte_entries
-ffffffff81955df0 t gen8_ppgtt_cleanup_3lvl
-ffffffff81955f70 t __free_ppat_entry
-ffffffff81956080 t i915_ggtt_insert_page
-ffffffff819560b0 t i915_ggtt_insert_entries
-ffffffff819560f0 t i915_ggtt_clear_range
-ffffffff81956110 t i915_gmch_remove
-ffffffff81956120 t gmch_ggtt_invalidate
-ffffffff81956130 t ggtt_set_pages
-ffffffff819562f0 t intel_rotate_pages
-ffffffff81956650 t intel_partial_pages
-ffffffff819567f0 t gen6_ggtt_clear_range
-ffffffff819569c0 t gen6_ggtt_insert_page
-ffffffff81956a70 t gen6_ggtt_insert_entries
-ffffffff81956c00 t gen6_gmch_remove
-ffffffff81956c20 t iris_pte_encode
-ffffffff81956c70 t hsw_pte_encode
-ffffffff81956cc0 t byt_pte_encode
-ffffffff81956d10 t ivb_pte_encode
-ffffffff81956d90 t snb_pte_encode
-ffffffff81956e10 t ggtt_probe_common
-ffffffff81957010 t gen8_ggtt_insert_page
-ffffffff819570b0 t nop_clear_range
-ffffffff819570e0 t gen8_ggtt_clear_range
-ffffffff819572b0 t gen8_ggtt_insert_entries
-ffffffff81957400 t cnl_private_pat_update_hw
-ffffffff81957550 t bdw_private_pat_match
-ffffffff819575a0 t bdw_private_pat_update_hw
-ffffffff81957740 t chv_private_pat_match
-ffffffff81958000 T i915_gem_object_create_internal
-ffffffff81958130 t i915_gem_object_get_pages_internal
-ffffffff81958390 t i915_gem_object_put_pages_internal
-ffffffff819583e0 t internal_free_pages
-ffffffff81959000 T i915_gem_object_set_cache_coherency
-ffffffff8195a000 T i915_gem_render_state_emit
-ffffffff8195b000 T i915_gem_shrink
-ffffffff8195b400 T i915_gem_shrink_all
-ffffffff8195b460 T i915_gem_shrinker_register
-ffffffff8195b4f0 t i915_gem_shrinker_scan
-ffffffff8195b640 t i915_gem_shrinker_count
-ffffffff8195b7e0 T i915_gem_shrinker_unregister
-ffffffff8195b800 T i915_gem_shrinker_taints_mutex
-ffffffff8195c000 T i915_gem_stolen_insert_node_in_range
-ffffffff8195c0f0 T i915_gem_stolen_insert_node
-ffffffff8195c1c0 T i915_gem_stolen_remove_node
-ffffffff8195c200 T i915_gem_cleanup_stolen
-ffffffff8195c240 T i915_gem_init_stolen
-ffffffff8195c870 T i915_gem_object_create_stolen
-ffffffff8195c9c0 t _i915_gem_object_create_stolen
-ffffffff8195ca80 T i915_gem_object_create_stolen_for_preallocated
-ffffffff8195cea0 t i915_gem_object_get_pages_stolen
-ffffffff8195cff0 t i915_gem_object_put_pages_stolen
-ffffffff8195d020 t i915_gem_object_release_stolen
-ffffffff8195e000 T i915_gem_fence_size
-ffffffff8195e170 T i915_gem_fence_alignment
-ffffffff8195e200 T i915_gem_object_set_tiling
-ffffffff8195e9c0 T i915_gem_set_tiling_ioctl
-ffffffff8195ebb0 T i915_gem_get_tiling_ioctl
-ffffffff8195f000 T i915_gem_userptr_ioctl
-ffffffff8195f030 T i915_gem_init_userptr
-ffffffff8195f130 T i915_gem_cleanup_userptr
-ffffffff81960000 T i915_gemfs_init
-ffffffff81960030 T i915_gemfs_fini
-ffffffff81961000 T i915_error_printf
-ffffffff81961070 t i915_error_vprintf
-ffffffff819611d0 T i915_error_state_to_str
-ffffffff81962aa0 t print_error_buffers
-ffffffff81962ca0 t i915_error_puts
-ffffffff81962dc0 T i915_error_state_buf_init
-ffffffff81962ed0 T __i915_gpu_state_free
-ffffffff81963a60 T i915_capture_gpu_state
-ffffffff81965450 T i915_capture_error_state
-ffffffff81965720 T i915_first_error_state
-ffffffff81965780 T i915_reset_error_state
-ffffffff81965810 t __i915_printfn_error
-ffffffff81965830 t i915_error_object_create
-ffffffff81965b30 t record_request
-ffffffff81965ce0 t capture_error_bo
-ffffffff81966000 T i915_hotplug_interrupt_update
-ffffffff819660b0 T ilk_update_display_irq
-ffffffff819661b0 T gen5_enable_gt_irq
-ffffffff81966240 T gen5_disable_gt_irq
-ffffffff81966290 T gen6_unmask_pm_irq
-ffffffff819663a0 T gen6_mask_pm_irq
-ffffffff819664b0 T gen11_reset_rps_interrupts
-ffffffff819665a0 T gen6_reset_rps_interrupts
-ffffffff81966680 T gen6_enable_rps_interrupts
-ffffffff81966910 T gen6_disable_rps_interrupts
-ffffffff81966c00 T gen9_reset_guc_interrupts
-ffffffff81966d20 T gen9_enable_guc_interrupts
-ffffffff81966f50 T gen9_disable_guc_interrupts
-ffffffff819670d0 T bdw_update_pipe_irq
-ffffffff819671e0 T ibx_display_interrupt_update
-ffffffff819672b0 T i915_pipestat_enable_mask
-ffffffff819673f0 T i915_enable_pipestat
-ffffffff81967520 T i915_disable_pipestat
-ffffffff81967640 T intel_get_crtc_scanline
-ffffffff819676a0 t __intel_get_crtc_scanline
-ffffffff819678a0 T gen6_rps_reset_ei
-ffffffff819678f0 T i915_handle_error
-ffffffff81968120 T gen8_irq_power_well_post_enable
-ffffffff819682d0 T gen8_irq_power_well_pre_disable
-ffffffff81968430 T valleyview_enable_display_irqs
-ffffffff819684a0 t vlv_display_irq_reset
-ffffffff819686c0 t vlv_display_irq_postinstall
-ffffffff81968960 T valleyview_disable_display_irqs
-ffffffff819689b0 T intel_irq_init
-ffffffff81968ed0 t gen6_pm_rps_work
-ffffffff81969300 t ivybridge_parity_work
-ffffffff81969690 t g4x_get_vblank_counter
-ffffffff819696d0 t i915_get_vblank_counter
-ffffffff81969810 t i915_get_crtc_scanoutpos
-ffffffff81969a90 t cherryview_irq_handler
-ffffffff81969de0 t cherryview_irq_reset
-ffffffff81969f20 t cherryview_irq_postinstall
-ffffffff81969fd0 t i965_enable_vblank
-ffffffff8196a0d0 t i965_disable_vblank
-ffffffff8196a1b0 t i915_hpd_irq_setup
-ffffffff8196a2a0 t valleyview_irq_handler
-ffffffff8196a5d0 t valleyview_irq_reset
-ffffffff8196a660 t valleyview_irq_postinstall
-ffffffff8196a700 t gen11_irq_handler
-ffffffff8196ab50 t gen11_irq_reset
-ffffffff8196b250 t gen11_irq_postinstall
-ffffffff8196b6b0 t gen8_enable_vblank
-ffffffff8196b7b0 t gen8_disable_vblank
-ffffffff8196b870 t gen11_hpd_irq_setup
-ffffffff8196bb10 t gen8_irq_handler
-ffffffff8196bc50 t gen8_irq_reset
-ffffffff8196c060 t gen8_irq_postinstall
-ffffffff8196c380 t bxt_hpd_irq_setup
-ffffffff8196c540 t spt_hpd_irq_setup
-ffffffff8196c730 t ilk_hpd_irq_setup
-ffffffff8196cb80 t ironlake_irq_handler
-ffffffff8196d6b0 t ironlake_irq_reset
-ffffffff8196d820 t ironlake_irq_postinstall
-ffffffff8196ddd0 t ironlake_enable_vblank
-ffffffff8196dee0 t ironlake_disable_vblank
-ffffffff8196dfb0 t i8xx_irq_reset
-ffffffff8196e110 t i8xx_irq_postinstall
-ffffffff8196e3a0 t i8xx_irq_handler
-ffffffff8196e5f0 t i8xx_enable_vblank
-ffffffff8196e6f0 t i8xx_disable_vblank
-ffffffff8196e7d0 t i915_irq_reset
-ffffffff8196e9e0 t i915_irq_postinstall
-ffffffff8196edf0 t i915_irq_handler
-ffffffff8196f170 t i965_irq_reset
-ffffffff8196f370 t i965_irq_postinstall
-ffffffff8196f810 t i965_irq_handler
-ffffffff8196fc20 T intel_irq_fini
-ffffffff8196fc60 T intel_irq_install
-ffffffff8196fc90 T intel_irq_uninstall
-ffffffff8196fce0 T intel_runtime_pm_disable_interrupts
-ffffffff8196fd30 T intel_runtime_pm_enable_interrupts
-ffffffff8196fd80 t wedge_me
-ffffffff8196fde0 t __delayed_work_tick
-ffffffff8196fe00 t kasprintf
-ffffffff8196fed0 t i9xx_pipestat_irq_ack
-ffffffff81970030 t gen8_gt_irq_handler
-ffffffff81970300 t i9xx_hpd_irq_handler
-ffffffff819704e0 t valleyview_pipestat_irq_handler
-ffffffff819705d0 t gen6_rps_irq_handler
-ffffffff81970770 t notify_ring
-ffffffff81970a20 t i9xx_pipe_crc_irq_handler
-ffffffff81970b50 t gmbus_irq_handler
-ffffffff81970bd0 t gen8_gt_irq_reset
-ffffffff81970ec0 t gen8_gt_irq_postinstall
-ffffffff819712d0 t snb_gt_irq_handler
-ffffffff81971460 t gen5_gt_irq_reset
-ffffffff81971610 t gen5_gt_irq_postinstall
-ffffffff819718d0 t gen8_de_irq_handler
-ffffffff81972550 t ilk_hpd_irq_handler
-ffffffff81972680 t cpt_irq_handler
-ffffffff81972880 t ibx_hpd_irq_handler
-ffffffff819729e0 t gen8_de_irq_postinstall
-ffffffff81973170 t ibx_irq_reset
-ffffffff81974000 T i915_memcpy_from_wc
-ffffffff81974030 T i915_memcpy_init_early
-ffffffff81975000 T i915_params_dump
-ffffffff81975460 t _print_param
-ffffffff81976000 T i915_oa_init_reg_state
-ffffffff81976140 T i915_perf_open_ioctl
-ffffffff81976360 T i915_perf_register
-ffffffff81976380 T i915_perf_unregister
-ffffffff819763f0 T i915_perf_add_config_ioctl
-ffffffff81976440 T i915_perf_remove_config_ioctl
-ffffffff819765e0 T i915_perf_init
-ffffffff819768d0 t gen7_is_valid_b_counter_addr
-ffffffff81976920 t hsw_is_valid_mux_addr
-ffffffff819769a0 t gen7_init_oa_buffer
-ffffffff81976aa0 t hsw_enable_metric_set
-ffffffff81976c10 t hsw_disable_metric_set
-ffffffff81976cf0 t gen7_oa_enable
-ffffffff81976e60 t gen7_oa_disable
-ffffffff81976ef0 t gen7_oa_read
-ffffffff81977380 t gen7_oa_hw_tail_read
-ffffffff819773d0 t gen8_init_oa_buffer
-ffffffff81977500 t gen8_oa_enable
-ffffffff81977640 t gen8_oa_disable
-ffffffff819776d0 t gen8_oa_read
-ffffffff81977c00 t gen8_oa_hw_tail_read
-ffffffff81977c50 t gen8_is_valid_mux_addr
-ffffffff81977cc0 t gen8_is_valid_flex_addr
-ffffffff81977d40 t chv_is_valid_mux_addr
-ffffffff81977da0 t gen8_enable_metric_set
-ffffffff81977ec0 t gen8_disable_metric_set
-ffffffff81977f20 t gen10_is_valid_mux_addr
-ffffffff81977f90 t gen10_disable_metric_set
-ffffffff81977ff0 t oa_poll_check_timer_cb
-ffffffff81978030 T i915_perf_fini
-ffffffff81978110 t destroy_config
-ffffffff819781b0 t i915_ggtt_offset
-ffffffff81978300 t gen8_configure_all_contexts
-ffffffff81979000 T i915_query_ioctl
-ffffffff81979100 t query_topology_info
-ffffffff8197a000 t i915_fence_get_driver_name
-ffffffff8197a030 t i915_fence_get_timeline_name
-ffffffff8197a0d0 t i915_fence_enable_signaling
-ffffffff8197a130 t i915_fence_signaled
-ffffffff8197a1e0 t i915_fence_wait
-ffffffff8197a240 t i915_fence_release
-ffffffff8197a2b0 T i915_gem_set_global_seqno
-ffffffff8197a2f0 t reset_all_global_seqno
-ffffffff8197a510 T i915_gem_retire_noop
-ffffffff8197a540 T i915_request_retire_upto
-ffffffff8197a630 t i915_request_retire
-ffffffff8197af60 T __i915_request_submit
-ffffffff8197b1d0 T i915_request_submit
-ffffffff8197b210 T __i915_request_unsubmit
-ffffffff8197b3f0 T i915_request_unsubmit
-ffffffff8197b430 T i915_request_alloc
-ffffffff8197bb60 t submit_notify
-ffffffff8197bbf0 T i915_request_await_dma_fence
-ffffffff8197c000 T i915_request_await_object
-ffffffff8197c210 T i915_request_skip
-ffffffff8197c2c0 T i915_request_add
-ffffffff8197c790 T i915_request_wait
-ffffffff8197ce90 t __i915_spin_request
-ffffffff8197d090 T i915_retire_requests
-ffffffff8197e000 T i915_save_state
-ffffffff8197e400 T i915_restore_state
-ffffffff8197f000 T __i915_sw_fence_init
-ffffffff8197f090 T i915_sw_fence_commit
-ffffffff8197f0d0 T i915_sw_fence_await_sw_fence
-ffffffff8197f0e0 t __i915_sw_fence_await_sw_fence
-ffffffff8197f300 T i915_sw_fence_await_sw_fence_gfp
-ffffffff8197f320 T i915_sw_fence_await_dma_fence
-ffffffff8197f680 t dma_i915_sw_fence_wake
-ffffffff8197f6e0 t irq_i915_sw_fence_work
-ffffffff8197f750 t timer_i915_sw_fence_wake
-ffffffff8197f820 t dma_i915_sw_fence_wake_timer
-ffffffff8197f890 T i915_sw_fence_await_reservation
-ffffffff8197faa0 t __i915_sw_fence_complete
-ffffffff8197fc20 t i915_sw_fence_wake
-ffffffff81980000 T i915_syncmap_init
-ffffffff81980030 T i915_syncmap_is_later
-ffffffff819801d0 T i915_syncmap_set
-ffffffff81980300 t __sync_set
-ffffffff81980850 T i915_syncmap_free
-ffffffff819808a0 t __sync_free
-ffffffff81981000 T i915_timeline_init
-ffffffff819810a0 T i915_timelines_park
-ffffffff81981100 T i915_timeline_fini
-ffffffff819811a0 T i915_timeline_create
-ffffffff819812a0 T __i915_timeline_free
-ffffffff81982000 T i915_check_vgpu
-ffffffff81982060 T intel_vgpu_has_full_48bit_ppgtt
-ffffffff81982090 T intel_vgt_deballoon
-ffffffff819821a0 T intel_vgt_balloon
-ffffffff81983000 T i915_vma_instance
-ffffffff819837c0 t vma_lookup
-ffffffff819838d0 T i915_vma_bind
-ffffffff81983ab0 T i915_vma_pin_iomap
-ffffffff81983d40 T i915_vma_flush_writes
-ffffffff81983d90 T i915_vma_unpin_iomap
-ffffffff81983f30 T i915_vma_unpin_and_release
-ffffffff81984100 T i915_vma_close
-ffffffff819841d0 T i915_vma_misplaced
-ffffffff819842b0 T __i915_vma_set_map_and_fenceable
-ffffffff81984430 T i915_gem_valid_gtt_space
-ffffffff81984540 T __i915_vma_do_pin
-ffffffff81985050 t i915_vma_remove
-ffffffff81985350 T i915_vma_reopen
-ffffffff819853b0 T i915_vma_destroy
-ffffffff81985750 T i915_vma_unbind
-ffffffff81985d20 T i915_vma_parked
-ffffffff81985e10 T i915_vma_revoke_mmap
-ffffffff81985fa0 T i915_vma_move_to_active
-ffffffff819866d0 t i915_vma_last_retire
-ffffffff819866e0 t __i915_vma_retire
-ffffffff81986a70 t i915_vma_retire
-ffffffff81987000 T intel_digital_connector_atomic_get_property
-ffffffff81987080 T intel_digital_connector_atomic_set_property
-ffffffff81987100 T intel_digital_connector_atomic_check
-ffffffff819871c0 T intel_digital_connector_duplicate_state
-ffffffff81987240 T intel_crtc_duplicate_state
-ffffffff819872e0 T intel_crtc_destroy_state
-ffffffff819872f0 T intel_atomic_setup_scalers
-ffffffff81987600 T intel_atomic_state_alloc
-ffffffff81987680 T intel_atomic_state_clear
-ffffffff81988000 T intel_create_plane_state
-ffffffff81988060 T intel_plane_duplicate_state
-ffffffff81988100 T intel_plane_destroy_state
-ffffffff81988140 T intel_plane_atomic_check_with_state
-ffffffff81988320 t intel_plane_atomic_check
-ffffffff819883a0 t intel_plane_atomic_update
-ffffffff81988410 T intel_plane_atomic_get_property
-ffffffff81988440 T intel_plane_atomic_set_property
-ffffffff81989000 T intel_audio_codec_enable
-ffffffff81989190 T intel_audio_codec_disable
-ffffffff81989290 T intel_init_audio_hooks
-ffffffff81989340 t g4x_audio_codec_enable
-ffffffff81989580 t g4x_audio_codec_disable
-ffffffff81989610 t ilk_audio_codec_enable
-ffffffff81989930 t ilk_audio_codec_disable
-ffffffff81989a70 t hsw_audio_codec_enable
-ffffffff81989f60 t hsw_audio_codec_disable
-ffffffff8198a060 T i915_audio_component_init
-ffffffff8198a090 T i915_audio_component_cleanup
-ffffffff8198a0b0 T intel_audio_init
-ffffffff8198a0c0 T intel_audio_deinit
-ffffffff8198b000 T intel_bios_is_valid_vbt
-ffffffff8198b080 T intel_bios_init
-ffffffff8198cfe0 T intel_bios_cleanup
-ffffffff8198d0f0 T intel_bios_is_tv_present
-ffffffff8198d190 T intel_bios_is_lvds_present
-ffffffff8198d280 T intel_bios_is_port_present
-ffffffff8198d350 T intel_bios_is_port_edp
-ffffffff8198d3f0 T intel_bios_is_port_dp_dual_mode
-ffffffff8198d4a0 T intel_bios_is_dsi_present
-ffffffff8198d520 T intel_bios_is_port_hpd_inverted
-ffffffff8198d660 T intel_bios_is_lspcon_present
-ffffffff8198d740 t fill_detail_timing_data
-ffffffff8198e000 T intel_engine_wakeup
-ffffffff8198e090 T __intel_engine_disarm_breadcrumbs
-ffffffff8198e210 T intel_engine_pin_breadcrumbs_irq
-ffffffff8198e330 T intel_engine_unpin_breadcrumbs_irq
-ffffffff8198e3f0 T intel_engine_disarm_breadcrumbs
-ffffffff8198e640 t missed_breadcrumb
-ffffffff8198e6f0 T intel_engine_add_wait
-ffffffff8198e780 t __intel_engine_add_wait
-ffffffff8198eda0 T intel_engine_remove_wait
-ffffffff8198ee60 t __intel_engine_remove_wait
-ffffffff8198f1e0 T intel_engine_enable_signaling
-ffffffff8198f350 T intel_engine_cancel_signaling
-ffffffff8198f410 T intel_engine_init_breadcrumbs
-ffffffff8198f510 t intel_breadcrumbs_fake_irq
-ffffffff8198f640 t intel_breadcrumbs_hangcheck
-ffffffff8198f780 t intel_breadcrumbs_signaler
-ffffffff8198fbe0 T intel_engine_reset_breadcrumbs
-ffffffff8198fd00 T intel_engine_fini_breadcrumbs
-ffffffff81990000 T skl_init_cdclk
-ffffffff819901b0 t skl_set_cdclk
-ffffffff81990700 T skl_uninit_cdclk
-ffffffff819907b0 T bxt_init_cdclk
-ffffffff81990970 t bxt_set_cdclk
-ffffffff81990d00 T bxt_uninit_cdclk
-ffffffff81990d90 T icl_init_cdclk
-ffffffff81990fb0 T intel_update_cdclk
-ffffffff81991030 T intel_dump_cdclk_state
-ffffffff81991060 t icl_calc_cdclk_pll_vco
-ffffffff81991170 t icl_set_cdclk
-ffffffff81991360 T icl_uninit_cdclk
-ffffffff81991450 T cnl_init_cdclk
-ffffffff819915d0 t cnl_set_cdclk
-ffffffff81991820 T cnl_uninit_cdclk
-ffffffff819918a0 T intel_cdclk_needs_modeset
-ffffffff819918e0 T intel_cdclk_changed
-ffffffff81991930 T intel_set_cdclk
-ffffffff81991a40 T intel_crtc_compute_min_cdclk
-ffffffff81991cb0 T intel_update_max_cdclk
-ffffffff81992050 T intel_update_rawclk
-ffffffff81992230 T intel_init_cdclk_hooks
-ffffffff81992550 t chv_set_cdclk
-ffffffff81992860 t vlv_modeset_calc_cdclk
-ffffffff81992b00 t vlv_set_cdclk
-ffffffff81992ff0 t bdw_set_cdclk
-ffffffff819934d0 t bdw_modeset_calc_cdclk
-ffffffff819936e0 t bxt_modeset_calc_cdclk
-ffffffff81993a90 t skl_modeset_calc_cdclk
-ffffffff81993d70 t cnl_modeset_calc_cdclk
-ffffffff81994320 t icl_modeset_calc_cdclk
-ffffffff81994a80 t icl_get_cdclk
-ffffffff81994c20 t cnl_get_cdclk
-ffffffff81994d80 t skl_get_cdclk
-ffffffff81994f70 t bxt_get_cdclk
-ffffffff819950d0 t bdw_get_cdclk
-ffffffff819951b0 t hsw_get_cdclk
-ffffffff81995270 t vlv_get_cdclk
-ffffffff81995320 t fixed_400mhz_get_cdclk
-ffffffff81995350 t fixed_450mhz_get_cdclk
-ffffffff81995380 t gm45_get_cdclk
-ffffffff819954e0 t g33_get_cdclk
-ffffffff81995660 t i965gm_get_cdclk
-ffffffff819957c0 t pnv_get_cdclk
-ffffffff81995850 t i945gm_get_cdclk
-ffffffff819958c0 t i915gm_get_cdclk
-ffffffff81995930 t fixed_333mhz_get_cdclk
-ffffffff81995960 t fixed_266mhz_get_cdclk
-ffffffff81995990 t i85x_get_cdclk
-ffffffff81995a10 t fixed_200mhz_get_cdclk
-ffffffff81995a40 t fixed_133mhz_get_cdclk
-ffffffff81995a70 t cnl_cdclk_pll_disable
-ffffffff81995bc0 t cnl_cdclk_pll_enable
-ffffffff81996000 T intel_color_set_csc
-ffffffff81996040 T intel_color_load_luts
-ffffffff81996060 T intel_color_check
-ffffffff81996120 T intel_color_init
-ffffffff81996240 t cherryview_load_csc_matrix
-ffffffff81996600 t cherryview_load_luts
-ffffffff819968f0 t ilk_load_csc_matrix
-ffffffff81997140 t haswell_load_luts
-ffffffff81997220 t broadwell_load_luts
-ffffffff81997530 t glk_load_luts
-ffffffff81997760 t i9xx_load_luts
-ffffffff81997780 t i9xx_load_luts_internal
-ffffffff819979a0 t bdw_load_gamma_lut
-ffffffff81998000 T intel_crt_port_enabled
-ffffffff81998080 T intel_crt_reset
-ffffffff81998130 T intel_crt_init
-ffffffff81998510 t hsw_crt_get_config
-ffffffff819985c0 t hsw_crt_compute_config
-ffffffff81998650 t hsw_pre_pll_enable_crt
-ffffffff819986a0 t hsw_pre_enable_crt
-ffffffff81998720 t hsw_enable_crt
-ffffffff81998890 t hsw_disable_crt
-ffffffff819988e0 t hsw_post_disable_crt
-ffffffff81998a30 t pch_crt_compute_config
-ffffffff81998a70 t pch_disable_crt
-ffffffff81998aa0 t pch_post_disable_crt
-ffffffff81998b80 t intel_crt_compute_config
-ffffffff81998bb0 t intel_disable_crt
-ffffffff81998c90 t intel_crt_get_config
-ffffffff81998d30 t intel_crt_get_hw_state
-ffffffff81998df0 t intel_enable_crt
-ffffffff81998ed0 t intel_crt_destroy
-ffffffff81998f00 t intel_spurious_crt_detect_dmi_callback
-ffffffff81998f30 t intel_crt_get_modes
-ffffffff819990e0 t intel_crt_detect
-ffffffff819999b0 t intel_crt_mode_valid
-ffffffff81999a90 t intel_crt_detect_ddc
-ffffffff8199a000 T intel_csr_load_program
-ffffffff8199a250 T intel_csr_ucode_init
-ffffffff8199a370 t csr_load_work_fn
-ffffffff8199a7f0 T intel_csr_ucode_suspend
-ffffffff8199a860 T intel_csr_ucode_resume
-ffffffff8199a8b0 T intel_csr_ucode_fini
-ffffffff8199b000 T hsw_fdi_link_train
-ffffffff8199b550 t intel_prepare_dp_ddi_buffers
-ffffffff8199b860 T intel_ddi_set_pipe_settings
-ffffffff8199b970 T intel_ddi_set_vc_payload_alloc
-ffffffff8199ba20 T intel_ddi_enable_transcoder_func
-ffffffff8199bcb0 T intel_ddi_disable_transcoder_func
-ffffffff8199bd90 T intel_ddi_toggle_hdcp_signalling
-ffffffff8199bef0 T intel_ddi_connector_get_hw_state
-ffffffff8199c000 T intel_ddi_get_hw_state
-ffffffff8199c210 T intel_ddi_enable_pipe_clock
-ffffffff8199c330 T intel_ddi_disable_pipe_clock
-ffffffff8199c390 T intel_ddi_dp_voltage_max
-ffffffff8199c690 t intel_ddi_get_buf_trans_edp
-ffffffff8199c8c0 T intel_ddi_dp_pre_emphasis_max
-ffffffff8199c8f0 T bxt_signal_levels
-ffffffff8199ca10 t icl_ddi_vswing_sequence
-ffffffff8199cfc0 t cnl_ddi_vswing_sequence
-ffffffff8199d850 T ddi_signal_levels
-ffffffff8199d900 t skl_ddi_set_iboost
-ffffffff8199dd80 T icl_map_plls_to_ports
-ffffffff8199df60 T icl_unmap_plls_to_ports
-ffffffff8199e090 T intel_ddi_fdi_post_disable
-ffffffff8199e1d0 t intel_disable_ddi_buf
-ffffffff8199e360 t intel_ddi_clk_disable
-ffffffff8199e4e0 T intel_ddi_prepare_link_retrain
-ffffffff8199e740 T intel_ddi_compute_min_voltage_level
-ffffffff8199e7a0 T intel_ddi_get_config
-ffffffff8199f100 T intel_ddi_init
-ffffffff8199f580 t intel_ddi_hotplug
-ffffffff8199f890 t intel_ddi_compute_output_type
-ffffffff8199f910 t intel_ddi_compute_config
-ffffffff8199fa00 t intel_enable_ddi
-ffffffff8199fc60 t bxt_ddi_pre_pll_enable
-ffffffff8199fc80 t intel_ddi_pre_enable
-ffffffff819a0770 t intel_disable_ddi
-ffffffff819a0840 t intel_ddi_post_disable
-ffffffff819a09d0 t intel_ddi_get_power_domains
-ffffffff819a0a70 t cnl_calc_wrpll_link
-ffffffff819a0c00 t intel_ddi_clk_select
-ffffffff819a1000 T intel_platform_name
-ffffffff819a1090 T intel_device_info_dump_flags
-ffffffff819a1800 T intel_device_info_dump_runtime
-ffffffff819a1b80 T intel_device_info_dump
-ffffffff819a1c30 T intel_device_info_dump_topology
-ffffffff819a1e60 T intel_device_info_runtime_init
-ffffffff819a4030 T intel_driver_caps_print
-ffffffff819a4090 T intel_device_info_init_mmio
-ffffffff819a5000 T vlv_get_hpll_vco
-ffffffff819a5070 T vlv_get_cck_clock
-ffffffff819a5130 T vlv_get_cck_clock_hpll
-ffffffff819a5230 T chv_calc_dpll_params
-ffffffff819a52f0 T bxt_find_best_dpll
-ffffffff819a5310 t chv_find_best_dpll
-ffffffff819a5610 T intel_crtc_active
-ffffffff819a5670 T intel_pipe_to_cpu_transcoder
-ffffffff819a56b0 T assert_pll
-ffffffff819a5790 T assert_dsi_pll
-ffffffff819a5870 T assert_fdi_rx_pll
-ffffffff819a5930 T assert_panel_unlocked
-ffffffff819a5b10 T assert_pipe
-ffffffff819a5c90 T assert_pch_transcoder_disabled
-ffffffff819a5d20 T vlv_wait_port_ready
-ffffffff819a5e50 T lpt_disable_pch_transcoder
-ffffffff819a5f20 T intel_crtc_pch_transcoder
-ffffffff819a5f60 T intel_fb_align_height
-ffffffff819a5fe0 T intel_rotation_info_size
-ffffffff819a6020 T intel_pin_and_fence_fb_obj
-ffffffff819a6260 T intel_unpin_fb_vma
-ffffffff819a6310 T intel_fb_xy_to_linear
-ffffffff819a6350 T intel_add_fb_offsets
-ffffffff819a63c0 T intel_compute_tile_offset
-ffffffff819a6580 t _intel_compute_tile_offset
-ffffffff819a6790 T skl_format_to_fourcc
-ffffffff819a6810 T skl_check_plane_surface
-ffffffff819a6ff0 T i9xx_check_plane_surface
-ffffffff819a7110 T skl_plane_stride
-ffffffff819a71e0 T skl_plane_ctl
-ffffffff819a7510 T glk_plane_color_ctl
-ffffffff819a75a0 T intel_prepare_reset
-ffffffff819a7760 T intel_finish_reset
-ffffffff819a79c0 t __intel_display_resume
-ffffffff819a7b00 T intel_pps_unlock_regs_wa
-ffffffff819a7bd0 T intel_modeset_init_hw
-ffffffff819a7c60 T intel_has_pending_fb_unpin
-ffffffff819a7d50 T lpt_disable_iclkip
-ffffffff819a7dc0 T lpt_get_iclkip
-ffffffff819a7ec0 T skl_scaler_calc_phase
-ffffffff819a7f20 T skl_update_scaler_crtc
-ffffffff819a7f90 t skl_update_scaler
-ffffffff819a8140 T hsw_enable_ips
-ffffffff819a8290 T hsw_disable_ips
-ffffffff819a83d0 T intel_port_is_tc
-ffffffff819a8410 T intel_port_to_tc
-ffffffff819a8450 T intel_port_to_power_domain
-ffffffff819a84b0 T intel_display_suspend
-ffffffff819a8520 T intel_encoder_destroy
-ffffffff819a8550 T intel_connector_init
-ffffffff819a85b0 T intel_connector_alloc
-ffffffff819a8630 T intel_connector_free
-ffffffff819a8670 T intel_connector_get_hw_state
-ffffffff819a86c0 T hsw_crtc_state_ips_capable
-ffffffff819a8770 T intel_link_compute_m_n
-ffffffff819a8910 T intel_dp_set_m_n
-ffffffff819a8a60 t intel_cpu_transcoder_set_m_n
-ffffffff819a8d60 T vlv_force_pll_on
-ffffffff819a8ee0 t chv_prepare_pll
-ffffffff819a91d0 t chv_enable_pll
-ffffffff819a94b0 t vlv_prepare_pll
-ffffffff819a9820 t vlv_enable_pll
-ffffffff819a9a00 T vlv_force_pll_off
-ffffffff819a9ae0 t chv_disable_pll
-ffffffff819a9c10 T intel_mode_from_pipe_config
-ffffffff819a9cb0 T intel_init_pch_refclk
-ffffffff819aa130 t lpt_init_pch_refclk
-ffffffff819aa7b0 T ironlake_get_lanes_required
-ffffffff819aa810 T intel_dp_get_m_n
-ffffffff819aa960 t intel_cpu_transcoder_get_m_n
-ffffffff819aacc0 T hsw_enable_pc8
-ffffffff819ab5a0 t lpt_disable_clkout_dp
-ffffffff819ab680 T hsw_disable_pc8
-ffffffff819aba80 T intel_framebuffer_create
-ffffffff819abb10 t intel_framebuffer_init
-ffffffff819ac800 T intel_get_load_detect_pipe
-ffffffff819acba0 T intel_release_load_detect_pipe
-ffffffff819acc00 T intel_dotclock_calculate
-ffffffff819acc50 T intel_encoder_current_mode
-ffffffff819ace20 T intel_plane_atomic_calc_changes
-ffffffff819ad400 T intel_crtc_get_vblank_counter
-ffffffff819ad450 T intel_prepare_plane_fb
-ffffffff819ad870 t add_rps_boost_after_vblank
-ffffffff819ad9d0 T intel_cleanup_plane_fb
-ffffffff819adad0 T skl_max_scale
-ffffffff819adbd0 T intel_crtc_arm_fifo_underrun
-ffffffff819adc70 T intel_plane_destroy
-ffffffff819adca0 T skl_plane_has_planar
-ffffffff819add30 T intel_get_pipe_from_connector
-ffffffff819addc0 T intel_get_pipe_from_crtc_id_ioctl
-ffffffff819ade40 T intel_init_display_hooks
-ffffffff819ae0e0 t haswell_get_pipe_config
-ffffffff819aebf0 t skylake_get_initial_plane_config
-ffffffff819aeff0 t haswell_crtc_compute_clock
-ffffffff819af140 t haswell_crtc_enable
-ffffffff819aff40 t haswell_crtc_disable
-ffffffff819b02b0 t i9xx_get_initial_plane_config
-ffffffff819b0600 t ironlake_get_pipe_config
-ffffffff819b09f0 t ironlake_crtc_compute_clock
-ffffffff819b0cf0 t ironlake_crtc_enable
-ffffffff819b22e0 t ironlake_crtc_disable
-ffffffff819b2d00 t i9xx_get_pipe_config
-ffffffff819b3410 t chv_crtc_compute_clock
-ffffffff819b3500 t valleyview_crtc_enable
-ffffffff819b3a00 t i9xx_crtc_disable
-ffffffff819b3f90 t vlv_crtc_compute_clock
-ffffffff819b44a0 t g4x_crtc_compute_clock
-ffffffff819b45e0 t i9xx_crtc_enable
-ffffffff819b4d80 t pnv_crtc_compute_clock
-ffffffff819b5110 t i9xx_crtc_compute_clock
-ffffffff819b5200 t i8xx_crtc_compute_clock
-ffffffff819b5430 t ironlake_fdi_link_train
-ffffffff819b5850 t gen6_fdi_link_train
-ffffffff819b5eb0 t ivb_manual_fdi_link_train
-ffffffff819b64f0 t skl_update_crtcs
-ffffffff819b67a0 t intel_update_crtcs
-ffffffff819b6840 T intel_modeset_init
-ffffffff819b85a0 t intel_atomic_helper_free_state_worker
-ffffffff819b8620 t i915_disable_vga
-ffffffff819b86e0 t intel_modeset_setup_hw_state
-ffffffff819b98a0 T i830_enable_pipe
-ffffffff819b9de0 T i830_disable_pipe
-ffffffff819ba040 T i915_redisable_vga_power_on
-ffffffff819ba0c0 T i915_redisable_vga
-ffffffff819ba160 T intel_display_resume
-ffffffff819ba260 T intel_connector_register
-ffffffff819ba270 T intel_connector_unregister
-ffffffff819ba290 T intel_modeset_cleanup
-ffffffff819ba3f0 T intel_connector_attach_encoder
-ffffffff819ba410 T intel_modeset_vga_set_state
-ffffffff819ba500 T intel_display_capture_error_state
-ffffffff819baac0 T intel_display_print_error_state
-ffffffff819bae70 t intel_PLL_is_valid
-ffffffff819baf70 t intel_tile_width_bytes
-ffffffff819bb100 t skl_max_plane_width
-ffffffff819bb1f0 t _intel_adjust_tile_offset
-ffffffff819bb420 t do_rps_boost
-ffffffff819bb510 t intel_user_framebuffer_destroy
-ffffffff819bb720 t intel_user_framebuffer_create_handle
-ffffffff819bb770 t intel_user_framebuffer_dirty
-ffffffff819bb7e0 t intel_get_pipe_timings
-ffffffff819bba50 t intel_set_pipe_timings
-ffffffff819bbdf0 t skylake_pfit_enable
-ffffffff819bbf40 t intel_enable_pipe
-ffffffff819bc390 t ironlake_pch_transcoder_set_timings
-ffffffff819bc650 t intel_disable_pipe
-ffffffff819bc840 t i9xx_crtc_clock_get
-ffffffff819bcb10 t g4x_find_best_dpll
-ffffffff819bce60 t assert_pch_dp_disabled
-ffffffff819bcf60 t assert_pch_hdmi_disabled
-ffffffff819bd060 t i9xx_set_pipeconf
-ffffffff819bd230 t i9xx_pfit_enable
-ffffffff819bd370 t i9xx_compute_dpll
-ffffffff819bd4f0 t i9xx_find_best_dpll
-ffffffff819bd7e0 t intel_update_crtc
-ffffffff819bd8d0 t intel_pre_plane_update
-ffffffff819bdba0 t intel_user_framebuffer_create
-ffffffff819bdc90 t intel_get_format_info
-ffffffff819bdd30 t intel_mode_valid
-ffffffff819bde20 t intel_atomic_check
-ffffffff819bee80 t intel_atomic_commit
-ffffffff819bf1d0 t intel_atomic_state_free
-ffffffff819bf200 t intel_dump_pipe_config
-ffffffff819bf390 t intel_pipe_config_compare
-ffffffff819c1350 t pipe_config_err
-ffffffff819c1400 t intel_atomic_commit_ready
-ffffffff819c1480 t intel_atomic_commit_work
-ffffffff819c1490 t intel_atomic_commit_tail
-ffffffff819c2a80 t modeset_get_crtc_power_domains
-ffffffff819c2bb0 t intel_atomic_cleanup_work
-ffffffff819c2c70 t verify_connector_state
-ffffffff819c2f00 t verify_single_dpll_state
-ffffffff819c3240 t quirk_ssc_force_disable
-ffffffff819c3270 t quirk_invert_brightness
-ffffffff819c32a0 t quirk_backlight_present
-ffffffff819c32d0 t quirk_increase_t12_delay
-ffffffff819c3300 t quirk_increase_ddi_disabled_time
-ffffffff819c3330 t intel_dmi_reverse_brightness
-ffffffff819c3360 t intel_check_primary_plane
-ffffffff819c3720 t i9xx_update_plane
-ffffffff819c3a60 t i9xx_disable_plane
-ffffffff819c3b20 t i9xx_plane_get_hw_state
-ffffffff819c3bf0 t skl_plane_format_mod_supported
-ffffffff819c3d20 t intel_plane_ggtt_offset
-ffffffff819c3e90 t i965_plane_format_mod_supported
-ffffffff819c3f20 t i8xx_plane_format_mod_supported
-ffffffff819c3fa0 t i845_update_cursor
-ffffffff819c41f0 t i845_disable_cursor
-ffffffff819c4320 t i845_cursor_get_hw_state
-ffffffff819c43b0 t i845_check_cursor
-ffffffff819c4480 t i9xx_update_cursor
-ffffffff819c4780 t i9xx_disable_cursor
-ffffffff819c4790 t i9xx_cursor_get_hw_state
-ffffffff819c4870 t i9xx_check_cursor
-ffffffff819c4a60 t intel_check_cursor
-ffffffff819c4b50 t intel_legacy_cursor_update
-ffffffff819c5000 t intel_cursor_format_mod_supported
-ffffffff819c5040 t intel_crtc_destroy
-ffffffff819c5070 t intel_crtc_atomic_check
-ffffffff819c5380 t intel_begin_crtc_commit
-ffffffff819c5860 t intel_finish_crtc_commit
-ffffffff819c5930 t intel_plane_disable_noatomic
-ffffffff819c5a40 t wait_for_pipe_scanline_moving
-ffffffff819c6000 T intel_dp_is_edp
-ffffffff819c6030 T intel_dp_max_lane_count
-ffffffff819c6060 T intel_dp_link_required
-ffffffff819c60a0 T intel_dp_max_data_rate
-ffffffff819c60d0 T intel_dp_get_link_train_fallback_values
-ffffffff819c6230 T intel_dp_pack_aux
-ffffffff819c62a0 T intel_power_sequencer_reset
-ffffffff819c63d0 T intel_dp_source_supports_hbr2
-ffffffff819c6410 T intel_dp_source_supports_hbr3
-ffffffff819c6450 T intel_dp_max_link_rate
-ffffffff819c64f0 T intel_dp_rate_select
-ffffffff819c6560 T intel_dp_compute_rate
-ffffffff819c6600 T intel_dp_compute_config
-ffffffff819c6c70 T intel_dp_set_link_params
-ffffffff819c6cb0 T intel_edp_panel_vdd_on
-ffffffff819c6d90 t edp_panel_vdd_on
-ffffffff819c7020 T intel_edp_panel_on
-ffffffff819c70c0 t edp_panel_on
-ffffffff819c7310 T intel_edp_panel_off
-ffffffff819c74f0 T intel_edp_backlight_on
-ffffffff819c7560 t _intel_edp_backlight_on
-ffffffff819c7770 T intel_edp_backlight_off
-ffffffff819c77e0 t _intel_edp_backlight_off
-ffffffff819c79f0 T intel_dp_sink_dpms
-ffffffff819c7b30 T intel_dp_port_enabled
-ffffffff819c7c90 T intel_dp_get_link_status
-ffffffff819c7ce0 T intel_dp_voltage_max
-ffffffff819c7d70 T intel_dp_pre_emphasis_max
-ffffffff819c7e10 T intel_dp_set_signal_levels
-ffffffff819c8190 T intel_dp_program_link_training_pattern
-ffffffff819c8360 T intel_dp_set_idle_link_train
-ffffffff819c8460 T intel_dp_read_dpcd
-ffffffff819c84d0 T intel_dp_retrain_link
-ffffffff819c8740 T intel_digital_port_connected
-ffffffff819c8a10 T intel_dp_encoder_destroy
-ffffffff819c8b10 t edp_panel_vdd_off_sync
-ffffffff819c8cd0 T intel_dp_encoder_suspend
-ffffffff819c8db0 T intel_dp_encoder_reset
-ffffffff819c8f60 t vlv_active_pipe
-ffffffff819c90c0 t intel_dp_pps_init
-ffffffff819c9320 T intel_dp_hpd_pulse
-ffffffff819c9580 t intel_dp_check_mst_status
-ffffffff819c9710 T intel_dp_is_port_edp
-ffffffff819c9760 T intel_edp_drrs_enable
-ffffffff819c9830 T intel_edp_drrs_disable
-ffffffff819c9930 t intel_dp_set_drrs_state
-ffffffff819c9ab0 T intel_edp_drrs_invalidate
-ffffffff819c9bb0 T intel_edp_drrs_flush
-ffffffff819c9d20 T intel_dp_init_connector
-ffffffff819cacd0 t intel_dp_modeset_retry_work_fn
-ffffffff819cad30 t edp_panel_vdd_work
-ffffffff819cada0 T intel_dp_init
-ffffffff819cb050 t intel_dp_hotplug
-ffffffff819cb120 t intel_dp_get_hw_state
-ffffffff819cb2e0 t intel_dp_get_config
-ffffffff819cb500 t chv_dp_pre_pll_enable
-ffffffff819cb530 t chv_pre_enable_dp
-ffffffff819cb570 t vlv_enable_dp
-ffffffff819cb5e0 t vlv_disable_dp
-ffffffff819cb6f0 t chv_post_disable_dp
-ffffffff819cb740 t chv_dp_post_pll_disable
-ffffffff819cb750 t vlv_dp_pre_pll_enable
-ffffffff819cb780 t vlv_pre_enable_dp
-ffffffff819cb7c0 t vlv_post_disable_dp
-ffffffff819cb7d0 t g4x_pre_enable_dp
-ffffffff819cba80 t g4x_enable_dp
-ffffffff819cbb10 t g4x_disable_dp
-ffffffff819cbc20 t g4x_post_disable_dp
-ffffffff819cbe00 T intel_dp_mst_suspend
-ffffffff819cbe80 T intel_dp_mst_resume
-ffffffff819cbf10 t wait_panel_power_cycle
-ffffffff819cc080 t wait_panel_status
-ffffffff819cc1e0 t intel_pps_readout_hw_state
-ffffffff819cc3c0 t intel_pps_get_registers
-ffffffff819cc520 t vlv_power_sequencer_pipe
-ffffffff819cca70 t intel_dp_init_panel_power_sequencer_registers
-ffffffff819ccd40 t intel_dp_init_panel_power_sequencer
-ffffffff819ccf30 t intel_dp_get_dpcd
-ffffffff819cd0a0 t intel_dp_handle_test_request
-ffffffff819cd360 t intel_dp_set_common_rates
-ffffffff819cd490 t intel_dp_force
-ffffffff819cd5f0 t intel_dp_connector_register
-ffffffff819cd690 t intel_dp_connector_unregister
-ffffffff819cd6e0 t intel_dp_connector_destroy
-ffffffff819cd760 t intel_dp_get_modes
-ffffffff819cd820 t intel_dp_detect
-ffffffff819cdf40 t intel_dp_mode_valid
-ffffffff819ce0f0 t skl_aux_ctl_reg
-ffffffff819ce160 t skl_aux_data_reg
-ffffffff819ce1e0 t ilk_aux_ctl_reg
-ffffffff819ce260 t ilk_aux_data_reg
-ffffffff819ce2e0 t g4x_aux_ctl_reg
-ffffffff819ce360 t g4x_aux_data_reg
-ffffffff819ce3e0 t skl_get_aux_clock_divider
-ffffffff819ce410 t hsw_get_aux_clock_divider
-ffffffff819ce4a0 t ilk_get_aux_clock_divider
-ffffffff819ce500 t g4x_get_aux_clock_divider
-ffffffff819ce550 t skl_get_aux_send_ctl
-ffffffff819ce580 t g4x_get_aux_send_ctl
-ffffffff819ce5e0 t kasprintf
-ffffffff819ce6c0 t intel_dp_aux_transfer
-ffffffff819ce8a0 t intel_dp_aux_xfer
-ffffffff819cf1d0 t __delayed_work_tick
-ffffffff819cf1f0 t edp_notify_handler
-ffffffff819cf340 t intel_edp_backlight_power
-ffffffff819cf4c0 t intel_edp_drrs_downclock_work
-ffffffff819cf540 t intel_dp_hdcp_write_an_aksv
-ffffffff819cf650 t intel_dp_hdcp_read_bksv
-ffffffff819cf6c0 t intel_dp_hdcp_read_bstatus
-ffffffff819cf730 t intel_dp_hdcp_repeater_present
-ffffffff819cf7c0 t intel_dp_hdcp_read_ri_prime
-ffffffff819cf830 t intel_dp_hdcp_read_ksv_ready
-ffffffff819cf8c0 t intel_dp_hdcp_read_ksv_fifo
-ffffffff819cf9a0 t intel_dp_hdcp_read_v_prime_part
-ffffffff819cfa30 t intel_dp_hdcp_toggle_signalling
-ffffffff819cfa60 t intel_dp_hdcp_check_link
-ffffffff819cfae0 t intel_dp_hdcp_capable
-ffffffff819cfb70 t intel_dp_prepare
-ffffffff819cfe40 t intel_enable_dp
-ffffffff819d03c0 t intel_dp_link_down
-ffffffff819d1000 T intel_dp_aux_init_backlight_funcs
-ffffffff819d10a0 t intel_dp_aux_setup_backlight
-ffffffff819d11c0 t intel_dp_aux_enable_backlight
-ffffffff819d14f0 t intel_dp_aux_disable_backlight
-ffffffff819d15a0 t intel_dp_aux_set_backlight
-ffffffff819d1620 t intel_dp_aux_get_backlight
-ffffffff819d2000 T intel_dp_stop_link_train
-ffffffff819d2070 T intel_dp_start_link_train
-ffffffff819d24e0 t intel_get_adjust_train
-ffffffff819d3000 T intel_dp_mst_encoder_init
-ffffffff819d31c0 T intel_dp_mst_encoder_cleanup
-ffffffff819d3200 t intel_dp_add_mst_connector
-ffffffff819d3350 t intel_dp_register_mst_connector
-ffffffff819d3390 t intel_dp_destroy_mst_connector
-ffffffff819d33d0 t intel_dp_mst_hotplug
-ffffffff819d33f0 t intel_dp_mst_get_hw_state
-ffffffff819d3450 t intel_dp_mst_detect
-ffffffff819d34a0 t intel_dp_mst_connector_destroy
-ffffffff819d34f0 t intel_dp_mst_get_modes
-ffffffff819d3590 t intel_dp_mst_mode_valid
-ffffffff819d3670 t intel_mst_atomic_best_encoder
-ffffffff819d36b0 t intel_dp_mst_atomic_check
-ffffffff819d3760 t intel_dp_mst_compute_config
-ffffffff819d3910 t intel_mst_disable_dp
-ffffffff819d39c0 t intel_mst_post_disable_dp
-ffffffff819d3ab0 t intel_mst_pre_pll_enable_dp
-ffffffff819d3b10 t intel_mst_pre_enable_dp
-ffffffff819d3c40 t intel_mst_enable_dp
-ffffffff819d3d20 t intel_dp_mst_enc_get_hw_state
-ffffffff819d3d60 t intel_dp_mst_enc_get_config
-ffffffff819d3d80 t intel_dp_mst_encoder_destroy
-ffffffff819d4000 T bxt_port_to_phy_channel
-ffffffff819d4100 T bxt_ddi_phy_set_signal_level
-ffffffff819d44d0 T bxt_ddi_phy_is_enabled
-ffffffff819d45c0 T bxt_ddi_phy_uninit
-ffffffff819d46b0 T bxt_ddi_phy_init
-ffffffff819d48a0 t _bxt_ddi_phy_init
-ffffffff819d4e80 T bxt_ddi_phy_verify_state
-ffffffff819d5150 T bxt_ddi_phy_calc_lane_lat_optim_mask
-ffffffff819d51c0 T bxt_ddi_phy_set_lane_optim_mask
-ffffffff819d54b0 T bxt_ddi_phy_get_lane_lat_optim_mask
-ffffffff819d56c0 T chv_set_phy_signal_level
-ffffffff819d5a40 T chv_data_lane_soft_reset
-ffffffff819d5c20 T chv_phy_pre_pll_enable
-ffffffff819d5eb0 T chv_phy_pre_encoder_enable
-ffffffff819d6130 T chv_phy_release_cl2_override
-ffffffff819d61a0 T chv_phy_post_pll_disable
-ffffffff819d6240 T vlv_set_phy_signal_level
-ffffffff819d63b0 T vlv_phy_pre_pll_enable
-ffffffff819d64c0 T vlv_phy_pre_encoder_enable
-ffffffff819d65d0 T vlv_phy_reset_lanes
-ffffffff819d7000 T intel_get_shared_dpll_by_id
-ffffffff819d7040 T intel_get_shared_dpll_id
-ffffffff819d70d0 T assert_shared_dpll
-ffffffff819d71c0 T intel_prepare_shared_dpll
-ffffffff819d7350 T intel_enable_shared_dpll
-ffffffff819d7520 T intel_disable_shared_dpll
-ffffffff819d76c0 T intel_shared_dpll_swap_state
-ffffffff819d77a0 T icl_calc_dp_combo_pll_link
-ffffffff819d78e0 T intel_shared_dpll_init
-ffffffff819d7ae0 T intel_get_shared_dpll
-ffffffff819d7b40 T intel_release_shared_dpll
-ffffffff819d7c90 T intel_dpll_dump_hw_state
-ffffffff819d7cd0 t icl_get_dpll
-ffffffff819d8840 t icl_dump_hw_state
-ffffffff819d8870 t icl_pll_enable
-ffffffff819d8ca0 t icl_pll_disable
-ffffffff819d8e20 t icl_pll_get_hw_state
-ffffffff819d90f0 t cnl_ddi_calculate_wrpll
-ffffffff819d9430 t cnl_get_dpll
-ffffffff819d99e0 t cnl_dump_hw_state
-ffffffff819d9a10 t cnl_ddi_pll_enable
-ffffffff819d9bf0 t cnl_ddi_pll_disable
-ffffffff819d9d40 t cnl_ddi_pll_get_hw_state
-ffffffff819d9e30 t skl_get_dpll
-ffffffff819dab10 t skl_dump_hw_state
-ffffffff819dab40 t skl_ddi_dpll0_enable
-ffffffff819dabf0 t skl_ddi_dpll0_disable
-ffffffff819dac20 t skl_ddi_dpll0_get_hw_state
-ffffffff819dad00 t skl_ddi_pll_enable
-ffffffff819daef0 t skl_ddi_pll_disable
-ffffffff819daf80 t skl_ddi_pll_get_hw_state
-ffffffff819db0b0 t bxt_get_dpll
-ffffffff819db7b0 t bxt_dump_hw_state
-ffffffff819db7e0 t bxt_ddi_pll_enable
-ffffffff819dc240 t bxt_ddi_pll_disable
-ffffffff819dc3e0 t bxt_ddi_pll_get_hw_state
-ffffffff819dc7e0 t hsw_get_dpll
-ffffffff819dd420 t hsw_dump_hw_state
-ffffffff819dd450 t hsw_ddi_wrpll_enable
-ffffffff819dd4c0 t hsw_ddi_wrpll_disable
-ffffffff819dd540 t hsw_ddi_wrpll_get_hw_state
-ffffffff819dd5e0 t hsw_ddi_spll_enable
-ffffffff819dd640 t hsw_ddi_spll_disable
-ffffffff819dd6b0 t hsw_ddi_spll_get_hw_state
-ffffffff819dd740 t hsw_ddi_lcpll_enable
-ffffffff819dd770 t hsw_ddi_lcpll_disable
-ffffffff819dd7a0 t hsw_ddi_lcpll_get_hw_state
-ffffffff819dd7d0 t ibx_get_dpll
-ffffffff819ddaa0 t ibx_dump_hw_state
-ffffffff819ddad0 t ibx_pch_dpll_prepare
-ffffffff819ddb40 t ibx_pch_dpll_enable
-ffffffff819ddca0 t ibx_pch_dpll_disable
-ffffffff819ddd70 t ibx_pch_dpll_get_hw_state
-ffffffff819de000 T intel_dsi_dcs_init_backlight_funcs
-ffffffff819de0a0 t dcs_setup_backlight
-ffffffff819de0e0 t dcs_enable_backlight
-ffffffff819de4a0 t dcs_disable_backlight
-ffffffff819de870 t dcs_set_backlight
-ffffffff819de9f0 t dcs_get_backlight
-ffffffff819df000 T intel_dsi_vbt_exec_sequence
-ffffffff819df190 T intel_dsi_vbt_get_modes
-ffffffff819df1f0 T intel_dsi_vbt_init
-ffffffff819df7b0 t mipi_exec_send_packet
-ffffffff819df8d0 t mipi_exec_delay
-ffffffff819df910 t mipi_exec_gpio
-ffffffff819dfb20 t mipi_exec_i2c
-ffffffff819dfb50 t mipi_exec_spi
-ffffffff819dfb80 t mipi_exec_pmic
-ffffffff819e0000 T intel_dvo_init
-ffffffff819e0470 t intel_disable_dvo
-ffffffff819e0510 t intel_enable_dvo
-ffffffff819e05f0 t intel_dvo_get_hw_state
-ffffffff819e0650 t intel_dvo_get_config
-ffffffff819e06f0 t intel_dvo_compute_config
-ffffffff819e0750 t intel_dvo_pre_enable
-ffffffff819e0820 t intel_dvo_connector_get_hw_state
-ffffffff819e08a0 t intel_dvo_enc_destroy
-ffffffff819e08e0 t intel_dvo_detect
-ffffffff819e0910 t intel_dvo_destroy
-ffffffff819e0950 t intel_dvo_get_modes
-ffffffff819e09f0 t intel_dvo_mode_valid
-ffffffff819e1000 T intel_engines_init_mmio
-ffffffff819e1690 T intel_engines_init
-ffffffff819e1950 T intel_engine_init_global_seqno
-ffffffff819e1ab0 T intel_engine_setup_common
-ffffffff819e1b10 T intel_engine_create_scratch
-ffffffff819e1ce0 T intel_engine_cleanup_scratch
-ffffffff819e1d00 T intel_engine_init_common
-ffffffff819e2100 t __intel_context_unpin
-ffffffff819e2200 T intel_engine_cleanup_common
-ffffffff819e2450 T intel_engine_get_active_head
-ffffffff819e25c0 T intel_engine_get_last_batch_head
-ffffffff819e2730 T intel_engine_stop_cs
-ffffffff819e27d0 T i915_cache_level_str
-ffffffff819e2850 T intel_calculate_mcr_s_ss_select
-ffffffff819e28e0 T intel_engine_get_instdone
-ffffffff819e2b50 t read_subslice_reg
-ffffffff819e2d20 T intel_engine_is_idle
-ffffffff819e2ea0 T intel_engines_are_idle
-ffffffff819e2fa0 T intel_engine_has_kernel_context
-ffffffff819e3000 T intel_engines_reset_default_submission
-ffffffff819e3100 T intel_engines_sanitize
-ffffffff819e3230 T intel_engines_park
-ffffffff819e3570 T intel_engine_dump
-ffffffff819e4650 T intel_engines_unpark
-ffffffff819e46f0 T intel_engine_lost_context
-ffffffff819e47e0 T intel_engine_can_store_dword
-ffffffff819e4840 T intel_engines_has_context_isolation
-ffffffff819e4980 t print_request
-ffffffff819e4b20 t i915_ggtt_offset
-ffffffff819e4c70 T intel_engine_lookup_user
-ffffffff819e4cd0 T intel_enable_engine_stats
-ffffffff819e4e30 T intel_engine_get_busy_time
-ffffffff819e4f20 T intel_disable_engine_stats
-ffffffff819e6000 T intel_fbc_is_active
-ffffffff819e6030 T intel_fbc_cleanup_cfb
-ffffffff819e60e0 T intel_fbc_pre_update
-ffffffff819e6230 t intel_fbc_update_state_cache
-ffffffff819e6360 T intel_fbc_post_update
-ffffffff819e63f0 t __intel_fbc_post_update
-ffffffff819e7150 T intel_fbc_invalidate
-ffffffff819e7240 T intel_fbc_flush
-ffffffff819e7360 T intel_fbc_choose_crtc
-ffffffff819e7490 T intel_fbc_enable
-ffffffff819e79c0 T intel_fbc_disable
-ffffffff819e7a70 t __intel_fbc_disable
-ffffffff819e7b90 T intel_fbc_global_disable
-ffffffff819e7c30 T intel_fbc_reset_underrun
-ffffffff819e7cc0 T intel_fbc_handle_fifo_underrun_irq
-ffffffff819e7d20 T intel_fbc_init_pipe_state
-ffffffff819e7dc0 T intel_fbc_init
-ffffffff819e7f70 t intel_fbc_underrun_work_fn
-ffffffff819e8000 t intel_fbc_hw_deactivate
-ffffffff819e9000 T intel_fbdev_init
-ffffffff819e92b0 t intel_fbdev_suspend_worker
-ffffffff819e92e0 T intel_fbdev_initial_config_async
-ffffffff819e9360 T intel_fbdev_unregister
-ffffffff819e93b0 T intel_fbdev_fini
-ffffffff819e9470 T intel_fbdev_set_suspend
-ffffffff819e94a0 T intel_fbdev_output_poll_changed
-ffffffff819e9540 T intel_fbdev_restore_mode
-ffffffff819e95d0 t intelfb_create
-ffffffff819e99f0 t intel_fb_initial_config
-ffffffff819ea000 T intel_set_cpu_fifo_underrun_reporting
-ffffffff819ea290 T intel_set_pch_fifo_underrun_reporting
-ffffffff819ea410 T intel_cpu_fifo_underrun_irq_handler
-ffffffff819ea4b0 T intel_pch_fifo_underrun_irq_handler
-ffffffff819ea510 T intel_check_cpu_fifo_underruns
-ffffffff819ea6d0 T intel_check_pch_fifo_underruns
-ffffffff819eb000 T __intel_fb_obj_invalidate
-ffffffff819eb080 T __intel_fb_obj_flush
-ffffffff819eb160 T intel_frontbuffer_flip_prepare
-ffffffff819eb1b0 T intel_frontbuffer_flip_complete
-ffffffff819eb280 T intel_frontbuffer_flip
-ffffffff819ec000 T inteldrm_gmch_match
-ffffffff819ec060 T i915_alloc_ifp
-ffffffff819ec180 T i965_alloc_ifp
-ffffffff819ec2e0 T intel_gtt_chipset_setup
-ffffffff819ec440 T intel_enable_gtt
-ffffffff819ec490 T intel_gmch_probe
-ffffffff819ec4c0 T intel_gtt_get
-ffffffff819ec510 T intel_gtt_chipset_flush
-ffffffff819ec610 T intel_gmch_remove
-ffffffff819ec630 T intel_gtt_insert_sg_entries
-ffffffff819ec7f0 T intel_gtt_insert_page
-ffffffff819ec930 T intel_gtt_clear_range
-ffffffff819ed000 T intel_guc_init_send_regs
-ffffffff819ed0f0 T intel_guc_init_early
-ffffffff819ed180 T intel_guc_send_nop
-ffffffff819ed1d0 T intel_guc_to_host_event_handler_nop
-ffffffff819ed1f0 t gen8_guc_raise_irq
-ffffffff819ed220 T intel_guc_init_misc
-ffffffff819ed3e0 T intel_guc_fini_misc
-ffffffff819ed470 T intel_guc_init
-ffffffff819ed5e0 t guc_shared_data_destroy
-ffffffff819ed6b0 T intel_guc_fini
-ffffffff819ed6f0 T intel_guc_init_params
-ffffffff819ed9d0 T intel_guc_send_mmio
-ffffffff819ede50 T intel_guc_to_host_event_handler_mmio
-ffffffff819edf30 T intel_guc_to_host_process_recv_msg
-ffffffff819edf70 T intel_guc_sample_forcewake
-ffffffff819edff0 T intel_guc_auth_huc
-ffffffff819ee040 T intel_guc_suspend
-ffffffff819ee0b0 t intel_guc_ggtt_offset
-ffffffff819ee2c0 T intel_guc_reset_engine
-ffffffff819ee390 T intel_guc_resume
-ffffffff819ee400 T intel_guc_allocate_vma
-ffffffff819ef000 T intel_guc_ads_create
-ffffffff819ef480 t intel_guc_ggtt_offset
-ffffffff819ef690 T intel_guc_ads_destroy
-ffffffff819f0000 T intel_guc_ct_init_early
-ffffffff819f0070 t ct_incoming_request_worker_func
-ffffffff819f0170 T intel_guc_ct_enable
-ffffffff819f0690 t intel_guc_send_ct
-ffffffff819f1070 t intel_guc_to_host_event_handler_ct
-ffffffff819f1660 T intel_guc_ct_disable
-ffffffff819f17b0 t ctch_fini
-ffffffff819f2000 T intel_guc_fw_init_early
-ffffffff819f20d0 T intel_guc_fw_upload
-ffffffff819f20f0 t guc_fw_xfer
-ffffffff819f3000 T intel_guc_log_init_early
-ffffffff819f3050 t capture_logs_work
-ffffffff819f3060 T intel_guc_log_create
-ffffffff819f3120 T intel_guc_log_destroy
-ffffffff819f3130 T intel_guc_log_set_level
-ffffffff819f32c0 T intel_guc_log_relay_enabled
-ffffffff819f32f0 T intel_guc_log_relay_open
-ffffffff819f3380 T intel_guc_log_relay_flush
-ffffffff819f3410 t guc_log_capture_logs
-ffffffff819f3500 T intel_guc_log_relay_close
-ffffffff819f3660 T intel_guc_log_handle_flush_event
-ffffffff819f4000 T intel_guc_submission_init
-ffffffff819f4710 t inject_preempt_context
-ffffffff819f4870 t guc_stage_desc_pool_destroy
-ffffffff819f4950 T intel_guc_submission_fini
-ffffffff819f4b50 T intel_guc_submission_enable
-ffffffff819f51c0 t guc_set_default_submission
-ffffffff819f5230 T intel_guc_submission_disable
-ffffffff819f5500 t guc_client_alloc
-ffffffff819f5ab0 t guc_client_free
-ffffffff819f5c50 t intel_guc_ggtt_offset
-ffffffff819f5e60 t create_doorbell
-ffffffff819f5f80 t __destroy_doorbell
-ffffffff819f6150 t guc_submission_tasklet
-ffffffff819f6ab0 t guc_submission_park
-ffffffff819f6ac0 t guc_submission_unpark
-ffffffff819f6ad0 t guc_reset_prepare
-ffffffff819f7000 T intel_engine_init_hangcheck
-ffffffff819f7050 T intel_hangcheck_init
-ffffffff819f70b0 t i915_hangcheck_elapsed
-ffffffff819f7800 t __delayed_work_tick
-ffffffff819f7820 t semaphore_passed
-ffffffff819f8000 T is_hdcp_supported
-ffffffff819f8050 T intel_hdcp_init
-ffffffff819f8120 t intel_hdcp_check_work
-ffffffff819f8190 t intel_hdcp_prop_work
-ffffffff819f8200 T intel_hdcp_enable
-ffffffff819f82c0 t _intel_hdcp_enable
-ffffffff819f9cd0 T intel_hdcp_disable
-ffffffff819f9d80 t _intel_hdcp_disable
-ffffffff819f9e90 T intel_hdcp_atomic_check
-ffffffff819f9f00 T intel_hdcp_check_link
-ffffffff819fa110 t __delayed_work_tick
-ffffffff819fb000 T enc_to_intel_hdmi
-ffffffff819fb030 T intel_dp_dual_mode_set_tmds_output
-ffffffff819fb0b0 T intel_hdmi_compute_config
-ffffffff819fb6a0 t hdmi_port_clock_valid
-ffffffff819fb800 T intel_hdmi_handle_sink_scrambling
-ffffffff819fb8a0 T intel_infoframe_init
-ffffffff819fb990 t vlv_write_infoframe
-ffffffff819fbc20 t vlv_set_infoframes
-ffffffff819fbf70 t vlv_infoframe_enabled
-ffffffff819fc030 t g4x_write_infoframe
-ffffffff819fc230 t g4x_set_infoframes
-ffffffff819fc520 t g4x_infoframe_enabled
-ffffffff819fc5b0 t hsw_write_infoframe
-ffffffff819fc9a0 t hsw_set_infoframes
-ffffffff819fcc80 t hsw_infoframe_enabled
-ffffffff819fccf0 t ibx_write_infoframe
-ffffffff819fcf20 t ibx_set_infoframes
-ffffffff819fd250 t ibx_infoframe_enabled
-ffffffff819fd2f0 t cpt_write_infoframe
-ffffffff819fd520 t cpt_set_infoframes
-ffffffff819fd7f0 t cpt_infoframe_enabled
-ffffffff819fd860 T intel_hdmi_init_connector
-ffffffff819fdbd0 T intel_hdmi_init
-ffffffff819fdf10 t pch_disable_hdmi
-ffffffff819fdf50 t pch_post_disable_hdmi
-ffffffff819fdf60 t g4x_disable_hdmi
-ffffffff819fdfb0 t intel_hdmi_get_hw_state
-ffffffff819fe040 t intel_hdmi_get_config
-ffffffff819fe190 t chv_hdmi_pre_pll_enable
-ffffffff819fe1c0 t chv_hdmi_pre_enable
-ffffffff819fe320 t vlv_enable_hdmi
-ffffffff819fe350 t chv_hdmi_post_disable
-ffffffff819fe3a0 t chv_hdmi_post_pll_disable
-ffffffff819fe3b0 t vlv_hdmi_pre_pll_enable
-ffffffff819fe3e0 t vlv_hdmi_pre_enable
-ffffffff819fe540 t vlv_hdmi_post_disable
-ffffffff819fe550 t intel_hdmi_pre_enable
-ffffffff819fe5c0 t cpt_enable_hdmi
-ffffffff819fe7d0 t ibx_enable_hdmi
-ffffffff819fe9e0 t g4x_enable_hdmi
-ffffffff819feae0 t intel_hdmi_set_gcp_infoframe
-ffffffff819fec90 t intel_hdmi_set_avi_infoframe
-ffffffff819fedd0 t intel_hdmi_detect
-ffffffff819fee80 t intel_hdmi_force
-ffffffff819fef10 t intel_hdmi_destroy
-ffffffff819fef50 t intel_hdmi_set_edid
-ffffffff819ff120 t intel_hdmi_get_modes
-ffffffff819ff160 t intel_hdmi_mode_valid
-ffffffff819ff2f0 t intel_hdmi_hdcp_write_an_aksv
-ffffffff819ff430 t intel_hdmi_hdcp_read_bksv
-ffffffff819ff4f0 t intel_hdmi_hdcp_read_bstatus
-ffffffff819ff5b0 t intel_hdmi_hdcp_repeater_present
-ffffffff819ff680 t intel_hdmi_hdcp_read_ri_prime
-ffffffff819ff740 t intel_hdmi_hdcp_read_ksv_ready
-ffffffff819ff810 t intel_hdmi_hdcp_read_ksv_fifo
-ffffffff819ff8d0 t intel_hdmi_hdcp_read_v_prime_part
-ffffffff819ff9b0 t intel_hdmi_hdcp_toggle_signalling
-ffffffff819ffa40 t intel_hdmi_hdcp_check_link
-ffffffff819ffc10 t intel_disable_hdmi
-ffffffff819ffe50 t intel_hdmi_prepare
-ffffffff81a00000 T intel_hpd_pin_default
-ffffffff81a000c0 T intel_encoder_hotplug
-ffffffff81a00140 T intel_hpd_irq_handler
-ffffffff81a00430 T intel_hpd_init
-ffffffff81a00540 T intel_hpd_poll_init
-ffffffff81a00570 T intel_hpd_init_work
-ffffffff81a00640 t i915_hotplug_work_func
-ffffffff81a00850 t i915_digport_work_func
-ffffffff81a009f0 t i915_hpd_poll_init_work
-ffffffff81a00b30 t intel_hpd_irq_storm_reenable_work
-ffffffff81a00c70 T intel_hpd_cancel_work
-ffffffff81a00d40 T intel_hpd_disable
-ffffffff81a00dd0 T intel_hpd_enable
-ffffffff81a00e40 t __delayed_work_tick
-ffffffff81a01000 T intel_huc_init_early
-ffffffff81a01010 T intel_huc_init_misc
-ffffffff81a01050 T intel_huc_auth
-ffffffff81a01410 T intel_huc_check_status
-ffffffff81a02000 T intel_huc_fw_init_early
-ffffffff81a020c0 T intel_huc_fw_upload
-ffffffff81a020e0 t huc_fw_xfer
-ffffffff81a03000 T intel_gmbus_is_valid_pin
-ffffffff81a03100 T intel_i2c_reset
-ffffffff81a03160 T intel_bb_set_bits
-ffffffff81a03280 T intel_bb_set_dir
-ffffffff81a032b0 T intel_bb_read_bits
-ffffffff81a03430 T intel_acquire_bus
-ffffffff81a03610 T intel_release_bus
-ffffffff81a037a0 T intel_send_start
-ffffffff81a037c0 T intel_send_stop
-ffffffff81a037e0 T intel_initiate_xfer
-ffffffff81a03800 T intel_read_byte
-ffffffff81a03820 T intel_write_byte
-ffffffff81a03840 T intel_gmbus_output_aksv
-ffffffff81a03910 t do_gmbus_xfer
-ffffffff81a03e00 T intel_setup_gmbus
-ffffffff81a042a0 T intel_gmbus_get_adapter
-ffffffff81a04410 T intel_gmbus_set_speed
-ffffffff81a04450 T intel_gmbus_force_bit
-ffffffff81a044a0 T intel_teardown_gmbus
-ffffffff81a044d0 t gmbus_xfer_read
-ffffffff81a04780 t gmbus_xfer_write
-ffffffff81a049a0 t gmbus_wait
-ffffffff81a04d50 t gmbus_wait_idle
-ffffffff81a04ed0 t gmbus_xfer
-ffffffff81a04fa0 t gmbus_func
-ffffffff81a05000 T intel_lpe_audio_irq_handler
-ffffffff81a05020 T intel_lpe_audio_init
-ffffffff81a05050 T intel_lpe_audio_teardown
-ffffffff81a05070 T intel_lpe_audio_notify
-ffffffff81a06000 T execlists_unwind_incomplete_requests
-ffffffff81a06040 t __unwind_incomplete_requests
-ffffffff81a06300 T execlists_user_begin
-ffffffff81a06330 T execlists_user_end
-ffffffff81a06360 T execlists_cancel_port_requests
-ffffffff81a064c0 t execlists_context_schedule_out
-ffffffff81a065f0 T intel_logical_ring_cleanup
-ffffffff81a06700 T intel_execlists_set_default_submission
-ffffffff81a067c0 t execlists_submit_request
-ffffffff81a069f0 t execlists_cancel_requests
-ffffffff81a06c50 t execlists_schedule
-ffffffff81a07220 t execlists_submission_tasklet
-ffffffff81a07250 t execlists_reset_prepare
-ffffffff81a073a0 T logical_render_ring_init
-ffffffff81a07850 t gen9_init_render_ring
-ffffffff81a078a0 t gen8_init_render_ring
-ffffffff81a07930 t gen8_init_rcs_context
-ffffffff81a079a0 t gen8_emit_flush_render
-ffffffff81a07b90 t gen8_emit_breadcrumb_rcs
-ffffffff81a07d70 t logical_ring_init
-ffffffff81a07f00 T logical_xcs_ring_init
-ffffffff81a08040 T intel_lr_context_resume
-ffffffff81a08220 t unwind_wa_tail
-ffffffff81a08320 t __execlists_submission_tasklet
-ffffffff81a08d70 t process_csb
-ffffffff81a092f0 t port_assign
-ffffffff81a09420 t nop_submission_tasklet
-ffffffff81a09450 t gen8_init_common_ring
-ffffffff81a095d0 t execlists_reset
-ffffffff81a09700 t execlists_reset_finish
-ffffffff81a097a0 t execlists_context_pin
-ffffffff81a09f50 t execlists_request_alloc
-ffffffff81a09ff0 t gen8_emit_flush
-ffffffff81a0a0d0 t gen8_emit_breadcrumb
-ffffffff81a0a2f0 t gen8_logical_ring_enable_irq
-ffffffff81a0a370 t gen8_logical_ring_disable_irq
-ffffffff81a0a3a0 t gen8_emit_bb_start
-ffffffff81a0a640 t execlists_init_reg_state
-ffffffff81a0aae0 t i915_ggtt_offset
-ffffffff81a0ac30 t execlists_context_unpin
-ffffffff81a0adf0 t execlists_context_destroy
-ffffffff81a0aee0 t gen10_init_indirectctx_bb
-ffffffff81a0af70 t gen9_init_indirectctx_bb
-ffffffff81a0b150 t gen8_init_indirectctx_bb
-ffffffff81a0c000 T lspcon_resume
-ffffffff81a0c160 t lspcon_wait_mode
-ffffffff81a0c2a0 T lspcon_wait_pcon_mode
-ffffffff81a0c2c0 T lspcon_init
-ffffffff81a0d000 T intel_lvds_port_enabled
-ffffffff81a0d080 T intel_get_lvds_encoder
-ffffffff81a0d0e0 T intel_is_dual_link_lvds
-ffffffff81a0d150 T intel_lvds_init
-ffffffff81a0d820 t intel_enable_lvds
-ffffffff81a0d950 t intel_pre_enable_lvds
-ffffffff81a0dc00 t intel_lvds_compute_config
-ffffffff81a0dd10 t pch_disable_lvds
-ffffffff81a0dd30 t pch_post_disable_lvds
-ffffffff81a0dd40 t gmch_disable_lvds
-ffffffff81a0dd70 t intel_lvds_get_hw_state
-ffffffff81a0de30 t intel_lvds_get_config
-ffffffff81a0df30 t intel_no_lvds_dmi_callback
-ffffffff81a0df60 t intel_lvds_detect
-ffffffff81a0df90 t intel_lvds_destroy
-ffffffff81a0dff0 t intel_disable_lvds
-ffffffff81a0e100 t intel_lvds_get_modes
-ffffffff81a0e180 t intel_lvds_mode_valid
-ffffffff81a0e1f0 t intel_dual_link_lvds_callback
-ffffffff81a0f000 T intel_mocs_init_engine
-ffffffff81a0f350 T intel_mocs_init_l3cc_table
-ffffffff81a0f540 T intel_rcs_context_init_mocs
-ffffffff81a10000 T intel_connector_update_modes
-ffffffff81a10030 T intel_ddc_get_modes
-ffffffff81a100b0 T intel_attach_force_audio_property
-ffffffff81a10150 T intel_attach_broadcast_rgb_property
-ffffffff81a101f0 T intel_attach_aspect_ratio_property
-ffffffff81a11000 T intel_opregion_notify_encoder
-ffffffff81a110f0 t swsci
-ffffffff81a113a0 T intel_opregion_notify_adapter
-ffffffff81a113f0 T intel_opregion_asle_intr
-ffffffff81a11440 T intel_opregion_register
-ffffffff81a114b0 T intel_opregion_unregister
-ffffffff81a115d0 T intel_opregion_setup
-ffffffff81a11a60 t asle_work
-ffffffff81a11bf0 T intel_opregion_get_panel_type
-ffffffff81a11c70 t intel_no_opregion_vbt_callback
-ffffffff81a11ca0 t intel_use_opregion_panel_type_callback
-ffffffff81a12000 T intel_overlay_reset
-ffffffff81a12060 t intel_overlay_release_old_vid
-ffffffff81a12280 T intel_overlay_switch_off
-ffffffff81a12580 T intel_overlay_put_image_ioctl
-ffffffff81a13670 T intel_overlay_attrs_ioctl
-ffffffff81a13b70 T intel_setup_overlay
-ffffffff81a13eb0 T intel_cleanup_overlay
-ffffffff81a13f40 T intel_overlay_capture_error_state
-ffffffff81a14010 T intel_overlay_print_error_state
-ffffffff81a143e0 t intel_overlay_release_old_vid_tail
-ffffffff81a14480 t intel_overlay_submit_request
-ffffffff81a14570 t intel_overlay_off_tail
-ffffffff81a146f0 t i915_ggtt_offset
-ffffffff81a15000 T intel_fixed_panel_mode
-ffffffff81a15030 T intel_find_panel_downclock
-ffffffff81a15110 T intel_pch_panel_fitting
-ffffffff81a15290 T intel_gmch_panel_fitting
-ffffffff81a156b0 T intel_panel_set_backlight_acpi
-ffffffff81a15880 T intel_panel_disable_backlight
-ffffffff81a15920 T intel_panel_enable_backlight
-ffffffff81a15a60 T intel_backlight_device_register
-ffffffff81a15be0 T intel_backlight_device_unregister
-ffffffff81a15c30 T intel_panel_setup_backlight
-ffffffff81a15d00 T intel_panel_destroy_backlight
-ffffffff81a15d30 T intel_panel_init
-ffffffff81a15fd0 T intel_panel_fini
-ffffffff81a16030 t intel_backlight_device_update_status
-ffffffff81a16210 t intel_backlight_device_get_brightness
-ffffffff81a16380 t bxt_setup_backlight
-ffffffff81a165b0 t bxt_enable_backlight
-ffffffff81a167f0 t bxt_disable_backlight
-ffffffff81a16940 t bxt_set_backlight
-ffffffff81a16980 t bxt_get_backlight
-ffffffff81a169c0 t bxt_hz_to_pwm
-ffffffff81a169f0 t cnp_setup_backlight
-ffffffff81a16be0 t cnp_enable_backlight
-ffffffff81a16d90 t cnp_disable_backlight
-ffffffff81a16e70 t cnp_hz_to_pwm
-ffffffff81a16eb0 t lpt_setup_backlight
-ffffffff81a170c0 t lpt_enable_backlight
-ffffffff81a172c0 t lpt_disable_backlight
-ffffffff81a173d0 t lpt_set_backlight
-ffffffff81a17440 t lpt_get_backlight
-ffffffff81a17490 t lpt_hz_to_pwm
-ffffffff81a17500 t spt_hz_to_pwm
-ffffffff81a17550 t pch_setup_backlight
-ffffffff81a17740 t pch_enable_backlight
-ffffffff81a17950 t pch_disable_backlight
-ffffffff81a17a50 t pch_set_backlight
-ffffffff81a17ac0 t pch_get_backlight
-ffffffff81a17b10 t pch_hz_to_pwm
-ffffffff81a17b60 t pwm_setup_backlight
-ffffffff81a17bc0 t pwm_enable_backlight
-ffffffff81a17c50 t pwm_disable_backlight
-ffffffff81a17c70 t pwm_set_backlight
-ffffffff81a17ca0 t pwm_get_backlight
-ffffffff81a17cd0 t vlv_setup_backlight
-ffffffff81a17ef0 t vlv_enable_backlight
-ffffffff81a180a0 t vlv_disable_backlight
-ffffffff81a18180 t vlv_set_backlight
-ffffffff81a18210 t vlv_get_backlight
-ffffffff81a182a0 t vlv_hz_to_pwm
-ffffffff81a18340 t i965_setup_backlight
-ffffffff81a185b0 t i965_enable_backlight
-ffffffff81a18780 t i965_disable_backlight
-ffffffff81a18850 t i9xx_set_backlight
-ffffffff81a18970 t i9xx_get_backlight
-ffffffff81a18a20 t i965_hz_to_pwm
-ffffffff81a18a80 t i9xx_setup_backlight
-ffffffff81a18d00 t i9xx_enable_backlight
-ffffffff81a18ed0 t i9xx_disable_backlight
-ffffffff81a18f50 t i9xx_hz_to_pwm
-ffffffff81a19000 T intel_set_memory_cxsr
-ffffffff81a190a0 t _intel_set_memory_cxsr
-ffffffff81a19300 T ilk_wm_max_level
-ffffffff81a19350 T ilk_disable_lp_wm
-ffffffff81a19420 T intel_enable_sagv
-ffffffff81a19510 T sandybridge_pcode_write_timeout
-ffffffff81a196f0 T intel_disable_sagv
-ffffffff81a197f0 T skl_pcode_request
-ffffffff81a19ae0 T intel_can_enable_sagv
-ffffffff81a19d00 T skl_ddb_get_hw_state
-ffffffff81a1a0a0 T skl_check_pipe_max_pixel_rate
-ffffffff81a1a430 t skl_plane_downscale_amount
-ffffffff81a1a590 T skl_wm_level_equals
-ffffffff81a1a5e0 T skl_ddb_allocation_overlaps
-ffffffff81a1a660 T skl_pipe_wm_get_hw_state
-ffffffff81a1a8c0 T skl_wm_get_hw_state
-ffffffff81a1aa20 T g4x_wm_get_hw_state
-ffffffff81a1b120 T g4x_wm_sanitize
-ffffffff81a1b2a0 t g4x_program_watermarks
-ffffffff81a1b5e0 T vlv_wm_get_hw_state
-ffffffff81a1c440 T vlv_wm_sanitize
-ffffffff81a1c5e0 t vlv_program_watermarks
-ffffffff81a1cc90 T ilk_wm_get_hw_state
-ffffffff81a1d0e0 T intel_update_watermarks
-ffffffff81a1d120 T intel_enable_ipc
-ffffffff81a1d1b0 T intel_init_ipc
-ffffffff81a1d270 T ironlake_set_drps
-ffffffff81a1d340 T intel_rps_mark_interactive
-ffffffff81a1d430 t rps_set_power
-ffffffff81a1d790 T gen6_rps_busy
-ffffffff81a1d880 T intel_set_rps
-ffffffff81a1d980 T gen6_rps_idle
-ffffffff81a1da60 t gen6_set_rps
-ffffffff81a1dbb0 T gen6_rps_boost
-ffffffff81a1dd10 t valleyview_set_rps
-ffffffff81a1de40 T i915_chipset_val
-ffffffff81a1dea0 t __i915_chipset_val
-ffffffff81a1e050 T i915_mch_val
-ffffffff81a1e0e0 T i915_update_gfx_val
-ffffffff81a1e200 T i915_gfx_val
-ffffffff81a1e260 t __i915_gfx_val
-ffffffff81a1e4c0 T i915_read_mch_val
-ffffffff81a1e540 T i915_gpu_raise
-ffffffff81a1e5b0 T i915_gpu_lower
-ffffffff81a1e620 T i915_gpu_busy
-ffffffff81a1e680 T i915_gpu_turbo_disable
-ffffffff81a1e780 T intel_gpu_ips_init
-ffffffff81a1e7c0 T intel_gpu_ips_teardown
-ffffffff81a1e7f0 T i915_rc6_ctx_wa_suspend
-ffffffff81a1e830 T i915_rc6_ctx_wa_resume
-ffffffff81a1e8a0 T i915_rc6_ctx_wa_check
-ffffffff81a1e970 T intel_init_gt_powersave
-ffffffff81a1f2e0 T intel_freq_opcode
-ffffffff81a1f380 T sandybridge_pcode_read
-ffffffff81a1f560 T intel_cleanup_gt_powersave
-ffffffff81a1f600 T intel_suspend_gt_powersave
-ffffffff81a1f630 T intel_sanitize_gt_powersave
-ffffffff81a1f680 T intel_disable_gt_powersave
-ffffffff81a1f970 t __intel_disable_rc6
-ffffffff81a1fa60 T intel_enable_gt_powersave
-ffffffff81a21bf0 T intel_init_clock_gating
-ffffffff81a21c10 T intel_suspend_hw
-ffffffff81a21ca0 T intel_init_clock_gating_hooks
-ffffffff81a21e60 t icl_init_clock_gating
-ffffffff81a21ec0 t cnl_init_clock_gating
-ffffffff81a220a0 t cfl_init_clock_gating
-ffffffff81a22150 t skl_init_clock_gating
-ffffffff81a221f0 t kbl_init_clock_gating
-ffffffff81a22300 t bxt_init_clock_gating
-ffffffff81a22400 t glk_init_clock_gating
-ffffffff81a224e0 t bdw_init_clock_gating
-ffffffff81a228b0 t chv_init_clock_gating
-ffffffff81a22a90 t hsw_init_clock_gating
-ffffffff81a22cd0 t ivb_init_clock_gating
-ffffffff81a22fe0 t vlv_init_clock_gating
-ffffffff81a23220 t gen6_init_clock_gating
-ffffffff81a234a0 t ilk_init_clock_gating
-ffffffff81a236f0 t g4x_init_clock_gating
-ffffffff81a237e0 t i965gm_init_clock_gating
-ffffffff81a238c0 t i965g_init_clock_gating
-ffffffff81a23950 t gen3_init_clock_gating
-ffffffff81a23a40 t i85x_init_clock_gating
-ffffffff81a23ab0 t i830_init_clock_gating
-ffffffff81a23ae0 t nop_init_clock_gating
-ffffffff81a23b10 T intel_init_pm
-ffffffff81a244a0 t skl_initial_wm
-ffffffff81a24590 t skl_atomic_update_crtc_wm
-ffffffff81a24b40 t skl_compute_wm
-ffffffff81a260a0 t ilk_compute_pipe_wm
-ffffffff81a264a0 t ilk_compute_intermediate_wm
-ffffffff81a26660 t ilk_initial_watermarks
-ffffffff81a266d0 t ilk_optimize_watermarks
-ffffffff81a26740 t vlv_compute_pipe_wm
-ffffffff81a27350 t vlv_compute_intermediate_wm
-ffffffff81a276d0 t vlv_initial_watermarks
-ffffffff81a27780 t vlv_optimize_watermarks
-ffffffff81a27860 t vlv_atomic_update_fifo
-ffffffff81a27a80 t g4x_compute_pipe_wm
-ffffffff81a28550 t g4x_compute_intermediate_wm
-ffffffff81a289b0 t g4x_initial_watermarks
-ffffffff81a28a30 t g4x_optimize_watermarks
-ffffffff81a28ae0 t pineview_update_wm
-ffffffff81a29020 t i965_update_wm
-ffffffff81a29340 t i9xx_update_wm
-ffffffff81a29830 t i9xx_get_fifo_size
-ffffffff81a29890 t i845_update_wm
-ffffffff81a299f0 t i845_get_fifo_size
-ffffffff81a29a40 t i830_get_fifo_size
-ffffffff81a29ab0 T intel_gpu_freq
-ffffffff81a29b70 T intel_pm_setup
-ffffffff81a29bf0 T intel_rc6_residency_ns
-ffffffff81a29e00 T intel_get_cagf
-ffffffff81a29e50 t chv_set_memory_dvfs
-ffffffff81a29fe0 t gen6_set_rps_thresholds
-ffffffff81a2a130 t gen9_init_clock_gating
-ffffffff81a2a320 t g4x_disable_trickle_feed
-ffffffff81a2a470 t cpt_init_clock_gating
-ffffffff81a2a5e0 t intel_read_wm_latency
-ffffffff81a2aa20 t skl_compute_plane_wm_params
-ffffffff81a2ae30 t skl_compute_wm_levels
-ffffffff81a2b420 t ilk_compute_wm_level
-ffffffff81a2b900 t ilk_validate_pipe_wm
-ffffffff81a2ba50 t ilk_program_watermarks
-ffffffff81a2c770 t ilk_wm_merge
-ffffffff81a2d000 T intel_psr_irq_control
-ffffffff81a2d050 T intel_psr_irq_handler
-ffffffff81a2d1c0 T intel_psr_init_dpcd
-ffffffff81a2d300 T intel_psr_compute_config
-ffffffff81a2d490 T intel_psr_enable
-ffffffff81a2d890 t intel_psr_activate
-ffffffff81a2db50 T intel_psr_disable
-ffffffff81a2dc10 t intel_psr_disable_locked
-ffffffff81a2de10 T intel_psr_wait_for_idle
-ffffffff81a2de90 T intel_psr_invalidate
-ffffffff81a2df80 t intel_psr_exit
-ffffffff81a2e080 T intel_psr_flush
-ffffffff81a2e1f0 T intel_psr_init
-ffffffff81a2e2d0 t intel_psr_work
-ffffffff81a2e3c0 T intel_psr_short_pulse
-ffffffff81a2f000 T intel_ring_update_space
-ffffffff81a2f090 T intel_ring_pin
-ffffffff81a2f350 T intel_ring_reset
-ffffffff81a2f430 T intel_ring_unpin
-ffffffff81a2f680 T intel_engine_create_ring
-ffffffff81a2f8d0 T intel_ring_free
-ffffffff81a2f930 T intel_engine_cleanup
-ffffffff81a2fa20 T intel_legacy_submission_resume
-ffffffff81a2fc90 T intel_ring_wait_for_space
-ffffffff81a2fd90 t wait_for_space
-ffffffff81a2ff70 T intel_ring_begin
-ffffffff81a303d0 T intel_ring_cacheline_align
-ffffffff81a305a0 T intel_init_render_ring_buffer
-ffffffff81a306b0 t intel_ring_default_vfuncs
-ffffffff81a30a10 t intel_rcs_ctx_init
-ffffffff81a30a60 t gen7_render_ring_flush
-ffffffff81a30ba0 t gen6_render_ring_flush
-ffffffff81a30d90 t gen4_render_ring_flush
-ffffffff81a30f10 t gen2_render_ring_flush
-ffffffff81a30fd0 t hsw_emit_bb_start
-ffffffff81a310a0 t init_render_ring
-ffffffff81a31250 t intel_init_ring_buffer
-ffffffff81a313f0 T intel_init_bsd_ring_buffer
-ffffffff81a31480 t gen6_bsd_set_default_submission
-ffffffff81a314d0 t gen6_bsd_ring_flush
-ffffffff81a315a0 t bsd_ring_flush
-ffffffff81a31650 T intel_init_blt_ring_buffer
-ffffffff81a31690 t gen6_ring_flush
-ffffffff81a31760 T intel_init_vebox_ring_buffer
-ffffffff81a317c0 t hsw_vebox_irq_enable
-ffffffff81a31810 t hsw_vebox_irq_disable
-ffffffff81a31860 t init_ring_common
-ffffffff81a31f20 t reset_prepare
-ffffffff81a31f60 t reset_ring
-ffffffff81a320f0 t reset_finish
-ffffffff81a32120 t intel_ring_context_pin
-ffffffff81a325a0 t ring_request_alloc
-ffffffff81a32f10 t i9xx_emit_breadcrumb
-ffffffff81a32fa0 t gen6_sema_emit_breadcrumb
-ffffffff81a33110 t i9xx_set_default_submission
-ffffffff81a33160 t gen6_emit_bb_start
-ffffffff81a33230 t i965_emit_bb_start
-ffffffff81a33300 t i830_emit_bb_start
-ffffffff81a334d0 t i915_emit_bb_start
-ffffffff81a33590 t gen6_irq_enable
-ffffffff81a335e0 t gen6_irq_disable
-ffffffff81a33630 t gen6_seqno_barrier
-ffffffff81a33680 t gen5_irq_enable
-ffffffff81a336a0 t gen5_irq_disable
-ffffffff81a336c0 t gen5_seqno_barrier
-ffffffff81a336e0 t i9xx_irq_enable
-ffffffff81a33760 t i9xx_irq_disable
-ffffffff81a337a0 t i8xx_irq_enable
-ffffffff81a33810 t i8xx_irq_disable
-ffffffff81a33850 t gen6_ring_sync_to
-ffffffff81a33950 t gen6_signal
-ffffffff81a33b80 t stop_ring
-ffffffff81a33d40 t i915_ggtt_offset
-ffffffff81a33e90 t intel_ring_context_unpin
-ffffffff81a33f10 t intel_ring_context_destroy
-ffffffff81a34000 t __context_unpin
-ffffffff81a340e0 t assert_ring_tail_valid
-ffffffff81a341b0 t i9xx_submit_request
-ffffffff81a34290 t cancel_requests
-ffffffff81a34360 t gen6_bsd_submit_request
-ffffffff81a35000 T intel_display_power_domain_str
-ffffffff81a35060 T __intel_display_power_is_enabled
-ffffffff81a35100 T intel_display_power_is_enabled
-ffffffff81a351d0 T intel_display_set_init_power
-ffffffff81a35240 T intel_display_power_get
-ffffffff81a35370 T intel_display_power_put
-ffffffff81a35500 T gen9_sanitize_dc_state
-ffffffff81a35580 T bxt_enable_dc9
-ffffffff81a35690 t gen9_set_dc_state
-ffffffff81a35840 T bxt_disable_dc9
-ffffffff81a358d0 T gen9_enable_dc5
-ffffffff81a35b20 T chv_phy_powergate_ch
-ffffffff81a35c00 t assert_chv_phy_status
-ffffffff81a35f10 T chv_phy_powergate_lanes
-ffffffff81a36140 T intel_runtime_pm_get
-ffffffff81a361d0 T intel_display_power_get_if_enabled
-ffffffff81a363f0 T intel_runtime_pm_get_if_in_use
-ffffffff81a36480 T intel_runtime_pm_put
-ffffffff81a36510 T intel_display_power_well_is_enabled
-ffffffff81a36570 T intel_power_domains_init
-ffffffff81a36900 T intel_power_domains_fini
-ffffffff81a36980 T icl_dbuf_slices_update
-ffffffff81a36b50 T bxt_display_core_init
-ffffffff81a36d20 T bxt_display_core_uninit
-ffffffff81a36e60 T intel_power_domains_init_hw
-ffffffff81a37a90 T intel_power_domains_suspend
-ffffffff81a38010 T intel_power_domains_verify_state
-ffffffff81a381a0 T intel_runtime_pm_get_noresume
-ffffffff81a38230 T intel_runtime_pm_enable
-ffffffff81a38260 t i9xx_power_well_sync_hw_noop
-ffffffff81a38290 t i9xx_always_on_power_well_noop
-ffffffff81a382c0 t i9xx_always_on_power_well_enabled
-ffffffff81a382f0 t hsw_power_well_sync_hw
-ffffffff81a38440 t hsw_power_well_enable
-ffffffff81a38720 t hsw_power_well_disable
-ffffffff81a387e0 t hsw_power_well_enabled
-ffffffff81a38870 t hsw_wait_for_power_well_disable
-ffffffff81a38af0 t gen9_dc_off_power_well_enable
-ffffffff81a38ca0 t gen9_dc_off_power_well_disable
-ffffffff81a38ec0 t gen9_dc_off_power_well_enabled
-ffffffff81a38f10 t icl_combo_phy_aux_power_well_enable
-ffffffff81a39080 t icl_combo_phy_aux_power_well_disable
-ffffffff81a39170 t bxt_dpio_cmn_power_well_enable
-ffffffff81a39180 t bxt_dpio_cmn_power_well_disable
-ffffffff81a39190 t bxt_dpio_cmn_power_well_enabled
-ffffffff81a391a0 t chv_pipe_power_well_enable
-ffffffff81a39200 t chv_pipe_power_well_disable
-ffffffff81a39290 t chv_pipe_power_well_enabled
-ffffffff81a39360 t chv_set_pipe_power_well
-ffffffff81a39540 t vlv_display_power_well_init
-ffffffff81a397b0 t chv_dpio_cmn_power_well_enable
-ffffffff81a39950 t chv_dpio_cmn_power_well_disable
-ffffffff81a39a40 t vlv_power_well_enabled
-ffffffff81a39b10 t vlv_set_power_well
-ffffffff81a39cf0 t vlv_display_power_well_enable
-ffffffff81a39d50 t vlv_display_power_well_disable
-ffffffff81a39df0 t vlv_power_well_enable
-ffffffff81a39e10 t vlv_power_well_disable
-ffffffff81a39e20 t vlv_dpio_cmn_power_well_enable
-ffffffff81a39ed0 t vlv_dpio_cmn_power_well_disable
-ffffffff81a39fa0 t i830_pipes_power_well_sync_hw
-ffffffff81a3a080 t i830_pipes_power_well_enable
-ffffffff81a3a130 t i830_pipes_power_well_disable
-ffffffff81a3a160 t i830_pipes_power_well_enabled
-ffffffff81a3a1f0 t cnl_set_procmon_ref_values
-ffffffff81a3b000 T intel_sdvo_port_enabled
-ffffffff81a3b0a0 T intel_sdvo_init
-ffffffff81a3b720 t intel_sdvo_compute_config
-ffffffff81a3bae0 t pch_disable_sdvo
-ffffffff81a3bb10 t pch_post_disable_sdvo
-ffffffff81a3bb20 t intel_disable_sdvo
-ffffffff81a3bca0 t intel_sdvo_pre_enable
-ffffffff81a3c590 t intel_enable_sdvo
-ffffffff81a3c730 t intel_sdvo_get_hw_state
-ffffffff81a3c810 t intel_sdvo_get_config
-ffffffff81a3ca90 t intel_sdvo_ddc_proxy_xfer
-ffffffff81a3cb30 t intel_sdvo_ddc_proxy_func
-ffffffff81a3cb60 t __intel_sdvo_write_cmd
-ffffffff81a3cf90 t intel_sdvo_enc_destroy
-ffffffff81a3cfc0 t intel_sdvo_get_preferred_input_mode
-ffffffff81a3d2c0 t intel_sdvo_get_dtd_from_mode
-ffffffff81a3d430 t intel_sdvo_read_response
-ffffffff81a3d7e0 t intel_sdvo_write_sdvox
-ffffffff81a3d9c0 t intel_sdvo_write_infoframe
-ffffffff81a3db40 t intel_sdvo_dvi_init
-ffffffff81a3dd90 t intel_sdvo_tv_init
-ffffffff81a3e080 t intel_sdvo_analog_init
-ffffffff81a3e1b0 t intel_sdvo_lvds_init
-ffffffff81a3e2f0 t intel_sdvo_hotplug
-ffffffff81a3e330 t intel_sdvo_connector_get_hw_state
-ffffffff81a3e3c0 t intel_sdvo_detect
-ffffffff81a3e6a0 t intel_sdvo_connector_register
-ffffffff81a3e6b0 t intel_sdvo_connector_unregister
-ffffffff81a3e6c0 t intel_sdvo_destroy
-ffffffff81a3e6f0 t intel_sdvo_connector_duplicate_state
-ffffffff81a3e770 t intel_sdvo_connector_atomic_set_property
-ffffffff81a3e940 t intel_sdvo_connector_atomic_get_property
-ffffffff81a3eb50 t intel_sdvo_get_modes
-ffffffff81a3edd0 t intel_sdvo_mode_valid
-ffffffff81a3ee60 t intel_sdvo_atomic_check
-ffffffff81a3ef10 t intel_sdvo_create_enhance_property
-ffffffff81a40000 T vlv_punit_read
-ffffffff81a400a0 t vlv_sideband_rw
-ffffffff81a40240 T vlv_punit_write
-ffffffff81a402e0 T vlv_bunit_read
-ffffffff81a40330 T vlv_bunit_write
-ffffffff81a40380 T vlv_nc_read
-ffffffff81a40420 T vlv_iosf_sb_read
-ffffffff81a40470 T vlv_iosf_sb_write
-ffffffff81a404c0 T vlv_cck_read
-ffffffff81a40510 T vlv_cck_write
-ffffffff81a40560 T vlv_ccu_read
-ffffffff81a405b0 T vlv_ccu_write
-ffffffff81a40600 T vlv_dpio_read
-ffffffff81a40690 T vlv_dpio_write
-ffffffff81a406e0 T intel_sbi_read
-ffffffff81a40890 T intel_sbi_write
-ffffffff81a40a40 T vlv_flisdsi_read
-ffffffff81a40a90 T vlv_flisdsi_write
-ffffffff81a41000 T gen3_stolen_base
-ffffffff81a41050 T gen11_stolen_base
-ffffffff81a410d0 T i830_stolen_size
-ffffffff81a41140 T gen3_stolen_size
-ffffffff81a411b0 T gen6_stolen_size
-ffffffff81a41200 T chv_stolen_size
-ffffffff81a41270 T gen8_stolen_size
-ffffffff81a412c0 T gen9_stolen_size
-ffffffff81a41330 T intel_init_stolen_res
-ffffffff81a42000 T intel_usecs_to_scanlines
-ffffffff81a42050 T intel_pipe_update_start
-ffffffff81a42430 T intel_pipe_update_end
-ffffffff81a425d0 T skl_update_plane
-ffffffff81a42a00 t intel_plane_ggtt_offset
-ffffffff81a42b70 T skl_disable_plane
-ffffffff81a42bf0 T skl_plane_get_hw_state
-ffffffff81a42cb0 T intel_sprite_set_colorkey_ioctl
-ffffffff81a42f90 T skl_plane_has_ccs
-ffffffff81a42ff0 T intel_sprite_plane_create
-ffffffff81a43430 t vlv_update_plane
-ffffffff81a43870 t vlv_disable_plane
-ffffffff81a438f0 t vlv_plane_get_hw_state
-ffffffff81a439a0 t ivb_update_plane
-ffffffff81a43c00 t ivb_disable_plane
-ffffffff81a43ca0 t ivb_plane_get_hw_state
-ffffffff81a43d50 t g4x_update_plane
-ffffffff81a43f80 t g4x_disable_plane
-ffffffff81a44010 t g4x_plane_get_hw_state
-ffffffff81a440c0 t intel_check_sprite_plane
-ffffffff81a44790 t skl_plane_format_mod_supported
-ffffffff81a448c0 t vlv_sprite_format_mod_supported
-ffffffff81a44990 t snb_sprite_format_mod_supported
-ffffffff81a44a20 t g4x_sprite_format_mod_supported
-ffffffff81a45000 T intel_tv_init
-ffffffff81a45390 t intel_tv_compute_config
-ffffffff81a45400 t intel_tv_get_config
-ffffffff81a45440 t intel_tv_pre_enable
-ffffffff81a45ca0 t intel_enable_tv
-ffffffff81a45d10 t intel_disable_tv
-ffffffff81a45d70 t intel_tv_get_hw_state
-ffffffff81a45dd0 t intel_tv_destroy
-ffffffff81a45e00 t intel_tv_get_modes
-ffffffff81a46000 t intel_tv_detect
-ffffffff81a46340 t intel_tv_mode_valid
-ffffffff81a463e0 t intel_tv_atomic_check
-ffffffff81a47000 T intel_uc_init_early
-ffffffff81a472c0 T intel_uc_cleanup_early
-ffffffff81a47310 T intel_uc_init_mmio
-ffffffff81a47330 T intel_uc_init_misc
-ffffffff81a47440 T intel_uc_fini_misc
-ffffffff81a474e0 T intel_uc_init
-ffffffff81a47600 T intel_uc_fini
-ffffffff81a476f0 T intel_uc_sanitize
-ffffffff81a478a0 T intel_uc_init_hw
-ffffffff81a47c80 T intel_uc_fini_hw
-ffffffff81a47dc0 T intel_uc_suspend
-ffffffff81a47e70 T intel_uc_resume
-ffffffff81a48000 T intel_uc_fw_fetch
-ffffffff81a483d0 T intel_uc_fw_upload
-ffffffff81a48580 T intel_uc_fw_fini
-ffffffff81a485e0 T intel_uc_fw_dump
-ffffffff81a49000 T intel_uncore_forcewake_domain_to_str
-ffffffff81a49060 T intel_uncore_fw_release_timer
-ffffffff81a49150 T intel_uncore_edram_size
-ffffffff81a491c0 T intel_uncore_suspend
-ffffffff81a49200 t intel_uncore_forcewake_reset
-ffffffff81a49410 T intel_uncore_resume_early
-ffffffff81a49440 t __intel_uncore_early_sanitize
-ffffffff81a495c0 T intel_uncore_runtime_resume
-ffffffff81a495f0 T intel_uncore_sanitize
-ffffffff81a49600 T intel_uncore_forcewake_get
-ffffffff81a49740 T intel_uncore_forcewake_user_get
-ffffffff81a49850 T intel_uncore_forcewake_get__locked
-ffffffff81a49920 T intel_uncore_forcewake_user_put
-ffffffff81a49af0 T intel_uncore_unclaimed_mmio
-ffffffff81a49bc0 T intel_uncore_forcewake_put__locked
-ffffffff81a49cc0 T intel_uncore_forcewake_put
-ffffffff81a49de0 T assert_forcewakes_inactive
-ffffffff81a49e30 T assert_forcewakes_active
-ffffffff81a49f00 T intel_uncore_init
-ffffffff81a4adf0 t i915_pmic_bus_access_notifier
-ffffffff81a4ae60 t gen2_write8
-ffffffff81a4af00 t gen2_write16
-ffffffff81a4afb0 t gen2_write32
-ffffffff81a4b050 t gen2_read8
-ffffffff81a4b0f0 t gen2_read16
-ffffffff81a4b190 t gen2_read32
-ffffffff81a4b230 t gen2_read64
-ffffffff81a4b2d0 t gen5_write8
-ffffffff81a4b390 t gen5_write16
-ffffffff81a4b450 t gen5_write32
-ffffffff81a4b510 t gen5_read8
-ffffffff81a4b5c0 t gen5_read16
-ffffffff81a4b670 t gen5_read32
-ffffffff81a4b720 t gen5_read64
-ffffffff81a4b7d0 t gen6_write8
-ffffffff81a4ba20 t gen6_write16
-ffffffff81a4bc70 t gen6_write32
-ffffffff81a4bec0 t fwtable_read8
-ffffffff81a4c1e0 t fwtable_read16
-ffffffff81a4c500 t fwtable_read32
-ffffffff81a4c820 t fwtable_read64
-ffffffff81a4cb40 t gen6_read8
-ffffffff81a4cdc0 t gen6_read16
-ffffffff81a4d040 t gen6_read32
-ffffffff81a4d2c0 t gen6_read64
-ffffffff81a4d540 t fwtable_write8
-ffffffff81a4d8a0 t fwtable_write16
-ffffffff81a4dc00 t fwtable_write32
-ffffffff81a4df60 t gen8_write8
-ffffffff81a4e220 t gen8_write16
-ffffffff81a4e4e0 t gen8_write32
-ffffffff81a4e7a0 t gen11_fwtable_write8
-ffffffff81a4eb10 t gen11_fwtable_write16
-ffffffff81a4ee80 t gen11_fwtable_write32
-ffffffff81a4f1f0 t gen11_fwtable_read8
-ffffffff81a4f520 t gen11_fwtable_read16
-ffffffff81a4f850 t gen11_fwtable_read32
-ffffffff81a4fb80 t gen11_fwtable_read64
-ffffffff81a4feb0 T intel_uncore_prune
-ffffffff81a50340 T intel_uncore_fini
-ffffffff81a50360 T i915_reg_read_ioctl
-ffffffff81a50510 T __intel_wait_for_register_fw
-ffffffff81a50870 t local_clock
-ffffffff81a508c0 T __intel_wait_for_register
-ffffffff81a50bc0 T intel_uncore_forcewake_for_reg
-ffffffff81a510c0 T intel_gpu_reset
-ffffffff81a512e0 T intel_has_gpu_reset
-ffffffff81a51340 T intel_has_reset_engine
-ffffffff81a51380 T intel_reset_guc
-ffffffff81a51470 T intel_uncore_arm_unclaimed_mmio_detection
-ffffffff81a51560 t fw_domains_get_with_fallback
-ffffffff81a51a70 t fw_domains_put
-ffffffff81a51b60 t fw_domains_get
-ffffffff81a51ed0 t fw_domains_get_with_thread_status
-ffffffff81a51fe0 t fw_domain_wait_ack_with_fallback
-ffffffff81a52230 t __gen6_gt_wait_for_fifo
-ffffffff81a52320 t ___force_wake_auto
-ffffffff81a523f0 t gen8_reset_engines
-ffffffff81a52650 t gen6_reset_engines
-ffffffff81a52720 t ironlake_do_reset
-ffffffff81a52820 t g4x_do_reset
-ffffffff81a52af0 t g33_do_reset
-ffffffff81a52c00 t i915_do_reset
-ffffffff81a53000 T intel_wopcm_init_early
-ffffffff81a53030 T intel_wopcm_init
-ffffffff81a53220 T intel_wopcm_init_hw
-ffffffff81a54000 T intel_ctx_workarounds_init
-ffffffff81a54610 T intel_ctx_workarounds_emit
-ffffffff81a54780 T intel_gt_workarounds_apply
-ffffffff81a551b0 T intel_whitelist_workarounds_apply
-ffffffff81a554c0 t wa_add
-ffffffff81a55730 t gen9_ctx_workarounds_init
-ffffffff81a558f0 t gen9_gt_workarounds_apply
-ffffffff81a55af0 t wa_init_mcr
-ffffffff81a56000 T pixel_format_from_register_bits
-ffffffff81a56060 T vlv_dsi_wait_for_fifo_empty
-ffffffff81a560f0 T vlv_dsi_init
-ffffffff81a565b0 t intel_dsi_compute_config
-ffffffff81a566c0 t intel_dsi_pre_enable
-ffffffff81a58220 t intel_dsi_enable_nop
-ffffffff81a58250 t intel_dsi_disable
-ffffffff81a584a0 t intel_dsi_post_disable
-ffffffff81a593f0 t intel_dsi_get_hw_state
-ffffffff81a59650 t intel_dsi_get_config
-ffffffff81a59d30 t intel_dsi_encoder_destroy
-ffffffff81a59d40 t intel_dsi_prepare
-ffffffff81a5a9b0 t intel_dsi_host_attach
-ffffffff81a5a9e0 t intel_dsi_host_detach
-ffffffff81a5aa10 t intel_dsi_host_transfer
-ffffffff81a5ae10 t intel_dsi_connector_destroy
-ffffffff81a5ae50 t intel_dsi_get_modes
-ffffffff81a5aec0 t intel_dsi_mode_valid
-ffffffff81a5b000 T vlv_dsi_pll_compute
-ffffffff81a5b370 T vlv_dsi_pll_enable
-ffffffff81a5b530 T vlv_dsi_pll_disable
-ffffffff81a5b590 T bxt_dsi_pll_is_enabled
-ffffffff81a5b630 T bxt_dsi_pll_disable
-ffffffff81a5b6f0 T vlv_dsi_get_pclk
-ffffffff81a5b8d0 T bxt_dsi_get_pclk
-ffffffff81a5b9b0 T vlv_dsi_reset_clocks
-ffffffff81a5ba40 T bxt_dsi_pll_compute
-ffffffff81a5bb30 T bxt_dsi_pll_enable
-ffffffff81a5be80 T bxt_dsi_reset_clocks
-ffffffff81a5c000 T atom_execute_table_scratch_unlocked
-ffffffff81a5c0a0 t atom_execute_table_locked
-ffffffff81a5c420 T atom_execute_table
-ffffffff81a5c4d0 T atom_parse
-ffffffff81a5c720 T atom_destroy
-ffffffff81a5c760 T atom_asic_init
-ffffffff81a5c970 T atom_parse_data_header
-ffffffff81a5ca20 T atom_parse_cmd_header
-ffffffff81a5cab0 T atom_allocate_fb_scratch
-ffffffff81a5cb70 t atom_op_move
-ffffffff81a5cd50 t atom_op_and
-ffffffff81a5cf20 t atom_op_or
-ffffffff81a5d0f0 t atom_op_shift_left
-ffffffff81a5d310 t atom_op_shift_right
-ffffffff81a5d530 t atom_op_mul
-ffffffff81a5d690 t atom_op_div
-ffffffff81a5d810 t atom_op_add
-ffffffff81a5d9e0 t atom_op_sub
-ffffffff81a5dbc0 t atom_op_setport
-ffffffff81a5dd30 t atom_op_setregblock
-ffffffff81a5ddf0 t atom_op_setfbbase
-ffffffff81a5dec0 t atom_op_compare
-ffffffff81a5e0d0 t atom_op_switch
-ffffffff81a5e320 t atom_op_jump
-ffffffff81a5e5c0 t atom_op_test
-ffffffff81a5e790 t atom_op_delay
-ffffffff81a5e880 t atom_op_calltable
-ffffffff81a5e9d0 t atom_op_repeat
-ffffffff81a5ea00 t atom_op_clear
-ffffffff81a5eb10 t atom_op_nop
-ffffffff81a5eb40 t atom_op_eot
-ffffffff81a5eb70 t atom_op_mask
-ffffffff81a5ee40 t atom_op_postcard
-ffffffff81a5eee0 t atom_op_beep
-ffffffff81a5ef00 t atom_op_savereg
-ffffffff81a5ef30 t atom_op_restorereg
-ffffffff81a5ef60 t atom_op_setdatablock
-ffffffff81a5f0a0 t atom_op_xor
-ffffffff81a5f270 t atom_op_shl
-ffffffff81a5f480 t atom_op_shr
-ffffffff81a5f690 t atom_op_debug
-ffffffff81a5f6c0 t atom_put_dst
-ffffffff81a5fbc0 t atom_get_src_int
-ffffffff81a60360 t atom_iio_execute
-ffffffff81a61000 T atombios_crtc_dpms
-ffffffff81a611b0 t atombios_blank_crtc
-ffffffff81a612d0 T atombios_crtc_set_base
-ffffffff81a61320 t dce4_crtc_do_set_base
-ffffffff81a61e20 t avivo_crtc_do_set_base
-ffffffff81a62640 T atombios_crtc_set_base_atomic
-ffffffff81a62680 T radeon_atom_disp_eng_pll_init
-ffffffff81a62760 t atombios_crtc_set_disp_eng_pll
-ffffffff81a62870 t atombios_crtc_program_ss
-ffffffff81a62ad0 T atombios_crtc_mode_set
-ffffffff81a63640 T radeon_atombios_init_crtc
-ffffffff81a63730 t radeon_bo_reserve
-ffffffff81a638e0 t radeon_bo_unreserve
-ffffffff81a639d0 t atombios_disable_ss
-ffffffff81a63b40 t atombios_crtc_program_pll
-ffffffff81a63e00 t atombios_crtc_prepare
-ffffffff81a63eb0 t atombios_crtc_commit
-ffffffff81a63f20 t atombios_crtc_mode_fixup
-ffffffff81a64ce0 t atombios_crtc_disable
-ffffffff81a64f40 t radeon_get_shared_nondp_ppll
-ffffffff81a66000 T radeon_atom_copy_swap
-ffffffff81a66010 T radeon_dp_aux_init
-ffffffff81a660e0 t radeon_dp_aux_transfer_atom
-ffffffff81a662c0 T radeon_dp_getsinktype
-ffffffff81a66330 T radeon_dp_getdpcd
-ffffffff81a66410 T radeon_dp_get_panel_mode
-ffffffff81a66510 T radeon_dp_set_link_config
-ffffffff81a66590 t radeon_dp_get_dp_link_config
-ffffffff81a66720 T radeon_dp_mode_valid_helper
-ffffffff81a667d0 T radeon_dp_needs_link_train
-ffffffff81a66840 T radeon_dp_set_rx_power_state
-ffffffff81a668c0 T radeon_dp_link_train
-ffffffff81a67100 t radeon_process_aux_ch
-ffffffff81a68000 T atombios_get_backlight_level
-ffffffff81a68080 T atombios_set_backlight_level
-ffffffff81a68240 T atombios_dig_transmitter_setup
-ffffffff81a68260 T radeon_atom_backlight_init
-ffffffff81a68420 t radeon_atom_backlight_get_brightness
-ffffffff81a68490 T atombios_dvo_setup
-ffffffff81a68660 T atombios_digital_setup
-ffffffff81a688e0 T atombios_get_encoder_mode
-ffffffff81a68bc0 T atombios_dig_encoder_setup2
-ffffffff81a69000 T atombios_dig_encoder_setup
-ffffffff81a69020 T atombios_dig_transmitter_setup2
-ffffffff81a699f0 T atombios_set_edp_panel_power
-ffffffff81a69b10 T atombios_set_mst_encoder_crtc_source
-ffffffff81a69bf0 T radeon_atom_release_dig_encoder
-ffffffff81a69c30 T radeon_atom_pick_dig_encoder
-ffffffff81a69e50 T radeon_atom_encoder_init
-ffffffff81a69f20 t atombios_external_encoder_setup
-ffffffff81a6a170 T radeon_atom_ext_encoder_setup_ddc
-ffffffff81a6a1c0 T radeon_enc_destroy
-ffffffff81a6a260 T radeon_add_atom_encoder
-ffffffff81a6a6b0 t radeon_atom_backlight_update_status
-ffffffff81a6a710 t radeon_atom_encoder_dpms
-ffffffff81a6a9f0 t radeon_atom_mode_fixup
-ffffffff81a6ab50 t radeon_atom_encoder_prepare
-ffffffff81a6b010 t radeon_atom_encoder_commit
-ffffffff81a6b040 t radeon_atom_encoder_mode_set
-ffffffff81a6b3d0 t radeon_atom_dig_detect
-ffffffff81a6b4d0 t radeon_atom_encoder_disable
-ffffffff81a6b6f0 t radeon_atom_encoder_dpms_avivo
-ffffffff81a6b940 t radeon_atom_encoder_dpms_dig
-ffffffff81a6be80 t atombios_yuv_setup
-ffffffff81a6bfd0 t atombios_tv_setup
-ffffffff81a6c080 t radeon_atom_dac_detect
-ffffffff81a6c230 t radeon_atom_ext_dpms
-ffffffff81a6c260 t radeon_atom_ext_prepare
-ffffffff81a6c290 t radeon_atom_ext_commit
-ffffffff81a6c2c0 t radeon_atom_ext_mode_set
-ffffffff81a6c2f0 t radeon_atom_ext_disable
-ffffffff81a6d000 T radeon_atom_hw_i2c_xfer
-ffffffff81a6d370 T radeon_atom_hw_i2c_func
-ffffffff81a6e000 T btc_get_max_clock_from_voltage_dependency_table
-ffffffff81a6e0d0 T btc_apply_voltage_dependency_rules
-ffffffff81a6e150 T btc_skip_blacklist_clocks
-ffffffff81a6e240 T btc_adjust_clock_combinations
-ffffffff81a6e350 T btc_apply_voltage_delta_rules
-ffffffff81a6e480 T btc_program_mgcg_hw_sequence
-ffffffff81a6e5a0 T btc_dpm_enabled
-ffffffff81a6e5b0 T btc_notify_uvd_to_smc
-ffffffff81a6e640 T btc_reset_to_default
-ffffffff81a6e690 T btc_read_arb_registers
-ffffffff81a6e760 T btc_dpm_vblank_too_short
-ffffffff81a6e7c0 T btc_dpm_pre_set_power_state
-ffffffff81a6f720 T btc_dpm_set_power_state
-ffffffff81a6fc00 T btc_dpm_post_set_power_state
-ffffffff81a6fd20 T btc_dpm_enable
-ffffffff81a70f70 t btc_enable_dynamic_pcie_gen2
-ffffffff81a71110 T btc_dpm_disable
-ffffffff81a71620 T btc_dpm_setup_asic
-ffffffff81a71740 T btc_dpm_init
-ffffffff81a71b40 T btc_dpm_fini
-ffffffff81a71be0 T btc_dpm_debugfs_print_current_performance_level
-ffffffff81a71c20 T btc_dpm_get_current_sclk
-ffffffff81a71cb0 T btc_dpm_get_current_mclk
-ffffffff81a71d40 T btc_dpm_get_sclk
-ffffffff81a71d90 T btc_dpm_get_mclk
-ffffffff81a72000 T ci_dpm_powergate_uvd
-ffffffff81a724a0 T ci_dpm_vblank_too_short
-ffffffff81a72520 T ci_fan_ctrl_get_fan_speed_percent
-ffffffff81a725c0 T ci_fan_ctrl_set_fan_speed_percent
-ffffffff81a72690 T ci_fan_ctrl_set_mode
-ffffffff81a72850 t ci_fan_ctrl_set_static_mode
-ffffffff81a72910 t ci_thermal_start_smc_fan_control
-ffffffff81a72bb0 T ci_fan_ctrl_get_mode
-ffffffff81a72c00 T ci_dpm_force_performance_level
-ffffffff81a73600 t ci_send_msg_to_smc
-ffffffff81a736e0 t ci_upload_dpm_level_enable_mask
-ffffffff81a73ad0 T ci_dpm_pre_set_power_state
-ffffffff81a73dc0 T ci_dpm_post_set_power_state
-ffffffff81a73e90 T ci_dpm_setup_asic
-ffffffff81a74110 T ci_dpm_enable
-ffffffff81a784e0 t ci_enable_didt
-ffffffff81a787c0 t ci_enable_power_containment
-ffffffff81a78da0 T ci_dpm_late_enable
-ffffffff81a78fd0 T ci_dpm_disable
-ffffffff81a799d0 T ci_dpm_set_power_state
-ffffffff81a7ad00 T ci_dpm_display_configuration_changed
-ffffffff81a7aef0 T ci_dpm_fini
-ffffffff81a7af90 T ci_dpm_init
-ffffffff81a7c680 T ci_dpm_debugfs_print_current_performance_level
-ffffffff81a7c850 T ci_dpm_print_power_state
-ffffffff81a7c910 T ci_dpm_get_current_sclk
-ffffffff81a7ca20 T ci_dpm_get_current_mclk
-ffffffff81a7cb30 T ci_dpm_get_sclk
-ffffffff81a7cb80 T ci_dpm_get_mclk
-ffffffff81a7cbd0 t ci_populate_all_graphic_levels
-ffffffff81a7d140 t ci_populate_all_memory_levels
-ffffffff81a7dac0 t ci_do_program_memory_timing_parameters
-ffffffff81a7dd60 t ci_populate_smc_voltage_table
-ffffffff81a7dec0 t ci_enable_sclk_mclk_dpm
-ffffffff81a7f000 T ci_copy_bytes_to_smc
-ffffffff81a7f330 T ci_start_smc
-ffffffff81a7f370 T ci_reset_smc
-ffffffff81a7f3b0 T ci_program_jump_on_start
-ffffffff81a7f3e0 T ci_stop_smc_clock
-ffffffff81a7f420 T ci_start_smc_clock
-ffffffff81a7f460 T ci_is_smc_running
-ffffffff81a7f4d0 T ci_load_smc_ucode
-ffffffff81a7f6c0 T ci_read_smc_sram_dword
-ffffffff81a7f7e0 T ci_write_smc_sram_dword
-ffffffff81a80000 T cik_get_allowed_info_register
-ffffffff81a800b0 T cik_didt_rreg
-ffffffff81a80170 T cik_didt_wreg
-ffffffff81a80210 T ci_get_temp
-ffffffff81a80260 T kv_get_temp
-ffffffff81a802b0 T cik_pciep_rreg
-ffffffff81a80370 T cik_pciep_wreg
-ffffffff81a80420 T cik_get_xclk
-ffffffff81a80490 T cik_mm_rdoorbell
-ffffffff81a804f0 T cik_mm_wdoorbell
-ffffffff81a80530 T ci_mc_load_microcode
-ffffffff81a809b0 T cik_ring_test
-ffffffff81a80c50 T cik_fence_gfx_ring_emit
-ffffffff81a81050 T cik_fence_compute_ring_emit
-ffffffff81a812d0 T cik_semaphore_ring_emit
-ffffffff81a814a0 T cik_copy_cpdma
-ffffffff81a81890 T cik_ring_ib_execute
-ffffffff81a81e50 T cik_ib_test
-ffffffff81a82130 T cik_gfx_get_rptr
-ffffffff81a82190 T cik_gfx_get_wptr
-ffffffff81a821c0 T cik_gfx_set_wptr
-ffffffff81a82210 T cik_compute_get_rptr
-ffffffff81a82310 T cik_compute_get_wptr
-ffffffff81a82410 T cik_compute_set_wptr
-ffffffff81a82470 T cik_gpu_check_soft_reset
-ffffffff81a82620 T cik_asic_reset
-ffffffff81a82c00 t cik_gpu_pci_config_reset
-ffffffff81a83730 T cik_gfx_is_lockup
-ffffffff81a83790 T cik_pcie_gart_tlb_flush
-ffffffff81a837f0 T cik_ib_parse
-ffffffff81a83820 T cik_vm_init
-ffffffff81a83890 T cik_vm_fini
-ffffffff81a838c0 T cik_vm_flush
-ffffffff81a84600 T cik_enter_rlc_safe_mode
-ffffffff81a84710 T cik_exit_rlc_safe_mode
-ffffffff81a84740 T cik_update_cg
-ffffffff81a84e80 t cik_enable_mgcg
-ffffffff81a85550 t cik_enable_cgcg
-ffffffff81a85a10 T cik_init_cp_pg_table
-ffffffff81a85ce0 T cik_get_csb_size
-ffffffff81a85d70 T cik_get_csb_buffer
-ffffffff81a85f20 T cik_irq_set
-ffffffff81a86c80 t cik_disable_interrupt_state
-ffffffff81a87300 T cik_irq_process
-ffffffff81a88290 t cik_irq_ack
-ffffffff81a88f30 T cik_resume
-ffffffff81a88fc0 t cik_init_golden_registers
-ffffffff81a89180 t cik_startup
-ffffffff81a8f460 T cik_suspend
-ffffffff81a8f740 t cik_irq_suspend
-ffffffff81a8f8d0 t cik_pcie_gart_disable
-ffffffff81a8fa40 T cik_init
-ffffffff81a901a0 t cik_init_microcode
-ffffffff81a91240 T cik_fini
-ffffffff81a915a0 T dce8_program_fmt
-ffffffff81a916e0 T dce8_bandwidth_update
-ffffffff81a91fe0 T cik_get_gpu_clock_counter
-ffffffff81a920c0 T cik_set_uvd_clocks
-ffffffff81a92130 t cik_set_uvd_clock
-ffffffff81a922b0 T cik_set_vce_clocks
-ffffffff81a92500 t cik_wait_for_rlc_serdes
-ffffffff81a92720 t cik_get_cu_active_bitmap
-ffffffff81a928e0 t radeon_bo_reserve
-ffffffff81a92a90 t radeon_bo_unreserve
-ffffffff81a92b80 t cik_update_gfx_pg
-ffffffff81a92e30 t cik_compute_stop
-ffffffff81a92ff0 t cik_cp_compute_fini
-ffffffff81a931a0 t dce8_latency_watermark
-ffffffff81a94000 T cik_sdma_get_rptr
-ffffffff81a94080 T cik_sdma_get_wptr
-ffffffff81a940e0 T cik_sdma_set_wptr
-ffffffff81a94150 T cik_sdma_ring_ib_execute
-ffffffff81a94570 T cik_sdma_fence_ring_emit
-ffffffff81a94750 t cik_sdma_hdp_flush_ring_emit
-ffffffff81a94990 T cik_sdma_semaphore_ring_emit
-ffffffff81a94ab0 T cik_sdma_enable
-ffffffff81a94d90 T cik_sdma_resume
-ffffffff81a95440 T cik_sdma_fini
-ffffffff81a95480 T cik_copy_dma
-ffffffff81a95880 T cik_sdma_ring_test
-ffffffff81a95b20 T cik_sdma_ib_test
-ffffffff81a95d50 T cik_sdma_is_lockup
-ffffffff81a95dd0 T cik_sdma_vm_copy_pages
-ffffffff81a95ee0 T cik_sdma_vm_write_pages
-ffffffff81a96080 T cik_sdma_vm_set_pages
-ffffffff81a961f0 T cik_sdma_vm_pad_ib
-ffffffff81a96240 T cik_dma_vm_flush
-ffffffff81a97000 T cypress_enable_spread_spectrum
-ffffffff81a971e0 T cypress_start_dpm
-ffffffff81a97240 T cypress_enable_sclk_control
-ffffffff81a972b0 T cypress_enable_mclk_control
-ffffffff81a97320 T cypress_notify_smc_display_change
-ffffffff81a97360 T cypress_program_response_times
-ffffffff81a97430 T cypress_advertise_gen2_capability
-ffffffff81a97500 T cypress_notify_link_speed_change_after_state_change
-ffffffff81a975d0 T cypress_notify_link_speed_change_before_state_change
-ffffffff81a97680 T cypress_get_strobe_mode_settings
-ffffffff81a97780 T cypress_get_mclk_frequency_ratio
-ffffffff81a97830 T cypress_map_clkf_to_ibias
-ffffffff81a978f0 T cypress_convert_power_level_to_smc
-ffffffff81a97d00 t cypress_populate_mclk_value
-ffffffff81a980f0 T cypress_upload_sw_state
-ffffffff81a98280 T cypress_upload_mc_reg_table
-ffffffff81a98330 t cypress_convert_mc_reg_table_to_smc
-ffffffff81a98590 T cypress_calculate_burst_time
-ffffffff81a98610 T cypress_program_memory_timing_parameters
-ffffffff81a98790 T cypress_populate_smc_initial_state
-ffffffff81a98b20 T cypress_populate_smc_acpi_state
-ffffffff81a98eb0 T cypress_construct_voltage_tables
-ffffffff81a98f50 t cypress_trim_voltage_table_to_fit_state_table
-ffffffff81a99140 T cypress_populate_smc_voltage_tables
-ffffffff81a99280 T cypress_get_mvdd_configuration
-ffffffff81a99360 T cypress_populate_mc_reg_table
-ffffffff81a995a0 T cypress_get_table_locations
-ffffffff81a99680 T cypress_enable_display_gap
-ffffffff81a996e0 T cypress_dpm_setup_asic
-ffffffff81a997d0 T cypress_dpm_enable
-ffffffff81a9a360 t cypress_force_mc_use_s1
-ffffffff81a9a650 t cypress_enable_dynamic_pcie_gen2
-ffffffff81a9a7d0 t cypress_gfx_clock_gating_enable
-ffffffff81a9abd0 t cypress_mg_clock_gating_enable
-ffffffff81a9afb0 T cypress_dpm_disable
-ffffffff81a9b290 T cypress_dpm_set_power_state
-ffffffff81a9b570 T cypress_dpm_display_configuration_changed
-ffffffff81a9b690 T cypress_dpm_init
-ffffffff81a9b900 T cypress_dpm_fini
-ffffffff81a9b990 T cypress_dpm_vblank_too_short
-ffffffff81a9b9f0 t cypress_wait_for_mc_sequencer
-ffffffff81a9c000 T dce3_2_afmt_hdmi_write_speaker_allocation
-ffffffff81a9c070 T dce3_2_afmt_dp_write_speaker_allocation
-ffffffff81a9c0e0 T dce3_2_afmt_write_sad_regs
-ffffffff81a9c1f0 T dce3_2_audio_set_dto
-ffffffff81a9c3f0 T dce3_2_hdmi_update_acr
-ffffffff81a9c7c0 T dce3_2_set_audio_packet
-ffffffff81a9c990 T dce3_2_set_mute
-ffffffff81a9d000 T dce6_endpoint_rreg
-ffffffff81a9d0f0 T dce6_endpoint_wreg
-ffffffff81a9d210 T dce6_audio_get_pin
-ffffffff81a9d380 T dce6_afmt_select_pin
-ffffffff81a9d420 T dce6_afmt_write_latency_fields
-ffffffff81a9d4d0 T dce6_afmt_hdmi_write_speaker_allocation
-ffffffff81a9d5a0 T dce6_afmt_dp_write_speaker_allocation
-ffffffff81a9d670 T dce6_afmt_write_sad_regs
-ffffffff81a9d7c0 T dce6_audio_enable
-ffffffff81a9d810 T dce6_hdmi_audio_set_dto
-ffffffff81a9d8a0 T dce6_dp_audio_set_dto
-ffffffff81a9e000 T eg_cg_rreg
-ffffffff81a9e0a0 T eg_cg_wreg
-ffffffff81a9e120 T eg_pif_phy0_rreg
-ffffffff81a9e1c0 T eg_pif_phy0_wreg
-ffffffff81a9e240 T eg_pif_phy1_rreg
-ffffffff81a9e2e0 T eg_pif_phy1_wreg
-ffffffff81a9e360 T evergreen_get_allowed_info_register
-ffffffff81a9e400 T evergreen_tiling_fields
-ffffffff81a9e4a0 T sumo_set_uvd_clocks
-ffffffff81a9e5a0 t sumo_set_uvd_clock
-ffffffff81a9e7d0 T evergreen_set_uvd_clocks
-ffffffff81a9ef80 T evergreen_fix_pci_max_read_req_size
-ffffffff81a9f040 T dce4_program_fmt
-ffffffff81a9f160 T dce4_wait_for_vblank
-ffffffff81a9f460 T evergreen_page_flip
-ffffffff81a9f5b0 T evergreen_page_flip_pending
-ffffffff81a9f630 T evergreen_get_temp
-ffffffff81a9f720 T sumo_get_temp
-ffffffff81a9f780 T sumo_pm_init_profile
-ffffffff81a9f8c0 T btc_pm_init_profile
-ffffffff81a9f9d0 T evergreen_pm_misc
-ffffffff81a9fb20 T evergreen_pm_prepare
-ffffffff81a9fc40 T evergreen_pm_finish
-ffffffff81a9fd60 T evergreen_hpd_sense
-ffffffff81a9fde0 T evergreen_hpd_set_polarity
-ffffffff81a9ff20 T evergreen_hpd_init
-ffffffff81aa0010 T evergreen_hpd_fini
-ffffffff81aa00c0 T evergreen_get_number_of_dram_channels
-ffffffff81aa0120 T evergreen_bandwidth_update
-ffffffff81aa02f0 t evergreen_line_buffer_adjust
-ffffffff81aa0520 t evergreen_program_watermarks
-ffffffff81aa1010 T evergreen_mc_wait_for_idle
-ffffffff81aa10b0 T evergreen_pcie_gart_tlb_flush
-ffffffff81aa11a0 T evergreen_mc_stop
-ffffffff81aa1db0 T evergreen_mc_resume
-ffffffff81aa25f0 T evergreen_mc_program
-ffffffff81aa2b10 T evergreen_ring_ib_execute
-ffffffff81aa2fd0 T evergreen_mc_init
-ffffffff81aa3160 T evergreen_print_gpu_status_regs
-ffffffff81aa3190 T evergreen_is_display_hung
-ffffffff81aa33b0 T evergreen_gpu_check_soft_reset
-ffffffff81aa3530 T evergreen_gpu_pci_config_reset
-ffffffff81aa36f0 T evergreen_asic_reset
-ffffffff81aa3b10 T evergreen_gfx_is_lockup
-ffffffff81aa3b70 T sumo_rlc_fini
-ffffffff81aa3d30 t radeon_bo_reserve
-ffffffff81aa3ee0 t radeon_bo_unreserve
-ffffffff81aa3fd0 T sumo_rlc_init
-ffffffff81aa47c0 T evergreen_rlc_resume
-ffffffff81aa4c90 T evergreen_get_vblank_counter
-ffffffff81aa4d10 T evergreen_disable_interrupt_state
-ffffffff81aa5130 T evergreen_irq_set
-ffffffff81aa5700 T evergreen_irq_suspend
-ffffffff81aa5750 T evergreen_irq_process
-ffffffff81aa5e20 t evergreen_get_ih_wptr
-ffffffff81aa5f60 t evergreen_irq_ack
-ffffffff81aa68b0 T evergreen_resume
-ffffffff81aa6990 t evergreen_init_golden_registers
-ffffffff81aa6ba0 t evergreen_startup
-ffffffff81aa9a50 T evergreen_suspend
-ffffffff81aa9b00 t evergreen_pcie_gart_disable
-ffffffff81aa9ca0 T evergreen_init
-ffffffff81aaa0d0 T evergreen_fini
-ffffffff81aaa1d0 T evergreen_pcie_gen2_enable
-ffffffff81aaa410 T evergreen_program_aspm
-ffffffff81aaada0 t evergreen_latency_watermark
-ffffffff81aab000 T evergreen_cs_parse
-ffffffff81aad920 T evergreen_dma_cs_parse
-ffffffff81aaec50 T evergreen_ib_parse
-ffffffff81aaf110 T evergreen_dma_ib_parse
-ffffffff81aaf370 t evergreen_cs_track_check
-ffffffff81ab0420 t evergreen_cs_handle_reg
-ffffffff81ab23a0 t evergreen_surface_value_conv_check
-ffffffff81ab2680 t evergreen_surface_check
-ffffffff81ab2b20 t evergreen_cs_track_validate_htile
-ffffffff81ab2dd0 t evergreen_vm_reg_valid
-ffffffff81ab4000 T evergreen_dma_fence_ring_emit
-ffffffff81ab42c0 T evergreen_dma_ring_ib_execute
-ffffffff81ab4640 T evergreen_copy_dma
-ffffffff81ab4a00 T evergreen_dma_is_lockup
-ffffffff81ab5000 T dce4_audio_enable
-ffffffff81ab50e0 T evergreen_hdmi_update_acr
-ffffffff81ab5330 T dce4_afmt_write_latency_fields
-ffffffff81ab53a0 T dce4_afmt_hdmi_write_speaker_allocation
-ffffffff81ab5410 T dce4_afmt_dp_write_speaker_allocation
-ffffffff81ab5480 T evergreen_hdmi_write_sad_regs
-ffffffff81ab5590 T evergreen_set_avi_packet
-ffffffff81ab5760 T dce4_hdmi_audio_set_dto
-ffffffff81ab5890 T dce4_dp_audio_set_dto
-ffffffff81ab59c0 T dce4_set_vbi_packet
-ffffffff81ab5a10 T dce4_hdmi_set_color_depth
-ffffffff81ab5b00 T dce4_set_audio_packet
-ffffffff81ab5d40 T dce4_set_mute
-ffffffff81ab5e20 T evergreen_hdmi_enable
-ffffffff81ab6110 T evergreen_dp_enable
-ffffffff81ab7000 T kv_dpm_enable_bapm
-ffffffff81ab7060 T kv_dpm_enable
-ffffffff81ab86d0 t kv_enable_didt
-ffffffff81ab89b0 T kv_dpm_late_enable
-ffffffff81ab8ba0 T kv_dpm_powergate_uvd
-ffffffff81ab8d10 T kv_dpm_disable
-ffffffff81ab9090 T kv_dpm_force_performance_level
-ffffffff81ab9220 t kv_force_dpm_lowest
-ffffffff81ab9300 T kv_dpm_pre_set_power_state
-ffffffff81ab9900 T kv_dpm_set_power_state
-ffffffff81aba0f0 t kv_set_valid_clock_range
-ffffffff81aba2b0 t kv_calculate_ds_divider
-ffffffff81aba430 t kv_calculate_nbps_level_settings
-ffffffff81aba5c0 t kv_update_vce_dpm
-ffffffff81aba7a0 T kv_dpm_post_set_power_state
-ffffffff81aba840 T kv_dpm_setup_asic
-ffffffff81aba8a0 T kv_dpm_init
-ffffffff81abb170 T kv_dpm_debugfs_print_current_performance_level
-ffffffff81abb1d0 T kv_dpm_get_current_sclk
-ffffffff81abb240 T kv_dpm_get_current_mclk
-ffffffff81abb270 T kv_dpm_print_power_state
-ffffffff81abb310 T kv_dpm_fini
-ffffffff81abb3a0 T kv_dpm_display_configuration_changed
-ffffffff81abb3d0 T kv_dpm_get_sclk
-ffffffff81abb420 T kv_dpm_get_mclk
-ffffffff81abc000 T kv_notify_message_to_smu
-ffffffff81abc0e0 T kv_dpm_get_enable_mask
-ffffffff81abc1d0 T kv_send_msg_to_smc_with_parameter
-ffffffff81abc2d0 T kv_read_smc_sram_dword
-ffffffff81abc3b0 T kv_smc_dpm_enable
-ffffffff81abc500 T kv_smc_bapm_enable
-ffffffff81abc650 T kv_copy_bytes_to_smc
-ffffffff81abd000 T tn_smc_rreg
-ffffffff81abd090 T tn_smc_wreg
-ffffffff81abd110 T ni_mc_load_microcode
-ffffffff81abd3b0 T ni_init_microcode
-ffffffff81abd940 T cayman_get_allowed_info_register
-ffffffff81abd9e0 T tn_get_temp
-ffffffff81abda80 T cayman_pcie_gart_tlb_flush
-ffffffff81abdae0 T cayman_cp_int_cntl_setup
-ffffffff81abdb40 T cayman_fence_ring_emit
-ffffffff81abdee0 T cayman_ring_ib_execute
-ffffffff81abe360 T cayman_gfx_get_rptr
-ffffffff81abe410 T cayman_gfx_get_wptr
-ffffffff81abe480 T cayman_gfx_set_wptr
-ffffffff81abe540 T cayman_gpu_check_soft_reset
-ffffffff81abe700 T cayman_asic_reset
-ffffffff81abeb20 T cayman_gfx_is_lockup
-ffffffff81abeb80 T cayman_resume
-ffffffff81abec10 t ni_init_golden_registers
-ffffffff81abecf0 t cayman_startup
-ffffffff81ac19c0 T cayman_suspend
-ffffffff81ac1ab0 t cayman_pcie_gart_disable
-ffffffff81ac1c80 T cayman_init
-ffffffff81ac2170 T cayman_fini
-ffffffff81ac2300 T cayman_vm_init
-ffffffff81ac2370 T cayman_vm_fini
-ffffffff81ac23a0 T cayman_vm_decode_fault
-ffffffff81ac2430 T cayman_vm_flush
-ffffffff81ac28b0 T tn_set_vce_clocks
-ffffffff81ac3000 T cayman_dma_get_rptr
-ffffffff81ac3080 T cayman_dma_get_wptr
-ffffffff81ac30e0 T cayman_dma_set_wptr
-ffffffff81ac3120 T cayman_dma_ring_ib_execute
-ffffffff81ac34c0 T cayman_dma_stop
-ffffffff81ac35b0 T cayman_dma_resume
-ffffffff81ac38c0 T cayman_dma_fini
-ffffffff81ac39b0 T cayman_dma_is_lockup
-ffffffff81ac3a30 T cayman_dma_vm_copy_pages
-ffffffff81ac3b20 T cayman_dma_vm_write_pages
-ffffffff81ac3ca0 T cayman_dma_vm_set_pages
-ffffffff81ac3e00 T cayman_dma_vm_pad_ib
-ffffffff81ac3e50 T cayman_dma_vm_flush
-ffffffff81ac5000 T ni_get_pi
-ffffffff81ac5030 T ni_get_ps
-ffffffff81ac5060 T ni_dpm_vblank_too_short
-ffffffff81ac50c0 T ni_dpm_force_performance_level
-ffffffff81ac5240 T ni_copy_and_switch_arb_sets
-ffffffff81ac56d0 T ni_set_uvd_clock_before_set_eng_clock
-ffffffff81ac5750 T ni_set_uvd_clock_after_set_eng_clock
-ffffffff81ac57d0 T ni_dpm_setup_asic
-ffffffff81ac5ab0 T ni_update_current_ps
-ffffffff81ac5b60 T ni_update_requested_ps
-ffffffff81ac5c10 T ni_dpm_enable
-ffffffff81ac8fc0 t ni_enable_dynamic_pcie_gen2
-ffffffff81ac9150 t ni_populate_smc_tdp_limits
-ffffffff81ac9320 T ni_dpm_disable
-ffffffff81ac9750 T ni_dpm_pre_set_power_state
-ffffffff81ac9d40 T ni_dpm_set_power_state
-ffffffff81acae80 T ni_dpm_post_set_power_state
-ffffffff81acaf50 T ni_dpm_init
-ffffffff81acb9a0 T ni_dpm_fini
-ffffffff81acba40 T ni_dpm_print_power_state
-ffffffff81acbb20 T ni_dpm_debugfs_print_current_performance_level
-ffffffff81acbb60 T ni_dpm_get_current_sclk
-ffffffff81acbbe0 T ni_dpm_get_current_mclk
-ffffffff81acbc60 T ni_dpm_get_sclk
-ffffffff81acbcc0 T ni_dpm_get_mclk
-ffffffff81acbd20 t ni_do_program_memory_timing_parameters
-ffffffff81acbe80 t ni_calculate_sclk_params
-ffffffff81acc0a0 t ni_calculate_power_boost_limit
-ffffffff81acc230 t ni_populate_mclk_value
-ffffffff81acd000 T r100_wait_for_vblank
-ffffffff81acd240 T r100_page_flip
-ffffffff81acd4b0 T r100_page_flip_pending
-ffffffff81acd590 T r100_pm_get_dynpm_state
-ffffffff81acd790 T r100_pm_init_profile
-ffffffff81acd870 T r100_pm_misc
-ffffffff81acdc30 T r100_pm_prepare
-ffffffff81acdd20 T r100_pm_finish
-ffffffff81acde10 T r100_gui_idle
-ffffffff81acde60 T r100_hpd_sense
-ffffffff81acdee0 T r100_hpd_set_polarity
-ffffffff81ace010 T r100_hpd_init
-ffffffff81ace0a0 T r100_hpd_fini
-ffffffff81ace100 T r100_pci_gart_tlb_flush
-ffffffff81ace130 T r100_pci_gart_init
-ffffffff81ace200 T r100_pci_gart_get_page_entry
-ffffffff81ace230 T r100_pci_gart_set_page
-ffffffff81ace260 T r100_pci_gart_enable
-ffffffff81ace390 T r100_pci_gart_disable
-ffffffff81ace420 T r100_pci_gart_fini
-ffffffff81ace4c0 T r100_irq_set
-ffffffff81ace5e0 T r100_irq_disable
-ffffffff81ace670 T r100_irq_process
-ffffffff81ace990 T r100_get_vblank_counter
-ffffffff81ace9d0 T r100_fence_ring_emit
-ffffffff81acee40 T r100_semaphore_ring_emit
-ffffffff81acee70 T r100_copy_blit
-ffffffff81acf500 T r100_ring_start
-ffffffff81acf5f0 T r100_gfx_get_rptr
-ffffffff81acf650 T r100_gfx_get_wptr
-ffffffff81acf680 T r100_gfx_set_wptr
-ffffffff81acf6d0 T r100_cp_init
-ffffffff81acfcf0 T r100_debugfs_cp_init
-ffffffff81acfd20 T r100_cp_fini
-ffffffff81acfdc0 T r100_cp_disable
-ffffffff81acff40 T r100_gui_wait_for_idle
-ffffffff81ad0030 T r100_reloc_pitch_offset
-ffffffff81ad0160 T r100_packet3_load_vbpntr
-ffffffff81ad0420 T r100_cs_parse_packet0
-ffffffff81ad0530 T r100_cs_packet_parse_vline
-ffffffff81ad0720 T r100_cs_track_check_pkt3_indx_buffer
-ffffffff81ad07a0 T r100_cs_parse
-ffffffff81ad19b0 T r100_cs_track_clear
-ffffffff81ad1d00 T r100_cs_track_check
-ffffffff81ad25f0 T r100_mc_wait_for_idle
-ffffffff81ad2680 T r100_gpu_is_lockup
-ffffffff81ad2700 T r100_enable_bm
-ffffffff81ad2760 T r100_bm_disable
-ffffffff81ad2870 T r100_asic_reset
-ffffffff81ad2da0 T r100_mc_stop
-ffffffff81ad3080 T r100_mc_resume
-ffffffff81ad31b0 T r100_set_common_regs
-ffffffff81ad3410 T r100_vram_init_sizes
-ffffffff81ad3640 T r100_vga_set_state
-ffffffff81ad36b0 T r100_pll_errata_after_index
-ffffffff81ad3730 T r100_pll_rreg
-ffffffff81ad3910 T r100_pll_wreg
-ffffffff81ad3ad0 T r100_debugfs_rbbm_init
-ffffffff81ad3b00 T r100_debugfs_mc_info_init
-ffffffff81ad3b30 T r100_set_surface_reg
-ffffffff81ad3da0 T r100_clear_surface_reg
-ffffffff81ad3e60 T r100_bandwidth_update
-ffffffff81ad4910 T r100_ring_test
-ffffffff81ad4c10 T r100_ring_ib_execute
-ffffffff81ad4e70 T r100_ib_test
-ffffffff81ad5210 T r100_vga_render_disable
-ffffffff81ad5280 T r100_resume
-ffffffff81ad54d0 t r100_startup
-ffffffff81ad5a90 T r100_suspend
-ffffffff81ad5bd0 T r100_fini
-ffffffff81ad5d90 T r100_restore_sanity
-ffffffff81ad5e80 T r100_init
-ffffffff81ad6550 T r100_mm_rreg_slow
-ffffffff81ad65e0 T r100_mm_wreg_slow
-ffffffff81ad6660 T r100_io_rreg
-ffffffff81ad66d0 T r100_io_wreg
-ffffffff81ad6730 t r100_get_vtx_size
-ffffffff81ad6860 t r100_cs_track_texture_print
-ffffffff81ad7000 T r200_copy_dma
-ffffffff81ad7480 T r200_packet0_check
-ffffffff81ad8420 T r200_set_safe_registers
-ffffffff81ad9000 T rv370_pcie_rreg
-ffffffff81ad90a0 T rv370_pcie_wreg
-ffffffff81ad9130 T rv370_pcie_gart_tlb_flush
-ffffffff81ad92f0 T rv370_pcie_gart_get_page_entry
-ffffffff81ad9340 T rv370_pcie_gart_set_page
-ffffffff81ad9380 T rv370_pcie_gart_init
-ffffffff81ad9450 T rv370_pcie_gart_enable
-ffffffff81ad98e0 T rv370_pcie_gart_disable
-ffffffff81ad9b10 T rv370_pcie_gart_fini
-ffffffff81ad9b40 T r300_fence_ring_emit
-ffffffff81ada0d0 T r300_ring_start
-ffffffff81adaae0 T r300_mc_wait_for_idle
-ffffffff81adab70 T r300_asic_reset
-ffffffff81adaea0 T r300_mc_init
-ffffffff81adaf70 T rv370_set_pcie_lanes
-ffffffff81adb1d0 T rv370_get_pcie_lanes
-ffffffff81adb2a0 T r300_cs_parse
-ffffffff81adb620 t r300_packet0_check
-ffffffff81adc510 T r300_set_reg_safe
-ffffffff81adc550 T r300_mc_program
-ffffffff81adc750 T r300_clock_startup
-ffffffff81adc7d0 T r300_resume
-ffffffff81adc9d0 t r300_startup
-ffffffff81adcd60 T r300_suspend
-ffffffff81adcde0 T r300_fini
-ffffffff81adcec0 T r300_init
-ffffffff81ade000 T r420_pm_init_profile
-ffffffff81ade0e0 T r420_pipes_init
-ffffffff81ade320 T r420_mc_rreg
-ffffffff81ade3c0 T r420_mc_wreg
-ffffffff81ade450 T r420_resume
-ffffffff81ade650 t r420_startup
-ffffffff81adea00 T r420_suspend
-ffffffff81adeba0 T r420_fini
-ffffffff81adec80 T r420_init
-ffffffff81adef40 T r420_debugfs_pipes_info_init
-ffffffff81adf000 T r520_mc_wait_for_idle
-ffffffff81adf090 T r520_resume
-ffffffff81adf1b0 t r520_startup
-ffffffff81adf5e0 T r520_init
-ffffffff81ae0000 T r600_rcu_rreg
-ffffffff81ae00a0 T r600_rcu_wreg
-ffffffff81ae0130 T r600_uvd_ctx_rreg
-ffffffff81ae01d0 T r600_uvd_ctx_wreg
-ffffffff81ae0260 T r600_get_allowed_info_register
-ffffffff81ae02f0 T r600_get_xclk
-ffffffff81ae0320 T r600_set_uvd_clocks
-ffffffff81ae0a20 T dce3_program_fmt
-ffffffff81ae0b40 T rv6xx_get_temp
-ffffffff81ae0bc0 T r600_pm_get_dynpm_state
-ffffffff81ae0fc0 T rs780_pm_init_profile
-ffffffff81ae1100 T r600_pm_init_profile
-ffffffff81ae1390 T r600_pm_misc
-ffffffff81ae1440 T r600_gui_idle
-ffffffff81ae1490 T r600_hpd_sense
-ffffffff81ae1610 T r600_hpd_set_polarity
-ffffffff81ae1960 T r600_hpd_init
-ffffffff81ae1b90 T r600_hpd_fini
-ffffffff81ae1d80 T r600_pcie_gart_tlb_flush
-ffffffff81ae1f10 T r600_pcie_gart_init
-ffffffff81ae1fb0 T r600_mc_wait_for_idle
-ffffffff81ae2050 T rs780_mc_rreg
-ffffffff81ae2110 T rs780_mc_wreg
-ffffffff81ae21c0 T r600_vram_scratch_init
-ffffffff81ae22c0 t radeon_bo_reserve
-ffffffff81ae2470 t radeon_bo_unreserve
-ffffffff81ae2560 T r600_vram_scratch_fini
-ffffffff81ae25d0 T r600_set_bios_scratch_engine_hung
-ffffffff81ae2640 T r600_gpu_check_soft_reset
-ffffffff81ae29d0 T r600_asic_reset
-ffffffff81ae2ea0 t r600_gpu_pci_config_reset
-ffffffff81ae3160 T r600_gfx_is_lockup
-ffffffff81ae31c0 T r6xx_remap_render_backend
-ffffffff81ae3350 T r600_count_pipe_bits
-ffffffff81ae33c0 T r600_pciep_rreg
-ffffffff81ae3480 T r600_pciep_wreg
-ffffffff81ae3530 T r600_cp_stop
-ffffffff81ae35d0 T r600_init_microcode
-ffffffff81ae3e00 T r600_gfx_get_rptr
-ffffffff81ae3e60 T r600_gfx_get_wptr
-ffffffff81ae3e90 T r600_gfx_set_wptr
-ffffffff81ae3ee0 T r600_cp_start
-ffffffff81ae4270 T r600_cp_resume
-ffffffff81ae46c0 T r600_ring_init
-ffffffff81ae4760 T r600_cp_fini
-ffffffff81ae4800 T r600_scratch_init
-ffffffff81ae4870 T r600_ring_test
-ffffffff81ae4b10 T r600_fence_ring_emit
-ffffffff81ae53c0 T r600_semaphore_ring_emit
-ffffffff81ae55a0 T r600_copy_cpdma
-ffffffff81ae5b30 T r600_set_surface_reg
-ffffffff81ae5b60 T r600_clear_surface_reg
-ffffffff81ae5b90 T r600_vga_set_state
-ffffffff81ae5bf0 T r600_resume
-ffffffff81ae5c80 t r600_startup
-ffffffff81ae8490 T r600_suspend
-ffffffff81ae8670 T r600_irq_suspend
-ffffffff81ae8790 t r600_pcie_gart_disable
-ffffffff81ae8ad0 T r600_init
-ffffffff81ae9310 T r600_debugfs_mc_info_init
-ffffffff81ae9340 T r600_ih_ring_init
-ffffffff81ae93b0 T r600_irq_fini
-ffffffff81ae9540 T r600_fini
-ffffffff81ae96e0 T r600_ring_ib_execute
-ffffffff81ae9b60 T r600_ib_test
-ffffffff81ae9e00 T r600_ih_ring_alloc
-ffffffff81ae9f20 T r600_ih_ring_fini
-ffffffff81ae9fb0 T r600_rlc_stop
-ffffffff81aea180 T r600_disable_interrupts
-ffffffff81aea290 T r600_irq_init
-ffffffff81aea8b0 t r600_disable_interrupt_state
-ffffffff81aead90 T r600_irq_disable
-ffffffff81aeaea0 T r600_irq_set
-ffffffff81aeb690 t r600_irq_ack
-ffffffff81aebe30 T r600_irq_process
-ffffffff81aec3b0 t r600_get_ih_wptr
-ffffffff81aec4f0 T r600_mmio_hdp_flush
-ffffffff81aec590 T r600_set_pcie_lanes
-ffffffff81aec6d0 T r600_get_pcie_lanes
-ffffffff81aec7b0 T r600_get_gpu_clock_counter
-ffffffff81aed000 T r600_fmt_is_valid_color
-ffffffff81aed040 T r600_fmt_is_valid_texture
-ffffffff81aed090 T r600_fmt_get_blocksize
-ffffffff81aed0d0 T r600_fmt_get_nblocksx
-ffffffff81aed120 T r600_fmt_get_nblocksy
-ffffffff81aed170 T r600_cs_common_vline_parse
-ffffffff81aed440 T r600_mip_minify
-ffffffff81aed4a0 T r600_cs_parse
-ffffffff81aef600 T r600_dma_cs_next_reloc
-ffffffff81aef680 T r600_dma_cs_parse
-ffffffff81aefdf0 t r600_cs_track_check
-ffffffff81af1010 t r600_cs_check_reg
-ffffffff81af2000 T r600_dma_get_rptr
-ffffffff81af2070 T r600_dma_get_wptr
-ffffffff81af20c0 T r600_dma_set_wptr
-ffffffff81af20f0 T r600_dma_stop
-ffffffff81af2190 T r600_dma_resume
-ffffffff81af2450 T r600_dma_fini
-ffffffff81af24e0 T r600_dma_is_lockup
-ffffffff81af2540 T r600_dma_ring_test
-ffffffff81af27a0 T r600_dma_fence_ring_emit
-ffffffff81af2990 T r600_dma_semaphore_ring_emit
-ffffffff81af2ab0 T r600_dma_ib_test
-ffffffff81af2ca0 T r600_dma_ring_ib_execute
-ffffffff81af3020 T r600_copy_dma
-ffffffff81af4000 T r600_dpm_print_class_info
-ffffffff81af42c0 T r600_dpm_print_cap_info
-ffffffff81af4340 T r600_dpm_print_ps_status
-ffffffff81af43d0 T r600_dpm_get_vblank_time
-ffffffff81af4490 T r600_dpm_get_vrefresh
-ffffffff81af4520 T r600_calculate_u_and_p
-ffffffff81af4590 T r600_calculate_at
-ffffffff81af4640 T r600_gfx_clockgating_enable
-ffffffff81af47b0 T r600_dynamicpm_enable
-ffffffff81af4820 T r600_enable_thermal_protection
-ffffffff81af4890 T r600_enable_acpi_pm
-ffffffff81af48f0 T r600_enable_dynamic_pcie_gen2
-ffffffff81af4960 T r600_dynamicpm_enabled
-ffffffff81af49b0 T r600_enable_sclk_control
-ffffffff81af4a20 T r600_enable_mclk_control
-ffffffff81af4a90 T r600_enable_spll_bypass
-ffffffff81af4b00 T r600_wait_for_spll_change
-ffffffff81af4b90 T r600_set_bsp
-ffffffff81af4bc0 T r600_set_at
-ffffffff81af4c30 T r600_set_tc
-ffffffff81af4c90 T r600_select_td
-ffffffff81af4da0 T r600_set_vrc
-ffffffff81af4dd0 T r600_set_tpu
-ffffffff81af4e30 T r600_set_tpc
-ffffffff81af4e90 T r600_set_sstu
-ffffffff81af4ef0 T r600_set_sst
-ffffffff81af4f50 T r600_set_git
-ffffffff81af4fb0 T r600_set_fctu
-ffffffff81af5010 T r600_set_fct
-ffffffff81af5070 T r600_set_ctxcgtt3d_rphc
-ffffffff81af50d0 T r600_set_ctxcgtt3d_rsdc
-ffffffff81af5140 T r600_set_vddc3d_oorsu
-ffffffff81af51a0 T r600_set_vddc3d_oorphc
-ffffffff81af5200 T r600_set_vddc3d_oorsdc
-ffffffff81af5270 T r600_set_mpll_lock_time
-ffffffff81af52d0 T r600_set_mpll_reset_time
-ffffffff81af5330 T r600_engine_clock_entry_enable
-ffffffff81af5400 T r600_engine_clock_entry_enable_pulse_skipping
-ffffffff81af54d0 T r600_engine_clock_entry_enable_post_divider
-ffffffff81af55a0 T r600_engine_clock_entry_set_post_divider
-ffffffff81af5660 T r600_engine_clock_entry_set_reference_divider
-ffffffff81af5720 T r600_engine_clock_entry_set_feedback_divider
-ffffffff81af57e0 T r600_engine_clock_entry_set_step_time
-ffffffff81af58a0 T r600_vid_rt_set_ssu
-ffffffff81af5900 T r600_vid_rt_set_vru
-ffffffff81af5960 T r600_vid_rt_set_vrt
-ffffffff81af59c0 T r600_voltage_control_enable_pins
-ffffffff81af5a20 T r600_voltage_control_program_voltages
-ffffffff81af5ae0 T r600_voltage_control_deactivate_static_control
-ffffffff81af5bd0 T r600_power_level_enable
-ffffffff81af5c60 T r600_power_level_set_voltage_index
-ffffffff81af5ce0 T r600_power_level_set_mem_clock_index
-ffffffff81af5d60 T r600_power_level_set_eng_clock_index
-ffffffff81af5de0 T r600_power_level_set_watermark_id
-ffffffff81af5e70 T r600_power_level_set_pcie_gen2
-ffffffff81af5ef0 T r600_power_level_get_current_index
-ffffffff81af5f40 T r600_power_level_get_target_index
-ffffffff81af5f90 T r600_power_level_set_enter_index
-ffffffff81af5ff0 T r600_wait_for_power_level_unequal
-ffffffff81af60e0 T r600_wait_for_power_level
-ffffffff81af61d0 T r600_start_dpm
-ffffffff81af65e0 T r600_stop_dpm
-ffffffff81af6640 T r600_dpm_pre_set_power_state
-ffffffff81af6670 T r600_dpm_post_set_power_state
-ffffffff81af66a0 T r600_is_uvd_state
-ffffffff81af66d0 T r600_is_internal_thermal_sensor
-ffffffff81af6710 T r600_dpm_late_enable
-ffffffff81af6870 T r600_get_platform_caps
-ffffffff81af6910 T r600_parse_extended_power_table
-ffffffff81af78c0 T r600_free_extended_power_table
-ffffffff81af79c0 T r600_get_pcie_gen_support
-ffffffff81af7a10 T r600_get_pcie_lane_support
-ffffffff81af7a70 T r600_encode_pci_lane_width
-ffffffff81af8000 T r600_audio_update_hdmi
-ffffffff81af8190 t r600_audio_status
-ffffffff81af82e0 T r600_hdmi_buffer_status_changed
-ffffffff81af8380 T r600_hdmi_update_audio_settings
-ffffffff81af8760 T r600_audio_enable
-ffffffff81af8840 T r600_audio_get_pin
-ffffffff81af8870 T r600_hdmi_update_acr
-ffffffff81af8cb0 T r600_set_avi_packet
-ffffffff81af8f10 T r600_hdmi_audio_workaround
-ffffffff81af8fd0 T r600_hdmi_audio_set_dto
-ffffffff81af90f0 T r600_set_vbi_packet
-ffffffff81af91a0 T r600_set_audio_packet
-ffffffff81af9540 T r600_set_mute
-ffffffff81af9620 T r600_hdmi_enable
-ffffffff81afa000 T radeon_acpi_is_pcie_performance_request_supported
-ffffffff81afa040 T radeon_acpi_pcie_notify_device_ready
-ffffffff81afa130 T radeon_acpi_pcie_performance_request
-ffffffff81afa530 T radeon_acpi_init
-ffffffff81afaaf0 t radeon_acpi_event
-ffffffff81afad80 T radeon_acpi_fini
-ffffffff81afb000 T radeon_agp_init
-ffffffff81afb390 T radeon_agp_resume
-ffffffff81afb410 T radeon_agp_fini
-ffffffff81afb450 T radeon_agp_suspend
-ffffffff81afc000 T radeon_agp_disable
-ffffffff81afc100 T radeon_asic_init
-ffffffff81afca20 t radeon_invalid_rreg
-ffffffff81afca60 t radeon_invalid_wreg
-ffffffff81afcaa0 t radeon_invalid_get_allowed_info_register
-ffffffff81afd000 T radeon_atombios_i2c_init
-ffffffff81afd370 T radeon_atombios_lookup_gpio
-ffffffff81afd480 T radeon_get_atom_connector_info_from_object_table
-ffffffff81afde20 t radeon_lookup_i2c_gpio
-ffffffff81afe110 t radeon_atom_apply_quirks
-ffffffff81afe580 T radeon_get_atom_connector_info_from_supported_devices_table
-ffffffff81afead0 T radeon_atom_get_clock_info
-ffffffff81afee10 T radeon_atombios_sideport_present
-ffffffff81afeec0 T radeon_atombios_get_tmds_info
-ffffffff81aff0b0 T radeon_atombios_get_ppll_ss_info
-ffffffff81aff1d0 T radeon_atombios_get_asic_ss_info
-ffffffff81aff550 T radeon_atombios_get_lvds_info
-ffffffff81aff8c0 T radeon_atombios_get_primary_dac_info
-ffffffff81aff980 T radeon_atom_get_tv_timings
-ffffffff81affc30 T radeon_atombios_get_tv_info
-ffffffff81affcc0 T radeon_atombios_get_tv_dac_info
-ffffffff81affe10 T radeon_atombios_get_default_voltages
-ffffffff81affed0 T radeon_atombios_get_power_modes
-ffffffff81b00f90 T radeon_atom_get_clock_dividers
-ffffffff81b01290 T radeon_atom_get_memory_pll_dividers
-ffffffff81b013d0 T radeon_atom_set_clock_gating
-ffffffff81b01420 T radeon_atom_get_engine_clock
-ffffffff81b01470 T radeon_atom_get_memory_clock
-ffffffff81b014c0 T radeon_atom_set_engine_clock
-ffffffff81b01510 T radeon_atom_set_memory_clock
-ffffffff81b01560 T radeon_atom_set_engine_dram_timings
-ffffffff81b015d0 T radeon_atom_update_memory_dll
-ffffffff81b01620 T radeon_atom_set_ac_timing
-ffffffff81b01670 T radeon_atom_set_voltage
-ffffffff81b01740 T radeon_atom_get_max_vddc
-ffffffff81b01810 T radeon_atom_get_leakage_vddc_based_on_leakage_idx
-ffffffff81b01830 T radeon_atom_get_leakage_id_from_vbios
-ffffffff81b018f0 T radeon_atom_get_leakage_vddc_based_on_leakage_params
-ffffffff81b01ae0 T radeon_atom_get_voltage_evv
-ffffffff81b01ba0 T radeon_atom_get_voltage_gpio_settings
-ffffffff81b01ca0 T radeon_atom_is_voltage_gpio
-ffffffff81b01e40 T radeon_atom_get_svi2_info
-ffffffff81b01f20 T radeon_atom_get_max_voltage
-ffffffff81b02090 T radeon_atom_get_min_voltage
-ffffffff81b021f0 T radeon_atom_get_voltage_step
-ffffffff81b022f0 T radeon_atom_round_to_true_voltage
-ffffffff81b023c0 T radeon_atom_get_voltage_table
-ffffffff81b02610 T radeon_atom_get_memory_info
-ffffffff81b027b0 T radeon_atom_get_mclk_range_table
-ffffffff81b029e0 T radeon_atom_init_mc_reg_table
-ffffffff81b02c50 T radeon_atom_initialize_bios_scratch_regs
-ffffffff81b02d80 T radeon_save_bios_scratch_regs
-ffffffff81b02ee0 T radeon_restore_bios_scratch_regs
-ffffffff81b03020 T radeon_atom_output_lock
-ffffffff81b030c0 T radeon_atombios_connected_scratch_regs
-ffffffff81b03570 T radeon_atombios_encoder_crtc_scratch_regs
-ffffffff81b03740 T radeon_atombios_encoder_dpms_scratch_regs
-ffffffff81b03a10 t radeon_atombios_parse_misc_flags_1_3
-ffffffff81b03c00 t radeon_atombios_add_pplib_thermal_controller
-ffffffff81b03db0 t radeon_atombios_parse_pplib_clock_info
-ffffffff81b04070 t radeon_atombios_parse_pplib_non_clock_info
-ffffffff81b05000 T radeon_audio_init
-ffffffff81b052b0 T radeon_audio_endpoint_rreg
-ffffffff81b052f0 T radeon_audio_endpoint_wreg
-ffffffff81b05330 T radeon_audio_get_pin
-ffffffff81b05380 T radeon_audio_detect
-ffffffff81b05690 T radeon_audio_fini
-ffffffff81b057b0 T radeon_audio_mode_set
-ffffffff81b057f0 T radeon_audio_dpms
-ffffffff81b05840 T radeon_audio_decode_dfs_div
-ffffffff81b058a0 t radeon_audio_hdmi_mode_set
-ffffffff81b05ef0 t radeon_audio_write_sad_regs
-ffffffff81b05fc0 t radeon_audio_set_avi_packet
-ffffffff81b06110 t radeon_audio_dp_mode_set
-ffffffff81b062d0 t radeon_audio_rreg
-ffffffff81b06310 t radeon_audio_wreg
-ffffffff81b07000 T radeon_benchmark
-ffffffff81b07940 t radeon_benchmark_move
-ffffffff81b07cf0 t radeon_bo_reserve
-ffffffff81b07ea0 t radeon_bo_unreserve
-ffffffff81b08000 T radeon_get_bios
-ffffffff81b09510 t igp_read_bios_from_vram
-ffffffff81b09630 t radeon_read_bios
-ffffffff81b0a000 T radeon_legacy_get_engine_clock
-ffffffff81b0a0d0 T radeon_legacy_get_memory_clock
-ffffffff81b0a1a0 T radeon_get_clock_info
-ffffffff81b0a740 T radeon_legacy_set_engine_clock
-ffffffff81b0aad0 T radeon_legacy_set_clock_gating
-ffffffff81b0d000 T radeon_combios_check_hardcoded_edid
-ffffffff81b0d100 T radeon_bios_get_hardcoded_edid
-ffffffff81b0d180 T radeon_combios_i2c_init
-ffffffff81b0d650 t combios_setup_i2c_bus
-ffffffff81b0d930 T radeon_combios_get_clock_info
-ffffffff81b0db70 T radeon_combios_sideport_present
-ffffffff81b0dc00 T radeon_combios_get_primary_dac_info
-ffffffff81b0dd60 T radeon_combios_get_tv_info
-ffffffff81b0ddf0 T radeon_combios_get_tv_dac_info
-ffffffff81b0e0b0 T radeon_combios_get_lvds_info
-ffffffff81b0e710 T radeon_legacy_get_tmds_info_from_table
-ffffffff81b0e7e0 T radeon_legacy_get_tmds_info_from_combios
-ffffffff81b0e970 T radeon_legacy_get_ext_tmds_info_from_table
-ffffffff81b0ea10 T radeon_legacy_get_ext_tmds_info_from_combios
-ffffffff81b0eb80 T radeon_get_legacy_connector_info_from_table
-ffffffff81b10630 T radeon_get_legacy_connector_info_from_bios
-ffffffff81b11390 T radeon_combios_get_power_modes
-ffffffff81b11a90 T radeon_external_tmds_setup
-ffffffff81b11b50 T radeon_combios_external_tmds_setup
-ffffffff81b121a0 T radeon_combios_asic_init
-ffffffff81b12900 t combios_parse_mmio_table
-ffffffff81b12b40 t combios_parse_pll_table
-ffffffff81b12e30 T radeon_combios_initialize_bios_scratch_regs
-ffffffff81b12f20 T radeon_combios_output_lock
-ffffffff81b12f90 T radeon_combios_connected_scratch_regs
-ffffffff81b131c0 T radeon_combios_encoder_crtc_scratch_regs
-ffffffff81b132d0 T radeon_combios_encoder_dpms_scratch_regs
-ffffffff81b14000 T radeon_connector_hotplug
-ffffffff81b14130 T radeon_get_monitor_bpc
-ffffffff81b14450 T radeon_connector_edid
-ffffffff81b14500 T radeon_connector_encoder_get_dp_bridge_encoder_id
-ffffffff81b145e0 T radeon_connector_is_dp12_capable
-ffffffff81b146e0 T radeon_add_atom_connector
-ffffffff81b154f0 T radeon_add_legacy_connector
-ffffffff81b159e0 T radeon_setup_mst_connector
-ffffffff81b15a70 t radeon_dp_detect
-ffffffff81b15d40 t radeon_dvi_force
-ffffffff81b15d80 t radeon_connector_set_property
-ffffffff81b16420 t radeon_connector_unregister
-ffffffff81b16480 t radeon_connector_destroy
-ffffffff81b164f0 t radeon_best_single_encoder
-ffffffff81b165a0 t radeon_connector_update_scratch_regs
-ffffffff81b16750 t radeon_connector_get_edid
-ffffffff81b16870 t radeon_find_encoder
-ffffffff81b16950 t radeon_dp_get_modes
-ffffffff81b16d10 t radeon_dp_mode_valid
-ffffffff81b16ea0 t radeon_dvi_encoder
-ffffffff81b17060 t radeon_add_common_modes
-ffffffff81b17150 t radeon_lvds_set_property
-ffffffff81b17200 t radeon_vga_detect
-ffffffff81b173d0 t radeon_connector_analog_encoder_conflict_solve
-ffffffff81b17590 t radeon_vga_get_modes
-ffffffff81b17650 t radeon_vga_mode_valid
-ffffffff81b176b0 t radeon_dvi_detect
-ffffffff81b17cc0 t radeon_dvi_mode_valid
-ffffffff81b17e50 t radeon_tv_detect
-ffffffff81b17ef0 t radeon_tv_get_modes
-ffffffff81b17fa0 t radeon_tv_mode_valid
-ffffffff81b17ff0 t radeon_lvds_detect
-ffffffff81b180b0 t radeon_lvds_get_modes
-ffffffff81b18300 t radeon_lvds_mode_valid
-ffffffff81b19000 T radeon_cs_parser_init
-ffffffff81b19480 T radeon_cs_ioctl
-ffffffff81b19fa0 t radeon_cs_parser_fini
-ffffffff81b1a110 T radeon_cs_packet_parse
-ffffffff81b1a2b0 T radeon_cs_packet_next_is_pkt3_nop
-ffffffff81b1a300 T radeon_cs_dump_packet
-ffffffff81b1a340 T radeon_cs_packet_next_reloc
-ffffffff81b1a490 t cmp_size_smaller_first
-ffffffff81b1b000 T radeon_crtc_cursor_move
-ffffffff81b1b070 t radeon_lock_cursor
-ffffffff81b1b200 t radeon_cursor_move_locked
-ffffffff81b1b760 T radeon_crtc_cursor_set2
-ffffffff81b1b9b0 t radeon_hide_cursor
-ffffffff81b1ba80 t radeon_bo_reserve
-ffffffff81b1bc30 t radeon_bo_unreserve
-ffffffff81b1bd20 t radeon_show_cursor
-ffffffff81b1c010 T radeon_cursor_reset
-ffffffff81b1d000 T radeon_is_px
-ffffffff81b1d040 T radeon_program_register_sequence
-ffffffff81b1d190 T radeon_pci_config_reset
-ffffffff81b1d1c0 T radeon_surface_init
-ffffffff81b1d390 T radeon_scratch_init
-ffffffff81b1d410 T radeon_scratch_get
-ffffffff81b1d490 T radeon_scratch_free
-ffffffff81b1d4e0 T radeon_doorbell_get
-ffffffff81b1d590 T radeon_doorbell_free
-ffffffff81b1d5d0 T radeon_wb_disable
-ffffffff81b1d600 T radeon_wb_fini
-ffffffff81b1d690 t radeon_bo_reserve
-ffffffff81b1d840 t radeon_bo_unreserve
-ffffffff81b1d930 T radeon_wb_init
-ffffffff81b1dc20 T radeon_vram_location
-ffffffff81b1dd50 T radeon_gtt_location
-ffffffff81b1de80 T radeon_device_is_virtual
-ffffffff81b1deb0 T radeon_card_posted
-ffffffff81b1e160 T radeon_update_bandwidth_info
-ffffffff81b1e1e0 T radeon_boot_test_post_card
-ffffffff81b1e290 T radeon_dummy_page_init
-ffffffff81b1e340 T radeon_dummy_page_fini
-ffffffff81b1e3a0 T radeon_atombios_init
-ffffffff81b1e530 t cail_reg_read
-ffffffff81b1e580 t cail_reg_write
-ffffffff81b1e5d0 t cail_ioreg_read
-ffffffff81b1e5f0 t cail_ioreg_write
-ffffffff81b1e610 t cail_mc_read
-ffffffff81b1e630 t cail_mc_write
-ffffffff81b1e650 t cail_pll_read
-ffffffff81b1e670 t cail_pll_write
-ffffffff81b1e690 T radeon_atombios_fini
-ffffffff81b1e720 T radeon_combios_init
-ffffffff81b1e760 T radeon_combios_fini
-ffffffff81b1e790 T radeon_device_init
-ffffffff81b1f350 T radeon_device_fini
-ffffffff81b1f430 T radeon_suspend_kms
-ffffffff81b1f740 T radeon_resume_kms
-ffffffff81b1f9a0 T radeon_gpu_reset
-ffffffff81b1fd60 T radeon_debugfs_add_files
-ffffffff81b20000 T radeon_crtc_load_lut
-ffffffff81b20f10 T radeon_crtc_handle_vblank
-ffffffff81b21050 T radeon_get_crtc_scanoutpos
-ffffffff81b216d0 T radeon_crtc_handle_flip
-ffffffff81b217d0 T radeon_compute_pll_avivo
-ffffffff81b21d00 T radeon_compute_pll_legacy
-ffffffff81b223e0 T radeon_framebuffer_init
-ffffffff81b22450 T radeon_update_display_priority
-ffffffff81b224b0 T radeon_modeset_init
-ffffffff81b22bf0 T radeon_modeset_fini
-ffffffff81b22d40 T radeon_crtc_scaling_mode_fixup
-ffffffff81b23090 t radeon_user_framebuffer_create
-ffffffff81b231c0 t radeon_crtc_gamma_set
-ffffffff81b23200 t radeon_crtc_destroy
-ffffffff81b23240 t radeon_crtc_set_config
-ffffffff81b23300 t radeon_crtc_page_flip_target
-ffffffff81b23770 t radeon_flip_work_func
-ffffffff81b239e0 t radeon_unpin_work_func
-ffffffff81b23a60 t radeon_bo_reserve
-ffffffff81b23c10 t radeon_bo_unreserve
-ffffffff81b24000 T radeon_dp_aux_transfer_native
-ffffffff81b25000 T radeon_dp_mst_prepare_pll
-ffffffff81b25100 T radeon_dp_mst_init
-ffffffff81b25170 T radeon_dp_mst_probe
-ffffffff81b25230 T radeon_dp_mst_check_status
-ffffffff81b25380 T radeon_mst_debugfs_init
-ffffffff81b253b0 t radeon_dp_add_mst_connector
-ffffffff81b255a0 t radeon_dp_register_mst_connector
-ffffffff81b255d0 t radeon_dp_destroy_mst_connector
-ffffffff81b25620 t radeon_dp_mst_hotplug
-ffffffff81b25640 t radeon_dp_mst_detect
-ffffffff81b25660 t radeon_dp_mst_connector_destroy
-ffffffff81b256b0 t radeon_dp_mst_get_modes
-ffffffff81b25730 t radeon_dp_mst_mode_valid
-ffffffff81b25770 t radeon_mst_best_encoder
-ffffffff81b257a0 t radeon_dp_mst_encoder_destroy
-ffffffff81b257d0 t radeon_mst_encoder_dpms
-ffffffff81b25cf0 t radeon_mst_mode_fixup
-ffffffff81b25d90 t radeon_mst_encoder_prepare
-ffffffff81b25ea0 t radeon_mst_encoder_commit
-ffffffff81b25eb0 t radeon_mst_encoder_mode_set
-ffffffff81b25ee0 t radeon_dp_mst_set_be_cntl
-ffffffff81b260c0 t radeon_dp_mst_update_stream_attribs
-ffffffff81b26270 t radeon_dp_mst_set_stream_attrib
-ffffffff81b27000 t radeon_get_crtc_scanout_position
-ffffffff81b28000 T radeon_setup_encoder_clones
-ffffffff81b280b0 T radeon_get_encoder_enum
-ffffffff81b28230 T radeon_link_encoder_connector
-ffffffff81b28370 T radeon_encoder_set_active_device
-ffffffff81b283d0 T radeon_get_connector_for_encoder
-ffffffff81b28480 T radeon_get_connector_for_encoder_init
-ffffffff81b28500 T radeon_get_external_encoder
-ffffffff81b28580 T radeon_encoder_get_dp_bridge_encoder_id
-ffffffff81b28610 T radeon_panel_mode_fixup
-ffffffff81b287d0 T radeon_dig_monitor_is_duallink
-ffffffff81b28950 T radeon_encoder_is_digital
-ffffffff81b29000 T radeon_align_pitch
-ffffffff81b29080 T radeon_fbdev_init
-ffffffff81b291f0 T radeondrm_burner_cb
-ffffffff81b29210 T radeon_fbdev_fini
-ffffffff81b29280 T radeon_fbdev_set_suspend
-ffffffff81b292b0 T radeon_fbdev_robj_is_fb
-ffffffff81b29300 T radeon_fb_add_connector
-ffffffff81b29340 T radeon_fb_remove_connector
-ffffffff81b29380 T radeondrm_burner
-ffffffff81b29400 t radeonfb_create
-ffffffff81b29760 t radeon_bo_reserve
-ffffffff81b29910 t radeon_bo_unreserve
-ffffffff81b2a000 T radeon_fence_emit
-ffffffff81b2a140 T radeon_fence_process
-ffffffff81b2a1f0 t radeon_fence_activity
-ffffffff81b2a3c0 T radeon_fence_signaled
-ffffffff81b2a540 T radeon_fence_wait_timeout
-ffffffff81b2a710 t radeon_fence_wait_seq_timeout
-ffffffff81b2ab40 T radeon_fence_wait
-ffffffff81b2ab80 T radeon_fence_wait_any
-ffffffff81b2acd0 T radeon_fence_wait_next
-ffffffff81b2ad90 T radeon_fence_wait_empty
-ffffffff81b2aea0 T radeon_fence_ref
-ffffffff81b2aed0 T radeon_fence_unref
-ffffffff81b2af40 T radeon_fence_count_emitted
-ffffffff81b2b020 T radeon_fence_need_sync
-ffffffff81b2b070 T radeon_fence_note_sync
-ffffffff81b2b240 T radeon_fence_driver_start_ring
-ffffffff81b2b440 T radeon_fence_driver_init
-ffffffff81b2b580 T radeon_debugfs_fence_init
-ffffffff81b2b5b0 T radeon_fence_driver_fini
-ffffffff81b2b7a0 T radeon_fence_driver_force_completion
-ffffffff81b2b890 t radeon_fence_get_driver_name
-ffffffff81b2b8c0 t radeon_fence_get_timeline_name
-ffffffff81b2b950 t radeon_fence_enable_signaling
-ffffffff81b2bb40 t radeon_fence_is_signaled
-ffffffff81b2bc70 t radeon_fence_default_wait
-ffffffff81b2bf70 t radeon_fence_any_seq_signaled
-ffffffff81b2c0b0 t radeon_fence_check_lockup
-ffffffff81b2c300 t __delayed_work_tick
-ffffffff81b2c320 t radeon_fence_check_signaled
-ffffffff81b2c450 t radeon_fence_wait_cb
-ffffffff81b2d000 T radeon_gart_table_ram_alloc
-ffffffff81b2d0c0 T radeon_gart_table_ram_free
-ffffffff81b2d120 T radeon_gart_table_vram_alloc
-ffffffff81b2d190 T radeon_gart_table_vram_pin
-ffffffff81b2d2d0 t radeon_bo_reserve
-ffffffff81b2d480 t radeon_bo_unreserve
-ffffffff81b2d570 T radeon_gart_table_vram_unpin
-ffffffff81b2d5f0 T radeon_gart_table_vram_free
-ffffffff81b2d630 T radeon_gart_unbind
-ffffffff81b2d760 T radeon_gart_bind
-ffffffff81b2d880 T radeon_gart_init
-ffffffff81b2d9a0 T radeon_gart_fini
-ffffffff81b2e000 T radeon_gem_object_free
-ffffffff81b2e050 T radeon_gem_object_create
-ffffffff81b2e1f0 T radeon_gem_init
-ffffffff81b2e230 T radeon_gem_fini
-ffffffff81b2e240 T radeon_gem_object_open
-ffffffff81b2e2e0 t radeon_bo_reserve
-ffffffff81b2e520 t radeon_bo_unreserve
-ffffffff81b2e610 T radeon_gem_object_close
-ffffffff81b2e700 T radeon_gem_info_ioctl
-ffffffff81b2e770 T radeon_gem_pread_ioctl
-ffffffff81b2e7c0 T radeon_gem_pwrite_ioctl
-ffffffff81b2e810 T radeon_gem_create_ioctl
-ffffffff81b2e910 T radeon_gem_userptr_ioctl
-ffffffff81b2e940 T radeon_gem_set_domain_ioctl
-ffffffff81b2ea80 T radeon_mode_dumb_mmap
-ffffffff81b2eb10 T radeon_gem_mmap_ioctl
-ffffffff81b2eba0 T radeon_gem_busy_ioctl
-ffffffff81b2ec40 T radeon_gem_wait_idle_ioctl
-ffffffff81b2ed30 T radeon_gem_set_tiling_ioctl
-ffffffff81b2edb0 T radeon_gem_get_tiling_ioctl
-ffffffff81b2ee50 T radeon_gem_va_ioctl
-ffffffff81b2f200 T radeon_gem_op_ioctl
-ffffffff81b2f2e0 T radeon_mode_dumb_create
-ffffffff81b2f3c0 T radeon_gem_debugfs_init
-ffffffff81b30000 T radeon_ddc_probe
-ffffffff81b300c0 T radeon_router_select_ddc_port
-ffffffff81b30240 T radeon_bb_set_bits
-ffffffff81b303b0 T radeon_bb_set_dir
-ffffffff81b303e0 T radeon_bb_read_bits
-ffffffff81b304d0 T radeon_acquire_bus
-ffffffff81b30a10 T radeon_release_bus
-ffffffff81b30bd0 T radeon_send_start
-ffffffff81b30bf0 T radeon_send_stop
-ffffffff81b30c10 T radeon_initiate_xfer
-ffffffff81b30c30 T radeon_read_byte
-ffffffff81b30c50 T radeon_write_byte
-ffffffff81b30c70 T radeon_i2c_create
-ffffffff81b30e80 T radeon_i2c_destroy
-ffffffff81b30ee0 T radeon_i2c_init
-ffffffff81b30f00 T radeon_i2c_fini
-ffffffff81b30f90 T radeon_i2c_add
-ffffffff81b31140 T radeon_i2c_lookup
-ffffffff81b31300 T radeon_i2c_get_byte
-ffffffff81b31380 T radeon_i2c_put_byte
-ffffffff81b313f0 T radeon_router_select_cd_port
-ffffffff81b31570 t radeon_hw_i2c_xfer
-ffffffff81b32410 t radeon_hw_i2c_func
-ffffffff81b32440 t r100_hw_i2c_xfer
-ffffffff81b32c80 t radeon_get_i2c_prescale
-ffffffff81b33000 T radeon_ib_get
-ffffffff81b33100 T radeon_ib_free
-ffffffff81b33150 T radeon_ib_schedule
-ffffffff81b333e0 T radeon_ib_pool_init
-ffffffff81b33470 T radeon_ib_pool_fini
-ffffffff81b334e0 T radeon_ib_ring_tests
-ffffffff81b34000 T radeon_driver_irq_handler_kms
-ffffffff81b34050 T radeon_driver_irq_preinstall_kms
-ffffffff81b34140 T radeon_driver_irq_postinstall_kms
-ffffffff81b34190 T radeon_driver_irq_uninstall_kms
-ffffffff81b342a0 T radeon_msi_ok
-ffffffff81b343a0 T radeon_irq_kms_init
-ffffffff81b344d0 t radeon_hotplug_work_func
-ffffffff81b34570 t radeon_dp_work_func
-ffffffff81b345e0 T radeon_irq_kms_fini
-ffffffff81b34640 T radeon_irq_kms_sw_irq_get
-ffffffff81b346e0 T radeon_irq_kms_sw_irq_get_delayed
-ffffffff81b34720 T radeon_irq_kms_sw_irq_put
-ffffffff81b347b0 T radeon_irq_kms_pflip_irq_get
-ffffffff81b34860 T radeon_irq_kms_pflip_irq_put
-ffffffff81b34900 T radeon_irq_kms_enable_afmt
-ffffffff81b34980 T radeon_irq_kms_disable_afmt
-ffffffff81b34a00 T radeon_irq_kms_enable_hpd
-ffffffff81b34ae0 T radeon_irq_kms_disable_hpd
-ffffffff81b34bc0 T radeon_irq_kms_set_irq_n_enabled
-ffffffff81b34ce0 t __delayed_work_tick
-ffffffff81b35000 T radeondrm_probe
-ffffffff81b35060 T radeondrm_attach_kms
-ffffffff81b35730 T radeondrm_detach_kms
-ffffffff81b357c0 T radeondrm_activate_kms
-ffffffff81b35870 T radeondrm_wsioctl
-ffffffff81b358e0 T radeondrm_wsmmap
-ffffffff81b35910 T radeondrm_alloc_screen
-ffffffff81b35940 T radeondrm_free_screen
-ffffffff81b35950 T radeondrm_show_screen
-ffffffff81b359d0 T radeondrm_enter_ddb
-ffffffff81b35a30 T radeondrm_doswitch
-ffffffff81b35b30 T radeondrm_attachhook
-ffffffff81b35e40 T radeondrm_forcedetach
-ffffffff81b35ef0 T radeon_driver_lastclose_kms
-ffffffff81b35f00 T radeon_driver_open_kms
-ffffffff81b36030 t radeon_bo_reserve
-ffffffff81b361e0 T radeon_driver_postclose_kms
-ffffffff81b363f0 T radeon_get_vblank_counter_kms
-ffffffff81b36580 T radeon_enable_vblank_kms
-ffffffff81b36620 T radeon_disable_vblank_kms
-ffffffff81b366b0 t radeon_info_ioctl
-ffffffff81b38000 T radeon_crtc_set_base
-ffffffff81b38020 T radeon_crtc_do_set_base
-ffffffff81b38610 T radeon_crtc_set_base_atomic
-ffffffff81b38630 t radeon_bo_reserve
-ffffffff81b387e0 t radeon_bo_unreserve
-ffffffff81b388d0 T radeon_legacy_init_crtc
-ffffffff81b38910 t radeon_crtc_dpms
-ffffffff81b38ba0 t radeon_crtc_prepare
-ffffffff81b38c10 t radeon_crtc_commit
-ffffffff81b38c80 t radeon_crtc_mode_fixup
-ffffffff81b38c90 t radeon_crtc_mode_set
-ffffffff81b3a2a0 t radeon_crtc_disable
-ffffffff81b3b000 T radeon_legacy_get_backlight_level
-ffffffff81b3b060 T radeon_legacy_set_backlight_level
-ffffffff81b3b0b0 t radeon_legacy_lvds_update
-ffffffff81b3b4c0 T radeon_legacy_backlight_init
-ffffffff81b3b690 t radeon_legacy_backlight_get_brightness
-ffffffff81b3b700 T radeon_add_legacy_encoder
-ffffffff81b3ba80 t radeon_legacy_backlight_update_status
-ffffffff81b3bb20 t radeon_lvds_enc_destroy
-ffffffff81b3bba0 t radeon_legacy_lvds_dpms
-ffffffff81b3bbc0 t radeon_legacy_mode_fixup
-ffffffff81b3bc20 t radeon_legacy_lvds_prepare
-ffffffff81b3bc90 t radeon_legacy_lvds_commit
-ffffffff81b3bcf0 t radeon_legacy_lvds_mode_set
-ffffffff81b3bf10 t radeon_legacy_encoder_disable
-ffffffff81b3bf60 t radeon_legacy_tmds_int_dpms
-ffffffff81b3c020 t radeon_legacy_tmds_int_prepare
-ffffffff81b3c0e0 t radeon_legacy_tmds_int_commit
-ffffffff81b3c1a0 t radeon_legacy_tmds_int_mode_set
-ffffffff81b3c430 t radeon_legacy_primary_dac_dpms
-ffffffff81b3c5b0 t radeon_legacy_primary_dac_prepare
-ffffffff81b3c600 t radeon_legacy_primary_dac_commit
-ffffffff81b3c650 t radeon_legacy_primary_dac_mode_set
-ffffffff81b3c870 t radeon_legacy_primary_dac_detect
-ffffffff81b3cb40 t radeon_legacy_tv_dac_dpms
-ffffffff81b3cda0 t radeon_legacy_tv_dac_prepare
-ffffffff81b3cdf0 t radeon_legacy_tv_dac_commit
-ffffffff81b3ce40 t radeon_legacy_tv_dac_mode_set
-ffffffff81b3d330 t radeon_legacy_tv_dac_detect
-ffffffff81b3e410 t radeon_ext_tmds_enc_destroy
-ffffffff81b3e450 t radeon_legacy_tmds_ext_dpms
-ffffffff81b3e520 t radeon_legacy_tmds_ext_prepare
-ffffffff81b3e5d0 t radeon_legacy_tmds_ext_commit
-ffffffff81b3e680 t radeon_legacy_tmds_ext_mode_set
-ffffffff81b3f000 T radeon_legacy_tv_mode_set
-ffffffff81b3ffa0 t radeon_wait_pll_lock
-ffffffff81b40150 T radeon_legacy_tv_adjust_crtc_reg
-ffffffff81b40260 T radeon_legacy_tv_adjust_pll1
-ffffffff81b40350 T radeon_legacy_tv_adjust_pll2
-ffffffff81b41000 T radeon_ttm_bo_is_radeon_bo
-ffffffff81b41030 t radeon_ttm_bo_destroy
-ffffffff81b41170 T radeon_ttm_placement_from_domain
-ffffffff81b41350 T radeon_bo_create
-ffffffff81b41540 T radeon_bo_kmap
-ffffffff81b41600 T radeon_bo_check_tiling
-ffffffff81b416d0 T radeon_bo_kunmap
-ffffffff81b41750 T radeon_bo_ref
-ffffffff81b41790 T radeon_bo_unref
-ffffffff81b417e0 T radeon_bo_pin_restricted
-ffffffff81b41a70 T radeon_bo_pin
-ffffffff81b41a90 T radeon_bo_unpin
-ffffffff81b41c00 T radeon_bo_evict_vram
-ffffffff81b41c20 T radeon_bo_force_delete
-ffffffff81b41d70 T radeon_bo_init
-ffffffff81b41e10 T radeon_bo_fini
-ffffffff81b41e50 T radeon_bo_list_validate
-ffffffff81b420e0 T radeon_bo_get_surface_reg
-ffffffff81b42360 T radeon_bo_set_tiling_flags
-ffffffff81b424a0 T radeon_bo_get_tiling_flags
-ffffffff81b424e0 T radeon_bo_move_notify
-ffffffff81b42610 T radeon_bo_fault_reserve_notify
-ffffffff81b428f0 T radeon_bo_wait
-ffffffff81b42980 t ttm_bo_reserve
-ffffffff81b42b50 t ttm_bo_unreserve
-ffffffff81b42c30 T radeon_bo_fence
-ffffffff81b43000 T radeon_pm_get_type_index
-ffffffff81b43070 T radeon_pm_acpi_event_handler
-ffffffff81b43260 t radeon_pm_set_clocks
-ffffffff81b43af0 T radeon_dpm_enable_uvd
-ffffffff81b43bb0 T radeon_pm_compute_clocks
-ffffffff81b44650 T radeon_dpm_enable_vce
-ffffffff81b446b0 T radeon_pm_suspend
-ffffffff81b447a0 T radeon_pm_resume
-ffffffff81b44a90 T radeon_pm_init
-ffffffff81b44fb0 T radeon_pm_late_init
-ffffffff81b45060 T radeon_pm_fini
-ffffffff81b45190 t radeon_dpm_thermal_work_handler
-ffffffff81b45250 t radeon_dynpm_idle_work_handler
-ffffffff81b45530 t __delayed_work_tick
-ffffffff81b46000 T radeon_gem_prime_res_obj
-ffffffff81b46030 T radeon_gem_prime_export
-ffffffff81b47000 T radeon_ring_supports_scratch_reg
-ffffffff81b47030 T radeon_ring_free_size
-ffffffff81b470d0 T radeon_ring_lockup_update
-ffffffff81b47130 T radeon_ring_alloc
-ffffffff81b472b0 T radeon_ring_lock
-ffffffff81b47330 T radeon_ring_commit
-ffffffff81b47430 T radeon_ring_unlock_commit
-ffffffff81b47460 T radeon_ring_undo
-ffffffff81b47490 T radeon_ring_unlock_undo
-ffffffff81b474b0 T radeon_ring_test_lockup
-ffffffff81b475c0 T radeon_ring_backup
-ffffffff81b47790 T radeon_ring_restore
-ffffffff81b47930 T radeon_ring_init
-ffffffff81b47b10 t radeon_bo_reserve
-ffffffff81b47cc0 t radeon_bo_unreserve
-ffffffff81b47db0 T radeon_ring_fini
-ffffffff81b48000 T radeon_sa_bo_manager_init
-ffffffff81b481a0 T radeon_sa_bo_manager_fini
-ffffffff81b48380 T radeon_sa_bo_manager_start
-ffffffff81b484b0 t radeon_bo_reserve
-ffffffff81b48660 t radeon_bo_unreserve
-ffffffff81b48750 T radeon_sa_bo_manager_suspend
-ffffffff81b487f0 T radeon_sa_bo_new
-ffffffff81b49060 T radeon_sa_bo_free
-ffffffff81b4a000 T radeon_semaphore_create
-ffffffff81b4a0e0 T radeon_semaphore_emit_signal
-ffffffff81b4a170 T radeon_semaphore_emit_wait
-ffffffff81b4a200 T radeon_semaphore_free
-ffffffff81b4b000 T radeon_sync_create
-ffffffff81b4b090 T radeon_sync_fence
-ffffffff81b4b140 T radeon_sync_resv
-ffffffff81b4b350 T radeon_sync_rings
-ffffffff81b4b530 T radeon_sync_free
-ffffffff81b4c000 T radeon_test_moves
-ffffffff81b4c070 t radeon_do_test_moves
-ffffffff81b4c600 T radeon_test_ring_sync
-ffffffff81b4c8c0 t radeon_test_create_and_emit_fence
-ffffffff81b4ca30 T radeon_test_syncing
-ffffffff81b4cc10 t radeon_test_ring_sync2
-ffffffff81b4cf70 t radeon_bo_reserve
-ffffffff81b4d120 t radeon_bo_unreserve
-ffffffff81b4e000 T radeon_ttm_tt_set_userptr
-ffffffff81b4e050 T radeon_ttm_tt_has_userptr
-ffffffff81b4e0a0 T radeon_ttm_tt_is_readonly
-ffffffff81b4e0e0 T radeon_ttm_init
-ffffffff81b4e390 T radeon_ttm_set_active_vram_size
-ffffffff81b4e3d0 t radeon_bo_reserve
-ffffffff81b4e580 t radeon_bo_unreserve
-ffffffff81b4e670 T radeon_ttm_fini
-ffffffff81b4e750 T radeon_mmap
-ffffffff81b4e7f0 t radeon_ttm_fault
-ffffffff81b4e8b0 t radeon_ttm_backend_bind
-ffffffff81b4e990 t radeon_ttm_backend_unbind
-ffffffff81b4e9f0 t radeon_ttm_backend_destroy
-ffffffff81b4ea20 t radeon_ttm_mem_global_init
-ffffffff81b4ea30 t radeon_ttm_mem_global_release
-ffffffff81b4ea40 t radeon_ttm_tt_create
-ffffffff81b4eb20 t radeon_ttm_tt_populate
-ffffffff81b4ebf0 t radeon_ttm_tt_unpopulate
-ffffffff81b4ec90 t radeon_invalidate_caches
-ffffffff81b4ecc0 t radeon_init_mem_type
-ffffffff81b4edd0 t radeon_evict_flags
-ffffffff81b4ef40 t radeon_bo_move
-ffffffff81b4f310 t radeon_verify_access
-ffffffff81b4f380 t radeon_ttm_io_mem_reserve
-ffffffff81b4f460 t radeon_ttm_io_mem_free
-ffffffff81b4f490 t radeon_move_blit
-ffffffff81b50000 T radeon_ucode_print_mc_hdr
-ffffffff81b50050 T radeon_ucode_print_smc_hdr
-ffffffff81b500a0 T radeon_ucode_print_gfx_hdr
-ffffffff81b500f0 T radeon_ucode_print_rlc_hdr
-ffffffff81b50140 T radeon_ucode_print_sdma_hdr
-ffffffff81b50190 T radeon_ucode_validate
-ffffffff81b51000 T radeon_uvd_init
-ffffffff81b514d0 t radeon_uvd_idle_work_handler
-ffffffff81b516a0 t radeon_bo_reserve
-ffffffff81b518e0 t radeon_bo_unreserve
-ffffffff81b519d0 T radeon_uvd_fini
-ffffffff81b51a90 T radeon_uvd_suspend
-ffffffff81b51c60 T radeon_uvd_note_usage
-ffffffff81b51ea0 T radeon_uvd_get_destroy_msg
-ffffffff81b51fb0 T radeon_uvd_resume
-ffffffff81b52040 T radeon_uvd_force_into_uvd_segment
-ffffffff81b520e0 T radeon_uvd_free_handles
-ffffffff81b522a0 T radeon_uvd_cs_parse
-ffffffff81b52a30 T radeon_uvd_get_create_msg
-ffffffff81b52b80 t radeon_uvd_send_msg
-ffffffff81b52d20 T radeon_uvd_calc_upll_dividers
-ffffffff81b52ec0 T radeon_uvd_send_upll_ctlreq
-ffffffff81b53290 t __delayed_work_tick
-ffffffff81b54000 T radeon_vce_init
-ffffffff81b545c0 t radeon_vce_idle_work_handler
-ffffffff81b54690 t radeon_bo_reserve
-ffffffff81b54840 t radeon_bo_unreserve
-ffffffff81b54930 T radeon_vce_fini
-ffffffff81b549b0 T radeon_vce_suspend
-ffffffff81b54a90 T radeon_vce_resume
-ffffffff81b54be0 T radeon_vce_note_usage
-ffffffff81b54cf0 T radeon_vce_free_handles
-ffffffff81b54db0 T radeon_vce_get_destroy_msg
-ffffffff81b55050 T radeon_vce_get_create_msg
-ffffffff81b55410 T radeon_vce_cs_reloc
-ffffffff81b55520 T radeon_vce_cs_parse
-ffffffff81b55d10 T radeon_vce_semaphore_emit
-ffffffff81b55ed0 T radeon_vce_ib_execute
-ffffffff81b56060 T radeon_vce_fence_emit
-ffffffff81b56290 T radeon_vce_ring_test
-ffffffff81b563e0 T radeon_vce_ib_test
-ffffffff81b56500 t __delayed_work_tick
-ffffffff81b57000 T radeon_vm_manager_init
-ffffffff81b57060 T radeon_vm_manager_fini
-ffffffff81b57180 T radeon_vm_get_bos
-ffffffff81b572b0 T radeon_vm_grab_id
-ffffffff81b57430 T radeon_vm_flush
-ffffffff81b57570 T radeon_vm_fence
-ffffffff81b57620 T radeon_vm_bo_find
-ffffffff81b57680 T radeon_vm_bo_add
-ffffffff81b57760 T radeon_vm_bo_set_addr
-ffffffff81b57b10 t radeon_bo_unreserve
-ffffffff81b57c00 t radeon_vm_clear_bo
-ffffffff81b57de0 T radeon_vm_map_gart
-ffffffff81b57e20 T radeon_vm_update_page_directory
-ffffffff81b58110 T radeon_vm_bo_update
-ffffffff81b58780 T radeon_vm_clear_freed
-ffffffff81b58860 T radeon_vm_clear_invalids
-ffffffff81b58900 T radeon_vm_bo_rmv
-ffffffff81b589d0 T radeon_vm_bo_invalidate
-ffffffff81b58a80 T radeon_vm_init
-ffffffff81b58ce0 T radeon_vm_fini
-ffffffff81b59030 t radeon_bo_reserve
-ffffffff81b591e0 t radeon_vm_frag_ptes
-ffffffff81b5a000 T rs400_gart_adjust_size
-ffffffff81b5a0c0 T rs400_gart_tlb_flush
-ffffffff81b5a140 T rs400_gart_init
-ffffffff81b5a230 T rs400_gart_enable
-ffffffff81b5a5b0 T rs400_gart_disable
-ffffffff81b5a610 T rs400_gart_fini
-ffffffff81b5a680 T rs400_gart_get_page_entry
-ffffffff81b5a6e0 T rs400_gart_set_page
-ffffffff81b5a710 T rs400_mc_wait_for_idle
-ffffffff81b5a7a0 T rs400_mc_rreg
-ffffffff81b5a860 T rs400_mc_wreg
-ffffffff81b5a910 T rs400_resume
-ffffffff81b5aa70 t rs400_mc_program
-ffffffff81b5ab80 t rs400_startup
-ffffffff81b5ada0 T rs400_suspend
-ffffffff81b5ae40 T rs400_fini
-ffffffff81b5af30 T rs400_init
-ffffffff81b5c000 T avivo_wait_for_vblank
-ffffffff81b5c300 T rs600_page_flip
-ffffffff81b5c590 T rs600_page_flip_pending
-ffffffff81b5c610 T avivo_program_fmt
-ffffffff81b5c750 T rs600_pm_misc
-ffffffff81b5ca60 T rs600_pm_prepare
-ffffffff81b5cb80 T rs600_pm_finish
-ffffffff81b5cca0 T rs600_hpd_sense
-ffffffff81b5cd20 T rs600_hpd_set_polarity
-ffffffff81b5ce50 T rs600_hpd_init
-ffffffff81b5cf50 T rs600_hpd_fini
-ffffffff81b5d020 T rs600_asic_reset
-ffffffff81b5d3f0 T rs600_gart_tlb_flush
-ffffffff81b5d4c0 T rs600_gart_get_page_entry
-ffffffff81b5d520 T rs600_gart_set_page
-ffffffff81b5d560 T rs600_irq_set
-ffffffff81b5d800 T rs600_irq_disable
-ffffffff81b5d8b0 t rs600_irq_ack
-ffffffff81b5db30 T rs600_irq_process
-ffffffff81b5de60 T rs600_get_vblank_counter
-ffffffff81b5dea0 T rs600_mc_wait_for_idle
-ffffffff81b5df30 T rs600_bandwidth_update
-ffffffff81b5e0a0 T rs600_mc_rreg
-ffffffff81b5e140 T rs600_mc_wreg
-ffffffff81b5e1d0 T rs600_set_safe_registers
-ffffffff81b5e210 T rs600_resume
-ffffffff81b5e370 t rs600_startup
-ffffffff81b5ebf0 T rs600_suspend
-ffffffff81b5ed30 T rs600_fini
-ffffffff81b5ee30 T rs600_init
-ffffffff81b60000 T rs690_mc_wait_for_idle
-ffffffff81b60090 T rs690_pm_info
-ffffffff81b60320 T rs690_line_buffer_adjust
-ffffffff81b60450 T rs690_bandwidth_update
-ffffffff81b607f0 t rs690_crtc_bandwidth_compute
-ffffffff81b60be0 t rs690_compute_mode_priority
-ffffffff81b60fd0 T rs690_mc_rreg
-ffffffff81b61090 T rs690_mc_wreg
-ffffffff81b61140 T rs690_resume
-ffffffff81b61250 t rs690_startup
-ffffffff81b61560 T rs690_suspend
-ffffffff81b615c0 T rs690_fini
-ffffffff81b61660 T rs690_init
-ffffffff81b62000 T rs780_dpm_enable
-ffffffff81b62f70 T rs780_dpm_disable
-ffffffff81b63090 T rs780_dpm_set_power_state
-ffffffff81b63500 t rs780_force_voltage
-ffffffff81b636e0 t rs780_enable_voltage_scaling
-ffffffff81b63950 T rs780_dpm_setup_asic
-ffffffff81b63980 T rs780_dpm_display_configuration_changed
-ffffffff81b63b10 T rs780_dpm_init
-ffffffff81b64070 T rs780_dpm_print_power_state
-ffffffff81b64100 T rs780_dpm_fini
-ffffffff81b64190 T rs780_dpm_get_sclk
-ffffffff81b641d0 T rs780_dpm_get_mclk
-ffffffff81b64200 T rs780_dpm_debugfs_print_current_performance_level
-ffffffff81b64250 T rs780_dpm_get_current_sclk
-ffffffff81b64300 T rs780_dpm_get_current_mclk
-ffffffff81b64330 T rs780_dpm_force_performance_level
-ffffffff81b645c0 t rs780_force_fbdiv
-ffffffff81b65000 T rv515_debugfs
-ffffffff81b65050 T rv515_ring_start
-ffffffff81b65b80 T rv515_mc_wait_for_idle
-ffffffff81b65c10 T rv515_vga_render_disable
-ffffffff81b65c70 T rv515_mc_rreg
-ffffffff81b65d30 T rv515_mc_wreg
-ffffffff81b65de0 T rv515_mc_stop
-ffffffff81b66450 T rv515_mc_resume
-ffffffff81b66b20 T rv515_clock_startup
-ffffffff81b66bf0 T rv515_resume
-ffffffff81b66e80 t rv515_startup
-ffffffff81b673b0 T rv515_suspend
-ffffffff81b67410 T rv515_set_safe_registers
-ffffffff81b67450 T rv515_fini
-ffffffff81b674f0 T rv515_init
-ffffffff81b67820 T atom_rv515_force_tv_scaler
-ffffffff81b6b390 T rv515_bandwidth_avivo_update
-ffffffff81b6b540 t rv515_crtc_bandwidth_compute
-ffffffff81b6b890 t rv515_compute_mode_priority
-ffffffff81b6bca0 T rv515_bandwidth_update
-ffffffff81b6c000 T rv6xx_dpm_enable
-ffffffff81b6c920 t rv6xx_calculate_stepping_parameters
-ffffffff81b6caf0 t rv6xx_program_stepping_parameters_except_lowest_entry
-ffffffff81b6d230 t rv6xx_program_stepping_parameters_lowest_entry
-ffffffff81b6d330 T rv6xx_dpm_disable
-ffffffff81b6d7b0 T rv6xx_dpm_set_power_state
-ffffffff81b6e310 T rv6xx_setup_asic
-ffffffff81b6e450 T rv6xx_dpm_display_configuration_changed
-ffffffff81b6e4f0 T rv6xx_dpm_init
-ffffffff81b6ea50 T rv6xx_dpm_print_power_state
-ffffffff81b6eb00 T rv6xx_dpm_debugfs_print_current_performance_level
-ffffffff81b6eb30 T rv6xx_dpm_get_current_sclk
-ffffffff81b6ebb0 T rv6xx_dpm_get_current_mclk
-ffffffff81b6ec30 T rv6xx_dpm_fini
-ffffffff81b6ecc0 T rv6xx_dpm_get_sclk
-ffffffff81b6ed00 T rv6xx_dpm_get_mclk
-ffffffff81b6ed40 T rv6xx_dpm_force_performance_level
-ffffffff81b6eee0 t rv6xx_generate_steps
-ffffffff81b6f200 t rv6xx_output_stepping
-ffffffff81b6f320 t rv6xx_program_mclk_stepping_entry
-ffffffff81b6f600 t rv6xx_program_engine_spread_spectrum
-ffffffff81b6f980 t rv6xx_step_sw_voltage
-ffffffff81b70000 T rv730_populate_sclk_value
-ffffffff81b70250 T rv730_populate_mclk_value
-ffffffff81b70490 T rv730_read_clock_registers
-ffffffff81b70650 T rv730_populate_smc_acpi_state
-ffffffff81b70800 T rv730_populate_smc_initial_state
-ffffffff81b709c0 T rv730_program_memory_timing_parameters
-ffffffff81b70c90 T rv730_start_dpm
-ffffffff81b70d70 T rv730_stop_dpm
-ffffffff81b70e60 T rv730_program_dcodt
-ffffffff81b70f70 T rv730_get_odt_values
-ffffffff81b72000 T rv740_get_decoded_reference_divider
-ffffffff81b720a0 T rv740_get_dll_speed
-ffffffff81b721b0 T rv740_populate_sclk_value
-ffffffff81b723b0 T rv740_populate_mclk_value
-ffffffff81b72830 T rv740_read_clock_registers
-ffffffff81b72a10 T rv740_populate_smc_acpi_state
-ffffffff81b72c40 T rv740_enable_mclk_spread_spectrum
-ffffffff81b72cb0 T rv740_get_mclk_frequency_ratio
-ffffffff81b73000 T rv770_set_uvd_clocks
-ffffffff81b73740 T rv770_get_xclk
-ffffffff81b737b0 T rv770_page_flip
-ffffffff81b73aa0 T rv770_page_flip_pending
-ffffffff81b73b20 T rv770_get_temp
-ffffffff81b73b90 T rv770_pm_misc
-ffffffff81b73c40 T r700_cp_stop
-ffffffff81b73ce0 T r700_cp_fini
-ffffffff81b73d80 T rv770_set_clk_bypass_mode
-ffffffff81b73ee0 T r700_vram_gtt_location
-ffffffff81b74070 T rv770_resume
-ffffffff81b74100 t rv770_init_golden_registers
-ffffffff81b74290 t rv770_startup
-ffffffff81b76b20 T rv770_suspend
-ffffffff81b76c00 t rv770_pcie_gart_disable
-ffffffff81b76e40 T rv770_init
-ffffffff81b77300 T rv770_fini
-ffffffff81b78000 T rv770_copy_dma
-ffffffff81b79000 T rv770_get_ps
-ffffffff81b79030 T rv770_get_pi
-ffffffff81b79060 T evergreen_get_pi
-ffffffff81b79090 T rv770_restore_cgcg
-ffffffff81b79160 T rv770_stop_dpm
-ffffffff81b79250 T rv770_dpm_enabled
-ffffffff81b792a0 T rv770_enable_thermal_protection
-ffffffff81b79310 T rv770_enable_acpi_pm
-ffffffff81b79370 T rv770_get_seq_value
-ffffffff81b793a0 T rv770_write_smc_soft_register
-ffffffff81b793d0 T rv770_populate_smc_t
-ffffffff81b79570 T rv770_populate_smc_sp
-ffffffff81b795d0 T rv770_map_clkf_to_ibias
-ffffffff81b79630 T rv770_populate_vddc_value
-ffffffff81b796f0 T rv770_populate_mvdd_value
-ffffffff81b79740 T rv770_calculate_memory_refresh_rate
-ffffffff81b797e0 T rv770_enable_backbias
-ffffffff81b79850 T rv770_setup_bsp
-ffffffff81b79920 T rv770_program_git
-ffffffff81b79980 T rv770_program_tp
-ffffffff81b79a20 T rv770_program_tpp
-ffffffff81b79a50 T rv770_program_sstp
-ffffffff81b79a80 T rv770_program_engine_speed_parameters
-ffffffff81b79ae0 T rv770_program_vc
-ffffffff81b79b10 T rv770_clear_vc
-ffffffff81b79b40 T rv770_upload_firmware
-ffffffff81b79b80 T rv770_populate_initial_mvdd_value
-ffffffff81b79bd0 T rv770_get_memory_module_index
-ffffffff81b79c20 T rv770_enable_voltage_control
-ffffffff81b79c90 T rv770_halt_smc
-ffffffff81b79cf0 T rv770_resume_smc
-ffffffff81b79d40 T rv770_set_sw_state
-ffffffff81b79d80 T rv770_set_boot_state
-ffffffff81b79dd0 T rv770_set_uvd_clock_before_set_eng_clock
-ffffffff81b79e30 T rv770_set_uvd_clock_after_set_eng_clock
-ffffffff81b79ea0 T rv770_restrict_performance_levels_before_switch
-ffffffff81b79f00 T rv770_dpm_force_performance_level
-ffffffff81b79fc0 T r7xx_start_smc
-ffffffff81b79fe0 T r7xx_stop_smc
-ffffffff81b7a000 T rv770_read_voltage_smio_registers
-ffffffff81b7a060 T rv770_reset_smio_status
-ffffffff81b7a190 T rv770_get_memory_type
-ffffffff81b7a1f0 T rv770_get_pcie_gen2_status
-ffffffff81b7a260 T rv770_get_max_vddc
-ffffffff81b7a2c0 T rv770_program_response_times
-ffffffff81b7a400 T rv770_enable_auto_throttle_source
-ffffffff81b7a460 t rv770_set_dpm_event_sources
-ffffffff81b7a570 T rv770_dpm_enable
-ffffffff81b7b870 T rv770_dpm_late_enable
-ffffffff81b7b9d0 T rv770_dpm_disable
-ffffffff81b7bea0 T rv770_dpm_set_power_state
-ffffffff81b7c540 T rv770_dpm_setup_asic
-ffffffff81b7c980 T rv770_dpm_display_configuration_changed
-ffffffff81b7ca20 T rv7xx_parse_power_table
-ffffffff81b7cf50 T rv770_get_engine_memory_ss
-ffffffff81b7cfe0 T rv770_dpm_init
-ffffffff81b7d210 T rv770_dpm_print_power_state
-ffffffff81b7d330 T rv770_dpm_debugfs_print_current_performance_level
-ffffffff81b7d360 T rv770_dpm_get_current_sclk
-ffffffff81b7d3e0 T rv770_dpm_get_current_mclk
-ffffffff81b7d460 T rv770_dpm_fini
-ffffffff81b7d4f0 T rv770_dpm_get_sclk
-ffffffff81b7d530 T rv770_dpm_get_mclk
-ffffffff81b7d570 T rv770_dpm_vblank_too_short
-ffffffff81b7d5d0 t rv770_convert_power_level_to_smc
-ffffffff81b7e000 T rv770_copy_bytes_to_smc
-ffffffff81b7e290 T rv770_start_smc
-ffffffff81b7e2f0 T rv770_reset_smc
-ffffffff81b7e350 T rv770_stop_smc_clock
-ffffffff81b7e3b0 T rv770_start_smc_clock
-ffffffff81b7e410 T rv770_is_smc_running
-ffffffff81b7e470 T rv770_send_msg_to_smc
-ffffffff81b7e5a0 T rv770_wait_for_smc_inactive
-ffffffff81b7e650 T rv770_load_smc_ucode
-ffffffff81b7e800 T rv770_read_smc_sram_dword
-ffffffff81b7e8d0 T rv770_write_smc_sram_dword
-ffffffff81b7f000 T si_get_allowed_info_register
-ffffffff81b7f0b0 T si_get_xclk
-ffffffff81b7f150 T si_get_temp
-ffffffff81b7f1b0 T si_mc_load_microcode
-ffffffff81b7f570 T dce6_bandwidth_update
-ffffffff81b7f9a0 t dce6_program_watermarks
-ffffffff81b804c0 T si_fence_ring_emit
-ffffffff81b80930 T si_ring_ib_execute
-ffffffff81b81100 T si_gpu_check_soft_reset
-ffffffff81b812f0 T si_asic_reset
-ffffffff81b81810 t si_gpu_pci_config_reset
-ffffffff81b81d30 T si_gfx_is_lockup
-ffffffff81b81d90 T si_vram_gtt_location
-ffffffff81b81e30 T si_pcie_gart_tlb_flush
-ffffffff81b81e90 T si_ib_parse
-ffffffff81b82550 T si_vm_init
-ffffffff81b82590 T si_vm_fini
-ffffffff81b825c0 T si_vm_flush
-ffffffff81b82c70 T si_init_uvd_internal_cg
-ffffffff81b82ce0 T si_get_csb_size
-ffffffff81b82d70 T si_get_csb_buffer
-ffffffff81b82f10 T si_rlc_reset
-ffffffff81b82fc0 T si_irq_set
-ffffffff81b83520 t si_disable_interrupt_state
-ffffffff81b83950 T si_irq_process
-ffffffff81b84a40 t si_irq_ack
-ffffffff81b85260 T si_resume
-ffffffff81b852f0 t si_init_golden_registers
-ffffffff81b854b0 t si_startup
-ffffffff81b8a880 T si_suspend
-ffffffff81b8abb0 t si_pcie_gart_disable
-ffffffff81b8ad20 T si_init
-ffffffff81b8c1f0 t si_cp_fini
-ffffffff81b8c300 t si_irq_fini
-ffffffff81b8c420 T si_fini
-ffffffff81b8c630 T si_get_gpu_clock_counter
-ffffffff81b8c710 T si_set_uvd_clocks
-ffffffff81b8ce70 T si_set_vce_clocks
-ffffffff81b8d410 t si_vce_send_vcepll_ctlreq
-ffffffff81b8d670 t dce6_latency_watermark
-ffffffff81b8d890 t si_rlc_stop
-ffffffff81b8daa0 t si_vm_reg_valid
-ffffffff81b8dc00 t si_vm_packet3_cp_dma_check
-ffffffff81b8dd60 t si_update_cg
-ffffffff81b8e550 t si_enable_mgcg
-ffffffff81b8eae0 t si_enable_cgcg
-ffffffff81b90000 T si_dma_is_lockup
-ffffffff81b90080 T si_dma_vm_copy_pages
-ffffffff81b90160 T si_dma_vm_write_pages
-ffffffff81b902e0 T si_dma_vm_set_pages
-ffffffff81b90440 T si_dma_vm_flush
-ffffffff81b908d0 T si_copy_dma
-ffffffff81b91000 T si_dpm_force_performance_level
-ffffffff81b911a0 T si_get_ddr3_mclk_frequency_ratio
-ffffffff81b911f0 T si_get_mclk_frequency_ratio
-ffffffff81b91270 T si_trim_voltage_table_to_fit_state_table
-ffffffff81b91390 T si_dpm_setup_asic
-ffffffff81b91620 T si_fan_ctrl_get_fan_speed_percent
-ffffffff81b916e0 T si_fan_ctrl_set_fan_speed_percent
-ffffffff81b917e0 T si_fan_ctrl_set_mode
-ffffffff81b91b20 T si_fan_ctrl_get_mode
-ffffffff81b91b80 T si_dpm_enable
-ffffffff81b970a0 t si_populate_smc_tdp_limits
-ffffffff81b972a0 T si_dpm_late_enable
-ffffffff81b97460 T si_dpm_disable
-ffffffff81b97830 T si_dpm_pre_set_power_state
-ffffffff81b982e0 T si_dpm_set_power_state
-ffffffff81b99810 T si_dpm_post_set_power_state
-ffffffff81b99840 T si_dpm_display_configuration_changed
-ffffffff81b99960 T si_dpm_init
-ffffffff81b9b4d0 T si_dpm_fini
-ffffffff81b9b570 T si_dpm_debugfs_print_current_performance_level
-ffffffff81b9b5b0 T si_dpm_get_current_sclk
-ffffffff81b9b640 T si_dpm_get_current_mclk
-ffffffff81b9b6d0 t si_get_std_voltage_value
-ffffffff81b9b800 t si_populate_memory_timing_parameters
-ffffffff81b9b940 t si_convert_power_level_to_smc
-ffffffff81b9c1f0 t si_calculate_sclk_params
-ffffffff81b9c410 t si_convert_mc_reg_table_to_smc
-ffffffff81b9c560 t si_program_cac_config_registers
-ffffffff81b9c6d0 t si_set_dpm_event_sources
-ffffffff81b9d000 T si_copy_bytes_to_smc
-ffffffff81b9d330 T si_start_smc
-ffffffff81b9d370 T si_reset_smc
-ffffffff81b9d420 T si_program_jump_on_start
-ffffffff81b9d450 T si_stop_smc_clock
-ffffffff81b9d490 T si_start_smc_clock
-ffffffff81b9d4d0 T si_is_smc_running
-ffffffff81b9d530 T si_send_msg_to_smc
-ffffffff81b9d630 T si_wait_for_smc_inactive
-ffffffff81b9d6d0 T si_load_smc_ucode
-ffffffff81b9d8d0 T si_read_smc_sram_dword
-ffffffff81b9d9f0 T si_write_smc_sram_dword
-ffffffff81b9e000 T sumo_get_pi
-ffffffff81b9e030 T sumo_gfx_clockgating_initialize
-ffffffff81b9e140 T sumo_program_vc
-ffffffff81b9e170 T sumo_clear_vc
-ffffffff81b9e1a0 T sumo_program_sstp
-ffffffff81b9e230 T sumo_take_smu_control
-ffffffff81b9e260 T sumo_get_sleep_divider_from_id
-ffffffff81b9e290 T sumo_get_sleep_divider_id_from_clock
-ffffffff81b9e340 T sumo_dpm_enable
-ffffffff81b9ed50 T sumo_dpm_late_enable
-ffffffff81b9f460 T sumo_dpm_disable
-ffffffff81b9f960 T sumo_dpm_pre_set_power_state
-ffffffff81b9fe30 T sumo_dpm_set_power_state
-ffffffff81ba0990 T sumo_dpm_post_set_power_state
-ffffffff81ba0a30 T sumo_dpm_setup_asic
-ffffffff81ba0b80 T sumo_dpm_display_configuration_changed
-ffffffff81ba0bb0 T sumo_convert_vid2_to_vid7
-ffffffff81ba0c10 T sumo_construct_sclk_voltage_mapping_table
-ffffffff81ba0cd0 T sumo_construct_vid_mapping_table
-ffffffff81ba0e50 T sumo_dpm_init
-ffffffff81ba1760 T sumo_dpm_print_power_state
-ffffffff81ba1870 T sumo_dpm_debugfs_print_current_performance_level
-ffffffff81ba18a0 T sumo_dpm_get_current_sclk
-ffffffff81ba1930 T sumo_dpm_get_current_mclk
-ffffffff81ba1960 T sumo_dpm_fini
-ffffffff81ba19f0 T sumo_dpm_get_sclk
-ffffffff81ba1a40 T sumo_dpm_get_mclk
-ffffffff81ba1a70 T sumo_dpm_force_performance_level
-ffffffff81ba1ff0 t sumo_power_level_enable
-ffffffff81ba21f0 t sumo_program_power_level
-ffffffff81ba2710 t sumo_setup_uvd_clocks
-ffffffff81ba3000 T sumo_initialize_m3_arb
-ffffffff81ba32b0 T sumo_smu_notify_alt_vddnb_change
-ffffffff81ba3340 t sumo_send_msg_to_smu
-ffffffff81ba3510 T sumo_smu_pg_init
-ffffffff81ba3530 T sumo_enable_boost_timer
-ffffffff81ba3670 T sumo_set_tdp_limit
-ffffffff81ba36f0 T sumo_boost_state_enable
-ffffffff81ba3730 T sumo_get_running_fw_version
-ffffffff81ba4000 T trinity_dpm_enable_bapm
-ffffffff81ba4070 T trinity_dpm_enable
-ffffffff81ba45d0 T trinity_dpm_late_enable
-ffffffff81ba4c10 T trinity_dpm_disable
-ffffffff81ba5140 T trinity_dpm_force_performance_level
-ffffffff81ba51f0 T trinity_dpm_pre_set_power_state
-ffffffff81ba57f0 T trinity_dpm_set_power_state
-ffffffff81ba5e60 T trinity_dpm_post_set_power_state
-ffffffff81ba5f00 T trinity_dpm_setup_asic
-ffffffff81ba5f60 T trinity_dpm_display_configuration_changed
-ffffffff81ba5ff0 T trinity_dpm_init
-ffffffff81ba6930 T trinity_dpm_print_power_state
-ffffffff81ba6a50 T trinity_dpm_debugfs_print_current_performance_level
-ffffffff81ba6b00 T trinity_dpm_get_current_sclk
-ffffffff81ba6b70 T trinity_dpm_get_current_mclk
-ffffffff81ba6ba0 T trinity_dpm_fini
-ffffffff81ba6c40 T trinity_dpm_get_sclk
-ffffffff81ba6c90 T trinity_dpm_get_mclk
-ffffffff81ba6cc0 t trinity_program_power_level
-ffffffff81ba7000 T trinity_dpm_bapm_enable
-ffffffff81ba71a0 T trinity_dpm_config
-ffffffff81ba72c0 T trinity_dpm_force_state
-ffffffff81ba73d0 T trinity_dpm_n_levels_disabled
-ffffffff81ba74e0 T trinity_uvd_dpm_config
-ffffffff81ba75e0 T trinity_dpm_no_forced_level
-ffffffff81ba76e0 T trinity_dce_enable_voltage_adjustment
-ffffffff81ba7880 T trinity_gfx_dynamic_mgpg_config
-ffffffff81ba7980 T trinity_acquire_mutex
-ffffffff81ba7a30 T trinity_release_mutex
-ffffffff81ba8000 T uvd_v1_0_get_rptr
-ffffffff81ba8030 T uvd_v1_0_get_wptr
-ffffffff81ba8060 T uvd_v1_0_set_wptr
-ffffffff81ba8090 T uvd_v1_0_fence_emit
-ffffffff81ba8480 T uvd_v1_0_resume
-ffffffff81ba8670 T uvd_v1_0_init
-ffffffff81ba8c40 T uvd_v1_0_start
-ffffffff81ba9640 T uvd_v1_0_fini
-ffffffff81ba9680 T uvd_v1_0_stop
-ffffffff81ba9870 T uvd_v1_0_ring_test
-ffffffff81ba9a50 T uvd_v1_0_semaphore_emit
-ffffffff81ba9a80 T uvd_v1_0_ib_execute
-ffffffff81ba9c10 T uvd_v1_0_ib_test
-ffffffff81baa000 T uvd_v2_2_fence_emit
-ffffffff81baa470 T uvd_v2_2_semaphore_emit
-ffffffff81baa680 T uvd_v2_2_resume
-ffffffff81bab000 T uvd_v3_1_semaphore_emit
-ffffffff81bac000 T uvd_v4_2_resume
-ffffffff81bad000 T vce_v1_0_get_rptr
-ffffffff81bad080 T vce_v1_0_get_wptr
-ffffffff81bad100 T vce_v1_0_set_wptr
-ffffffff81bad180 T vce_v1_0_enable_mgcg
-ffffffff81bad4d0 T vce_v1_0_load_fw
-ffffffff81bad6a0 T vce_v1_0_bo_size
-ffffffff81bad710 T vce_v1_0_resume
-ffffffff81bae2b0 T vce_v1_0_start
-ffffffff81baec30 T vce_v1_0_init
-ffffffff81baf000 T vce_v2_0_enable_mgcg
-ffffffff81baf080 t vce_v2_0_set_dyn_cg
-ffffffff81baf2e0 T vce_v2_0_bo_size
-ffffffff81baf350 T vce_v2_0_resume
-ffffffff81bb0000 t pp_early_init
-ffffffff81bb0110 t pp_late_init
-ffffffff81bb0240 t pp_sw_init
-ffffffff81bb0260 t pp_sw_fini
-ffffffff81bb02f0 t pp_hw_init
-ffffffff81bb0350 t pp_hw_fini
-ffffffff81bb0390 t pp_late_fini
-ffffffff81bb03f0 t pp_suspend
-ffffffff81bb0410 t pp_resume
-ffffffff81bb0430 t pp_is_idle
-ffffffff81bb0460 t pp_wait_for_idle
-ffffffff81bb0490 t pp_sw_reset
-ffffffff81bb04c0 t pp_set_clockgating_state
-ffffffff81bb04f0 t pp_set_powergating_state
-ffffffff81bb0520 t pp_dpm_set_fan_control_mode
-ffffffff81bb05b0 t pp_dpm_get_fan_control_mode
-ffffffff81bb0640 t pp_dpm_set_fan_speed_percent
-ffffffff81bb06d0 t pp_dpm_get_fan_speed_percent
-ffffffff81bb0760 t pp_dpm_force_clock_level
-ffffffff81bb0810 t pp_dpm_print_clock_levels
-ffffffff81bb08c0 t pp_dpm_force_performance_level
-ffffffff81bb09e0 t pp_dpm_get_sclk_od
-ffffffff81bb0a70 t pp_dpm_set_sclk_od
-ffffffff81bb0b00 t pp_dpm_get_mclk_od
-ffffffff81bb0b90 t pp_dpm_set_mclk_od
-ffffffff81bb0c20 t pp_dpm_read_sensor
-ffffffff81bb0ce0 t pp_dpm_get_performance_level
-ffffffff81bb0d50 t pp_dpm_get_current_power_state
-ffffffff81bb0e00 t pp_dpm_get_fan_speed_rpm
-ffffffff81bb0e90 t pp_dpm_get_pp_num_states
-ffffffff81bb1010 t pp_dpm_get_pp_table
-ffffffff81bb1090 t pp_dpm_set_pp_table
-ffffffff81bb1200 t pp_dpm_switch_power_profile
-ffffffff81bb1330 t pp_dpm_get_vce_clock_state
-ffffffff81bb1380 t pp_dpm_dispatch_tasks
-ffffffff81bb1410 t pp_dpm_load_fw
-ffffffff81bb1440 t pp_dpm_fw_loading_complete
-ffffffff81bb1470 t pp_set_powergating_by_smu
-ffffffff81bb15d0 t pp_set_clockgating_by_smu
-ffffffff81bb1630 t pp_set_power_limit
-ffffffff81bb16e0 t pp_get_power_limit
-ffffffff81bb1770 t pp_get_power_profile_mode
-ffffffff81bb17f0 t pp_set_power_profile_mode
-ffffffff81bb18a0 t pp_odn_edit_dpm_table
-ffffffff81bb18f0 t pp_dpm_get_sclk
-ffffffff81bb1980 t pp_dpm_get_mclk
-ffffffff81bb1a10 t pp_display_configuration_change
-ffffffff81bb1a80 t pp_get_display_power_level
-ffffffff81bb1b00 t pp_get_current_clocks
-ffffffff81bb1c40 t pp_get_clock_by_type
-ffffffff81bb1cd0 t pp_get_clock_by_type_with_latency
-ffffffff81bb1d60 t pp_get_clock_by_type_with_voltage
-ffffffff81bb1df0 t pp_set_watermarks_for_clocks_ranges
-ffffffff81bb1e70 t pp_display_clock_voltage_request
-ffffffff81bb1ef0 t pp_get_display_mode_validation_clocks
-ffffffff81bb1f90 t pp_notify_smu_enable_pwe
-ffffffff81bb3000 T phm_setup_asic
-ffffffff81bb3050 T phm_power_down_asic
-ffffffff81bb30a0 T phm_set_power_state
-ffffffff81bb3110 T phm_enable_dynamic_state_management
-ffffffff81bb31a0 T phm_disable_dynamic_state_management
-ffffffff81bb3220 T phm_force_dpm_levels
-ffffffff81bb3270 T phm_apply_state_adjust_rules
-ffffffff81bb32c0 T phm_apply_clock_adjust_rules
-ffffffff81bb3310 T phm_powerdown_uvd
-ffffffff81bb3360 T phm_enable_clock_power_gatings
-ffffffff81bb33b0 T phm_disable_clock_power_gatings
-ffffffff81bb3400 T phm_pre_display_configuration_changed
-ffffffff81bb3460 T phm_display_configuration_changed
-ffffffff81bb34c0 T phm_notify_smc_display_config_after_ps_adjustment
-ffffffff81bb3520 T phm_stop_thermal_controller
-ffffffff81bb3570 T phm_register_irq_handlers
-ffffffff81bb35c0 T phm_start_thermal_controller
-ffffffff81bb3670 T phm_check_smc_update_required_for_display_configuration
-ffffffff81bb36c0 T phm_check_states_equal
-ffffffff81bb3710 T phm_store_dal_configuration_data
-ffffffff81bb38a0 T phm_get_dal_power_level
-ffffffff81bb38f0 T phm_set_cpu_power_state
-ffffffff81bb3940 T phm_get_performance_level
-ffffffff81bb3990 T phm_get_clock_info
-ffffffff81bb3af0 T phm_get_current_shallow_sleep_clocks
-ffffffff81bb3b40 T phm_get_clock_by_type
-ffffffff81bb3b90 T phm_get_clock_by_type_with_latency
-ffffffff81bb3be0 T phm_get_clock_by_type_with_voltage
-ffffffff81bb3c30 T phm_set_watermarks_for_clocks_ranges
-ffffffff81bb3c80 T phm_display_clock_voltage_request
-ffffffff81bb3cd0 T phm_get_max_high_clocks
-ffffffff81bb3d20 T phm_disable_smc_firmware_ctf
-ffffffff81bb4000 T hwmgr_early_init
-ffffffff81bb44c0 T hwmgr_sw_init
-ffffffff81bb4530 T hwmgr_sw_fini
-ffffffff81bb4580 T hwmgr_hw_init
-ffffffff81bb4750 T hwmgr_hw_fini
-ffffffff81bb4800 T hwmgr_suspend
-ffffffff81bb4870 T hwmgr_resume
-ffffffff81bb4940 T hwmgr_handle_task
-ffffffff81bb5000 T pp_override_get_default_fuse_value
-ffffffff81bb6000 T psm_init_power_state_table
-ffffffff81bb6240 T psm_fini_power_state_table
-ffffffff81bb6300 T psm_set_boot_states
-ffffffff81bb63d0 T psm_set_performance_states
-ffffffff81bb64a0 T psm_set_user_performance_state
-ffffffff81bb6530 T psm_adjust_power_state_dynamic
-ffffffff81bb7000 T atomctrl_initialize_mc_reg_table
-ffffffff81bb7220 T atomctrl_set_engine_dram_timings_rv770
-ffffffff81bb7280 T atomctrl_get_memory_pll_dividers_si
-ffffffff81bb7370 T atomctrl_get_memory_pll_dividers_vi
-ffffffff81bb73e0 T atomctrl_get_memory_pll_dividers_ai
-ffffffff81bb7490 T atomctrl_get_engine_pll_dividers_kong
-ffffffff81bb7510 T atomctrl_get_engine_pll_dividers_vi
-ffffffff81bb75d0 T atomctrl_get_engine_pll_dividers_ai
-ffffffff81bb76b0 T atomctrl_get_dfs_pll_dividers_vi
-ffffffff81bb7770 T atomctrl_get_reference_clock
-ffffffff81bb77d0 T atomctrl_is_voltage_controlled_by_gpio_v3
-ffffffff81bb7880 T atomctrl_get_voltage_table_v3
-ffffffff81bb79d0 T atomctrl_get_pp_assign_pin
-ffffffff81bb7ac0 T atomctrl_calculate_voltage_evv_on_sclk
-ffffffff81bb80c0 T atomctrl_get_voltage_evv_on_sclk
-ffffffff81bb8140 T atomctrl_get_voltage_evv
-ffffffff81bb81f0 T atomctrl_get_mpll_reference_clock
-ffffffff81bb8260 T atomctrl_get_memory_clock_spread_spectrum
-ffffffff81bb8280 t asic_internal_ss_get_ss_asignment
-ffffffff81bb8390 T atomctrl_get_engine_clock_spread_spectrum
-ffffffff81bb83b0 T atomctrl_read_efuse
-ffffffff81bb8440 T atomctrl_set_ac_timing_ai
-ffffffff81bb84a0 T atomctrl_get_voltage_evv_on_sclk_ai
-ffffffff81bb8510 T atomctrl_get_smc_sclk_range_table
-ffffffff81bb85d0 T atomctrl_get_avfs_information
-ffffffff81bb8750 T atomctrl_get_svi2_info
-ffffffff81bb8840 T atomctrl_get_leakage_id_from_efuse
-ffffffff81bb88a0 T atomctrl_get_leakage_vddc_base_on_leakage
-ffffffff81bb8a40 T atomctrl_get_voltage_range
-ffffffff81bb9000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4
-ffffffff81bb90d0 T pp_atomfwctrl_get_voltage_table_v4
-ffffffff81bb9280 T pp_atomfwctrl_get_pp_assign_pin
-ffffffff81bb9360 T pp_atomfwctrl_enter_self_refresh
-ffffffff81bb9390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10
-ffffffff81bb9430 T pp_atomfwctrl_get_avfs_information
-ffffffff81bb9760 T pp_atomfwctrl_get_gpio_information
-ffffffff81bb9800 T pp_atomfwctrl_get_clk_information_by_clkid
-ffffffff81bb9880 T pp_atomfwctrl_get_vbios_bootup_values
-ffffffff81bb9bb0 T pp_atomfwctrl_get_smc_dpm_information
-ffffffff81bba000 T encode_pcie_lane_width
-ffffffff81bba030 T decode_pcie_lane_width
-ffffffff81bbb000 t pp_tables_v1_0_initialize
-ffffffff81bbc360 t pp_tables_v1_0_uninitialize
-ffffffff81bbc500 T get_number_of_powerplay_table_entries_v1_0
-ffffffff81bbc5b0 T get_powerplay_table_entry_v1_0
-ffffffff81bbd000 T pp_tables_get_response_times
-ffffffff81bbd0d0 T pp_tables_get_num_of_entries
-ffffffff81bbd190 T pp_tables_get_entry
-ffffffff81bbd4c0 t init_non_clock_fields
-ffffffff81bbd630 t pp_tables_initialize
-ffffffff81bbea50 t pp_tables_uninitialize
-ffffffff81bbec50 t get_number_of_vce_state_table_entries
-ffffffff81bbed50 t get_vce_state_table_entry
-ffffffff81bbf000 T smu10_init_function_pointers
-ffffffff81bbf040 t smu10_hwmgr_backend_init
-ffffffff81bbf720 t smu10_hwmgr_backend_fini
-ffffffff81bbf850 t smu10_setup_asic_task
-ffffffff81bbf8b0 t smu10_get_power_state_size
-ffffffff81bbf8e0 t smu10_apply_state_adjust_rules
-ffffffff81bbf910 t smu10_dpm_force_dpm_level
-ffffffff81bbfbe0 t smu10_enable_dpm_tasks
-ffffffff81bbfc10 t smu10_disable_dpm_tasks
-ffffffff81bbfc40 t smu10_dpm_patch_boot_state
-ffffffff81bbfc70 t smu10_dpm_get_pp_table_entry
-ffffffff81bbfcc0 t smu10_dpm_get_num_of_pp_table_entries
-ffffffff81bbfd10 t smu10_powergate_vcn
-ffffffff81bbfd70 t smu10_dpm_get_mclk
-ffffffff81bbfdc0 t smu10_dpm_get_sclk
-ffffffff81bbfe10 t smu10_set_power_state_tasks
-ffffffff81bbfe80 t smu10_set_cpu_power_state
-ffffffff81bbfeb0 t smu10_store_cc6_data
-ffffffff81bbff30 t smu10_get_dal_power_level
-ffffffff81bbff60 t smu10_get_performance_level
-ffffffff81bbfff0 t smu10_get_current_shallow_sleep_clocks
-ffffffff81bc0050 t smu10_get_clock_by_type_with_latency
-ffffffff81bc01a0 t smu10_get_clock_by_type_with_voltage
-ffffffff81bc0290 t smu10_set_watermarks_for_clocks_ranges
-ffffffff81bc0300 t smu10_display_clock_voltage_request
-ffffffff81bc03a0 t smu10_get_max_high_clocks
-ffffffff81bc03d0 t smu10_gfx_off_control
-ffffffff81bc0490 t smu10_power_off_asic
-ffffffff81bc04e0 t smu10_force_clock_level
-ffffffff81bc0690 t smu10_print_clock_levels
-ffffffff81bc06e0 t smu10_read_sensor
-ffffffff81bc07a0 t smu10_set_active_display_count
-ffffffff81bc07f0 t smu10_set_deep_sleep_dcefclk
-ffffffff81bc0860 t smu10_powergate_mmhub
-ffffffff81bc0880 t smu10_smus_notify_pwe
-ffffffff81bc08a0 t smu10_dpm_get_pp_table_entry_callback
-ffffffff81bc1000 T smu7_powerdown_uvd
-ffffffff81bc1050 T smu7_disable_clock_power_gating
-ffffffff81bc10e0 T smu7_powergate_uvd
-ffffffff81bc11f0 T smu7_powergate_vce
-ffffffff81bc12d0 T smu7_update_clock_gatings
-ffffffff81bc1670 T smu7_powergate_gfx
-ffffffff81bc2000 T smu7_disable_dpm_tasks
-ffffffff81bc2600 t smu7_avfs_control
-ffffffff81bc26d0 T smu7_reset_asic_tasks
-ffffffff81bc2700 T smu7_get_sleep_divider_id_from_clock
-ffffffff81bc27a0 T smu7_init_function_pointers
-ffffffff81bc2800 t smu7_set_dpm_event_sources
-ffffffff81bc2920 t smu7_copy_and_switch_arb_sets
-ffffffff81bc2b60 t smu7_hwmgr_backend_init
-ffffffff81bc48b0 t smu7_hwmgr_backend_fini
-ffffffff81bc4920 t smu7_setup_asic_task
-ffffffff81bc4c60 t smu7_get_power_state_size
-ffffffff81bc4c90 t smu7_apply_state_adjust_rules
-ffffffff81bc4f40 t smu7_force_dpm_level
-ffffffff81bc53b0 t smu7_enable_dpm_tasks
-ffffffff81bc75e0 t smu7_dpm_patch_boot_state
-ffffffff81bc7720 t smu7_get_pp_table_entry
-ffffffff81bc7b40 t smu7_get_number_of_powerplay_table_entries
-ffffffff81bc7ba0 t smu7_dpm_get_mclk
-ffffffff81bc7c30 t smu7_dpm_get_sclk
-ffffffff81bc7cc0 t smu7_set_power_state_tasks
-ffffffff81bc89f0 t smu7_notify_smc_display_config_after_ps_adjustment
-ffffffff81bc8a40 t smu7_display_configuration_changed_task
-ffffffff81bc8c00 t smu7_set_max_fan_rpm_output
-ffffffff81bc8c30 t smu7_set_max_fan_pwm_output
-ffffffff81bc8c50 t smu7_set_fan_control_mode
-ffffffff81bc8ce0 t smu7_get_fan_control_mode
-ffffffff81bc8d20 t smu7_register_irq_handlers
-ffffffff81bc8dc0 t smu7_check_smc_update_required_for_display_configuration
-ffffffff81bc8e50 t smu7_check_states_equal
-ffffffff81bc9000 t smu7_get_clock_by_type
-ffffffff81bc91e0 t smu7_get_max_high_clocks
-ffffffff81bc9260 t smu7_force_clock_level
-ffffffff81bc9360 t smu7_print_clock_levels
-ffffffff81bc93b0 t smu7_get_sclk_od
-ffffffff81bc9410 t smu7_set_sclk_od
-ffffffff81bc94c0 t smu7_get_mclk_od
-ffffffff81bc9520 t smu7_set_mclk_od
-ffffffff81bc95d0 t smu7_read_sensor
-ffffffff81bc9880 t smu7_notify_cac_buffer_info
-ffffffff81bc9a20 t smu7_get_thermal_temperature_range
-ffffffff81bc9a90 t smu7_get_power_profile_mode
-ffffffff81bc9ae0 t smu7_set_power_profile_mode
-ffffffff81bc9cf0 t smu7_odn_edit_dpm_table
-ffffffff81bc9ea0 t phm_add_voltage
-ffffffff81bc9fb0 t smu7_get_profiling_clk
-ffffffff81bca170 t smu7_check_dpm_table_updated
-ffffffff81bca2b0 t smu7_odn_initial_default_setting
-ffffffff81bca3d0 t get_pcie_lane_support
-ffffffff81bca660 t smu7_get_pp_table_entry_callback_func_v0
-ffffffff81bca810 t smu7_get_pp_table_entry_callback_func_v1
-ffffffff81bcb000 T smu7_enable_didt_config
-ffffffff81bcb2c0 t smu7_program_pt_config_registers
-ffffffff81bcb4c0 t smu7_enable_didt
-ffffffff81bcb690 T smu7_disable_didt_config
-ffffffff81bcb850 T smu7_enable_smc_cac
-ffffffff81bcb8d0 T smu7_disable_smc_cac
-ffffffff81bcb950 T smu7_set_power_limit
-ffffffff81bcb9a0 T smu7_enable_power_containment
-ffffffff81bcbb10 T smu7_disable_power_containment
-ffffffff81bcbc30 T smu7_power_control_set_level
-ffffffff81bcc000 T smu7_fan_ctrl_get_fan_speed_info
-ffffffff81bcc080 T smu7_fan_ctrl_get_fan_speed_percent
-ffffffff81bcc140 T smu7_fan_ctrl_get_fan_speed_rpm
-ffffffff81bcc1f0 T smu7_fan_ctrl_set_static_mode
-ffffffff81bcc320 T smu7_fan_ctrl_set_default_mode
-ffffffff81bcc400 T smu7_fan_ctrl_start_smc_fan_control
-ffffffff81bcc500 T smu7_fan_ctrl_stop_smc_fan_control
-ffffffff81bcc520 T smu7_fan_ctrl_set_fan_speed_percent
-ffffffff81bcc700 T smu7_fan_ctrl_reset_fan_speed_to_default
-ffffffff81bcc8e0 T smu7_fan_ctrl_set_fan_speed_rpm
-ffffffff81bccab0 T smu7_thermal_get_temperature
-ffffffff81bccb10 T smu7_thermal_disable_alert
-ffffffff81bccbb0 T smu7_thermal_stop_thermal_controller
-ffffffff81bccd20 T smu7_start_thermal_controller
-ffffffff81bcd0d0 T smu7_thermal_ctrl_uninitialize_thermal_controller
-ffffffff81bce000 T smu8_dpm_update_uvd_dpm
-ffffffff81bce100 T smu8_init_function_pointers
-ffffffff81bce140 t smu8_hwmgr_backend_init
-ffffffff81bce640 t smu8_hwmgr_backend_fini
-ffffffff81bce6b0 t smu8_setup_asic_task
-ffffffff81bcebb0 t smu8_get_power_state_size
-ffffffff81bcebe0 t smu8_apply_state_adjust_rules
-ffffffff81bced20 t smu8_dpm_force_dpm_level
-ffffffff81bcf010 t smu8_enable_dpm_tasks
-ffffffff81bcf140 t smu8_disable_dpm_tasks
-ffffffff81bcf210 t smu8_dpm_patch_boot_state
-ffffffff81bcf270 t smu8_dpm_get_pp_table_entry
-ffffffff81bcf2c0 t smu8_dpm_get_num_of_pp_table_entries
-ffffffff81bcf310 t smu8_dpm_powerdown_uvd
-ffffffff81bcf350 t smu8_dpm_powergate_vce
-ffffffff81bcf520 t smu8_dpm_powergate_uvd
-ffffffff81bcf620 t smu8_dpm_get_mclk
-ffffffff81bcf650 t smu8_dpm_get_sclk
-ffffffff81bcf6c0 t smu8_set_power_state_tasks
-ffffffff81bcf9c0 t smu8_set_cpu_power_state
-ffffffff81bcfa30 t smu8_store_cc6_data
-ffffffff81bcfac0 t smu8_get_dal_power_level
-ffffffff81bcfb30 t smu8_get_performance_level
-ffffffff81bcfc30 t smu8_get_current_shallow_sleep_clocks
-ffffffff81bcfc90 t smu8_get_clock_by_type
-ffffffff81bcfdf0 t smu8_get_max_high_clocks
-ffffffff81bcfeb0 t smu8_power_off_asic
-ffffffff81bcff20 t smu8_force_clock_level
-ffffffff81bcff80 t smu8_print_clock_levels
-ffffffff81bcffd0 t smu8_read_sensor
-ffffffff81bd02d0 t smu8_notify_cac_buffer_info
-ffffffff81bd0380 t smu8_get_thermal_temperature_range
-ffffffff81bd03d0 t smu8_dpm_get_pp_table_entry_callback
-ffffffff81bd1000 T convert_to_vid
-ffffffff81bd1050 T convert_to_vddc
-ffffffff81bd1090 T phm_set_field_to_u32
-ffffffff81bd10f0 T phm_wait_on_register
-ffffffff81bd1200 T phm_wait_on_indirect_register
-ffffffff81bd1340 T phm_wait_for_register_unequal
-ffffffff81bd1450 T phm_wait_for_indirect_register_unequal
-ffffffff81bd1580 T phm_cf_want_uvd_power_gating
-ffffffff81bd15b0 T phm_cf_want_vce_power_gating
-ffffffff81bd15e0 T phm_trim_voltage_table
-ffffffff81bd1710 T phm_get_svi2_mvdd_voltage_table
-ffffffff81bd18a0 T phm_get_svi2_vddci_voltage_table
-ffffffff81bd1a30 T phm_get_svi2_vdd_voltage_table
-ffffffff81bd1ae0 T phm_trim_voltage_table_to_fit_state_table
-ffffffff81bd1be0 T phm_reset_single_dpm_table
-ffffffff81bd1c40 T phm_setup_pcie_table_entry
-ffffffff81bd1c80 T phm_get_dpm_level_enable_mask_value
-ffffffff81bd1d50 T phm_get_voltage_index
-ffffffff81bd1de0 T phm_get_voltage_id
-ffffffff81bd1e60 T phm_find_closest_vddci
-ffffffff81bd1ec0 T phm_find_boot_level
-ffffffff81bd1f30 T phm_get_sclk_for_voltage_evv
-ffffffff81bd1fe0 T phm_initializa_dynamic_state_adjustment_rule_settings
-ffffffff81bd20a0 T phm_get_lowest_enabled_level
-ffffffff81bd20e0 T phm_apply_dal_min_voltage_request
-ffffffff81bd21c0 T phm_get_voltage_evv_on_sclk
-ffffffff81bd2260 T phm_irq_process
-ffffffff81bd2350 T smu9_register_irq_handlers
-ffffffff81bd2400 T smu_atom_get_data_table
-ffffffff81bd2470 T smu_get_voltage_dependency_table_ppt_v1
-ffffffff81bd2550 T smu_set_watermarks_for_clocks_ranges
-ffffffff81bd3000 T cast_phw_vega10_power_state
-ffffffff81bd3060 T cast_const_phw_vega10_power_state
-ffffffff81bd30c0 T vega10_enable_disable_vce_dpm
-ffffffff81bd3150 T vega10_enable_smc_features
-ffffffff81bd3170 T vega10_display_clock_voltage_request
-ffffffff81bd31f0 T vega10_enable_disable_uvd_dpm
-ffffffff81bd3280 T vega10_hwmgr_init
-ffffffff81bd32c0 t vega10_hwmgr_backend_init
-ffffffff81bd40e0 t vega10_hwmgr_backend_fini
-ffffffff81bd4150 t vega10_setup_asic_task
-ffffffff81bd4280 t vega10_get_power_state_size
-ffffffff81bd42b0 t vega10_apply_state_adjust_rules
-ffffffff81bd4600 t vega10_dpm_force_dpm_level
-ffffffff81bd4b30 t vega10_enable_dpm_tasks
-ffffffff81bd72e0 t vega10_disable_dpm_tasks
-ffffffff81bd78d0 t vega10_patch_boot_state
-ffffffff81bd7900 t vega10_get_pp_table_entry
-ffffffff81bd7960 t vega10_power_gate_vce
-ffffffff81bd7a00 t vega10_power_gate_uvd
-ffffffff81bd7aa0 t vega10_dpm_get_mclk
-ffffffff81bd7b30 t vega10_dpm_get_sclk
-ffffffff81bd7bc0 t vega10_set_power_state_tasks
-ffffffff81bd8430 t vega10_notify_smc_display_config_after_ps_adjustment
-ffffffff81bd85d0 t vega10_display_configuration_changed_task
-ffffffff81bd8690 t vega10_set_fan_control_mode
-ffffffff81bd8700 t vega10_get_fan_control_mode
-ffffffff81bd8740 t vega10_check_smc_update_required_for_display_configuration
-ffffffff81bd87a0 t vega10_check_states_equal
-ffffffff81bd8920 t vega10_get_dal_power_level
-ffffffff81bd8960 t vega10_get_clock_by_type_with_latency
-ffffffff81bd8b80 t vega10_get_clock_by_type_with_voltage
-ffffffff81bd8c60 t vega10_set_watermarks_for_clocks_ranges
-ffffffff81bd8cc0 t vega10_power_off_asic
-ffffffff81bd8d30 t vega10_force_clock_level
-ffffffff81bd8e90 t vega10_print_clock_levels
-ffffffff81bd8ee0 t vega10_get_sclk_od
-ffffffff81bd8f40 t vega10_set_sclk_od
-ffffffff81bd9030 t vega10_get_mclk_od
-ffffffff81bd9090 t vega10_set_mclk_od
-ffffffff81bd9140 t vega10_read_sensor
-ffffffff81bd92f0 t vega10_avfs_enable
-ffffffff81bd93b0 t vega10_notify_cac_buffer_info
-ffffffff81bd9450 t vega10_get_thermal_temperature_range
-ffffffff81bd94a0 t vega10_get_power_profile_mode
-ffffffff81bd94f0 t vega10_set_power_profile_mode
-ffffffff81bd95d0 t vega10_odn_edit_dpm_table
-ffffffff81bd9b30 t vega10_upload_dpm_bootup_level
-ffffffff81bd9c00 t vega10_upload_dpm_max_level
-ffffffff81bd9cb0 t vega10_trim_voltage_table_to_fit_state_table
-ffffffff81bd9db0 t vega10_odn_initial_default_setting
-ffffffff81bd9f80 t vega10_populate_all_graphic_levels
-ffffffff81bda180 t vega10_populate_all_memory_levels
-ffffffff81bda2f0 t vega10_populate_single_gfx_level
-ffffffff81bda450 t vega10_populate_single_soc_level
-ffffffff81bda5b0 t vega10_populate_single_memory_level
-ffffffff81bda730 t vega10_get_pp_table_entry_callback_func
-ffffffff81bdb000 T vega10_enable_didt_config
-ffffffff81bdc6f0 T vega10_disable_didt_config
-ffffffff81bdc980 T vega10_initialize_power_tune_defaults
-ffffffff81bdcab0 T vega10_set_power_limit
-ffffffff81bdcb00 T vega10_enable_power_containment
-ffffffff81bdcc10 T vega10_disable_power_containment
-ffffffff81bdcce0 T vega10_power_control_set_level
-ffffffff81bdcd40 t vega10_didt_set_mask
-ffffffff81bde000 T vega10_pp_tables_initialize
-ffffffff81bdf850 t vega10_pp_tables_uninitialize
-ffffffff81bdfa00 T vega10_get_number_of_powerplay_table_entries
-ffffffff81bdfab0 T vega10_get_powerplay_table_entry
-ffffffff81be0000 T vega10_fan_ctrl_get_fan_speed_info
-ffffffff81be0080 T vega10_fan_ctrl_get_fan_speed_percent
-ffffffff81be0110 T vega10_fan_ctrl_get_fan_speed_rpm
-ffffffff81be01d0 T vega10_fan_ctrl_set_static_mode
-ffffffff81be02e0 T vega10_fan_ctrl_set_default_mode
-ffffffff81be03b0 T vega10_fan_ctrl_start_smc_fan_control
-ffffffff81be0470 T vega10_fan_ctrl_stop_smc_fan_control
-ffffffff81be0530 T vega10_fan_ctrl_set_fan_speed_percent
-ffffffff81be0670 T vega10_fan_ctrl_reset_fan_speed_to_default
-ffffffff81be0730 T vega10_fan_ctrl_set_fan_speed_rpm
-ffffffff81be0870 T vega10_thermal_get_temperature
-ffffffff81be08c0 T vega10_thermal_disable_alert
-ffffffff81be0980 T vega10_thermal_stop_thermal_controller
-ffffffff81be0a60 T vega10_thermal_setup_fan_table
-ffffffff81be0c00 T vega10_thermal_start_smc_fan_control
-ffffffff81be0ca0 T vega10_start_thermal_controller
-ffffffff81be0f40 T vega10_thermal_ctrl_uninitialize_thermal_controller
-ffffffff81be1000 T vega12_enable_disable_vce_dpm
-ffffffff81be1090 T vega12_display_clock_voltage_request
-ffffffff81be1110 T vega12_enable_disable_uvd_dpm
-ffffffff81be11a0 T vega12_hwmgr_init
-ffffffff81be11e0 t vega12_hwmgr_backend_init
-ffffffff81be1a00 t vega12_hwmgr_backend_fini
-ffffffff81be1a50 t vega12_setup_asic_task
-ffffffff81be1a90 t vega12_apply_clocks_adjust_rules
-ffffffff81be1f00 t vega12_dpm_force_dpm_level
-ffffffff81be2350 t vega12_enable_dpm_tasks
-ffffffff81be2bd0 t vega12_disable_dpm_tasks
-ffffffff81be2cc0 t vega12_patch_boot_state
-ffffffff81be2cf0 t vega12_power_gate_vce
-ffffffff81be2d90 t vega12_power_gate_uvd
-ffffffff81be2e30 t vega12_dpm_get_mclk
-ffffffff81be2e80 t vega12_dpm_get_sclk
-ffffffff81be2ed0 t vega12_notify_smc_display_config_after_ps_adjustment
-ffffffff81be3020 t vega12_pre_display_configuration_changed_task
-ffffffff81be3110 t vega12_display_configuration_changed_task
-ffffffff81be31f0 t vega12_set_fan_control_mode
-ffffffff81be3250 t vega12_get_fan_control_mode
-ffffffff81be3290 t vega12_check_smc_update_required_for_display_configuration
-ffffffff81be32f0 t vega12_get_dal_power_level
-ffffffff81be3320 t vega12_get_clock_by_type_with_latency
-ffffffff81be3630 t vega12_get_clock_by_type_with_voltage
-ffffffff81be3660 t vega12_set_watermarks_for_clocks_ranges
-ffffffff81be36e0 t vega12_power_off_asic
-ffffffff81be37e0 t vega12_force_clock_level
-ffffffff81be3940 t vega12_print_clock_levels
-ffffffff81be3990 t vega12_gfx_off_control
-ffffffff81be39f0 t vega12_read_sensor
-ffffffff81be3b30 t vega12_notify_cac_buffer_info
-ffffffff81be3bd0 t vega12_get_thermal_temperature_range
-ffffffff81be3c20 t vega12_upload_dpm_min_level
-ffffffff81be3e30 t vega12_upload_dpm_max_level
-ffffffff81be4010 t vega12_setup_single_dpm_table
-ffffffff81be5000 T vega12_pp_tables_initialize
-ffffffff81be57c0 t vega12_pp_tables_uninitialize
-ffffffff81be6000 T vega12_fan_ctrl_get_fan_speed_info
-ffffffff81be6040 T vega12_fan_ctrl_get_fan_speed_rpm
-ffffffff81be60c0 T vega12_fan_ctrl_start_smc_fan_control
-ffffffff81be60f0 T vega12_fan_ctrl_stop_smc_fan_control
-ffffffff81be6120 T vega12_fan_ctrl_reset_fan_speed_to_default
-ffffffff81be6150 T vega12_thermal_get_temperature
-ffffffff81be61a0 T vega12_thermal_disable_alert
-ffffffff81be61f0 T vega12_thermal_stop_thermal_controller
-ffffffff81be6240 T vega12_thermal_setup_fan_table
-ffffffff81be6260 T vega12_thermal_start_smc_fan_control
-ffffffff81be6290 T vega12_start_thermal_controller
-ffffffff81be7000 T ci_is_smc_ram_running
-ffffffff81be7080 t ci_smu_init
-ffffffff81be70e0 t ci_smu_fini
-ffffffff81be7130 t ci_start_smu
-ffffffff81be7160 t ci_send_msg_to_smc
-ffffffff81be7200 t ci_send_msg_to_smc_with_parameter
-ffffffff81be72b0 t ci_update_smc_table
-ffffffff81be7590 t ci_process_firmware_header
-ffffffff81be7ae0 t ci_update_sclk_threshold
-ffffffff81be7d30 t ci_thermal_setup_fan_table
-ffffffff81be7fa0 t ci_init_smc_table
-ffffffff81be9a00 t ci_populate_all_graphic_levels
-ffffffff81be9ee0 t ci_populate_all_memory_levels
-ffffffff81bea790 t ci_initialize_mc_reg_table
-ffffffff81beb3b0 t ci_get_offsetof
-ffffffff81beb400 t ci_get_mac_definition
-ffffffff81beb440 t ci_is_dpm_running
-ffffffff81beb4c0 t ci_update_dpm_settings
-ffffffff81beb890 t ci_copy_bytes_to_smc
-ffffffff81bebb70 t ci_program_memory_timing_parameters
-ffffffff81bebd50 t ci_populate_smc_voltage_table
-ffffffff81bec000 t fiji_smu_init
-ffffffff81bec090 t fiji_start_smu
-ffffffff81bec610 t fiji_update_smc_table
-ffffffff81bec7c0 t fiji_process_firmware_header
-ffffffff81bec900 t fiji_update_sclk_threshold
-ffffffff81bec9d0 t fiji_thermal_setup_fan_table
-ffffffff81becc60 t fiji_thermal_avfs_enable
-ffffffff81becca0 t fiji_init_smc_table
-ffffffff81bee6b0 t fiji_populate_all_graphic_levels
-ffffffff81beec20 t fiji_populate_all_memory_levels
-ffffffff81bef020 t fiji_initialize_mc_reg_table
-ffffffff81bef1c0 t fiji_get_offsetof
-ffffffff81bef240 t fiji_get_mac_definition
-ffffffff81bef290 t fiji_is_dpm_running
-ffffffff81bef2e0 t fiji_is_hw_avfs_present
-ffffffff81bef350 t fiji_update_dpm_settings
-ffffffff81bef720 t fiji_program_memory_timing_parameters
-ffffffff81bef900 t fiji_get_dependency_volt_by_clk
-ffffffff81bf0000 T iceland_thermal_setup_fan_table
-ffffffff81bf0270 t iceland_smu_init
-ffffffff81bf0300 t iceland_start_smu
-ffffffff81bf04b0 t iceland_request_smu_load_specific_fw
-ffffffff81bf04e0 t iceland_process_firmware_header
-ffffffff81bf0640 t iceland_update_sclk_threshold
-ffffffff81bf0890 t iceland_init_smc_table
-ffffffff81bf1b00 t iceland_populate_all_graphic_levels
-ffffffff81bf2090 t iceland_populate_all_memory_levels
-ffffffff81bf2920 t iceland_initialize_mc_reg_table
-ffffffff81bf3540 t iceland_get_offsetof
-ffffffff81bf35c0 t iceland_get_mac_definition
-ffffffff81bf3620 t iceland_is_dpm_running
-ffffffff81bf3670 t iceland_smu_upload_firmware_image
-ffffffff81bf3940 t iceland_program_memory_timing_parameters
-ffffffff81bf3b20 t iceland_populate_smc_voltage_table
-ffffffff81bf4000 T polaris10_thermal_avfs_enable
-ffffffff81bf4080 t polaris10_smu_init
-ffffffff81bf4110 t polaris10_start_smu
-ffffffff81bf46f0 t polaris10_update_smc_table
-ffffffff81bf4960 t polaris10_process_firmware_header
-ffffffff81bf4aa0 t polaris10_update_sclk_threshold
-ffffffff81bf4b90 t polaris10_thermal_setup_fan_table
-ffffffff81bf4e30 t polaris10_init_smc_table
-ffffffff81bf6840 t polaris10_populate_all_graphic_levels
-ffffffff81bf6eb0 t polaris10_populate_all_memory_levels
-ffffffff81bf7180 t polaris10_get_offsetof
-ffffffff81bf7200 t polaris10_get_mac_definition
-ffffffff81bf7250 t polaris10_is_dpm_running
-ffffffff81bf72a0 t polaris10_is_hw_avfs_present
-ffffffff81bf72f0 t polaris10_update_dpm_settings
-ffffffff81bf76c0 t polaris10_program_memory_timing_parameters
-ffffffff81bf7890 t polaris10_get_dependency_volt_by_clk
-ffffffff81bf7a60 t polaris10_calculate_sclk_params
-ffffffff81bf8000 t smu10_smu_init
-ffffffff81bf8120 t smu10_smu_fini
-ffffffff81bf81c0 t smu10_start_smu
-ffffffff81bf82a0 t smu10_read_arg_from_smc
-ffffffff81bf82c0 t smu10_send_msg_to_smc
-ffffffff81bf83c0 t smu10_send_msg_to_smc_with_parameter
-ffffffff81bf84e0 t smu10_smc_table_manager
-ffffffff81bf9000 T smu7_copy_bytes_from_smc
-ffffffff81bf9260 T smu7_read_smc_sram_dword
-ffffffff81bf9360 T smu7_copy_bytes_to_smc
-ffffffff81bf9670 T smu7_program_jump_on_start
-ffffffff81bf96c0 T smu7_is_smc_ram_running
-ffffffff81bf9740 T smu7_send_msg_to_smc
-ffffffff81bf9800 T smu7_send_msg_to_smc_without_waiting
-ffffffff81bf9850 T smu7_send_msg_to_smc_with_parameter
-ffffffff81bf9940 T smu7_send_msg_to_smc_with_parameter_without_waiting
-ffffffff81bf99b0 T smu7_send_msg_to_smc_offset
-ffffffff81bf9a40 T smu7_convert_fw_type_to_cgs
-ffffffff81bf9b10 T smu7_write_smc_sram_dword
-ffffffff81bf9c00 T smu7_request_smu_load_fw
-ffffffff81bfa860 T smu7_check_fw_load_finish
-ffffffff81bfa8d0 T smu7_reload_firmware
-ffffffff81bfa8f0 T smu7_upload_smu_firmware_image
-ffffffff81bfaac0 T smu7_setup_pwr_virus
-ffffffff81bfae70 T smu7_init
-ffffffff81bfaf70 T smu7_smu_fini
-ffffffff81bfc000 t smu8_smu_init
-ffffffff81bfc2b0 t smu8_smu_fini
-ffffffff81bfc340 t smu8_start_smu
-ffffffff81bfd370 t smu8_check_fw_load_finish
-ffffffff81bfd450 t smu8_get_argument
-ffffffff81bfd4a0 t smu8_send_msg_to_smc
-ffffffff81bfd570 t smu8_send_msg_to_smc_with_parameter
-ffffffff81bfd660 t smu8_download_pptable_settings
-ffffffff81bfd7a0 t smu8_upload_pptable_settings
-ffffffff81bfd8e0 t smu8_is_dpm_running
-ffffffff81bfe000 T smu9_is_smc_ram_running
-ffffffff81bfe060 T smu9_send_msg_to_smc
-ffffffff81bfe190 T smu9_send_msg_to_smc_with_parameter
-ffffffff81bfe2e0 T smu9_get_argument
-ffffffff81bff000 T smum_thermal_avfs_enable
-ffffffff81bff040 T smum_thermal_setup_fan_table
-ffffffff81bff080 T smum_update_sclk_threshold
-ffffffff81bff0c0 T smum_update_smc_table
-ffffffff81bff100 T smum_get_offsetof
-ffffffff81bff150 T smum_process_firmware_header
-ffffffff81bff190 T smum_get_argument
-ffffffff81bff1d0 T smum_get_mac_definition
-ffffffff81bff210 T smum_download_powerplay_table
-ffffffff81bff250 T smum_upload_powerplay_table
-ffffffff81bff290 T smum_send_msg_to_smc
-ffffffff81bff2e0 T smum_send_msg_to_smc_with_parameter
-ffffffff81bff330 T smum_init_smc_table
-ffffffff81bff370 T smum_populate_all_graphic_levels
-ffffffff81bff3b0 T smum_populate_all_memory_levels
-ffffffff81bff3f0 T smum_initialize_mc_reg_table
-ffffffff81bff430 T smum_is_dpm_running
-ffffffff81bff470 T smum_is_hw_avfs_present
-ffffffff81bff4b0 T smum_update_dpm_settings
-ffffffff81bff4f0 T smum_smc_table_manager
-ffffffff81c00000 T tonga_populate_all_memory_levels
-ffffffff81c007c0 t tonga_smu_init
-ffffffff81c00850 t tonga_start_smu
-ffffffff81c00ba0 t tonga_update_smc_table
-ffffffff81c00d40 t tonga_process_firmware_header
-ffffffff81c00e80 t tonga_update_sclk_threshold
-ffffffff81c010d0 t tonga_thermal_setup_fan_table
-ffffffff81c01340 t tonga_init_smc_table
-ffffffff81c031e0 t tonga_populate_all_graphic_levels
-ffffffff81c03770 t tonga_initialize_mc_reg_table
-ffffffff81c04390 t tonga_get_offsetof
-ffffffff81c04410 t tonga_get_mac_definition
-ffffffff81c04460 t tonga_is_dpm_running
-ffffffff81c044b0 t tonga_update_dpm_settings
-ffffffff81c04880 t tonga_get_dependency_volt_by_clk
-ffffffff81c04a00 t tonga_program_memory_timing_parameters
-ffffffff81c05000 t vega10_smu_init
-ffffffff81c05350 t vega10_smu_fini
-ffffffff81c05430 t vega10_start_smu
-ffffffff81c05550 t vega10_is_dpm_running
-ffffffff81c055a0 t vega10_smc_table_manager
-ffffffff81c06000 T vega12_copy_table_from_smc
-ffffffff81c06140 T vega12_copy_table_to_smc
-ffffffff81c06280 T vega12_enable_smc_features
-ffffffff81c06370 T vega12_get_enabled_smc_features
-ffffffff81c06430 t vega12_smu_init
-ffffffff81c06740 t vega12_smu_fini
-ffffffff81c06820 t vega12_start_smu
-ffffffff81c068c0 t vega12_is_dpm_running
-ffffffff81c07000 T vegam_thermal_avfs_enable
-ffffffff81c07090 t vegam_smu_init
-ffffffff81c07120 t vegam_start_smu
-ffffffff81c074f0 t vegam_update_smc_table
-ffffffff81c07760 t vegam_process_firmware_header
-ffffffff81c078a0 t vegam_update_sclk_threshold
-ffffffff81c07990 t vegam_thermal_setup_fan_table
-ffffffff81c079f0 t vegam_init_smc_table
-ffffffff81c09350 t vegam_populate_all_graphic_levels
-ffffffff81c09ae0 t vegam_populate_all_memory_levels
-ffffffff81c09e40 t vegam_get_offsetof
-ffffffff81c09ec0 t vegam_get_mac_definition
-ffffffff81c09f10 t vegam_is_dpm_running
-ffffffff81c09f60 t vegam_is_hw_avfs_present
-ffffffff81c09fb0 t vegam_program_memory_timing_parameters
-ffffffff81c0a1d0 t vegam_get_dependency_volt_by_clk
-ffffffff81c0a3b0 t vegam_calculate_sclk_params
-ffffffff81c0b000 T amdgpu_dm_connector_atomic_set_property
-ffffffff81c0b0a0 T amdgpu_dm_connector_atomic_get_property
-ffffffff81c0b140 T amdgpu_dm_connector_funcs_reset
-ffffffff81c0b1e0 T amdgpu_dm_connector_atomic_duplicate_state
-ffffffff81c0b270 T amdgpu_dm_connector_mode_valid
-ffffffff81c0b440 t create_stream_for_sink
-ffffffff81c0baf0 t dm_encoder_helper_disable
-ffffffff81c0bb20 t dm_encoder_helper_atomic_check
-ffffffff81c0bb50 T dm_drm_plane_destroy_state
-ffffffff81c0bb90 T amdgpu_dm_connector_init_helper
-ffffffff81c0bcd0 T amdgpu_dm_get_encoder_crtc_mask
-ffffffff81c0bd10 T dm_restore_drm_connector_state
-ffffffff81c0be60 T amdgpu_dm_add_sink_to_freesync_module
-ffffffff81c0c080 T amdgpu_dm_remove_sink_from_freesync_module
-ffffffff81c0c0b0 t dm_early_init
-ffffffff81c0c170 t dm_late_init
-ffffffff81c0c250 t dm_sw_init
-ffffffff81c0c4d0 t dm_sw_fini
-ffffffff81c0c550 t dm_hw_init
-ffffffff81c0d680 t dm_hw_fini
-ffffffff81c0d730 t dm_suspend
-ffffffff81c0d840 t dm_resume
-ffffffff81c0dc10 t dm_is_idle
-ffffffff81c0dc40 t dm_wait_for_idle
-ffffffff81c0dc70 t dm_check_soft_reset
-ffffffff81c0dca0 t dm_soft_reset
-ffffffff81c0dcd0 t dm_set_clockgating_state
-ffffffff81c0dd00 t dm_set_powergating_state
-ffffffff81c0dd30 t dm_bandwidth_update
-ffffffff81c0dd60 t dm_vblank_get_counter
-ffffffff81c0ddd0 t dm_crtc_get_scanoutpos
-ffffffff81c0de90 t amdgpu_notify_freesync
-ffffffff81c0df50 t hotplug_notify_work_func
-ffffffff81c0df70 t emulated_link_detect
-ffffffff81c0e060 t amdgpu_dm_update_connector_after_detect
-ffffffff81c0e1e0 t amdgpu_dm_atomic_check
-ffffffff81c0e6d0 t amdgpu_dm_atomic_commit
-ffffffff81c0e7f0 t dm_atomic_state_alloc
-ffffffff81c0e870 t dm_atomic_state_clear
-ffffffff81c0e8b0 t dm_atomic_state_alloc_free
-ffffffff81c0e8e0 t dm_update_planes_state
-ffffffff81c0f110 t dm_update_crtcs_state
-ffffffff81c0f610 t amdgpu_bo_reserve
-ffffffff81c0f850 t amdgpu_bo_unreserve
-ffffffff81c0f940 t amdgpu_dm_atomic_commit_tail
-ffffffff81c10cb0 t commit_planes_to_stream
-ffffffff81c11110 t amdgpu_dm_plane_init
-ffffffff81c11220 t dm_drm_plane_reset
-ffffffff81c112d0 t dm_drm_plane_duplicate_state
-ffffffff81c11360 t dm_plane_helper_prepare_fb
-ffffffff81c11530 t dm_plane_helper_cleanup_fb
-ffffffff81c115c0 t dm_plane_atomic_check
-ffffffff81c116e0 t dm_crtc_reset_state
-ffffffff81c117b0 t amdgpu_dm_crtc_destroy
-ffffffff81c117e0 t dm_crtc_duplicate_state
-ffffffff81c118a0 t dm_crtc_destroy_state
-ffffffff81c118e0 t dm_enable_vblank
-ffffffff81c11940 t dm_disable_vblank
-ffffffff81c11970 t dm_crtc_helper_mode_fixup
-ffffffff81c119a0 t dm_crtc_helper_disable
-ffffffff81c119d0 t dm_crtc_helper_atomic_check
-ffffffff81c11a80 t amdgpu_dm_encoder_destroy
-ffffffff81c11ab0 t amdgpu_dm_i2c_xfer
-ffffffff81c11be0 t amdgpu_dm_i2c_func
-ffffffff81c11c10 t amdgpu_dm_connector_detect
-ffffffff81c11c70 t amdgpu_dm_connector_destroy
-ffffffff81c11cf0 t get_modes
-ffffffff81c12020 t best_encoder
-ffffffff81c120a0 t amdgpu_dm_backlight_update_status
-ffffffff81c120f0 t amdgpu_dm_backlight_get_brightness
-ffffffff81c12140 t dm_crtc_high_irq
-ffffffff81c121f0 t dm_pflip_high_irq
-ffffffff81c12370 t handle_hpd_irq
-ffffffff81c12470 t handle_hpd_rx_irq
-ffffffff81c126d0 t fill_stream_properties_from_drm_display_mode
-ffffffff81c13000 T amdgpu_dm_init_color_mod
-ffffffff81c13010 T amdgpu_dm_set_regamma_lut
-ffffffff81c13160 t __drm_lut_to_dc_gamma
-ffffffff81c132d0 T amdgpu_dm_set_ctm
-ffffffff81c13380 T amdgpu_dm_set_degamma_lut
-ffffffff81c14000 T dm_helpers_parse_edid_caps
-ffffffff81c14380 T dm_helpers_dp_update_branch_info
-ffffffff81c143b0 T dm_helpers_dp_mst_write_payload_allocation_table
-ffffffff81c145b0 T dm_helpers_dp_mst_clear_payload_allocation_table
-ffffffff81c145e0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger
-ffffffff81c14650 T dm_helpers_dp_mst_send_payload_allocation
-ffffffff81c146f0 T dm_dtn_log_begin
-ffffffff81c14720 T dm_dtn_log_append_v
-ffffffff81c14750 T dm_dtn_log_end
-ffffffff81c14780 T dm_helpers_dp_mst_start_top_mgr
-ffffffff81c147f0 T dm_helpers_dp_mst_stop_top_mgr
-ffffffff81c14850 T dm_helpers_dp_read_dpcd
-ffffffff81c148d0 T dm_helpers_dp_write_dpcd
-ffffffff81c14950 T dm_helpers_submit_i2c
-ffffffff81c14a70 T dm_helpers_is_dp_sink_present
-ffffffff81c14b00 T dm_helpers_read_local_edid
-ffffffff81c14de0 T dm_set_dcn_clocks
-ffffffff81c15000 T amdgpu_dm_irq_register_interrupt
-ffffffff81c15170 T amdgpu_dm_irq_unregister_interrupt
-ffffffff81c15330 T amdgpu_dm_irq_init
-ffffffff81c15400 t dm_irq_work_func
-ffffffff81c15460 T amdgpu_dm_irq_fini
-ffffffff81c154e0 T amdgpu_dm_irq_suspend
-ffffffff81c155e0 T amdgpu_dm_irq_resume_early
-ffffffff81c15780 T amdgpu_dm_irq_resume_late
-ffffffff81c15920 T amdgpu_dm_set_irq_funcs
-ffffffff81c15990 T amdgpu_dm_hpd_init
-ffffffff81c15a40 T amdgpu_dm_hpd_fini
-ffffffff81c15ae0 t amdgpu_dm_set_crtc_irq_state
-ffffffff81c15b60 t amdgpu_dm_irq_handler
-ffffffff81c15c70 t amdgpu_dm_set_pflip_irq_state
-ffffffff81c15cf0 t amdgpu_dm_set_hpd_irq_state
-ffffffff81c16000 T dm_dp_mst_dc_sink_create
-ffffffff81c160e0 T amdgpu_dm_initialize_dp_connector
-ffffffff81c16180 t dm_dp_aux_transfer
-ffffffff81c162e0 t dm_dp_add_mst_connector
-ffffffff81c164a0 t dm_dp_mst_register_connector
-ffffffff81c164f0 t dm_dp_destroy_mst_connector
-ffffffff81c16590 t dm_dp_mst_hotplug
-ffffffff81c165b0 t dm_dp_mst_detect
-ffffffff81c165d0 t dm_dp_mst_connector_destroy
-ffffffff81c16640 t dm_dp_mst_get_modes
-ffffffff81c16770 t dm_mst_best_encoder
-ffffffff81c167a0 t amdgpu_dm_encoder_destroy
-ffffffff81c17000 T dm_pp_apply_display_requirements
-ffffffff81c17200 T dm_pp_get_clock_levels_by_type
-ffffffff81c17500 T dm_pp_get_clock_levels_by_type_with_latency
-ffffffff81c176e0 T dm_pp_get_clock_levels_by_type_with_voltage
-ffffffff81c178a0 T dm_pp_notify_wm_clock_changes
-ffffffff81c178d0 T dm_pp_apply_power_level_change_request
-ffffffff81c17900 T dm_pp_apply_clock_for_voltage_request
-ffffffff81c179d0 T dm_pp_get_static_clocks
-ffffffff81c17aa0 T pp_rv_set_display_requirement
-ffffffff81c17b50 T pp_rv_set_wm_ranges
-ffffffff81c17c90 T pp_rv_set_pme_wa_enable
-ffffffff81c17ce0 T dm_pp_get_funcs_rv
-ffffffff81c18000 T dm_get_elapse_time_in_ns
-ffffffff81c18030 T dm_perf_trace_timestamp
-ffffffff81c18060 T dm_write_persistent_data
-ffffffff81c18090 T dm_read_persistent_data
-ffffffff81c19000 T fixed_point_to_int_frac
-ffffffff81c19200 T convert_float_matrix
-ffffffff81c1a000 T dc_fixpt_from_fraction
-ffffffff81c1a180 T dc_fixpt_mul
-ffffffff81c1a300 T dc_fixpt_sqr
-ffffffff81c1a440 T dc_fixpt_recip
-ffffffff81c1a4a0 T dc_fixpt_sinc
-ffffffff81c1a680 T dc_fixpt_sin
-ffffffff81c1a6b0 T dc_fixpt_cos
-ffffffff81c1a790 T dc_fixpt_exp
-ffffffff81c1a9e0 t fixed31_32_exp_from_taylor_series
-ffffffff81c1ad30 T dc_fixpt_log
-ffffffff81c1aef0 T dc_fixpt_u3d19
-ffffffff81c1af30 T dc_fixpt_u2d19
-ffffffff81c1af70 T dc_fixpt_u0d19
-ffffffff81c1afa0 T dc_fixpt_clamp_u0d14
-ffffffff81c1aff0 T dc_fixpt_clamp_u0d10
-ffffffff81c1b040 T dc_fixpt_s4d19
-ffffffff81c1c000 T dc_conn_log_hex_linux
-ffffffff81c1d000 T dal_vector_construct
-ffffffff81c1d0e0 T dal_vector_presized_costruct
-ffffffff81c1d370 T dal_vector_presized_create
-ffffffff81c1d630 T dal_vector_create
-ffffffff81c1d770 T dal_vector_destruct
-ffffffff81c1d7c0 T dal_vector_destroy
-ffffffff81c1d830 T dal_vector_get_count
-ffffffff81c1d860 T dal_vector_at_index
-ffffffff81c1d8a0 T dal_vector_remove_at_index
-ffffffff81c1d920 T dal_vector_set_at_index
-ffffffff81c1d980 T dal_vector_insert_at
-ffffffff81c1da80 T dal_vector_reserve
-ffffffff81c1db20 T dal_vector_append
-ffffffff81c1dc20 T dal_vector_clone
-ffffffff81c1dcd0 T dal_vector_capacity
-ffffffff81c1dd00 T dal_vector_clear
-ffffffff81c1e000 T bios_parser_create
-ffffffff81c1edc0 T update_slot_layout_info
-ffffffff81c1ef40 T get_bracket_layout_record
-ffffffff81c1f000 t bios_parser_get_connectors_number
-ffffffff81c1f050 t bios_parser_get_encoder_id
-ffffffff81c1f0c0 t bios_parser_get_connector_id
-ffffffff81c1f150 t bios_parser_get_dst_number
-ffffffff81c1f200 t bios_parser_get_src_obj
-ffffffff81c1f300 t bios_parser_get_dst_obj
-ffffffff81c1f390 t bios_parser_get_i2c_info
-ffffffff81c1f490 t bios_parser_get_voltage_ddc_info
-ffffffff81c1f5f0 t bios_parser_get_thermal_ddc_info
-ffffffff81c1f640 t bios_parser_get_hpd_info
-ffffffff81c1f710 t bios_parser_get_device_tag
-ffffffff81c1f910 t bios_parser_get_firmware_info
-ffffffff81c1ff20 t bios_parser_get_spread_spectrum_info
-ffffffff81c20200 t bios_parser_get_ss_entry_number
-ffffffff81c20430 t bios_parser_get_embedded_panel_info
-ffffffff81c209a0 t bios_parser_get_gpio_pin_info
-ffffffff81c20ac0 t bios_parser_get_encoder_cap_info
-ffffffff81c20bb0 t bios_parser_set_scratch_critical_state
-ffffffff81c20bc0 t bios_parser_is_device_id_supported
-ffffffff81c20c90 t bios_parser_encoder_control
-ffffffff81c20cd0 t bios_parser_transmitter_control
-ffffffff81c20d10 t bios_parser_crt_control
-ffffffff81c20e80 t bios_parser_enable_crtc
-ffffffff81c20ec0 t bios_parser_adjust_pixel_clock
-ffffffff81c20f00 t bios_parser_set_pixel_clock
-ffffffff81c20f40 t bios_parser_set_dce_clock
-ffffffff81c20f80 t bios_parser_enable_spread_spectrum_on_ppll
-ffffffff81c20fc0 t bios_parser_program_crtc_timing
-ffffffff81c21000 t bios_parser_crtc_source_select
-ffffffff81c21040 t bios_parser_program_display_engine_pll
-ffffffff81c21080 t bios_parser_enable_disp_power_gating
-ffffffff81c210c0 t bios_parser_post_init
-ffffffff81c21cc0 t bios_parser_destroy
-ffffffff81c21d80 t bios_get_board_layout_info
-ffffffff81c21eb0 t get_bios_object
-ffffffff81c22040 t get_dest_obj_list
-ffffffff81c22120 t get_gpio_i2c_info
-ffffffff81c222b0 t get_ss_info_from_ss_info_table
-ffffffff81c22480 t get_ss_entry_number_from_ss_info_tbl
-ffffffff81c225c0 t add_device_tag_from_ext_display_path
-ffffffff81c23000 T firmware_parser_create
-ffffffff81c23ab0 t bios_parser_get_connectors_number
-ffffffff81c23b80 t bios_parser_get_encoder_id
-ffffffff81c23bd0 t bios_parser_get_connector_id
-ffffffff81c23c20 t bios_parser_get_dst_number
-ffffffff81c23c60 t bios_parser_get_src_obj
-ffffffff81c23dd0 t bios_parser_get_dst_obj
-ffffffff81c23ea0 t bios_parser_get_i2c_info
-ffffffff81c23fa0 t bios_parser_get_voltage_ddc_info
-ffffffff81c24130 t bios_parser_get_thermal_ddc_info
-ffffffff81c24190 t bios_parser_get_hpd_info
-ffffffff81c24260 t bios_parser_get_device_tag
-ffffffff81c243b0 t bios_parser_get_firmware_info
-ffffffff81c24570 t bios_parser_get_spread_spectrum_info
-ffffffff81c247f0 t bios_parser_get_ss_entry_number
-ffffffff81c24820 t bios_parser_get_embedded_panel_info
-ffffffff81c24a10 t bios_parser_get_gpio_pin_info
-ffffffff81c24b30 t bios_parser_get_encoder_cap_info
-ffffffff81c24c30 t bios_parser_is_accelerated_mode
-ffffffff81c24c40 t bios_parser_get_vga_enabled_displays
-ffffffff81c24c50 t bios_parser_set_scratch_critical_state
-ffffffff81c24c60 t bios_parser_is_device_id_supported
-ffffffff81c24cd0 t bios_parser_encoder_control
-ffffffff81c24d10 t bios_parser_transmitter_control
-ffffffff81c24d50 t bios_parser_enable_crtc
-ffffffff81c24d90 t bios_parser_set_pixel_clock
-ffffffff81c24dd0 t bios_parser_set_dce_clock
-ffffffff81c24e10 t bios_parser_get_smu_clock_info
-ffffffff81c24e50 t bios_parser_program_crtc_timing
-ffffffff81c24e90 t bios_parser_crtc_source_select
-ffffffff81c24ed0 t bios_parser_enable_disp_power_gating
-ffffffff81c24f10 t bios_parser_post_init
-ffffffff81c24f40 t firmware_parser_destroy
-ffffffff81c25000 t bios_get_board_layout_info
-ffffffff81c25240 t get_bios_object
-ffffffff81c25380 t get_gpio_i2c_info
-ffffffff81c254a0 t get_firmware_info_v3_2
-ffffffff81c26000 T object_id_from_bios_object_id
-ffffffff81c27000 T bios_get_image
-ffffffff81c27040 T bios_is_accelerated_mode
-ffffffff81c270a0 T bios_set_scratch_acc_mode_change
-ffffffff81c27120 T bios_set_scratch_critical_state
-ffffffff81c271b0 T bios_get_vga_enabled_displays
-ffffffff81c28000 T dal_bios_parser_create
-ffffffff81c28070 T dal_bios_parser_destroy
-ffffffff81c29000 T dal_bios_parser_init_cmd_tbl
-ffffffff81c295a0 t encoder_control_digx_v3
-ffffffff81c29670 t encoder_control_digx_v4
-ffffffff81c29740 t encoder_control_digx_v5
-ffffffff81c29890 t encoder_control_dig1_v1
-ffffffff81c29910 t encoder_control_dig2_v1
-ffffffff81c29990 t encoder_control_dig_v1
-ffffffff81c299f0 t transmitter_control_v2
-ffffffff81c29bc0 t transmitter_control_v3
-ffffffff81c29d90 t transmitter_control_v4
-ffffffff81c29f40 t transmitter_control_v1_5
-ffffffff81c2a0c0 t transmitter_control_v1_6
-ffffffff81c2a230 t set_pixel_clock_v3
-ffffffff81c2a3a0 t set_pixel_clock_v5
-ffffffff81c2a500 t set_pixel_clock_v6
-ffffffff81c2a660 t set_pixel_clock_v7
-ffffffff81c2a820 t enable_spread_spectrum_on_ppll_v1
-ffffffff81c2a930 t enable_spread_spectrum_on_ppll_v2
-ffffffff81c2aa50 t enable_spread_spectrum_on_ppll_v3
-ffffffff81c2ab50 t adjust_display_pll_v2
-ffffffff81c2abd0 t adjust_display_pll_v3
-ffffffff81c2ad30 t dac1_encoder_control_v1
-ffffffff81c2ada0 t dac2_encoder_control_v1
-ffffffff81c2ae10 t dac1_output_control_v1
-ffffffff81c2ae70 t dac2_output_control_v1
-ffffffff81c2aed0 t set_crtc_using_dtd_timing_v3
-ffffffff81c2b030 t set_crtc_timing_v1
-ffffffff81c2b1c0 t select_crtc_source_v2
-ffffffff81c2b2c0 t select_crtc_source_v3
-ffffffff81c2b3d0 t enable_crtc_v1
-ffffffff81c2b470 t enable_crtc_mem_req_v1
-ffffffff81c2b510 t program_clock_v5
-ffffffff81c2b610 t program_clock_v6
-ffffffff81c2b710 t external_encoder_control_v3
-ffffffff81c2b8b0 t enable_disp_power_gating_v2_1
-ffffffff81c2b970 t set_dce_clock_v2_1
-ffffffff81c2c000 T dal_firmware_parser_init_cmd_tbl
-ffffffff81c2c2a0 t encoder_control_digx_v1_5
-ffffffff81c2c3f0 t transmitter_control_v1_6
-ffffffff81c2c500 t set_pixel_clock_v7
-ffffffff81c2c690 t set_crtc_using_dtd_timing_v3
-ffffffff81c2c7f0 t select_crtc_source_v3
-ffffffff81c2c900 t enable_crtc_v1
-ffffffff81c2c9a0 t external_encoder_control_v3
-ffffffff81c2c9d0 t enable_disp_power_gating_v2_1
-ffffffff81c2ca90 t set_dce_clock_v2_1
-ffffffff81c2cbb0 t get_smu_clock_info_v3_1
-ffffffff81c2d000 T dal_bios_parser_init_cmd_tbl_helper
-ffffffff81c2d090 T dal_cmd_table_helper_controller_id_to_atom
-ffffffff81c2d1a0 T dal_cmd_table_helper_transmitter_bp_to_atom
-ffffffff81c2d210 T dal_cmd_table_helper_encoder_mode_bp_to_atom
-ffffffff81c2d2a0 T dal_cmd_table_helper_assign_control_parameter
-ffffffff81c2d360 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src
-ffffffff81c2d440 T dal_cmd_table_helper_encoder_id_to_atom
-ffffffff81c2e000 T dal_bios_parser_init_cmd_tbl_helper2
-ffffffff81c2e0a0 T dal_cmd_table_helper_controller_id_to_atom2
-ffffffff81c2e190 T dal_cmd_table_helper_transmitter_bp_to_atom2
-ffffffff81c2e200 T dal_cmd_table_helper_encoder_mode_bp_to_atom2
-ffffffff81c2e290 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2
-ffffffff81c2e370 T dal_cmd_table_helper_encoder_id_to_atom2
-ffffffff81c2f000 T dal_cmd_tbl_helper_dce110_get_table
-ffffffff81c2f030 t encoder_action_to_atom
-ffffffff81c2f0a0 t engine_bp_to_atom
-ffffffff81c2f140 t clock_source_id_to_atom
-ffffffff81c2f1e0 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff81c2f220 t signal_type_to_atom_dig_mode
-ffffffff81c2f280 t hpd_sel_to_atom
-ffffffff81c2f2c0 t dig_encoder_sel_to_atom
-ffffffff81c2f2f0 t phy_id_to_atom
-ffffffff81c2f330 t disp_power_gating_action_to_atom
-ffffffff81c30000 T dal_cmd_tbl_helper_dce112_get_table2
+ffffffff81745610 T ixgbe_detach
+ffffffff81745840 T ixgbe_local_timer
+ffffffff81745900 T ixgbe_rxrefill
+ffffffff817459a0 T ixgbe_identify_hardware
+ffffffff81745a70 T ixgbe_allocate_pci_resources
+ffffffff81745ba0 T ixgbe_allocate_queues
+ffffffff81746040 T ixgbe_allocate_msix
+ffffffff81746250 T ixgbe_allocate_legacy
+ffffffff81746370 T ixgbe_setup_interface
+ffffffff81746480 T ixgbe_update_stats_counters
+ffffffff81746530 T ixgbe_free_transmit_structures
+ffffffff817465a0 T ixgbe_free_receive_structures
+ffffffff81746660 T ixgbe_free_pci_resources
+ffffffff81746740 T ixgbe_stop
+ffffffff817469d0 T ixgbe_start
+ffffffff81746bb0 T ixgbe_encap
+ffffffff81746db0 T ixgbe_ioctl
+ffffffff81747130 T ixgbe_init
+ffffffff81747db0 T ixgbe_rxrinfo
+ffffffff81747f00 T ixgbe_get_sffpage
+ffffffff817480a0 T ixgbe_disable_intr
+ffffffff81748170 T ixgbe_iff
+ffffffff817482f0 T ixgbe_enable_intr
+ffffffff81748400 T ixgbe_enable_queues
+ffffffff81748510 T ixgbe_watchdog
+ffffffff81748730 T ixgbe_setup_transmit_structures
+ffffffff81748840 T ixgbe_initialize_transmit_units
+ffffffff81748b20 T ixgbe_setup_receive_structures
+ffffffff81748c40 T ixgbe_initialize_receive_units
+ffffffff81748f90 T ixgbe_config_gpie
+ffffffff81749070 T ixgbe_setup_vlan_hw_support
+ffffffff817491f0 T ixgbe_configure_ivars
+ffffffff817493a0 T ixgbe_set_ivar
+ffffffff81749540 T ixgbe_config_link
+ffffffff817496e0 T ixgbe_config_delay_values
+ffffffff817497f0 T ixgbe_enable_queue
+ffffffff817498c0 T ixgbe_disable_queue
+ffffffff81749990 T ixgbe_link_intr
+ffffffff817499a0 T ixgbe_intr
+ffffffff81749de0 T ixgbe_queue_intr
+ffffffff81749f30 T ixgbe_rxeof
+ffffffff8174a2c0 T ixgbe_txeof
+ffffffff8174a460 T ixgbe_rxfill
+ffffffff8174a590 T ixgbe_legacy_intr
+ffffffff8174a830 T ixgbe_update_link_status
+ffffffff8174a930 T ixgbe_handle_mod
+ffffffff8174aa50 T ixgbe_handle_msf
+ffffffff8174ab20 T ixgbe_handle_phy
+ffffffff8174abb0 T ixgbe_media_status
+ffffffff8174ae50 T ixgbe_media_change
+ffffffff8174aef0 T ixgbe_tx_ctx_setup
+ffffffff8174b0e0 T ixgbe_mc_array_itr
+ffffffff8174b120 T ixgbe_setup_msix
+ffffffff8174b180 T ixgbe_add_media_types
+ffffffff8174b420 T ixgbe_dma_malloc
+ffffffff8174b640 T ixgbe_dma_free
+ffffffff8174b6f0 T ixgbe_allocate_transmit_buffers
+ffffffff8174b850 T ixgbe_setup_transmit_ring
+ffffffff8174b8e0 T ixgbe_free_transmit_buffers
+ffffffff8174ba00 T ixgbe_get_buf
+ffffffff8174bb40 T ixgbe_allocate_receive_buffers
+ffffffff8174bc70 T ixgbe_setup_receive_ring
+ffffffff8174bd60 T ixgbe_initialize_rss_mapping
+ffffffff8174bfe0 T ixgbe_free_receive_buffers
+ffffffff8174c100 T ixgbe_rx_checksum
+ffffffff8174c150 T ixgbe_read_pci_cfg
+ffffffff8174c1b0 T ixgbe_write_pci_cfg
+ffffffff8174d000 T ixgbe_init_ops_generic
+ffffffff8174d260 T ixgbe_init_eeprom_params_generic
+ffffffff8174d310 T ixgbe_read_eerd_generic
+ffffffff8174d420 T ixgbe_read_eeprom_bit_bang_generic
+ffffffff8174d750 T ixgbe_write_eeprom_generic
+ffffffff8174dc40 T ixgbe_validate_eeprom_checksum_generic
+ffffffff8174dd00 T ixgbe_update_eeprom_checksum_generic
+ffffffff8174dd80 T ixgbe_calc_eeprom_checksum_generic
+ffffffff8174df30 T ixgbe_init_hw_generic
+ffffffff8174df80 T ixgbe_start_hw_generic
+ffffffff8174e0a0 T ixgbe_clear_hw_cntrs_generic
+ffffffff8174eac0 T ixgbe_enable_rx_dma_generic
+ffffffff8174eb20 T ixgbe_get_mac_addr_generic
+ffffffff8174ebb0 T ixgbe_stop_adapter_generic
+ffffffff8174ed30 T ixgbe_get_bus_info_generic
+ffffffff8174ede0 T ixgbe_set_lan_id_multi_port_pcie
+ffffffff8174eeb0 T ixgbe_acquire_swfw_sync
+ffffffff8174f100 T ixgbe_release_swfw_sync
+ffffffff8174f1b0 T prot_autoc_read_generic
+ffffffff8174f210 T prot_autoc_write_generic
+ffffffff8174f260 T ixgbe_led_on_generic
+ffffffff8174f320 T ixgbe_led_off_generic
+ffffffff8174f3d0 T ixgbe_blink_led_start_generic
+ffffffff8174f550 T ixgbe_blink_led_stop_generic
+ffffffff8174f660 T ixgbe_set_rar_generic
+ffffffff8174f780 T ixgbe_clear_rar_generic
+ffffffff8174f870 T ixgbe_init_rx_addrs_generic
+ffffffff8174fa80 T ixgbe_update_mc_addr_list_generic
+ffffffff8174fc80 T ixgbe_enable_mc_generic
+ffffffff8174fcf0 T ixgbe_disable_mc_generic
+ffffffff8174fd50 T ixgbe_enable_rx_generic
+ffffffff8174fe20 T ixgbe_disable_rx_generic
+ffffffff8174ff10 T ixgbe_fc_enable_generic
+ffffffff81750350 T ixgbe_setup_fc_generic
+ffffffff81750620 T ixgbe_fc_autoneg
+ffffffff81750910 T ixgbe_device_supports_autoneg_fc
+ffffffff81750a10 T ixgbe_start_hw_gen2
+ffffffff81750bf0 T ixgbe_identify_phy
+ffffffff81750c40 T ixgbe_set_pci_config_data_generic
+ffffffff81750cc0 T ixgbe_disable_rx
+ffffffff81750d00 T ixgbe_disable_pcie_master
+ffffffff81750e50 T ixgbe_read_eerd_buffer_generic
+ffffffff81750f90 T ixgbe_poll_eerd_eewr_done
+ffffffff81751040 T ixgbe_write_eewr_buffer_generic
+ffffffff817511d0 T ixgbe_write_eewr_generic
+ffffffff81751210 T ixgbe_acquire_eeprom
+ffffffff817513a0 T ixgbe_get_eeprom_semaphore
+ffffffff817515c0 T ixgbe_release_eeprom_semaphore
+ffffffff81751630 T ixgbe_ready_eeprom
+ffffffff817517a0 T ixgbe_shift_out_eeprom_bits
+ffffffff81751960 T ixgbe_shift_in_eeprom_bits
+ffffffff81751ac0 T ixgbe_standby_eeprom
+ffffffff81751ba0 T ixgbe_raise_eeprom_clk
+ffffffff81751c10 T ixgbe_lower_eeprom_clk
+ffffffff81751c80 T ixgbe_release_eeprom
+ffffffff81751d60 T ixgbe_validate_mac_addr
+ffffffff81751de0 T ixgbe_init_uta_tables
+ffffffff81751e20 T ixgbe_add_uc_addr
+ffffffff81751e90 T ixgbe_mta_vector
+ffffffff81751f30 T ixgbe_set_mta
+ffffffff81751ff0 T ixgbe_negotiate_fc
+ffffffff817520b0 T ixgbe_fc_autoneg_fiber
+ffffffff817521d0 T ixgbe_fc_autoneg_backplane
+ffffffff81752340 T ixgbe_fc_autoneg_copper
+ffffffff81752460 T ixgbe_disable_sec_rx_path_generic
+ffffffff81752520 T ixgbe_enable_sec_rx_path_generic
+ffffffff817525b0 T ixgbe_enable_rx
+ffffffff817525f0 T ixgbe_get_pcie_msix_count_generic
+ffffffff81752670 T ixgbe_insert_mac_addr_generic
+ffffffff81752890 T ixgbe_set_vmdq
+ffffffff817528d0 T ixgbe_set_rar
+ffffffff81752910 T ixgbe_clear_vmdq
+ffffffff81752950 T ixgbe_clear_vmdq_generic
+ffffffff81752ae0 T ixgbe_set_vmdq_generic
+ffffffff81752b90 T ixgbe_init_uta_tables_generic
+ffffffff81752c10 T ixgbe_find_vlvf_slot
+ffffffff81752cd0 T ixgbe_set_vfta_generic
+ffffffff81752de0 T ixgbe_set_vlvf_generic
+ffffffff81753080 T ixgbe_clear_vfta_generic
+ffffffff81753170 T ixgbe_need_crosstalk_fix
+ffffffff817531c0 T ixgbe_check_mac_link_generic
+ffffffff817533e0 T ixgbe_get_device_caps_generic
+ffffffff81753430 T ixgbe_calculate_checksum
+ffffffff817534f0 T ixgbe_hic_unlocked
+ffffffff817536d0 T ixgbe_host_interface_command
+ffffffff817538a0 T ixgbe_clear_tx_pending
+ffffffff81753a90 T ixgbe_mng_present
+ffffffff81753af0 T ixgbe_mng_enabled
+ffffffff81753bb0 T ixgbe_setup_mac_link_multispeed_fiber
+ffffffff81753f80 T ixgbe_flap_tx_laser
+ffffffff81753fc0 T ixgbe_check_link
+ffffffff81754000 T ixgbe_set_soft_rate_select_speed
+ffffffff817540f0 T ixgbe_init_shared_code
+ffffffff817541a0 T ixgbe_set_mac_type
+ffffffff81754350 T ixgbe_init_hw
+ffffffff81754390 T ixgbe_get_media_type
+ffffffff817543d0 T ixgbe_read_mbx
+ffffffff81754420 T ixgbe_write_mbx
+ffffffff81754470 T ixgbe_check_for_msg
+ffffffff817544b0 T ixgbe_check_for_ack
+ffffffff817544f0 T ixgbe_check_for_rst
+ffffffff81754530 T ixgbe_poll_for_msg
+ffffffff817545e0 T ixgbe_poll_for_ack
+ffffffff81754690 T ixgbe_read_posted_mbx
+ffffffff81754780 T ixgbe_write_posted_mbx
+ffffffff81754850 T ixgbe_init_mbx_ops_generic
+ffffffff81754890 T ixgbe_read_v2p_mailbox
+ffffffff81754900 T ixgbe_check_for_bit_pf
+ffffffff81754990 T ixgbe_check_for_msg_pf
+ffffffff81754a40 T ixgbe_check_for_ack_pf
+ffffffff81754ae0 T ixgbe_check_for_rst_pf
+ffffffff81754bc0 T ixgbe_obtain_mbx_lock_pf
+ffffffff81754c50 T ixgbe_write_mbx_pf
+ffffffff81754e30 T ixgbe_read_mbx_pf
+ffffffff81754f50 T ixgbe_init_mbx_params_pf
+ffffffff81756000 T ixgbe_set_pcie_completion_timeout
+ffffffff81756090 T ixgbe_init_ops_82598
+ffffffff817561e0 T ixgbe_init_phy_ops_82598
+ffffffff817562d0 T ixgbe_start_hw_82598
+ffffffff81756490 T ixgbe_reset_hw_82598
+ffffffff817567d0 T ixgbe_get_media_type_82598
+ffffffff81756890 T ixgbe_get_supported_physical_layer_82598
+ffffffff81756a80 T ixgbe_read_analog_reg8_82598
+ffffffff81756b30 T ixgbe_write_analog_reg8_82598
+ffffffff81756bb0 T ixgbe_set_lan_id_multi_port_pcie_82598
+ffffffff81756c50 T ixgbe_enable_rx_dma_82598
+ffffffff81756ca0 T ixgbe_set_vmdq_82598
+ffffffff81756d50 T ixgbe_clear_vmdq_82598
+ffffffff81756e00 T ixgbe_set_vfta_82598
+ffffffff81756f30 T ixgbe_clear_vfta_82598
+ffffffff817570e0 T ixgbe_fc_enable_82598
+ffffffff81757540 T ixgbe_read_i2c_eeprom_82598
+ffffffff81757560 T ixgbe_check_mac_link_82598
+ffffffff81757800 T ixgbe_setup_mac_link_82598
+ffffffff817579d0 T ixgbe_get_link_capabilities_82598
+ffffffff81757aa0 T ixgbe_setup_copper_link_82598
+ffffffff81757bc0 T ixgbe_start_mac_link_82598
+ffffffff81757ce0 T ixgbe_validate_link_ready
+ffffffff81757da0 T ixgbe_read_i2c_phy_82598
+ffffffff81758000 T ixgbe_init_mac_link_ops_82599
+ffffffff81758190 T ixgbe_disable_tx_laser_multispeed_fiber
+ffffffff81758250 T ixgbe_enable_tx_laser_multispeed_fiber
+ffffffff817582d0 T ixgbe_flap_tx_laser_multispeed_fiber
+ffffffff81758410 T ixgbe_setup_mac_link_82599
+ffffffff817586c0 T ixgbe_set_hard_rate_select_speed
+ffffffff81758780 T ixgbe_verify_lesm_fw_enabled_82599
+ffffffff81758840 T ixgbe_setup_mac_link_smartspeed
+ffffffff81758bd0 T ixgbe_init_phy_ops_82599
+ffffffff81758d20 T ixgbe_read_i2c_byte_82599
+ffffffff81758eb0 T ixgbe_write_i2c_byte_82599
+ffffffff81759040 T ixgbe_setup_copper_link_82599
+ffffffff817590a0 T ixgbe_setup_sfp_modules_82599
+ffffffff81759260 T prot_autoc_read_82599
+ffffffff81759370 T prot_autoc_write_82599
+ffffffff817594e0 T ixgbe_reset_pipeline_82599
+ffffffff81759660 T ixgbe_init_ops_82599
+ffffffff81759840 T ixgbe_identify_phy_82599
+ffffffff817598d0 T ixgbe_reset_hw_82599
+ffffffff81759c80 T ixgbe_get_media_type_82599
+ffffffff81759db0 T ixgbe_get_supported_physical_layer_82599
+ffffffff81759f70 T ixgbe_enable_rx_dma_82599
+ffffffff81759fe0 T ixgbe_read_analog_reg8_82599
+ffffffff8175a090 T ixgbe_write_analog_reg8_82599
+ffffffff8175a110 T ixgbe_start_hw_82599
+ffffffff8175a210 T ixgbe_get_link_capabilities_82599
+ffffffff8175a340 T ixgbe_stop_mac_link_on_d3_82599
+ffffffff8175a400 T ixgbe_read_eeprom_82599
+ffffffff8175a430 T ixgbe_start_mac_link_82599
+ffffffff8175a610 T ixgbe_verify_fw_version_82599
+ffffffff8175b000 T ixgbe_init_ops_X540
+ffffffff8175b220 T ixgbe_init_eeprom_params_X540
+ffffffff8175b2a0 T ixgbe_read_eerd_X540
+ffffffff8175b330 T ixgbe_write_eewr_X540
+ffffffff8175b3c0 T ixgbe_update_eeprom_checksum_X540
+ffffffff8175b490 T ixgbe_validate_eeprom_checksum_X540
+ffffffff8175b580 T ixgbe_calc_eeprom_checksum_X540
+ffffffff8175b720 T ixgbe_reset_hw_X540
+ffffffff8175b900 T ixgbe_get_media_type_X540
+ffffffff8175b930 T ixgbe_get_supported_physical_layer_X540
+ffffffff8175b9b0 T ixgbe_start_hw_X540
+ffffffff8175ba00 T ixgbe_acquire_swfw_sync_X540
+ffffffff8175bea0 T ixgbe_release_swfw_sync_X540
+ffffffff8175bfe0 T ixgbe_init_swfw_sync_X540
+ffffffff8175c0c0 T ixgbe_setup_mac_link_X540
+ffffffff8175c0e0 T ixgbe_blink_led_start_X540
+ffffffff8175c200 T ixgbe_blink_led_stop_X540
+ffffffff8175c300 T ixgbe_get_link_capabilities_X540
+ffffffff8175c340 T ixgbe_update_flash_X540
+ffffffff8175c530 T ixgbe_poll_flash_update_done_X540
+ffffffff8175c5d0 T ixgbe_get_swfw_sync_semaphore
+ffffffff8175c760 T ixgbe_release_swfw_sync_semaphore
+ffffffff8175d000 T ixgbe_init_ops_X550
+ffffffff8175d110 T ixgbe_dmac_config_X550
+ffffffff8175d1f0 T ixgbe_dmac_config_tcs_X550
+ffffffff8175d340 T ixgbe_dmac_update_tcs_X550
+ffffffff8175d400 T ixgbe_set_source_address_pruning_X550
+ffffffff8175d4e0 T ixgbe_init_eeprom_params_X550
+ffffffff8175d560 T ixgbe_calc_eeprom_checksum_X550
+ffffffff8175d570 T ixgbe_read_ee_hostif_X550
+ffffffff8175d640 T ixgbe_write_ee_hostif_X550
+ffffffff8175d700 T ixgbe_update_eeprom_checksum_X550
+ffffffff8175d890 T ixgbe_validate_eeprom_checksum_X550
+ffffffff8175d9d0 T ixgbe_disable_rx_x550
+ffffffff8175daf0 T ixgbe_led_on_t_X550em
+ffffffff8175dbb0 T ixgbe_led_off_t_X550em
+ffffffff8175dc70 T ixgbe_read_cs4227
+ffffffff8175dca0 T ixgbe_write_cs4227
+ffffffff8175dcc0 T ixgbe_read_pe
+ffffffff8175dd10 T ixgbe_write_pe
+ffffffff8175dd60 T ixgbe_reset_cs4227
+ffffffff8175dff0 T ixgbe_check_cs4227
+ffffffff8175e1c0 T ixgbe_setup_mux_ctl
+ffffffff8175e240 T ixgbe_identify_phy_x550em
+ffffffff8175e450 T ixgbe_read_mng_if_sel_x550em
+ffffffff8175e4c0 T ixgbe_fw_phy_activity
+ffffffff8175e5f0 T ixgbe_get_phy_id_fw
+ffffffff8175e710 T ixgbe_identify_phy_fw
+ffffffff8175e760 T ixgbe_shutdown_fw_phy
+ffffffff8175e7c0 T ixgbe_read_phy_reg_x550em
+ffffffff8175e7f0 T ixgbe_write_phy_reg_x550em
+ffffffff8175e820 T ixgbe_init_ops_X550EM
+ffffffff8175eaf0 T ixgbe_get_bus_info_X550em
+ffffffff8175eb40 T ixgbe_get_media_type_X550em
+ffffffff8175ec30 T ixgbe_setup_sfp_modules_X550em
+ffffffff8175edc0 T ixgbe_get_link_capabilities_X550em
+ffffffff8175ee90 T ixgbe_reset_hw_X550em
+ffffffff8175f390 T ixgbe_get_supported_physical_layer_X550em
+ffffffff8175f510 T ixgbe_setup_fc_X550em
+ffffffff8175f680 T ixgbe_init_phy_ops_X550em
+ffffffff8175fb40 T ixgbe_setup_fw_link
+ffffffff8175fc70 T ixgbe_fc_autoneg_fw
+ffffffff8175fc90 T ixgbe_setup_eee_fw
+ffffffff8175fcf0 T ixgbe_init_ops_X550EM_a
+ffffffff8175fe20 T ixgbe_read_iosf_sb_reg_x550
+ffffffff8175ffa0 T ixgbe_write_iosf_sb_reg_x550
+ffffffff81760110 T ixgbe_read_iosf_sb_reg_x550a
+ffffffff817601a0 T ixgbe_write_iosf_sb_reg_x550a
+ffffffff81760230 T ixgbe_acquire_swfw_sync_X550a
+ffffffff81760380 T ixgbe_release_swfw_sync_X550a
+ffffffff81760410 T ixgbe_fc_autoneg_fiber_x550em_a
+ffffffff81760450 T ixgbe_fc_autoneg_backplane_x550em_a
+ffffffff817605b0 T ixgbe_setup_fc_backplane_x550em_a
+ffffffff817607a0 T ixgbe_fc_autoneg_sgmii_x550em_a
+ffffffff81760890 T ixgbe_init_ops_X550EM_x
+ffffffff81760950 T ixgbe_acquire_swfw_sync_X550em
+ffffffff81760a10 T ixgbe_release_swfw_sync_X550em
+ffffffff81760aa0 T ixgbe_iosf_wait
+ffffffff81760b50 T ixgbe_get_phy_token
+ffffffff81760be0 T ixgbe_put_phy_token
+ffffffff81760c50 T ixgbe_supported_sfp_modules_X550em
+ffffffff81760cd0 T ixgbe_identify_sfp_module_X550em
+ffffffff81760d40 T ixgbe_init_mac_link_ops_X550em
+ffffffff81760e80 T ixgbe_restart_an_internal_phy_x550em
+ffffffff81760f90 T ixgbe_setup_sgmii
+ffffffff81761230 T ixgbe_setup_sgmii_fw
+ffffffff81761500 T ixgbe_setup_mac_link_sfp_x550a
+ffffffff817616f0 T ixgbe_setup_mac_link_sfp_x550em
+ffffffff817617b0 T ixgbe_setup_mac_link_t_X550em
+ffffffff81761850 T ixgbe_check_link_t_X550em
+ffffffff81761920 T ixgbe_get_lasi_ext_t_x550em
+ffffffff81761aa0 T ixgbe_enable_lasi_ext_t_x550em
+ffffffff81761c30 T ixgbe_setup_kr_speed_x550em
+ffffffff81761e40 T ixgbe_reset_phy_fw
+ffffffff81761ef0 T ixgbe_check_overtemp_fw
+ffffffff81761f80 T ixgbe_read_phy_reg_x550a
+ffffffff81762020 T ixgbe_write_phy_reg_x550a
+ffffffff817620d0 T ixgbe_setup_kr_x550em
+ffffffff81762140 T ixgbe_setup_internal_phy_t_x550em
+ffffffff817622d0 T ixgbe_enter_lplu_t_x550em
+ffffffff817625a0 T ixgbe_handle_lasi_ext_t_x550em
+ffffffff81762600 T ixgbe_reset_phy_t_X550em
+ffffffff81762650 T ixgbe_set_mdio_speed
+ffffffff81762720 T ixgbe_init_ext_t_x550em
+ffffffff817627d0 T ixgbe_setup_sfi_x550a
+ffffffff81762980 T ixgbe_setup_ixfi_x550em_x
+ffffffff81762b60 T ixgbe_setup_ixfi_x550em
+ffffffff81762d40 T ixgbe_ext_phy_t_x550em_get_link
+ffffffff81762dd0 T ixgbe_setup_phy_loopback_x550em
+ffffffff81762fc0 T ixgbe_read_ee_hostif_buffer_X550
+ffffffff81763160 T ixgbe_write_ee_hostif_data_X550
+ffffffff817631c0 T ixgbe_checksum_ptr_x550
+ffffffff81763350 T ixgbe_calc_checksum_X550
+ffffffff817634e0 T ixgbe_update_flash_X550
+ffffffff81763530 T ixgbe_get_lcd_t_x550em
+ffffffff817635f0 T ixgbe_set_mux
+ffffffff81764000 T ixgbe_read_i2c_combined_generic_int
+ffffffff81764250 T ixgbe_i2c_start
+ffffffff817643b0 T ixgbe_clock_in_i2c_byte
+ffffffff817644a0 T ixgbe_clock_out_i2c_bit
+ffffffff817645b0 T ixgbe_i2c_stop
+ffffffff81764710 T ixgbe_i2c_bus_clear
+ffffffff81764830 T ixgbe_read_i2c_combined_generic
+ffffffff81764850 T ixgbe_read_i2c_combined_generic_unlocked
+ffffffff81764870 T ixgbe_write_i2c_combined_generic_int
+ffffffff81764a50 T ixgbe_write_i2c_combined_generic
+ffffffff81764a70 T ixgbe_write_i2c_combined_generic_unlocked
+ffffffff81764a90 T ixgbe_init_phy_ops_generic
+ffffffff81764bc0 T ixgbe_identify_phy_generic
+ffffffff817650a0 T ixgbe_reset_phy_generic
+ffffffff81765230 T ixgbe_read_phy_reg_generic
+ffffffff817652d0 T ixgbe_write_phy_reg_generic
+ffffffff81765380 T ixgbe_read_phy_reg_mdi
+ffffffff81765510 T ixgbe_write_phy_reg_mdi
+ffffffff817656a0 T ixgbe_setup_phy_link_generic
+ffffffff81765960 T ixgbe_setup_phy_link_speed_generic
+ffffffff817659e0 T ixgbe_get_phy_firmware_version_generic
+ffffffff81765a00 T ixgbe_read_i2c_byte_generic
+ffffffff81765a20 T ixgbe_write_i2c_byte_generic
+ffffffff81765a40 T ixgbe_read_i2c_eeprom_generic
+ffffffff81765a60 T ixgbe_write_i2c_eeprom_generic
+ffffffff81765a80 T ixgbe_identify_module_generic
+ffffffff81765af0 T ixgbe_read_i2c_byte_generic_unlocked
+ffffffff81765b10 T ixgbe_write_i2c_byte_generic_unlocked
+ffffffff81765b30 T ixgbe_tn_check_overtemp
+ffffffff81765ba0 T ixgbe_check_reset_blocked
+ffffffff81765c00 T ixgbe_validate_phy_addr
+ffffffff81765c70 T ixgbe_get_phy_id
+ffffffff81765d20 T ixgbe_get_phy_type_from_id
+ffffffff81765de0 T ixgbe_get_copper_link_capabilities_generic
+ffffffff81765ec0 T ixgbe_get_copper_speeds_supported
+ffffffff81765f70 T ixgbe_check_phy_link_tnx
+ffffffff81766230 T ixgbe_setup_phy_link_tnx
+ffffffff817664d0 T ixgbe_get_phy_firmware_version_tnx
+ffffffff817664f0 T ixgbe_reset_phy_nl
+ffffffff81766790 T ixgbe_get_sfp_init_sequence_offsets
+ffffffff81766970 T ixgbe_is_sfp
+ffffffff817669b0 T ixgbe_identify_sfp_module_generic
+ffffffff81766dc0 T ixgbe_identify_qsfp_module_generic
+ffffffff817670a0 T ixgbe_get_supported_phy_sfp_layer_generic
+ffffffff81767240 T ixgbe_is_sfp_probe
+ffffffff81767280 T ixgbe_read_i2c_byte_generic_int
+ffffffff81767480 T ixgbe_clock_out_i2c_byte
+ffffffff817675e0 T ixgbe_get_i2c_ack
+ffffffff817677f0 T ixgbe_write_i2c_byte_generic_int
+ffffffff81767950 T ixgbe_set_i2c_data
+ffffffff81767b10 T ixgbe_raise_i2c_clk
+ffffffff81767c20 T ixgbe_lower_i2c_clk
+ffffffff81767cb0 T ixgbe_clock_in_i2c_bit
+ffffffff81767e90 T ixgbe_get_i2c_data
+ffffffff81767f40 T ixgbe_set_copper_phy_power
+ffffffff81769000 t ixl_match
+ffffffff81769020 t ixl_attach
+ffffffff8176b920 t ixl_dmamem_alloc
+ffffffff8176ba80 t ixl_arq
+ffffffff8176be30 t ixl_arq_fill
+ffffffff8176c0c0 t ixl_intr
+ffffffff8176c690 t ixl_ioctl
+ffffffff8176e350 t ixl_start
+ffffffff8176e690 t ixl_watchdog
+ffffffff8176e6c0 t ixl_media_change
+ffffffff8176e6f0 t ixl_media_status
+ffffffff8176e780 t ixl_link_state_update
+ffffffff8176e8c0 t ixl_atq_poll
+ffffffff8176eab0 t ixl_rxfill
+ffffffff8176ecc0 t ixl_down
+ffffffff8176f4b0 t ixl_rxrefill
+ffffffff8176f4d0 t ixl_sfp_open
+ffffffff8176f880 t ixl_sfp_get
+ffffffff8176fa80 t ixl_sfp_close
+ffffffff8176fc80 t ixl_wakeup
+ffffffff8176fc90 t ixl_qsfp_open
+ffffffff8176fcc0 t ixl_qsfp_get
+ffffffff8176fec0 t ixl_qsfp_close
+ffffffff8176fef0 t ixl_link_state_update_done
+ffffffff81770000 T xge_match
+ffffffff81770020 T xge_attach
+ffffffff81770db0 T xge_setup_xgxs_xena
+ffffffff81770e30 T xge_setup_xgxs_herc
+ffffffff81770eb0 T xge_alloc_txmem
+ffffffff817710c0 T xge_alloc_rxmem
+ffffffff817713a0 T xge_add_rxbuf
+ffffffff81771580 T xge_xgmii_mediachange
+ffffffff817715b0 T xge_ifmedia_status
+ffffffff81771620 T xge_ioctl
+ffffffff817718a0 T xge_start
+ffffffff81771c10 T xge_intr
+ffffffff81772200 T xge_enable
+ffffffff817722b0 T xge_init
+ffffffff81772740 T xge_stop
+ffffffff81772810 T xge_setpromisc
+ffffffff81772890 T xge_setmulti
+ffffffff81773000 T thtc_match
+ffffffff81773080 T thtc_attach
+ffffffff817732a0 T tht_match
+ffffffff817732d0 T tht_attach
+ffffffff817734f0 T thtc_lookup
+ffffffff81773570 T tht_intr
+ffffffff81773750 T thtc_print
+ffffffff817737c0 T tht_sw_reset
+ffffffff81773cb0 T tht_lladdr_read
+ffffffff81773d60 T tht_ioctl
+ffffffff81773ef0 T tht_start
+ffffffff817744c0 T tht_watchdog
+ffffffff817744f0 T tht_media_change
+ffffffff81774520 T tht_media_status
+ffffffff81774600 T tht_mountroot
+ffffffff817747d0 T tht_fifo_alloc
+ffffffff817748e0 T tht_fw_load
+ffffffff81774c70 T tht_fifo_free
+ffffffff81774d20 T tht_link_state
+ffffffff81774dd0 T tht_write
+ffffffff81774e20 T tht_read
+ffffffff81774e40 T tht_rxd
+ffffffff81775240 T tht_rxf_fill
+ffffffff817757e0 T tht_txf
+ffffffff81775ae0 T tht_up
+ffffffff817761b0 T tht_down
+ffffffff81776810 T tht_iff
+ffffffff817769e0 T tht_pkt_alloc
+ffffffff81776c30 T tht_lladdr_write
+ffffffff81776ce0 T tht_pkt_free
+ffffffff81776db0 T tht_write_region
+ffffffff81776e00 T tht_fifo_writable
+ffffffff81776e70 T tht_fifo_readable
+ffffffff81776ee0 T tht_rxf_drain
+ffffffff81776fe0 T tht_fifo_pre
+ffffffff81777030 T tht_pkt_get
+ffffffff817770b0 T tht_load_pkt
+ffffffff81777200 T tht_pkt_put
+ffffffff81777280 T tht_fifo_write
+ffffffff81777330 T tht_fifo_write_dmap
+ffffffff81777480 T tht_fifo_write_pad
+ffffffff81777550 T tht_fifo_post
+ffffffff81777610 T tht_fifo_read
+ffffffff817776b0 T tht_pkt_used
+ffffffff817776e0 T tht_dmamem_alloc
+ffffffff81777860 T tht_dmamem_free
+ffffffff817778d0 T tht_wait_eq
+ffffffff817779a0 T tht_fw_tick
+ffffffff817779d0 T tht_wait_ne
+ffffffff81778000 T myx_match
+ffffffff81778020 T myx_attach
+ffffffff81778270 T myx_mcl_small
+ffffffff817782c0 T myx_refill
+ffffffff81778320 T myx_mcl_big
+ffffffff817783d0 T myx_query
+ffffffff817786a0 T myx_pcie_dc
+ffffffff81778780 T myx_attachhook
+ffffffff81778a70 T myx_ether_aton
+ffffffff81778b20 T myx_read
+ffffffff81778b50 T myx_loadfirmware
+ffffffff81778d60 T myx_write
+ffffffff81778db0 T myx_boot
+ffffffff81778f40 T myx_dmamem_alloc
+ffffffff817790a0 T myx_cmd
+ffffffff817791f0 T myx_probe_firmware
+ffffffff817795e0 T myx_intr
+ffffffff81779870 T myx_ioctl
+ffffffff81779b20 T myx_start
+ffffffff8177a010 T myx_watchdog
+ffffffff8177a040 T myx_media_change
+ffffffff8177a070 T myx_media_status
+ffffffff8177a1a0 T myx_dmamem_free
+ffffffff8177a210 T myx_rdma
+ffffffff8177a360 T myx_link_state
+ffffffff8177a3e0 T myx_up
+ffffffff8177b470 T myx_down
+ffffffff8177baf0 T myx_rxrinfo
+ffffffff8177bbd0 T myx_get_sffpage
+ffffffff8177bed0 T myx_iff
+ffffffff8177c0e0 T myx_setlladdr
+ffffffff8177c1b0 T myx_tx_init
+ffffffff8177c360 T myx_rx_init
+ffffffff8177c580 T myx_rx_fill
+ffffffff8177c870 T myx_rx_empty
+ffffffff8177c940 T myx_rx_free
+ffffffff8177c9d0 T myx_tx_free
+ffffffff8177ca50 T myx_tx_empty
+ffffffff8177cb20 T myx_write_txd_tail
+ffffffff8177cce0 T myx_load_mbuf
+ffffffff8177cd90 T myx_txeof
+ffffffff8177cee0 T myx_rxeof
+ffffffff8177d130 T myx_buf_fill
+ffffffff8177e000 T oce_match
+ffffffff8177e020 T oce_attach
+ffffffff8177e6d0 T oce_pci_alloc
+ffffffff8177e980 T oce_dma_alloc
+ffffffff8177eba0 T oce_init_fw
+ffffffff8177edc0 T oce_mbox_init
+ffffffff8177ee10 T oce_get_fw_config
+ffffffff8177f030 T oce_check_native_mode
+ffffffff8177f1c0 T oce_macaddr_get
+ffffffff8177f320 T oce_intr
+ffffffff8177f510 T oce_init_stats
+ffffffff8177f580 T oce_init_queues
+ffffffff8177f720 T oce_attach_ifp
+ffffffff8177f810 T oce_tick
+ffffffff8177f860 T oce_refill_rx
+ffffffff8177f8e0 T oce_attachhook
+ffffffff8177fa80 T oce_dma_free
+ffffffff8177fb30 T oce_get_link_status
+ffffffff8177fce0 T oce_first_mcc
+ffffffff8177fdd0 T oce_media_change
+ffffffff8177fe00 T oce_media_status
+ffffffff8177ff70 T oce_ioctl
+ffffffff81780110 T oce_start
+ffffffff81780210 T oce_watchdog
+ffffffff81780270 T oce_init
+ffffffff817807a0 T oce_stop
+ffffffff81780ad0 T oce_rxrinfo
+ffffffff81780c20 T oce_iff
+ffffffff81780d60 T oce_update_mcast
+ffffffff81780f00 T oce_set_promisc
+ffffffff81780fa0 T oce_link_status
+ffffffff81781070 T oce_update_stats
+ffffffff81781140 T oce_macaddr_set
+ffffffff817812d0 T oce_config_vlan
+ffffffff81781510 T oce_set_flow_control
+ffffffff81781740 T oce_new_rq
+ffffffff81781990 T oce_alloc_rx_bufs
+ffffffff81781ae0 T oce_drain_eq
+ffffffff81781bf0 T oce_cmd
+ffffffff81781e40 T oce_drain_rq
+ffffffff81781f60 T oce_free_posted_rxbuf
+ffffffff81782040 T oce_drain_wq
+ffffffff81782160 T oce_encap
+ffffffff81782540 T oce_intr_wq
+ffffffff817826e0 T oce_txeof
+ffffffff817827e0 T oce_intr_rq
+ffffffff817829b0 T oce_rxeoc
+ffffffff81782b10 T oce_rxeof
+ffffffff81782e20 T oce_port_valid
+ffffffff81782e70 T oce_vtp_valid
+ffffffff81782ed0 T oce_get_buf
+ffffffff81783080 T oce_intr_mq
+ffffffff817832f0 T oce_link_event
+ffffffff817833d0 T oce_create_iface
+ffffffff817835b0 T oce_create_eq
+ffffffff81783720 T oce_create_wq
+ffffffff817839e0 T oce_create_rq
+ffffffff81783c90 T oce_create_mq
+ffffffff81783e60 T oce_release_queues
+ffffffff81783f70 T oce_destroy_rq
+ffffffff817841c0 T oce_destroy_wq
+ffffffff81784410 T oce_destroy_mq
+ffffffff817845f0 T oce_destroy_eq
+ffffffff817847c0 T oce_create_ring
+ffffffff817849b0 T oce_create_cq
+ffffffff81784b50 T oce_destroy_ring
+ffffffff81784bf0 T oce_pkt_alloc
+ffffffff81784ca0 T oce_new_wq
+ffffffff81784e80 T oce_destroy_cq
+ffffffff81785050 T oce_pkt_free
+ffffffff817850a0 T oce_new_eq
+ffffffff81785330 T oce_new_mq
+ffffffff817855a0 T oce_drain_mq
+ffffffff817856c0 T oce_new_cq
+ffffffff81785a40 T oce_load_ring
+ffffffff81785b50 T oce_mbox_dispatch
+ffffffff81785d30 T oce_macaddr_add
+ffffffff81785eb0 T oce_macaddr_del
+ffffffff81785ff0 T oce_stats_be2
+ffffffff81786130 T oce_stats_be3
+ffffffff81786250 T oce_stats_xe
+ffffffff81787000 T dc_pci_match
+ffffffff817870a0 T dc_pci_attach
+ffffffff81787930 T dc_pci_detach
+ffffffff81788000 T epic_pci_match
+ffffffff81788020 T epic_pci_attach
+ffffffff81789000 T ti_pci_match
+ffffffff81789020 T ti_pci_attach
+ffffffff8178a000 T ne_pci_match
+ffffffff8178a120 T ne_pci_attach
+ffffffff8178a490 T ne_pci_lookup
+ffffffff8178b000 T gem_match_pci
+ffffffff8178b020 T gem_attach_pci
+ffffffff8178b260 T gem_detach_pci
+ffffffff8178b2e0 T gem_pci_enaddr
+ffffffff8178c000 T cas_match
+ffffffff8178c020 T cas_attach
+ffffffff8178c1b0 T cas_pci_enaddr
+ffffffff8178c4c0 T cas_intr
+ffffffff8178c630 T cas_config
+ffffffff8178cd60 T cas_reset
+ffffffff8178ce20 T cas_start
+ffffffff8178cf70 T cas_ioctl
+ffffffff8178d0c0 T cas_watchdog
+ffffffff8178d110 T cas_mii_readreg
+ffffffff8178d1f0 T cas_mii_writereg
+ffffffff8178d2e0 T cas_mii_statchg
+ffffffff8178d3a0 T cas_mediachange
+ffffffff8178d3f0 T cas_mediastatus
+ffffffff8178d450 T cas_mifinit
+ffffffff8178d4b0 T cas_pcs_readreg
+ffffffff8178d540 T cas_pcs_writereg
+ffffffff8178d6a0 T cas_tick
+ffffffff8178d860 T cas_bitwait
+ffffffff8178d910 T cas_reset_rx
+ffffffff8178dac0 T cas_reset_tx
+ffffffff8178dc70 T cas_rxdrain
+ffffffff8178dca0 T cas_stop
+ffffffff8178dde0 T cas_disable_rx
+ffffffff8178dea0 T cas_disable_tx
+ffffffff8178df60 T cas_meminit
+ffffffff8178e120 T cas_ringsize
+ffffffff8178e200 T cas_cringsize
+ffffffff8178e2e0 T cas_init
+ffffffff8178e760 T cas_init_regs
+ffffffff8178ec10 T cas_iff
+ffffffff8178ef90 T cas_rint
+ffffffff8178f4f0 T cas_add_rxbuf
+ffffffff8178f5f0 T cas_eint
+ffffffff8178f650 T cas_pint
+ffffffff8178f6c0 T cas_tint
+ffffffff8178f850 T cas_encap
+ffffffff81790000 T hifn_probe
+ffffffff81790020 T hifn_attach
+ffffffff81790970 T hifn_set_retry
+ffffffff817909c0 T hifn_reset_board
+ffffffff81790d20 T hifn_enable_crypto
+ffffffff81791410 T hifn_reset_puc
+ffffffff81791530 T hifn_init_dma
+ffffffff81791720 T hifn_init_pci_registers
+ffffffff81791e20 T hifn_ramtype
+ffffffff81791f10 T hifn_sramsize
+ffffffff81792030 T hifn_dramsize
+ffffffff817920c0 T hifn_intr
+ffffffff81792700 T hifn_sessions
+ffffffff817927d0 T hifn_write_4
+ffffffff81792870 T hifn_read_4
+ffffffff817928c0 T hifn_newsession
+ffffffff81792b10 T hifn_freesession
+ffffffff81792b80 T hifn_process
+ffffffff81793000 T hifn_init_pubrng
+ffffffff817934a0 T hifn_tick
+ffffffff81793870 T hifn_rng
+ffffffff81793a50 T hifn_puc_wait
+ffffffff81793b10 T hifn_next_signature
+ffffffff81793ba0 T hifn_writeramaddr
+ffffffff81793e90 T hifn_readramaddr
+ffffffff81794190 T hifn_alloc_slot
+ffffffff817943b0 T hifn_write_command
+ffffffff81794670 T hifn_dmamap_aligned
+ffffffff817946e0 T hifn_dmamap_load_dst
+ffffffff817949c0 T hifn_dmamap_load_src
+ffffffff81794b20 T hifn_crypto
+ffffffff817957f0 T hifn_callback
+ffffffff81795b80 T hifn_abort
+ffffffff81795d90 T hifn_compression
+ffffffff81796150 T hifn_mkmbuf_chain
+ffffffff817962c0 T hifn_compress_enter
+ffffffff81796b20 T hifn_callback_comp
+ffffffff81797000 T ubsec_probe
+ffffffff81797020 T ubsec_attach
+ffffffff81797840 T ubsec_intr
+ffffffff81797b50 T ubsec_dma_malloc
+ffffffff81797d10 T ubsec_newsession
+ffffffff817982f0 T ubsec_freesession
+ffffffff81798370 T ubsec_process
+ffffffff817995c0 T ubsec_reset_board
+ffffffff81799680 T ubsec_init_pciregs
+ffffffff817996c0 T ubsec_init_board
+ffffffff81799770 T ubsec_dma_free
+ffffffff817997e0 T ubsec_rng
+ffffffff81799970 T ubsec_callback
+ffffffff81799b70 T ubsec_feed
+ffffffff81799ed0 T ubsec_callback2
+ffffffff8179a030 T ubsec_feed2
+ffffffff8179a160 T ubsec_feed4
+ffffffff8179a290 T ubsec_totalreset
+ffffffff8179a430 T ubsec_dmamap_aligned
+ffffffff8179a4a0 T ubsec_cleanchip
+ffffffff8179a520 T ubsec_free_q
+ffffffff8179b000 T safe_probe
+ffffffff8179b030 T safe_attach
+ffffffff8179b6c0 T safe_intr
+ffffffff8179b7f0 T safe_dma_malloc
+ffffffff8179b9b0 T safe_dma_free
+ffffffff8179ba20 T safe_newsession
+ffffffff8179bfb0 T safe_freesession
+ffffffff8179c040 T safe_process
+ffffffff8179d1b0 T safe_reset_board
+ffffffff8179d220 T safe_init_pciregs
+ffffffff8179d250 T safe_init_board
+ffffffff8179d4f0 T safe_rng_init
+ffffffff8179d630 T safe_rng
+ffffffff8179d920 T safe_dmamap_aligned
+ffffffff8179d990 T safe_dmamap_uniform
+ffffffff8179da10 T safe_mcopy
+ffffffff8179db30 T safe_feed
+ffffffff8179dc30 T safe_cleanchip
+ffffffff8179dd00 T safe_free_entry
+ffffffff8179dd70 T safe_callback
+ffffffff8179e000 T sf_pci_match
+ffffffff8179e020 T sf_pci_attach
+ffffffff8179f000 T sis_probe
+ffffffff8179f020 T sis_attach
+ffffffff8179faa0 T sis_activate
+ffffffff8179fb20 T sis_reverse
+ffffffff8179fb80 T sis_delay
+ffffffff8179fc90 T sis_eeprom_idle
+ffffffff817a0210 T sis_eeprom_putbyte
+ffffffff817a0530 T sis_eeprom_getword
+ffffffff817a0bd0 T sis_read_eeprom
+ffffffff817a0c70 T sis_read_cmos
+ffffffff817a0d30 T sis_read_mac
+ffffffff817a0f00 T sis_read96x_mac
+ffffffff817a1050 T sis_mii_sync
+ffffffff817a1190 T sis_mii_send
+ffffffff817a1330 T sis_mii_readreg
+ffffffff817a1920 T sis_mii_writereg
+ffffffff817a1c20 T sis_miibus_readreg
+ffffffff817a1e00 T sis_miibus_writereg
+ffffffff817a1f80 T sis_miibus_statchg
+ffffffff817a2350 T sis_mchash
+ffffffff817a23c0 T sis_iff
+ffffffff817a23e0 T sis_iff_ns
+ffffffff817a2670 T sis_iff_sis
+ffffffff817a2910 T sis_reset
+ffffffff817a2a40 T sis_intr
+ffffffff817a2b90 T sis_tick
+ffffffff817a2bf0 T sis_ioctl
+ffffffff817a2da0 T sis_start
+ffffffff817a2f10 T sis_watchdog
+ffffffff817a2fb0 T sis_ifmedia_upd
+ffffffff817a3030 T sis_ifmedia_sts
+ffffffff817a3090 T sis_stop
+ffffffff817a3370 T sis_init
+ffffffff817a37e0 T sis_ring_init
+ffffffff817a3990 T sis_fill_rx_ring
+ffffffff817a3a40 T sis_newbuf
+ffffffff817a3ba0 T sis_rxeof
+ffffffff817a3dd0 T sis_txeof
+ffffffff817a3fb0 T sis_encap
+ffffffff817a5000 T se_match
+ffffffff817a5020 T se_attach
+ffffffff817a57c0 T se_activate
+ffffffff817a5840 T se_read_eeprom
+ffffffff817a5950 T se_get_mac_addr_eeprom
+ffffffff817a5d20 T se_pcib_match
+ffffffff817a5d80 T se_get_mac_addr_apc
+ffffffff817a6050 T se_miibus_cmd
+ffffffff817a6100 T se_miibus_readreg
+ffffffff817a61f0 T se_miibus_writereg
+ffffffff817a62e0 T se_miibus_statchg
+ffffffff817a6460 T se_iff
+ffffffff817a65c0 T se_reset
+ffffffff817a66e0 T se_intr
+ffffffff817a6870 T se_tick
+ffffffff817a68f0 T se_ioctl
+ffffffff817a6a30 T se_start
+ffffffff817a6b80 T se_watchdog
+ffffffff817a6be0 T se_ifmedia_upd
+ffffffff817a6c40 T se_ifmedia_sts
+ffffffff817a6ca0 T se_stop
+ffffffff817a6e80 T se_init
+ffffffff817a72f0 T se_list_tx_init
+ffffffff817a7380 T se_list_tx_free
+ffffffff817a7410 T se_list_rx_init
+ffffffff817a74c0 T se_newbuf
+ffffffff817a7640 T se_list_rx_free
+ffffffff817a76d0 T se_discard_rxbuf
+ffffffff817a7730 T se_rxeof
+ffffffff817a79a0 T se_txeof
+ffffffff817a7b70 T se_encap
+ffffffff817a8000 T uhci_pci_match
+ffffffff817a8040 T uhci_pci_attach
+ffffffff817a8310 T uhci_pci_detach
+ffffffff817a83b0 T uhci_pci_activate
+ffffffff817a8450 T uhci_pci_attach_deferred
+ffffffff817a9000 T ohci_pci_match
+ffffffff817a9040 T ohci_pci_attach
+ffffffff817a9320 T ohci_pci_detach
+ffffffff817a93c0 T ohci_pci_attach_deferred
+ffffffff817aa000 T ehci_pci_match
+ffffffff817aa040 T ehci_pci_attach
+ffffffff817aa470 T ehci_pci_detach
+ffffffff817aa510 T ehci_pci_activate
+ffffffff817aa580 T ehci_sb700_match
+ffffffff817aa5c0 T ehci_pci_takecontroller
+ffffffff817ab000 T xhci_pci_match
+ffffffff817ab040 T xhci_pci_attach
+ffffffff817ab380 T xhci_pci_detach
+ffffffff817ab420 T xhci_pci_activate
+ffffffff817ab4f0 T xhci_pci_takecontroller
+ffffffff817ac000 T pcicbbmatch
+ffffffff817ac040 T pccbbattach
+ffffffff817ac3c0 T pccbbactivate
+ffffffff817ac820 T cb_chipset
+ffffffff817ac870 T pccbb_shutdown
+ffffffff817ac960 T pccbb_power
+ffffffff817acb00 T pccbbintr
+ffffffff817accc0 T pccbb_legacy_disable
+ffffffff817acd20 T pci113x_insert
+ffffffff817acdd0 T pccbb_pci_callback
+ffffffff817ad110 T pccbb_chipinit
+ffffffff817ad580 T pccbb_pcmcia_attach_setup
+ffffffff817ad6e0 T cbbprint
+ffffffff817ad710 T pccbb_pcmcia_read
+ffffffff817ad740 T pccbb_pcmcia_write
+ffffffff817ad770 T pccbb_checksockstat
+ffffffff817ad840 T pccbbintr_function
+ffffffff817ad8f0 T pccbb_ctrl
+ffffffff817ada30 T pccbb_detect_card
+ffffffff817ada90 T cb_detect_voltage
+ffffffff817adae0 T cb_reset
+ffffffff817adc30 T pccbb_cardenable
+ffffffff817adcf0 T pccbb_cb_intr_establish
+ffffffff817add00 T pccbb_intr_establish
+ffffffff817ade50 T pccbb_cb_intr_disestablish
+ffffffff817ade60 T pccbb_intr_disestablish
+ffffffff817adf90 T pccbb_pcmcia_io_alloc
+ffffffff817ae090 T pccbb_pcmcia_io_free
+ffffffff817ae0b0 T pccbb_pcmcia_io_map
+ffffffff817ae160 T pccbb_pcmcia_do_io_map
+ffffffff817ae2c0 T pccbb_pcmcia_io_unmap
+ffffffff817ae360 T pccbb_pcmcia_wait_ready
+ffffffff817ae400 T pccbb_pcmcia_socket_enable
+ffffffff817ae780 T pccbb_pcmcia_do_mem_map
+ffffffff817ae900 T pccbb_pcmcia_socket_disable
+ffffffff817aea20 T pccbb_pcmcia_card_detect
+ffffffff817aea80 T pccbb_pcmcia_mem_alloc
+ffffffff817aeb50 T pccbb_pcmcia_mem_free
+ffffffff817aeb70 T pccbb_pcmcia_mem_map
+ffffffff817aeca0 T pccbb_pcmcia_mem_unmap
+ffffffff817aed30 T pccbb_pcmcia_intr_establish
+ffffffff817aed50 T pccbb_pcmcia_intr_disestablish
+ffffffff817aed60 T pccbb_pcmcia_intr_string
+ffffffff817aeda0 T pccbb_rbus_cb_space_alloc
+ffffffff817aeec0 T pccbb_open_win
+ffffffff817af040 T pccbb_rbus_cb_space_free
+ffffffff817af150 T pccbb_close_win
+ffffffff817af210 T pccbb_winlist_insert
+ffffffff817af310 T pccbb_winset
+ffffffff817af610 T pccbb_winlist_delete
+ffffffff817b0000 T sk_xmac_miibus_readreg
+ffffffff817b0170 T sk_xmac_miibus_writereg
+ffffffff817b02f0 T sk_xmac_miibus_statchg
+ffffffff817b03c0 T sk_marv_miibus_readreg
+ffffffff817b0500 T sk_marv_miibus_writereg
+ffffffff817b0630 T sk_marv_miibus_statchg
+ffffffff817b0660 T sk_setfilt
+ffffffff817b0720 T sk_iff
+ffffffff817b0740 T sk_iff_xmac
+ffffffff817b0980 T sk_iff_yukon
+ffffffff817b0ba0 T sk_init_rx_ring
+ffffffff817b0ce0 T sk_fill_rx_ring
+ffffffff817b0d60 T sk_newbuf
+ffffffff817b0ec0 T sk_init_tx_ring
+ffffffff817b10a0 T sk_ifmedia_upd
+ffffffff817b10e0 T sk_ifmedia_sts
+ffffffff817b1140 T sk_ioctl
+ffffffff817b12f0 T sk_init
+ffffffff817b1bb0 T sk_stop
+ffffffff817b2290 T skc_probe
+ffffffff817b2320 T skc_reset
+ffffffff817b2520 T sk_probe
+ffffffff817b2570 T sk_attach
+ffffffff817b2ca0 T sk_start
+ffffffff817b2e10 T sk_watchdog
+ffffffff817b2e90 T sk_reset
+ffffffff817b2ef0 T sk_tick
+ffffffff817b30d0 T sk_yukon_tick
+ffffffff817b3130 T sk_init_xmac
+ffffffff817b38e0 T sk_init_yukon
+ffffffff817b3fa0 T sk_detach
+ffffffff817b40c0 T sk_activate
+ffffffff817b4150 T skcprint
+ffffffff817b41c0 T skc_attach
+ffffffff817b4670 T sk_intr
+ffffffff817b4ab0 T skc_detach
+ffffffff817b4b30 T skc_activate
+ffffffff817b4b60 T sk_encap
+ffffffff817b4e80 T sk_txeof
+ffffffff817b5120 T sk_rxeof
+ffffffff817b5440 T sk_intr_bcom
+ffffffff817b5620 T sk_intr_xmac
+ffffffff817b57d0 T sk_intr_yukon
+ffffffff817b6000 T msk_miibus_readreg
+ffffffff817b6130 T msk_miibus_writereg
+ffffffff817b6260 T msk_miibus_statchg
+ffffffff817b6350 T msk_iff
+ffffffff817b6570 T msk_init_rx_ring
+ffffffff817b6610 T msk_fill_rx_ring
+ffffffff817b6890 T msk_init_tx_ring
+ffffffff817b69b0 T msk_ifmedia_upd
+ffffffff817b69f0 T msk_ifmedia_sts
+ffffffff817b6a50 T msk_ioctl
+ffffffff817b6c00 T msk_init
+ffffffff817b75a0 T msk_stop
+ffffffff817b79d0 T mskc_probe
+ffffffff817b79f0 T mskc_reset
+ffffffff817b8240 T msk_probe
+ffffffff817b8290 T msk_reset
+ffffffff817b8380 T msk_attach
+ffffffff817b8a20 T msk_start
+ffffffff817b8dd0 T msk_watchdog
+ffffffff817b8f40 T msk_init_yukon
+ffffffff817b9440 T msk_tick
+ffffffff817b94a0 T msk_fill_rx_tick
+ffffffff817b9510 T msk_detach
+ffffffff817b9630 T msk_activate
+ffffffff817b9760 T mskcprint
+ffffffff817b97d0 T mskc_attach
+ffffffff817b9fc0 T msk_intr
+ffffffff817ba490 T mskc_detach
+ffffffff817ba570 T mskc_activate
+ffffffff817ba5a0 T msk_txeof
+ffffffff817ba700 T msk_rxeof
+ffffffff817ba880 T msk_intr_yukon
+ffffffff817bb000 T puc_pci_match
+ffffffff817bb100 T puc_pci_attach
+ffffffff817bb400 T puc_pci_detach
+ffffffff817bb550 T puc_find_description
+ffffffff817bb5f0 T puc_pci_intr_string
+ffffffff817bb620 T puc_pci_intr_establish
+ffffffff817bb6b0 T puc_print_ports
+ffffffff817bb8b0 T puc_common_attach
+ffffffff817bba40 T puc_port_type_name
+ffffffff817bba80 T puc_print
+ffffffff817bbaf0 T puc_submatch
+ffffffff817bc000 T com_puc_match
+ffffffff817bc030 T com_puc_attach
+ffffffff817bc130 T com_puc_detach
+ffffffff817bd000 T lpt_puc_probe
+ffffffff817bd030 T lpt_puc_attach
+ffffffff817bd100 T lpt_puc_detach
+ffffffff817be000 T wi_pci_match
+ffffffff817be040 T wi_pci_attach
+ffffffff817be0d0 T wi_pci_activate
+ffffffff817be1d0 T wi_pci_lookup
+ffffffff817be3e0 T wi_pci_wakeup
+ffffffff817be490 T wi_pci_acex_attach
+ffffffff817be790 T wi_pci_common_attach
+ffffffff817be8f0 T wi_pci_plx_attach
+ffffffff817bebf0 T wi_pci_plx_print_cis
+ffffffff817bedf0 T wi_pci_tmd_attach
+ffffffff817bef60 T wi_pci_native_attach
+ffffffff817c0000 T an_pci_match
+ffffffff817c0020 T an_pci_attach
+ffffffff817c1000 T iwi_match
+ffffffff817c1020 T iwi_attach
+ffffffff817c1960 T iwi_activate
+ffffffff817c19b0 T iwi_intr
+ffffffff817c1c20 T iwi_reset
+ffffffff817c1e20 T iwi_alloc_cmd_ring
+ffffffff817c2000 T iwi_alloc_tx_ring
+ffffffff817c2200 T iwi_alloc_rx_ring
+ffffffff817c2410 T iwi_read_prom_word
+ffffffff817c2ab0 T iwi_ioctl
+ffffffff817c2c40 T iwi_start
+ffffffff817c2d90 T iwi_watchdog
+ffffffff817c2e20 T iwi_newstate
+ffffffff817c3030 T iwi_send_mgmt
+ffffffff817c3060 T iwi_media_change
+ffffffff817c30c0 T iwi_media_status
+ffffffff817c3230 T iwi_init_task
+ffffffff817c32a0 T iwi_free_tx_ring
+ffffffff817c3390 T iwi_free_cmd_ring
+ffffffff817c3440 T iwi_stop
+ffffffff817c36c0 T iwi_wakeup
+ffffffff817c3760 T iwi_init
+ffffffff817c3c90 T iwi_reset_cmd_ring
+ffffffff817c3cd0 T iwi_reset_tx_ring
+ffffffff817c3d70 T iwi_free_rx_ring
+ffffffff817c3e00 T iwi_reset_rx_ring
+ffffffff817c3e30 T iwi_rate
+ffffffff817c3ed0 T iwi_find_txnode
+ffffffff817c3ff0 T iwi_scan
+ffffffff817c42c0 T iwi_auth_and_assoc
+ffffffff817c4b70 T iwi_set_chan
+ffffffff817c4d20 T iwi_frame_intr
+ffffffff817c5040 T iwi_notification_intr
+ffffffff817c5140 T iwi_rx_intr
+ffffffff817c5300 T iwi_tx_intr
+ffffffff817c5400 T iwi_cmd
+ffffffff817c5560 T iwi_tx_start
+ffffffff817c5a30 T iwi_stop_master
+ffffffff817c5bf0 T iwi_load_ucode
+ffffffff817c6230 T iwi_load_firmware
+ffffffff817c6870 T iwi_config
+ffffffff817c6c30 T iwi_update_edca
+ffffffff817c7000 T wpi_match
+ffffffff817c7020 T wpi_attach
+ffffffff817c77d0 T wpi_detach
+ffffffff817c7a70 T wpi_activate
+ffffffff817c7b10 T wpi_intr
+ffffffff817c7d00 T wpi_apm_init
+ffffffff817c8010 T wpi_read_eeprom
+ffffffff817c8290 T wpi_alloc_fwmem
+ffffffff817c82c0 T wpi_alloc_shared
+ffffffff817c82f0 T wpi_alloc_tx_ring
+ffffffff817c84b0 T wpi_alloc_rx_ring
+ffffffff817c86a0 T wpi_apm_stop
+ffffffff817c87c0 T wpi_ioctl
+ffffffff817c8a20 T wpi_start
+ffffffff817c8bb0 T wpi_watchdog
+ffffffff817c8c90 T wpi_node_alloc
+ffffffff817c8cb0 T wpi_newassoc
+ffffffff817c8de0 T wpi_updateedca
+ffffffff817c9080 T wpi_set_key
+ffffffff817c92e0 T wpi_delete_key
+ffffffff817c9500 T wpi_newstate
+ffffffff817c97d0 T wpi_media_change
+ffffffff817c9930 T wpi_radiotap_attach
+ffffffff817c99c0 T wpi_calib_timeout
+ffffffff817c9ac0 T wpi_init_task
+ffffffff817c9b30 T wpi_free_tx_ring
+ffffffff817c9d10 T wpi_free_shared
+ffffffff817c9e00 T wpi_free_fwmem
+ffffffff817c9ef0 T wpi_free_rx_ring
+ffffffff817ca030 T wpi_stop
+ffffffff817ca090 T wpi_wakeup
+ffffffff817ca130 T wpi_init
+ffffffff817ca290 T wpi_nic_lock
+ffffffff817ca360 T wpi_read_prom_data
+ffffffff817ca780 T wpi_dma_contig_alloc
+ffffffff817ca970 T wpi_dma_contig_free
+ffffffff817caa30 T wpi_reset_rx_ring
+ffffffff817cabc0 T wpi_reset_tx_ring
+ffffffff817cacb0 T wpi_read_eeprom_channels
+ffffffff817cadf0 T wpi_read_eeprom_group
+ffffffff817caef0 T wpi_set_led
+ffffffff817cb040 T wpi_scan
+ffffffff817cb320 T wpi_auth
+ffffffff817cb7a0 T wpi_run
+ffffffff817cbfe0 T wpi_iter_func
+ffffffff817cc000 T wpi_power_calibration
+ffffffff817cc090 T wpi_ccmp_decap
+ffffffff817cc1a0 T wpi_rx_done
+ffffffff817cc660 T wpi_tx_done
+ffffffff817cc7f0 T wpi_cmd_done
+ffffffff817cc8d0 T wpi_notif_intr
+ffffffff817cccc0 T wpi_tx
+ffffffff817cd430 T wpi_set_pslevel
+ffffffff817cd5c0 T wpi_cmd
+ffffffff817cd900 T wpi_mrr_setup
+ffffffff817cdd00 T wpi_set_timing
+ffffffff817cde90 T wpi_set_txpower
+ffffffff817ce030 T wpi_get_power_index
+ffffffff817ce1e0 T wpi_config
+ffffffff817ce8c0 T wpi_post_alive
+ffffffff817ceae0 T wpi_load_bootcode
+ffffffff817ceeb0 T wpi_load_firmware
+ffffffff817cf4b0 T wpi_read_firmware
+ffffffff817cf670 T wpi_clock_wait
+ffffffff817cf750 T wpi_apm_stop_master
+ffffffff817cf860 T wpi_nic_config
+ffffffff817cfa20 T wpi_hw_init
+ffffffff817d0300 T wpi_hw_stop
+ffffffff817d1000 T iwn_match
+ffffffff817d1020 T iwn_attach
+ffffffff817d1c00 T iwn_detach
+ffffffff817d1ff0 T iwn_activate
+ffffffff817d20a0 T iwn_intr
+ffffffff817d2570 T iwn4965_attach
+ffffffff817d26c0 T iwn5000_attach
+ffffffff817d29f0 T iwn_hw_prepare
+ffffffff817d2d80 T iwn_read_eeprom
+ffffffff817d3030 T iwn_alloc_fwmem
+ffffffff817d3060 T iwn_alloc_kw
+ffffffff817d3090 T iwn_alloc_ict
+ffffffff817d30c0 T iwn_alloc_sched
+ffffffff817d3100 T iwn_alloc_tx_ring
+ffffffff817d3270 T iwn_alloc_rx_ring
+ffffffff817d3480 T iwn_ioctl
+ffffffff817d3720 T iwn_start
+ffffffff817d38c0 T iwn_watchdog
+ffffffff817d39b0 T iwn_node_alloc
+ffffffff817d39d0 T iwn_bgscan
+ffffffff817d3a50 T iwn_newassoc
+ffffffff817d3b30 T iwn_updateedca
+ffffffff817d3df0 T iwn_set_key
+ffffffff817d3f20 T iwn_delete_key
+ffffffff817d4020 T iwn_update_htprot
+ffffffff817d42e0 T iwn_ampdu_rx_start
+ffffffff817d43c0 T iwn_ampdu_rx_stop
+ffffffff817d4490 T iwn_ampdu_tx_start
+ffffffff817d4740 T iwn_ampdu_tx_stop
+ffffffff817d49e0 T iwn_newstate
+ffffffff817d4cc0 T iwn_media_change
+ffffffff817d4e20 T iwn_radiotap_attach
+ffffffff817d4eb0 T iwn_calib_timeout
+ffffffff817d50c0 T iwn_init_task
+ffffffff817d5130 T iwn_free_tx_ring
+ffffffff817d5310 T iwn_free_sched
+ffffffff817d5400 T iwn_free_ict
+ffffffff817d54f0 T iwn_free_kw
+ffffffff817d55e0 T iwn_free_fwmem
+ffffffff817d56d0 T iwn4965_load_firmware
+ffffffff817d5d40 T iwn4965_read_eeprom
+ffffffff817d5e70 T iwn4965_post_alive
+ffffffff817d6340 T iwn4965_nic_config
+ffffffff817d6420 T iwn4965_reset_sched
+ffffffff817d6450 T iwn4965_update_sched
+ffffffff817d6530 T iwn4965_get_temperature
+ffffffff817d65a0 T iwn4965_get_rssi
+ffffffff817d6610 T iwn4965_set_txpower
+ffffffff817d6ae0 T iwn4965_init_gains
+ffffffff817d6c80 T iwn4965_set_gains
+ffffffff817d6f90 T iwn4965_add_node
+ffffffff817d7020 T iwn4965_tx_done
+ffffffff817d7180 T iwn4965_ampdu_tx_start
+ffffffff817d75b0 T iwn4965_ampdu_tx_stop
+ffffffff817d77c0 T iwn5000_load_firmware
+ffffffff817d78c0 T iwn5000_read_eeprom
+ffffffff817d7ae0 T iwn5000_post_alive
+ffffffff817d8480 T iwn5000_nic_config
+ffffffff817d8880 T iwn5000_reset_sched
+ffffffff817d8970 T iwn5000_update_sched
+ffffffff817d8a50 T iwn5000_get_temperature
+ffffffff817d8ab0 T iwn5000_get_rssi
+ffffffff817d8b10 T iwn5000_set_txpower
+ffffffff817d8b60 T iwn5000_init_gains
+ffffffff817d8d00 T iwn5000_set_gains
+ffffffff817d8f30 T iwn5000_add_node
+ffffffff817d8f50 T iwn5000_tx_done
+ffffffff817d9140 T iwn5000_ampdu_tx_start
+ffffffff817d95a0 T iwn5000_ampdu_tx_stop
+ffffffff817d9840 T iwn_free_rx_ring
+ffffffff817d9a20 T iwn_stop
+ffffffff817d9aa0 T iwn_wakeup
+ffffffff817d9b50 T iwn_init
+ffffffff817d9e60 T iwn_nic_lock
+ffffffff817d9f30 T iwn_eeprom_lock
+ffffffff817da010 T iwn_init_otprom
+ffffffff817da4a0 T iwn_clock_wait
+ffffffff817da580 T iwn_read_prom_data
+ffffffff817da9e0 T iwn_dma_contig_alloc
+ffffffff817dabd0 T iwn_dma_contig_free
+ffffffff817dac90 T iwn_reset_rx_ring
+ffffffff817dae30 T iwn_reset_tx_ring
+ffffffff817daf30 T iwn5000_ict_reset
+ffffffff817db010 T iwn_apm_init
+ffffffff817db470 T iwn_apm_stop
+ffffffff817db5c0 T iwn_read_eeprom_channels
+ffffffff817db720 T iwn_read_eeprom_enhinfo
+ffffffff817db8b0 T iwn_scan_abort
+ffffffff817dba50 T iwn_set_led
+ffffffff817dbc20 T iwn_cmd
+ffffffff817dbf80 T iwn_scan
+ffffffff817dc450 T iwn_auth
+ffffffff817dc690 T iwn_run
+ffffffff817dcab0 T iwn_iter_func
+ffffffff817dcaf0 T iwn_ccmp_decap
+ffffffff817dcc70 T iwn_rx_phy
+ffffffff817dcd50 T iwn_rx_done
+ffffffff817dd380 T iwn_rx_compressed_ba
+ffffffff817dd640 T iwn_ampdu_txq_advance
+ffffffff817dd7b0 T iwn_clear_oactive
+ffffffff817dd830 T iwn5000_rx_calib_results
+ffffffff817dd990 T iwn_rx_statistics
+ffffffff817ddb30 T iwn4965_power_calibration
+ffffffff817ddb80 T iwn_get_noise
+ffffffff817ddbf0 T iwn_collect_noise
+ffffffff817ddd50 T iwn_tune_sensitivity
+ffffffff817de440 T iwn_tx_done_free_txdata
+ffffffff817de4e0 T iwn_ampdu_tx_done
+ffffffff817de7f0 T iwn_tx_done
+ffffffff817dea10 T iwn_cmd_done
+ffffffff817deaf0 T iwn_notif_intr
+ffffffff817df150 T iwn_init_sensitivity
+ffffffff817df410 T iwn_wakeup_intr
+ffffffff817df4d0 T iwn_rval2ridx
+ffffffff817df550 T iwn_tx
+ffffffff817e0070 T iwn_set_pslevel
+ffffffff817e0230 T iwn_set_link_quality
+ffffffff817e05d0 T iwn_add_broadcast_node
+ffffffff817e0810 T iwn_set_critical_temp
+ffffffff817e08c0 T iwn_set_timing
+ffffffff817e0a80 T iwn_send_sensitivity
+ffffffff817e0b80 T iwn_send_btcoex
+ffffffff817e0be0 T iwn_send_advanced_btcoex
+ffffffff817e1450 T iwn5000_runtime_calib
+ffffffff817e1500 T iwn_config
+ffffffff817e1a90 T iwn6000_temp_offset_calib
+ffffffff817e1af0 T iwn2000_temp_offset_calib
+ffffffff817e1b80 T iwn_get_active_dwell_time
+ffffffff817e1bc0 T iwn_limit_dwell
+ffffffff817e1c20 T iwn_get_passive_dwell_time
+ffffffff817e1c90 T iwn5000_query_calibration
+ffffffff817e1d80 T iwn5000_send_calibration
+ffffffff817e1ec0 T iwn5000_send_wimax_coex
+ffffffff817e1f50 T iwn5000_crystal_calib
+ffffffff817e1fb0 T iwn_hw_stop
+ffffffff817e23e0 T iwn_hw_init
+ffffffff817e2b50 T iwn4965_load_bootcode
+ffffffff817e2f20 T iwn5000_load_firmware_section
+ffffffff817e3190 T iwn_read_firmware_leg
+ffffffff817e32a0 T iwn_read_firmware_tlv
+ffffffff817e3510 T iwn_read_firmware
+ffffffff817e3740 T iwn_apm_stop_master
+ffffffff817e4000 T iwm_is_mimo_ht_plcp
+ffffffff817e4040 T iwm_is_mimo_mcs
+ffffffff817e4080 T iwm_store_cscheme
+ffffffff817e40d0 T iwm_firmware_store_section
+ffffffff817e4170 T iwm_set_default_calib
+ffffffff817e41c0 T iwm_fw_info_free
+ffffffff817e4210 T iwm_read_firmware
+ffffffff817e49b0 T iwm_read_prph
+ffffffff817e4a80 T iwm_nic_assert_locked
+ffffffff817e4b20 T iwm_write_prph
+ffffffff817e4c00 T iwm_write_prph64
+ffffffff817e4c40 T iwm_read_mem
+ffffffff817e4d80 T iwm_nic_lock
+ffffffff817e4f50 T iwm_nic_unlock
+ffffffff817e5000 T iwm_write_mem
+ffffffff817e5140 T iwm_write_mem32
+ffffffff817e5250 T iwm_poll_bit
+ffffffff817e5320 T iwm_set_bits_mask_prph
+ffffffff817e5430 T iwm_set_bits_prph
+ffffffff817e5520 T iwm_clear_bits_prph
+ffffffff817e5610 T iwm_dma_contig_alloc
+ffffffff817e5800 T iwm_dma_contig_free
+ffffffff817e58c0 T iwm_alloc_rx_ring
+ffffffff817e5aa0 T iwm_rx_addbuf
+ffffffff817e5c80 T iwm_free_rx_ring
+ffffffff817e5f30 T iwm_disable_rx_dma
+ffffffff817e60d0 T iwm_reset_rx_ring
+ffffffff817e6150 T iwm_alloc_tx_ring
+ffffffff817e6330 T iwm_free_tx_ring
+ffffffff817e6500 T iwm_reset_tx_ring
+ffffffff817e66a0 T iwm_enable_rfkill_int
+ffffffff817e67d0 T iwm_check_rfkill
+ffffffff817e6870 T iwm_enable_interrupts
+ffffffff817e6920 T iwm_enable_fwload_interrupt
+ffffffff817e69f0 T iwm_restore_interrupts
+ffffffff817e6a20 T iwm_disable_interrupts
+ffffffff817e6af0 T iwm_ict_reset
+ffffffff817e6cc0 T iwm_set_hw_ready
+ffffffff817e6de0 T iwm_prepare_card_hw
+ffffffff817e70c0 T iwm_apm_config
+ffffffff817e71a0 T iwm_apm_init
+ffffffff817e7710 T iwm_apm_stop
+ffffffff817e7910 T iwm_init_msix_hw
+ffffffff817e79b0 T iwm_conf_msix_hw
+ffffffff817e7e70 T iwm_start_hw
+ffffffff817e80a0 T iwm_stop_device
+ffffffff817e8690 T iwm_nic_config
+ffffffff817e8760 T iwm_nic_rx_init
+ffffffff817e8780 T iwm_nic_rx_mq_init
+ffffffff817e89a0 T iwm_nic_rx_legacy_init
+ffffffff817e8bf0 T iwm_nic_tx_init
+ffffffff817e8d70 T iwm_nic_init
+ffffffff817e8f60 T iwm_enable_ac_txq
+ffffffff817e9290 T iwm_enable_txq
+ffffffff817e9410 T iwm_send_cmd_pdu
+ffffffff817e9490 T iwm_post_alive
+ffffffff817e9870 T iwm_phy_db_get_section
+ffffffff817e9920 T iwm_phy_db_set_section
+ffffffff817e9a70 T iwm_is_valid_channel
+ffffffff817e9ae0 T iwm_ch_id_to_ch_index
+ffffffff817e9b80 T iwm_channel_id_to_papd
+ffffffff817e9c30 T iwm_channel_id_to_txp
+ffffffff817e9e20 T iwm_phy_db_get_section_data
+ffffffff817e9fa0 T iwm_send_phy_db_cmd
+ffffffff817ea040 T iwm_send_cmd
+ffffffff817ea6b0 T iwm_phy_db_send_all_channel_groups
+ffffffff817ea890 T iwm_send_phy_db_data
+ffffffff817eab80 T iwm_send_time_event_cmd
+ffffffff817eac90 T iwm_free_resp
+ffffffff817ead00 T iwm_protect_session
+ffffffff817eadb0 T iwm_unprotect_session
+ffffffff817eae60 T iwm_nvm_read_chunk
+ffffffff817eafe0 T iwm_nvm_read_section
+ffffffff817eb0a0 T iwm_fw_valid_tx_ant
+ffffffff817eb0e0 T iwm_fw_valid_rx_ant
+ffffffff817eb120 T iwm_init_channel_map
+ffffffff817eb230 T iwm_setup_ht_rates
+ffffffff817eb2c0 T iwm_sta_rx_agg
+ffffffff817eb4f0 T iwm_send_cmd_pdu_status
+ffffffff817eb580 T iwm_htprot_task
+ffffffff817eb610 T iwm_mac_ctxt_cmd
+ffffffff817eb810 T iwm_update_htprot
+ffffffff817eb880 T iwm_add_task
+ffffffff817eb8f0 T iwm_ba_task
+ffffffff817ebaf0 T iwm_ampdu_rx_start
+ffffffff817ebbe0 T iwm_ampdu_rx_stop
+ffffffff817ebc70 T iwm_set_hw_address_8000
+ffffffff817ebe50 T iwm_parse_nvm_data
+ffffffff817ec2d0 T iwm_parse_nvm_sections
+ffffffff817ec3d0 T iwm_nvm_init
+ffffffff817ec670 T iwm_firmware_load_sect
+ffffffff817ec730 T iwm_firmware_load_chunk
+ffffffff817ec9d0 T iwm_load_firmware_7000
+ffffffff817ecc40 T iwm_load_cpu_sections_8000
+ffffffff817ecff0 T iwm_load_firmware_8000
+ffffffff817ed1a0 T iwm_load_firmware
+ffffffff817ed290 T iwm_start_fw
+ffffffff817ed450 T iwm_send_tx_ant_cfg
+ffffffff817ed4e0 T iwm_send_phy_cfg_cmd
+ffffffff817ed590 T iwm_send_dqa_cmd
+ffffffff817ed620 T iwm_load_ucode_wait_alive
+ffffffff817ed860 T iwm_save_fw_paging
+ffffffff817ed8d0 T iwm_send_paging_cmd
+ffffffff817eda20 T iwm_free_fw_paging
+ffffffff817edb70 T iwm_run_init_mvm_ucode
+ffffffff817edfa0 T iwm_send_bt_init_conf
+ffffffff817ee030 T iwm_sf_config
+ffffffff817ee290 T iwm_config_ltr
+ffffffff817ee350 T iwm_get_signal_strength
+ffffffff817ee3c0 T iwm_rxmq_get_signal_strength
+ffffffff817ee410 T iwm_rx_rx_phy_cmd
+ffffffff817ee470 T iwm_get_noise
+ffffffff817ee4e0 T iwm_rx_frame
+ffffffff817ee7c0 T iwm_rx_mpdu
+ffffffff817ee930 T iwm_rx_mpdu_mq
+ffffffff817eeac0 T iwm_rx_tx_cmd_single
+ffffffff817eec40 T iwm_setrates
+ffffffff817ef120 T iwm_txd_done
+ffffffff817ef1e0 T iwm_rx_tx_cmd
+ffffffff817ef4e0 T iwm_rx_bmiss
+ffffffff817ef5e0 T iwm_binding_cmd
+ffffffff817ef740 T iwm_phy_ctxt_cmd_hdr
+ffffffff817ef7b0 T iwm_phy_ctxt_cmd_data
+ffffffff817ef870 T iwm_phy_ctxt_cmd
+ffffffff817ef9d0 T iwm_send_cmd_status
+ffffffff817efaf0 T iwm_cmd_done
+ffffffff817efca0 T iwm_tx_fill_cmd
+ffffffff817effa0 T iwm_rval2ridx
+ffffffff817f0020 T iwm_tx
+ffffffff817f0810 T iwm_flush_tx_path
+ffffffff817f08d0 T iwm_led_enable
+ffffffff817f0900 T iwm_led_disable
+ffffffff817f0930 T iwm_led_is_enabled
+ffffffff817f0990 T iwm_led_blink_timeout
+ffffffff817f0a00 T iwm_led_blink_start
+ffffffff817f0a50 T iwm_led_blink_stop
+ffffffff817f0a90 T iwm_beacon_filter_send_cmd
+ffffffff817f0b10 T iwm_beacon_filter_set_cqm_params
+ffffffff817f0b40 T iwm_update_beacon_abort
+ffffffff817f0c30 T iwm_power_build_cmd
+ffffffff817f0cc0 T iwm_power_mac_update_mode
+ffffffff817f0ed0 T iwm_power_update_device
+ffffffff817f0f70 T iwm_enable_beacon_filter
+ffffffff817f1060 T iwm_disable_beacon_filter
+ffffffff817f1130 T iwm_add_sta_cmd
+ffffffff817f1400 T iwm_add_aux_sta
+ffffffff817f1580 T iwm_rm_sta_cmd
+ffffffff817f1640 T iwm_scan_rx_chain
+ffffffff817f16c0 T iwm_scan_rate_n_flags
+ffffffff817f17e0 T iwm_lmac_scan_fill_channels
+ffffffff817f18b0 T iwm_umac_scan_fill_channels
+ffffffff817f1990 T iwm_fill_probe_req_v1
+ffffffff817f1a30 T iwm_fill_probe_req
+ffffffff817f1cf0 T iwm_lmac_scan
+ffffffff817f21f0 T iwm_config_umac_scan
+ffffffff817f23f0 T iwm_umac_scan_size
+ffffffff817f2450 T iwm_get_scan_req_umac_chan_param
+ffffffff817f24a0 T iwm_get_scan_req_umac_data
+ffffffff817f24f0 T iwm_umac_scan
+ffffffff817f29c0 T iwm_ridx2rate
+ffffffff817f2a20 T iwm_ack_rates
+ffffffff817f2d00 T iwm_mac_ctxt_cmd_common
+ffffffff817f3030 T iwm_mac_ctxt_cmd_fill_sta
+ffffffff817f30e0 T iwm_update_quotas
+ffffffff817f33e0 T iwm_del_task
+ffffffff817f3440 T iwm_scan
+ffffffff817f36b0 T iwm_scan_abort
+ffffffff817f37d0 T iwm_bgscan
+ffffffff817f3870 T iwm_umac_scan_abort
+ffffffff817f3900 T iwm_lmac_scan_abort
+ffffffff817f39a0 T iwm_auth
+ffffffff817f3ed0 T iwm_deauth
+ffffffff817f4280 T iwm_assoc
+ffffffff817f4330 T iwm_disassoc
+ffffffff817f4440 T iwm_run
+ffffffff817f4b30 T iwm_allow_mcast
+ffffffff817f4c30 T iwm_run_stop
+ffffffff817f50f0 T iwm_node_alloc
+ffffffff817f5110 T iwm_calib_timeout
+ffffffff817f51d0 T iwm_media_change
+ffffffff817f53b0 T iwm_stop
+ffffffff817f55d0 T iwm_init
+ffffffff817f5740 T iwm_newstate_task
+ffffffff817f59b0 T iwm_newstate
+ffffffff817f5ad0 T iwm_endscan
+ffffffff817f5b20 T iwm_fill_sf_command
+ffffffff817f5c20 T iwm_send_update_mcc_cmd
+ffffffff817f5d80 T iwm_tt_tx_backoff
+ffffffff817f5e10 T iwm_fill_paging_mem
+ffffffff817f5f60 T iwm_alloc_fw_paging_mem
+ffffffff817f6110 T iwm_init_hw
+ffffffff817f6a10 T iwm_preinit
+ffffffff817f6c00 T iwm_start
+ffffffff817f6de0 T iwm_watchdog
+ffffffff817f6ea0 T iwm_ioctl
+ffffffff817f7010 T iwm_rx_pkt_valid
+ffffffff817f7060 T iwm_rx_pkt
+ffffffff817f7f50 T iwm_notif_intr
+ffffffff817f80b0 T iwm_intr
+ffffffff817f8470 T iwm_intr_msix
+ffffffff817f86a0 T iwm_match
+ffffffff817f86c0 T iwm_attach_hook
+ffffffff817f8700 T iwm_attach
+ffffffff817f9540 T iwm_radiotap_attach
+ffffffff817f95d0 T iwm_init_task
+ffffffff817f9690 T iwm_resume
+ffffffff817f9840 T iwm_activate
+ffffffff817fa000 T iwx_is_mimo_ht_plcp
+ffffffff817fa040 T iwx_is_mimo_mcs
+ffffffff817fa080 T iwx_store_cscheme
+ffffffff817fa0d0 T iwx_ctxt_info_alloc_dma
+ffffffff817fa160 T iwx_dma_contig_alloc
+ffffffff817fa350 T iwx_ctxt_info_free_paging
+ffffffff817fa480 T iwx_dma_contig_free
+ffffffff817fa540 T iwx_get_num_sections
+ffffffff817fa5c0 T iwx_init_fw_sec
+ffffffff817fa9d0 T iwx_alloc_fw_monitor_block
+ffffffff817faa70 T iwx_alloc_fw_monitor
+ffffffff817fab20 T iwx_apply_debug_destination
+ffffffff817faeb0 T iwx_nic_lock
+ffffffff817fb070 T iwx_write_prph
+ffffffff817fb150 T iwx_set_bits_prph
+ffffffff817fb240 T iwx_clear_bits_prph
+ffffffff817fb330 T iwx_read_prph
+ffffffff817fb400 T iwx_nic_unlock
+ffffffff817fb4b0 T iwx_ctxt_info_init
+ffffffff817fb7e0 T iwx_ctxt_info_free
+ffffffff817fb8c0 T iwx_ctxt_info_free_fw_img
+ffffffff817fba40 T iwx_firmware_store_section
+ffffffff817fbae0 T iwx_set_default_calib
+ffffffff817fbb30 T iwx_fw_info_free
+ffffffff817fbb80 T iwx_read_firmware
+ffffffff817fc4e0 T iwx_nic_assert_locked
+ffffffff817fc580 T iwx_write_prph64
+ffffffff817fc5c0 T iwx_read_mem
+ffffffff817fc700 T iwx_write_mem
+ffffffff817fc840 T iwx_write_mem32
+ffffffff817fc950 T iwx_poll_bit
+ffffffff817fca20 T iwx_set_bits_mask_prph
+ffffffff817fcb30 T iwx_alloc_rx_ring
+ffffffff817fccd0 T iwx_rx_addbuf
+ffffffff817fce90 T iwx_free_rx_ring
+ffffffff817fd140 T iwx_disable_rx_dma
+ffffffff817fd260 T iwx_reset_rx_ring
+ffffffff817fd2e0 T iwx_alloc_tx_ring
+ffffffff817fd500 T iwx_free_tx_ring
+ffffffff817fd7b0 T iwx_reset_tx_ring
+ffffffff817fd8e0 T iwx_enable_rfkill_int
+ffffffff817fd9c0 T iwx_check_rfkill
+ffffffff817fda60 T iwx_enable_interrupts
+ffffffff817fdb10 T iwx_enable_fwload_interrupt
+ffffffff817fdbf0 T iwx_restore_interrupts
+ffffffff817fdc20 T iwx_disable_interrupts
+ffffffff817fdcf0 T iwx_ict_reset
+ffffffff817fdec0 T iwx_set_hw_ready
+ffffffff817fdfe0 T iwx_prepare_card_hw
+ffffffff817fe2c0 T iwx_apm_config
+ffffffff817fe3a0 T iwx_apm_init
+ffffffff817fe620 T iwx_apm_stop
+ffffffff817fe820 T iwx_init_msix_hw
+ffffffff817fe8c0 T iwx_conf_msix_hw
+ffffffff817fed80 T iwx_start_hw
+ffffffff817fefc0 T iwx_stop_device
+ffffffff817ff3f0 T iwx_nic_config
+ffffffff817ff470 T iwx_nic_rx_init
+ffffffff817ff4c0 T iwx_nic_init
+ffffffff817ff5d0 T iwx_enable_txq
+ffffffff817ff790 T iwx_send_cmd
+ffffffff817ffd50 T iwx_free_resp
+ffffffff817ffdc0 T iwx_post_alive
+ffffffff817ffea0 T iwx_send_time_event_cmd
+ffffffff817fffb0 T iwx_protect_session
+ffffffff81800060 T iwx_unprotect_session
+ffffffff81800110 T iwx_nvm_read_chunk
+ffffffff81800290 T iwx_nvm_read_section
+ffffffff81800350 T iwx_fw_valid_tx_ant
+ffffffff81800390 T iwx_fw_valid_rx_ant
+ffffffff818003d0 T iwx_init_channel_map
+ffffffff818004e0 T iwx_setup_ht_rates
+ffffffff81800570 T iwx_sta_rx_agg
+ffffffff81800790 T iwx_send_cmd_pdu_status
+ffffffff81800820 T iwx_htprot_task
+ffffffff818008b0 T iwx_mac_ctxt_cmd
+ffffffff81800ab0 T iwx_update_htprot
+ffffffff81800b20 T iwx_add_task
+ffffffff81800b90 T iwx_ba_task
+ffffffff81800d80 T iwx_ampdu_rx_start
+ffffffff81800e70 T iwx_ampdu_rx_stop
+ffffffff81800f00 T iwx_set_hw_address_8000
+ffffffff818010e0 T iwx_parse_nvm_data
+ffffffff818012c0 T iwx_parse_nvm_sections
+ffffffff81801340 T iwx_nvm_init
+ffffffff81801550 T iwx_load_firmware
+ffffffff81801650 T iwx_start_fw
+ffffffff81801870 T iwx_send_tx_ant_cfg
+ffffffff81801900 T iwx_send_cmd_pdu
+ffffffff81801980 T iwx_send_phy_cfg_cmd
+ffffffff81801a20 T iwx_send_dqa_cmd
+ffffffff81801ab0 T iwx_load_ucode_wait_alive
+ffffffff81801b00 T iwx_run_init_mvm_ucode
+ffffffff81801d40 T iwx_config_ltr
+ffffffff81801e00 T iwx_update_rx_desc
+ffffffff81801e60 T iwx_rxmq_get_signal_strength
+ffffffff81801eb0 T iwx_rx_rx_phy_cmd
+ffffffff81801f10 T iwx_get_noise
+ffffffff81801f80 T iwx_rx_frame
+ffffffff81802260 T iwx_rx_mpdu_mq
+ffffffff818023f0 T iwx_enable_ht_cck_fallback
+ffffffff818024c0 T iwx_rx_tx_cmd_single
+ffffffff818026f0 T iwx_txd_done
+ffffffff818027b0 T iwx_rx_tx_cmd
+ffffffff81802ac0 T iwx_rx_bmiss
+ffffffff81802bc0 T iwx_binding_cmd
+ffffffff81802d40 T iwx_phy_ctxt_cmd_hdr
+ffffffff81802db0 T iwx_phy_ctxt_cmd_data
+ffffffff81802ec0 T iwx_phy_ctxt_cmd
+ffffffff81803070 T iwx_send_cmd_status
+ffffffff81803190 T iwx_cmd_done
+ffffffff81803270 T iwx_tx_fill_cmd
+ffffffff818034c0 T iwx_rval2ridx
+ffffffff81803540 T iwx_tx
+ffffffff81803ab0 T iwx_flush_tx_path
+ffffffff81803b70 T iwx_beacon_filter_send_cmd
+ffffffff81803bf0 T iwx_update_beacon_abort
+ffffffff81803ce0 T iwx_power_build_cmd
+ffffffff81803d70 T iwx_power_mac_update_mode
+ffffffff81803f80 T iwx_power_update_device
+ffffffff81804020 T iwx_enable_beacon_filter
+ffffffff81804110 T iwx_disable_beacon_filter
+ffffffff818041e0 T iwx_add_sta_cmd
+ffffffff818043e0 T iwx_add_aux_sta
+ffffffff81804500 T iwx_rm_sta_cmd
+ffffffff818045c0 T iwx_umac_scan_fill_channels
+ffffffff818046a0 T iwx_fill_probe_req_v1
+ffffffff81804740 T iwx_fill_probe_req
+ffffffff81804a00 T iwx_config_umac_scan
+ffffffff81804c10 T iwx_umac_scan_size
+ffffffff81804c70 T iwx_get_scan_req_umac_chan_param
+ffffffff81804cc0 T iwx_get_scan_req_umac_data
+ffffffff81804d10 T iwx_umac_scan
+ffffffff81805190 T iwx_ridx2rate
+ffffffff818051f0 T iwx_ack_rates
+ffffffff818054d0 T iwx_mac_ctxt_cmd_common
+ffffffff81805800 T iwx_mac_ctxt_cmd_fill_sta
+ffffffff818058b0 T iwx_clear_statistics
+ffffffff81805990 T iwx_update_quotas
+ffffffff81805c90 T iwx_del_task
+ffffffff81805cf0 T iwx_scan
+ffffffff81805e90 T iwx_scan_abort
+ffffffff81805f30 T iwx_bgscan
+ffffffff81805fb0 T iwx_umac_scan_abort
+ffffffff81806040 T iwx_enable_data_tx_queues
+ffffffff818060f0 T iwx_auth
+ffffffff81806720 T iwx_deauth
+ffffffff81806ac0 T iwx_assoc
+ffffffff81806bf0 T iwx_disassoc
+ffffffff81806d00 T iwx_run
+ffffffff81807230 T iwx_sf_config
+ffffffff81807490 T iwx_allow_mcast
+ffffffff81807590 T iwx_run_stop
+ffffffff81807930 T iwx_node_alloc
+ffffffff81807950 T iwx_calib_timeout
+ffffffff81807a20 T iwx_media_change
+ffffffff81807c00 T iwx_stop
+ffffffff81807df0 T iwx_init
+ffffffff81807f60 T iwx_newstate_task
+ffffffff818080e0 T iwx_newstate
+ffffffff81808200 T iwx_endscan
+ffffffff81808250 T iwx_fill_sf_command
+ffffffff81808350 T iwx_send_bt_init_conf
+ffffffff818083e0 T iwx_send_update_mcc_cmd
+ffffffff81808510 T iwx_init_hw
+ffffffff81808c40 T iwx_preinit
+ffffffff81808e30 T iwx_start
+ffffffff81809010 T iwx_watchdog
+ffffffff818090d0 T iwx_ioctl
+ffffffff81809240 T iwx_nic_umac_error
+ffffffff818096f0 T iwx_desc_lookup
+ffffffff81809880 T iwx_nic_error
+ffffffff81809d40 T iwx_rx_pkt_valid
+ffffffff81809d90 T iwx_rx_pkt
+ffffffff8180a8b0 T iwx_notif_intr
+ffffffff8180a9e0 T iwx_intr
+ffffffff8180aec0 T iwx_intr_msix
+ffffffff8180b220 T iwx_match
+ffffffff8180b240 T iwx_attach_hook
+ffffffff8180b280 T iwx_attach
+ffffffff8180be60 T iwx_radiotap_attach
+ffffffff8180bf00 T iwx_init_task
+ffffffff8180bfc0 T iwx_resume
+ffffffff8180c150 T iwx_activate
+ffffffff8180d000 T cmpci_match
+ffffffff8180d020 T cmpci_attach
+ffffffff8180d500 T cmpci_activate
+ffffffff8180d580 T cmpci_open
+ffffffff8180d5b0 T cmpci_close
+ffffffff8180d5e0 T cmpci_set_params
+ffffffff8180e060 T cmpci_round_blocksize
+ffffffff8180e090 T cmpci_halt_output
+ffffffff8180e250 T cmpci_halt_input
+ffffffff8180e3e0 T cmpci_set_port
+ffffffff8180e540 T cmpci_get_port
+ffffffff8180e610 T cmpci_query_devinfo
+ffffffff8180ee20 T cmpci_malloc
+ffffffff8180ee80 T cmpci_free
+ffffffff8180ef50 T cmpci_round_buffersize
+ffffffff8180ef90 T cmpci_get_props
+ffffffff8180efc0 T cmpci_trigger_output
+ffffffff8180f2a0 T cmpci_trigger_input
+ffffffff8180f540 T cmpci_mixerreg_read
+ffffffff8180f5d0 T cmpci_mixerreg_write
+ffffffff8180f640 T cmpci_reg_partial_write_1
+ffffffff8180f6d0 T cmpci_reg_partial_write_4
+ffffffff8180f760 T cmpci_reg_set_1
+ffffffff8180f7c0 T cmpci_reg_clear_1
+ffffffff8180f830 T cmpci_reg_set_4
+ffffffff8180f890 T cmpci_reg_clear_4
+ffffffff8180f900 T cmpci_reg_set_reg_misc
+ffffffff8180f940 T cmpci_reg_clear_reg_misc
+ffffffff8180f980 T cmpci_rate_to_index
+ffffffff8180fa00 T cmpci_index_to_rate
+ffffffff8180fa30 T cmpci_index_to_divider
+ffffffff8180fa60 T cmpci_intr
+ffffffff8180fd90 T cmpci_set_mixer_gain
+ffffffff81810560 T cmpci_resume
+ffffffff818105d0 T cmpci_alloc_dmamem
+ffffffff818107b0 T cmpci_free_dmamem
+ffffffff81810870 T cmpci_find_dmamem
+ffffffff818108c0 T cmpci_adjust
+ffffffff81810900 T cmpci_set_out_ports
+ffffffff81810f60 T cmpci_set_in_ports
+ffffffff81812000 T iha_pci_probe
+ffffffff81812060 T iha_pci_attach
+ffffffff81813000 T pcscp_match
+ffffffff81813030 T pcscp_attach
+ffffffff81813420 T pcscp_read_reg
+ffffffff81813450 T pcscp_write_reg
+ffffffff81813480 T pcscp_dma_isintr
+ffffffff818134d0 T pcscp_dma_reset
+ffffffff81813530 T pcscp_dma_intr
+ffffffff81813b00 T pcscp_dma_setup
+ffffffff81813d70 T pcscp_dma_go
+ffffffff81813ea0 T pcscp_dma_stop
+ffffffff81813f30 T pcscp_dma_isactive
+ffffffff81814000 T bge_probe
+ffffffff81814020 T bge_attach
+ffffffff818155e0 T bge_detach
+ffffffff81815730 T bge_activate
+ffffffff818157d0 T bge_readmem_ind
+ffffffff81815880 T bge_writemem_ind
+ffffffff81815940 T bge_writereg_ind
+ffffffff81815990 T bge_writembx
+ffffffff818159d0 T bge_ape_lock_init
+ffffffff81815bf0 T bge_ape_read_fw_ver
+ffffffff81815d50 T bge_ape_lock
+ffffffff81815f10 T bge_ape_unlock
+ffffffff81815fe0 T bge_ape_send_event
+ffffffff818161e0 T bge_ape_driver_state_change
+ffffffff818163c0 T bge_nvram_getbyte
+ffffffff81816620 T bge_read_nvram
+ffffffff818166d0 T bge_eeprom_getbyte
+ffffffff81816870 T bge_read_eeprom
+ffffffff81816900 T bge_miibus_readreg
+ffffffff81816be0 T bge_miibus_writereg
+ffffffff81816ef0 T bge_miibus_statchg
+ffffffff818170e0 T bge_newbuf
+ffffffff81817260 T bge_newbuf_jumbo
+ffffffff818174d0 T bge_init_rx_ring_std
+ffffffff81817640 T bge_fill_rx_ring_std
+ffffffff81817790 T bge_rxtick
+ffffffff818177d0 T bge_rxtick_jumbo
+ffffffff81817810 T bge_fill_rx_ring_jumbo
+ffffffff81817960 T bge_free_rx_ring_std
+ffffffff81817a70 T bge_init_rx_ring_jumbo
+ffffffff81817c70 T bge_free_rx_ring_jumbo
+ffffffff81817dc0 T bge_free_tx_ring
+ffffffff81817e90 T bge_init_tx_ring
+ffffffff818180a0 T bge_iff
+ffffffff81818200 T bge_sig_pre_reset
+ffffffff81818230 T bge_sig_post_reset
+ffffffff818182b0 T bge_sig_legacy
+ffffffff818182e0 T bge_stop_fw
+ffffffff81818310 T bge_dma_swap_options
+ffffffff81818350 T bge_phy_addr
+ffffffff81818410 T bge_chipinit
+ffffffff81818890 T bge_blockinit
+ffffffff81819fe0 T bge_lookup_rev
+ffffffff8181a2a0 T bge_can_use_msi
+ffffffff8181a300 T bge_reset
+ffffffff8181ad00 T bge_ioctl
+ffffffff8181b070 T bge_start
+ffffffff8181b250 T bge_watchdog
+ffffffff8181b2b0 T bge_intr
+ffffffff8181b4b0 T bge_ifmedia_upd
+ffffffff8181b790 T bge_ifmedia_sts
+ffffffff8181b880 T bge_tick
+ffffffff8181ba40 T bge_stop
+ffffffff8181c8b0 T bge_init
+ffffffff8181cde0 T bge_rxeof
+ffffffff8181d200 T bge_rxcsum
+ffffffff8181d2a0 T bge_txeof
+ffffffff8181d4a0 T bge_link_upd
+ffffffff8181d800 T bge_stats_update_regs
+ffffffff8181d9f0 T bge_stats_update
+ffffffff8181db10 T bge_compact_dma_runt
+ffffffff8181dcf0 T bge_cksum_pad
+ffffffff8181ddd0 T bge_encap
+ffffffff8181e120 T bge_rxrinfo
+ffffffff8181e280 T bge_stop_block
+ffffffff8181f000 T bnx_probe
+ffffffff8181f020 T bnx_attach
+ffffffff8181f430 T nswaph
+ffffffff8181f480 T bnx_read_firmware
+ffffffff81820060 T bnx_read_rv2p
+ffffffff81820180 T bnx_reg_rd_ind
+ffffffff818201d0 T bnx_intr
+ffffffff81820430 T bnx_attachhook
+ffffffff818208a0 T bnx_release_resources
+ffffffff81820910 T bnx_reset
+ffffffff81820e10 T bnx_chipinit
+ffffffff818210a0 T bnx_nvram_test
+ffffffff81821200 T bnx_get_mac_addr
+ffffffff81821320 T bnx_get_media
+ffffffff818214c0 T bnx_dma_alloc
+ffffffff81821e40 T bnx_ioctl
+ffffffff81822070 T bnx_start
+ffffffff81822210 T bnx_watchdog
+ffffffff81822290 T bnx_miibus_read_reg
+ffffffff81822500 T bnx_miibus_write_reg
+ffffffff81822750 T bnx_miibus_statchg
+ffffffff81822950 T bnx_init_media
+ffffffff818229e0 T bnx_ifmedia_upd
+ffffffff81822a70 T bnx_ifmedia_sts
+ffffffff81822ae0 T bnx_tick
+ffffffff81822bf0 T bnx_rxrefill
+ffffffff81822c40 T bnx_mgmt_init
+ffffffff81822d50 T bnx_reg_wr_ind
+ffffffff81822da0 T bnx_ctx_wr
+ffffffff81822f90 T bnx_acquire_nvram_lock
+ffffffff81823040 T bnx_release_nvram_lock
+ffffffff818230f0 T bnx_enable_nvram_access
+ffffffff81823150 T bnx_disable_nvram_access
+ffffffff818231b0 T bnx_nvram_read_dword
+ffffffff81823330 T bnx_init_nvram
+ffffffff81823ae0 T bnx_nvram_read
+ffffffff81823e30 T bnx_dma_free
+ffffffff81824360 T bnx_fw_sync
+ffffffff81824540 T bnx_load_rv2p_fw
+ffffffff81824660 T bnx_load_cpu_fw
+ffffffff81824ad0 T bnx_init_cpus
+ffffffff81825270 T bnx_init_context
+ffffffff81825920 T bnx_set_mac_addr
+ffffffff818259a0 T bnx_stop
+ffffffff81825c70 T bnx_disable_intr
+ffffffff81825cc0 T bnx_free_rx_chain
+ffffffff81825d70 T bnx_free_tx_chain
+ffffffff81825e50 T bnx_blockinit
+ffffffff81826440 T bnx_get_buf
+ffffffff81826620 T bnx_init_tx_context
+ffffffff81826700 T bnx_init_tx_chain
+ffffffff81826790 T bnx_init_rx_context
+ffffffff81826850 T bnx_fill_rx_chain
+ffffffff81826990 T bnx_init_rx_chain
+ffffffff81826a80 T bnx_phy_intr
+ffffffff81826b20 T bnx_rx_intr
+ffffffff81826e50 T bnx_tx_intr
+ffffffff81826fb0 T bnx_enable_intr
+ffffffff81827070 T bnx_init
+ffffffff81827400 T bnx_iff
+ffffffff81827810 T bnx_tx_encap
+ffffffff81827a60 T bnx_stats_update
+ffffffff81828000 T vge_probe
+ffffffff81828020 T vge_attach
+ffffffff818283f0 T vge_detach
+ffffffff818284a0 T vge_read_eeprom
+ffffffff818285a0 T vge_miipoll_stop
+ffffffff81828660 T vge_miipoll_start
+ffffffff818287c0 T vge_miibus_readreg
+ffffffff818289b0 T vge_miibus_writereg
+ffffffff81828b90 T vge_cam_clear
+ffffffff81828ef0 T vge_cam_set
+ffffffff818292b0 T vge_iff
+ffffffff81829470 T vge_reset
+ffffffff81829620 T vge_allocmem
+ffffffff81829a40 T vge_freemem
+ffffffff81829b80 T vge_intr
+ffffffff81829d80 T vge_ioctl
+ffffffff81829ed0 T vge_start
+ffffffff8182a0e0 T vge_watchdog
+ffffffff8182a150 T vge_miibus_statchg
+ffffffff8182a380 T vge_ifmedia_upd
+ffffffff8182a3a0 T vge_ifmedia_sts
+ffffffff8182a400 T vge_tick
+ffffffff8182a4d0 T vge_stop
+ffffffff8182a6c0 T vge_newbuf
+ffffffff8182a8e0 T vge_tx_list_init
+ffffffff8182a980 T vge_rx_list_init
+ffffffff8182aa70 T vge_rxeof
+ffffffff8182af10 T vge_txeof
+ffffffff8182b0a0 T vge_init
+ffffffff8182b830 T vge_encap
+ffffffff8182c000 T stge_match
+ffffffff8182c020 T stge_attach
+ffffffff8182c8a0 T stge_mii_bitbang_read
+ffffffff8182c8f0 T stge_mii_bitbang_write
+ffffffff8182c920 T stge_tick
+ffffffff8182ca50 T stge_intr
+ffffffff8182cd40 T stge_reset
+ffffffff8182ce30 T stge_read_eeprom
+ffffffff8182cf70 T stge_mii_readreg
+ffffffff8182cf90 T stge_mii_writereg
+ffffffff8182cfb0 T stge_mii_statchg
+ffffffff8182d000 T stge_mediachange
+ffffffff8182d050 T stge_mediastatus
+ffffffff8182d0b0 T stge_ioctl
+ffffffff8182d200 T stge_start
+ffffffff8182d500 T stge_watchdog
+ffffffff8182d590 T stge_txintr
+ffffffff8182d6d0 T stge_init
+ffffffff8182def0 T stge_stop
+ffffffff8182e110 T stge_iff
+ffffffff8182e240 T stge_rxintr
+ffffffff8182e740 T stge_stats_update
+ffffffff8182e860 T stge_add_rxbuf
+ffffffff8182ea70 T stge_rxdrain
+ffffffff8182f000 T nfe_match
+ffffffff8182f020 T nfe_attach
+ffffffff8182f6a0 T nfe_activate
+ffffffff8182f720 T nfe_stop
+ffffffff8182f8b0 T nfe_init
+ffffffff8182fe70 T nfe_intr
+ffffffff8182ff60 T nfe_get_macaddr
+ffffffff81830050 T nfe_alloc_tx_ring
+ffffffff81830280 T nfe_alloc_rx_ring
+ffffffff81830600 T nfe_free_tx_ring
+ffffffff81830760 T nfe_ioctl
+ffffffff818308b0 T nfe_start
+ffffffff81830a80 T nfe_watchdog
+ffffffff81830ae0 T nfe_wol
+ffffffff81830b70 T nfe_miibus_readreg
+ffffffff81830d00 T nfe_miibus_writereg
+ffffffff81830e70 T nfe_miibus_statchg
+ffffffff81830fe0 T nfe_ifmedia_upd
+ffffffff81831030 T nfe_ifmedia_sts
+ffffffff81831090 T nfe_tick
+ffffffff818310e0 T nfe_rxeof
+ffffffff81831510 T nfe_txeof
+ffffffff818317c0 T nfe_iff
+ffffffff81831ac0 T nfe_txdesc32_sync
+ffffffff81831b00 T nfe_txdesc64_sync
+ffffffff81831b40 T nfe_txdesc32_rsync
+ffffffff81831bd0 T nfe_txdesc64_rsync
+ffffffff81831c60 T nfe_rxdesc32_sync
+ffffffff81831ca0 T nfe_rxdesc64_sync
+ffffffff81831ce0 T nfe_encap
+ffffffff81831fa0 T nfe_set_macaddr
+ffffffff81832010 T nfe_reset_tx_ring
+ffffffff81832140 T nfe_reset_rx_ring
+ffffffff81832210 T nfe_free_rx_ring
+ffffffff81833000 T et_match
+ffffffff81833020 T et_attach
+ffffffff818335c0 T et_detach
+ffffffff818336a0 T et_intr
+ffffffff818337b0 T et_bus_config
+ffffffff81833840 T et_get_eaddr
+ffffffff818338c0 T et_reset
+ffffffff81833960 T et_disable_intrs
+ffffffff81833990 T et_dma_alloc
+ffffffff81833b80 T et_ioctl
+ffffffff81833cf0 T et_start
+ffffffff81833e10 T et_watchdog
+ffffffff81833e50 T et_chip_attach
+ffffffff81833f50 T et_miibus_readreg
+ffffffff818340a0 T et_miibus_writereg
+ffffffff818341d0 T et_miibus_statchg
+ffffffff818342c0 T et_ifmedia_upd
+ffffffff81834340 T et_ifmedia_sts
+ffffffff818343a0 T et_tick
+ffffffff818343f0 T et_txtick
+ffffffff81834420 T et_stop
+ffffffff81834650 T et_dma_free
+ffffffff81834810 T et_stop_rxdma
+ffffffff818348c0 T et_stop_txdma
+ffffffff81834910 T et_free_tx_ring
+ffffffff818349b0 T et_free_rx_ring
+ffffffff81834ae0 T et_enable_intrs
+ffffffff81834b10 T et_dma_mem_create
+ffffffff81834cd0 T et_dma_mbuf_create
+ffffffff81835000 T et_dma_mem_destroy
+ffffffff81835070 T et_dma_mbuf_destroy
+ffffffff818351d0 T et_rxeof
+ffffffff81835580 T et_txeof
+ffffffff81835790 T et_init
+ffffffff818359f0 T et_init_tx_ring
+ffffffff81835aa0 T et_init_rx_ring
+ffffffff81835bf0 T et_chip_init
+ffffffff81835ed0 T et_enable_txrx
+ffffffff81836000 T et_start_rxdma
+ffffffff818360d0 T et_start_txdma
+ffffffff81836120 T et_setmulti
+ffffffff818363d0 T et_encap
+ffffffff818367f0 T et_init_mac
+ffffffff81836950 T et_init_rxmac
+ffffffff81836bf0 T et_init_txmac
+ffffffff81836c70 T et_init_rxdma
+ffffffff81836fe0 T et_init_txdma
+ffffffff81837110 T et_newbuf_cluster
+ffffffff81837120 T et_newbuf
+ffffffff81837360 T et_newbuf_hdr
+ffffffff81838000 T jme_match
+ffffffff81838020 T jme_attach
+ffffffff818385c0 T jme_miibus_readreg
+ffffffff818386d0 T jme_miibus_writereg
+ffffffff818387f0 T jme_miibus_statchg
+ffffffff81838d20 T jme_stop_rx
+ffffffff81838e10 T jme_stop_tx
+ffffffff81838ef0 T jme_rxeof
+ffffffff81839030 T jme_txeof
+ffffffff81839260 T jme_init_tx_ring
+ffffffff81839310 T jme_init_ssb
+ffffffff81839370 T jme_mac_config
+ffffffff81839770 T jme_mediastatus
+ffffffff818397d0 T jme_mediachange
+ffffffff81839820 T jme_eeprom_read_byte
+ffffffff81839970 T jme_eeprom_macaddr
+ffffffff81839ac0 T jme_reg_macaddr
+ffffffff81839b60 T jme_map_intr_vector
+ffffffff81839c00 T jme_intr
+ffffffff81839db0 T jme_reset
+ffffffff81839e20 T jme_dma_alloc
+ffffffff8183a3f0 T jme_ioctl
+ffffffff8183a540 T jme_start
+ffffffff8183a690 T jme_watchdog
+ffffffff8183a730 T jme_tick
+ffffffff8183a790 T jme_detach
+ffffffff8183a850 T jme_stop
+ffffffff8183ab40 T jme_dma_free
+ffffffff8183ac70 T jme_encap
+ffffffff8183af00 T jme_init
+ffffffff8183b690 T jme_iff
+ffffffff8183b800 T jme_discard_rxbufs
+ffffffff8183b880 T jme_rxpkt
+ffffffff8183bc20 T jme_newbuf
+ffffffff8183bd90 T jme_init_rx_ring
+ffffffff8183bec0 T jme_set_vlan
+ffffffff8183c000 T age_match
+ffffffff8183c020 T age_attach
+ffffffff8183c4c0 T age_intr
+ffffffff8183c6b0 T age_phy_reset
+ffffffff8183cf60 T age_reset
+ffffffff8183d090 T age_dma_alloc
+ffffffff8183d7f0 T age_get_macaddr
+ffffffff8183d9e0 T age_ioctl
+ffffffff8183db30 T age_start
+ffffffff8183dca0 T age_watchdog
+ffffffff8183dd30 T age_miibus_readreg
+ffffffff8183de30 T age_miibus_writereg
+ffffffff8183df30 T age_miibus_statchg
+ffffffff8183e110 T age_mediachange
+ffffffff8183e160 T age_mediastatus
+ffffffff8183e1c0 T age_tick
+ffffffff8183e220 T age_dma_free
+ffffffff8183e4d0 T age_detach
+ffffffff8183e590 T age_stop
+ffffffff8183e8a0 T age_stop_rxmac
+ffffffff8183e9e0 T age_stop_txmac
+ffffffff8183eb20 T age_mac_config
+ffffffff8183ebd0 T age_rxintr
+ffffffff8183eda0 T age_txintr
+ffffffff8183ef60 T age_init
+ffffffff8183f960 T age_stats_update
+ffffffff8183fc80 T age_encap
+ffffffff8183ff00 T age_iff
+ffffffff81840070 T age_rxeof
+ffffffff818403c0 T age_newbuf
+ffffffff81840550 T age_init_rx_ring
+ffffffff81840630 T age_init_rr_ring
+ffffffff818406b0 T age_init_tx_ring
+ffffffff81840760 T age_init_cmb_block
+ffffffff818407b0 T age_init_smb_block
+ffffffff81840800 T age_rxvlan
+ffffffff81841000 T alc_match
+ffffffff81841020 T alc_attach
+ffffffff818418a0 T alc_detach
+ffffffff81841970 T alc_activate
+ffffffff818419f0 T alc_miibus_readreg
+ffffffff81841ba0 T alc_mii_readreg_816x
+ffffffff81841ca0 T alc_mii_readreg_813x
+ffffffff81841db0 T alc_miibus_writereg
+ffffffff81841f70 T alc_mii_writereg_816x
+ffffffff81842080 T alc_mii_writereg_813x
+ffffffff81842180 T alc_miibus_statchg
+ffffffff81842570 T alc_stop_mac
+ffffffff81842660 T alc_start_queue
+ffffffff81842720 T alc_mac_config
+ffffffff81842800 T alc_aspm
+ffffffff818428d0 T alc_dsp_fixup
+ffffffff81842eb0 T alc_miidbg_readreg
+ffffffff81842ef0 T alc_miidbg_writereg
+ffffffff81842f30 T alc_miiext_readreg
+ffffffff81843060 T alc_miiext_writereg
+ffffffff818431a0 T alc_mediastatus
+ffffffff81843210 T alc_mediachange
+ffffffff81843260 T alc_get_macaddr
+ffffffff81843280 T alc_get_macaddr_816x
+ffffffff81843510 T alc_get_macaddr_813x
+ffffffff818439d0 T alc_get_macaddr_par
+ffffffff81843a80 T alc_disable_l0s_l1
+ffffffff81843b00 T alc_phy_reset
+ffffffff81843b20 T alc_phy_reset_816x
+ffffffff81844390 T alc_phy_reset_813x
+ffffffff81844780 T alc_phy_down
+ffffffff818448b0 T alc_aspm_816x
+ffffffff81844960 T alc_aspm_813x
+ffffffff81844b50 T alc_init_pcie
+ffffffff81844f00 T alc_config_msi
+ffffffff81844fd0 T alc_intr
+ffffffff818451b0 T alc_reset
+ffffffff81845580 T alc_dma_alloc
+ffffffff81845ce0 T alc_ioctl
+ffffffff81845e30 T alc_start
+ffffffff81845fd0 T alc_watchdog
+ffffffff81846040 T alc_tick
+ffffffff818460a0 T alc_dma_free
+ffffffff81846350 T alc_stop
+ffffffff81846690 T alc_init
+ffffffff818475e0 T alc_encap
+ffffffff81847820 T alc_txeof
+ffffffff81847a20 T alc_iff
+ffffffff81847b90 T alc_stats_clear
+ffffffff81847cc0 T alc_stats_update
+ffffffff81848130 T alc_rxintr
+ffffffff81848350 T alc_newbuf
+ffffffff818484c0 T alc_rxeof
+ffffffff81848750 T alc_osc_reset
+ffffffff818488f0 T alc_init_rx_ring
+ffffffff818489f0 T alc_init_rr_ring
+ffffffff81848a70 T alc_init_tx_ring
+ffffffff81848b20 T alc_init_cmb
+ffffffff81848b60 T alc_init_smb
+ffffffff81848bb0 T alc_rxvlan
+ffffffff81848c20 T alc_stop_queue
+ffffffff81849000 T ale_match
+ffffffff81849020 T ale_attach
+ffffffff81849580 T ale_activate
+ffffffff81849600 T ale_miibus_readreg
+ffffffff81849720 T ale_miibus_writereg
+ffffffff81849820 T ale_miibus_statchg
+ffffffff81849a60 T ale_stop_mac
+ffffffff81849b50 T ale_mac_config
+ffffffff81849c00 T ale_mediastatus
+ffffffff81849c70 T ale_mediachange
+ffffffff81849cc0 T ale_get_macaddr
+ffffffff81849eb0 T ale_phy_reset
+ffffffff8184a4f0 T ale_intr
+ffffffff8184a640 T ale_reset
+ffffffff8184a7a0 T ale_dma_alloc
+ffffffff8184af10 T ale_ioctl
+ffffffff8184b060 T ale_start
+ffffffff8184b1c0 T ale_watchdog
+ffffffff8184b230 T ale_tick
+ffffffff8184b290 T ale_dma_free
+ffffffff8184b530 T ale_detach
+ffffffff8184b5f0 T ale_stop
+ffffffff8184b8c0 T ale_init
+ffffffff8184c2e0 T ale_encap
+ffffffff8184c540 T ale_txeof
+ffffffff8184c700 T ale_iff
+ffffffff8184c870 T ale_stats_clear
+ffffffff8184c940 T ale_stats_update
+ffffffff8184ccb0 T ale_rxeof
+ffffffff8184cf70 T ale_rx_update_page
+ffffffff8184d0b0 T ale_rxcsum
+ffffffff8184d170 T ale_init_rx_pages
+ffffffff8184d2a0 T ale_init_tx_ring
+ffffffff8184d390 T ale_rxvlan
+ffffffff8184e000 T amdpm_match
+ffffffff8184e020 T amdpm_attach
+ffffffff8184e380 T amdpm_activate
+ffffffff8184e3e0 T amdpm_rnd_callout
+ffffffff8184e440 T amdpm_i2c_acquire_bus
+ffffffff8184e4a0 T amdpm_i2c_release_bus
+ffffffff8184e4f0 T amdpm_i2c_exec
+ffffffff8184e870 T amdpm_get_timecount
+ffffffff8184e8a0 T amdpm_intr
+ffffffff8184f000 T bce_probe
+ffffffff8184f020 T bce_attach
+ffffffff8184fad0 T bce_activate
+ffffffff8184fb40 T bce_intr
+ffffffff8184fe20 T bce_reset
+ffffffff81850460 T bce_ioctl
+ffffffff818505c0 T bce_start
+ffffffff81850810 T bce_watchdog
+ffffffff81850850 T bce_mii_read
+ffffffff81850970 T bce_mii_write
+ffffffff81850aa0 T bce_statchg
+ffffffff81850e30 T bce_mediachange
+ffffffff81850e80 T bce_mediastatus
+ffffffff81850ee0 T bce_tick
+ffffffff81850f30 T bce_stop
+ffffffff81851050 T bce_init
+ffffffff81851470 T bce_iff
+ffffffff81851570 T bce_rxintr
+ffffffff81851710 T bce_txintr
+ffffffff818517f0 T bce_add_rxbuf
+ffffffff818518b0 T bce_add_mac
+ffffffff81852000 T ath_pci_match
+ffffffff81852060 T ath_pci_attach
+ffffffff81852260 T ath_pci_detach
+ffffffff81853000 T athn_pci_match
+ffffffff81853020 T athn_pci_attach
+ffffffff818532a0 T athn_pci_detach
+ffffffff81853320 T athn_pci_activate
+ffffffff818533d0 T athn_pci_read
+ffffffff818533f0 T athn_pci_write
+ffffffff81853420 T athn_pci_write_barrier
+ffffffff81853450 T athn_pci_disable_aspm
+ffffffff818534b0 T athn_pci_wakeup
+ffffffff81854000 T atw_pci_match
+ffffffff81854020 T atw_pci_attach
+ffffffff818542a0 T atw_pci_detach
+ffffffff81854320 t atw_pci_enable
+ffffffff818543b0 t atw_pci_disable
+ffffffff81855000 T rtw_pci_match
+ffffffff81855020 T rtw_pci_attach
+ffffffff81855240 T rtw_pci_detach
+ffffffff818552c0 T rtw_pci_enable
+ffffffff81855350 T rtw_pci_disable
+ffffffff81856000 T rtwn_pci_match
+ffffffff81856020 T rtwn_pci_attach
+ffffffff81856590 T rtwn_pci_detach
+ffffffff818566a0 T rtwn_pci_activate
+ffffffff818566b0 T rtwn_calib_to
+ffffffff81856710 T rtwn_scan_to
+ffffffff81856720 T rtwn_intr
+ffffffff81856a10 T rtwn_alloc_rx_list
+ffffffff81856d50 T rtwn_alloc_tx_list
+ffffffff81856fd0 T rtwn_free_rx_list
+ffffffff81857110 T rtwn_pci_write_1
+ffffffff81857140 T rtwn_pci_write_2
+ffffffff81857170 T rtwn_pci_write_4
+ffffffff818571a0 T rtwn_pci_read_1
+ffffffff818571c0 T rtwn_pci_read_2
+ffffffff818571e0 T rtwn_pci_read_4
+ffffffff81857200 T rtwn_tx
+ffffffff818577f0 T rtwn_power_on
+ffffffff81857820 T rtwn_dma_init
+ffffffff81857bc0 T rtwn_pci_load_firmware
+ffffffff81857c70 T rtwn_fw_loadpage
+ffffffff81857db0 T rtwn_mac_init
+ffffffff81857f10 T rtwn_bb_init
+ffffffff818583b0 T rtwn_alloc_buffers
+ffffffff818583e0 T rtwn_pci_init
+ffffffff818584b0 T rtwn_pci_stop
+ffffffff81858600 T rtwn_is_oactive
+ffffffff81858630 T rtwn_next_calib
+ffffffff81858650 T rtwn_cancel_calib
+ffffffff81858690 T rtwn_pci_next_scan
+ffffffff818586b0 T rtwn_cancel_scan
+ffffffff818586f0 T rtwn_wait_async
+ffffffff81858720 T rtwn_free_tx_list
+ffffffff81858880 T rtwn_setup_rx_desc
+ffffffff818588f0 T rtwn_reset_rx_list
+ffffffff81858990 T rtwn_reset_tx_list
+ffffffff81858ae0 T rtwn_rx_frame
+ffffffff81859010 T rtwn_tx_done
+ffffffff818591a0 T rtwn_poll_c2h_events
+ffffffff81859330 T rtwn_pci_92c_stop
+ffffffff81859520 T rtwn_pci_88e_stop
+ffffffff81859910 T rtwn_pci_23a_stop
+ffffffff81859cd0 T rtwn_88e_intr
+ffffffff8185a020 T rtwn_llt_write
+ffffffff8185a0f0 T rtwn_llt_init
+ffffffff8185a3b0 T rtwn_92c_power_on
+ffffffff8185a870 T rtwn_88e_power_on
+ffffffff8185ac90 T rtwn_23a_power_on
+ffffffff8185b140 T rtwn_tx_report
+ffffffff8185c000 T ral_pci_match
+ffffffff8185c020 T ral_pci_attach
+ffffffff8185c200 T ral_pci_detach
+ffffffff8185c290 T ral_pci_activate
+ffffffff8185c310 T ral_pci_wakeup
+ffffffff8185d000 T acx_pci_match
+ffffffff8185d020 T acx_pci_attach
+ffffffff8185d240 T acx_pci_detach
+ffffffff8185e000 T pgt_pci_match
+ffffffff8185e020 T pgt_pci_attach
+ffffffff8185e1f0 T pgt_pci_detach
+ffffffff8185f000 T malo_pci_match
+ffffffff8185f020 T malo_pci_attach
+ffffffff8185f1c0 T malo_pci_detach
+ffffffff8185f210 T malo_pci_activate
+ffffffff8185f270 T malo_pci_wakeup
+ffffffff81860000 T bwi_pci_match
+ffffffff81860070 T bwi_pci_attach
+ffffffff81860280 T bwi_pci_detach
+ffffffff818602d0 T bwi_pci_activate
+ffffffff81860330 T bwi_reset_bcm4331
+ffffffff81860450 T bwi_pci_conf_write
+ffffffff81860480 T bwi_pci_conf_read
+ffffffff818604a0 T bwi_pci_wakeup
+ffffffff81861000 T piixpm_match
+ffffffff81861020 T piixpm_attach
+ffffffff818614b0 T piixpm_intr
+ffffffff818615c0 T piixpm_i2c_acquire_bus
+ffffffff818616c0 T piixpm_i2c_release_bus
+ffffffff81861790 T piixpm_i2c_exec
+ffffffff81862000 T vic_match
+ffffffff818620a0 T vic_attach
+ffffffff81862430 T vic_intr
+ffffffff818624a0 T vic_query
+ffffffff81862700 T vic_alloc_data
+ffffffff81862a00 T vic_tick
+ffffffff81862a70 T vic_ioctl
+ffffffff81862cb0 T vic_start
+ffffffff81862ff0 T vic_watchdog
+ffffffff81863020 T vic_media_change
+ffffffff81863050 T vic_media_status
+ffffffff81863100 T vic_read
+ffffffff81863120 T vic_read_cmd
+ffffffff81863170 T vic_getlladdr
+ffffffff81863220 T vic_alloc_dmamem
+ffffffff81863390 T vic_rx_fill
+ffffffff81863570 T vic_alloc_mbuf
+ffffffff81863630 T vic_init_data
+ffffffff818639e0 T vic_uninit_data
+ffffffff81863ba0 T vic_link_state
+ffffffff81863c20 T vic_write
+ffffffff81863c70 T vic_rx_proc
+ffffffff81863ed0 T vic_tx_proc
+ffffffff81864040 T vic_iff
+ffffffff81864180 T vic_setlladdr
+ffffffff818641e0 T vic_load_txb
+ffffffff81864290 T vic_init
+ffffffff81864430 T vic_stop
+ffffffff81864560 T vic_rxrinfo
+ffffffff81864640 T vic_free_dmamem
+ffffffff81865000 T vmxnet3_match
+ffffffff81865020 T vmxnet3_attach
+ffffffff81865560 T vmxnet3_dma_init
+ffffffff81865700 T vmxnet3_intr
+ffffffff818657a0 T vmxnet3_intr_intx
+ffffffff81865870 T vmxnet3_ioctl
+ffffffff81865a00 T vmxnet3_start
+ffffffff81865d20 T vmxnet3_watchdog
+ffffffff81865d70 T vmxnet3_media_change
+ffffffff81865da0 T vmxnet3_media_status
+ffffffff81865ea0 T vmxnet3_link_state
+ffffffff81865f60 T vmxnet3_dma_allocmem
+ffffffff818660b0 T vmxnet3_alloc_txring
+ffffffff81866210 T vmxnet3_alloc_rxring
+ffffffff818664a0 T vmxnet3_rxfill_tick
+ffffffff81866510 T vmxnet3_txinit
+ffffffff81866570 T vmxnet3_rxfill
+ffffffff818667e0 T vmxnet3_rxinit
+ffffffff818668a0 T vmxnet3_txstop
+ffffffff81866930 T vmxnet3_rxstop
+ffffffff81866a20 T vmxnet3_enable_all_intrs
+ffffffff81866a50 T vmxnet3_disable_all_intrs
+ffffffff81866a80 T vmxnet3_evintr
+ffffffff81866c40 T vmxnet3_rxintr
+ffffffff81866fd0 T vmxnet3_txintr
+ffffffff81867170 T vmxnet3_init
+ffffffff81867410 T vmxnet3_rx_csum
+ffffffff81867470 T vmxnet3_iff
+ffffffff818675b0 T vmxnet3_stop
+ffffffff818676a0 T vmxnet3_reset
+ffffffff81868000 T vmwpvs_match
+ffffffff81868030 T vmwpvs_attach
+ffffffff81868dd0 T vmwpvs_scsi_cmd
+ffffffff81869220 T vmwpvs_intx
+ffffffff818692a0 T vmwpvs_msg_task
+ffffffff81869520 T vmwpvs_intr
+ffffffff81869700 T vmwpvs_get_config
+ffffffff81869900 T vmwpvs_dmamem_zalloc
+ffffffff81869960 T vmwpvs_dmamem_alloc
+ffffffff81869ae0 T vmwpvs_ccb_put
+ffffffff81869b40 T vmwpvs_setup_rings
+ffffffff81869c70 T vmwpvs_setup_msg_ring
+ffffffff81869d60 T vmwpvs_ccb_get
+ffffffff81869de0 T vmwpvs_dmamem_free
+ffffffff81869e60 T vmwpvs_cmd
+ffffffff81869f00 T vmwpvs_scsi_cmd_done
+ffffffff8186a0d0 T vmwpvs_scsi_cmd_poll
+ffffffff8186b000 T lii_match
+ffffffff8186b020 T lii_attach
+ffffffff8186b430 T lii_activate
+ffffffff8186b520 T lii_reset
+ffffffff8186b800 T lii_spi_configure
+ffffffff8186b8f0 T lii_eeprom_present
+ffffffff8186b980 T lii_eeprom_read
+ffffffff8186b9b0 T lii_spi_read
+ffffffff8186bc70 T lii_read_macaddr
+ffffffff8186bdf0 T lii_intr
+ffffffff8186bf00 T lii_alloc_rings
+ffffffff8186c110 T lii_tick
+ffffffff8186c160 T lii_mii_readreg
+ffffffff8186c400 T lii_mii_writereg
+ffffffff8186c6a0 T lii_mii_statchg
+ffffffff8186c720 T lii_media_change
+ffffffff8186c770 T lii_media_status
+ffffffff8186c7d0 T lii_ioctl
+ffffffff8186c960 T lii_start
+ffffffff8186cb10 T lii_watchdog
+ffffffff8186cb50 T lii_stop
+ffffffff8186cbc0 T lii_init
+ffffffff8186d0d0 T lii_iff
+ffffffff8186d220 T lii_tx_put
+ffffffff8186d330 T lii_free_tx_space
+ffffffff8186d380 T lii_rxintr
+ffffffff8186d530 T lii_txintr
+ffffffff8186e000 T ichiic_match
+ffffffff8186e020 T ichiic_attach
+ffffffff8186e200 T ichiic_intr
+ffffffff8186e310 T ichiic_i2c_acquire_bus
+ffffffff8186e370 T ichiic_i2c_release_bus
+ffffffff8186e3c0 T ichiic_i2c_exec
+ffffffff8186f000 T viapm_match
+ffffffff8186f020 T viapm_attach
+ffffffff8186f640 T viapm_intr
+ffffffff8186f750 T viapm_i2c_acquire_bus
+ffffffff8186f7b0 T viapm_i2c_release_bus
+ffffffff8186f800 T viapm_i2c_exec
+ffffffff8186fb30 T viapm_refresh_sensor_data
+ffffffff8186fe50 T viapm_refresh
+ffffffff8186fe70 T val_to_uK
+ffffffff8186ff10 T val_to_rpm
+ffffffff8186ff50 T val_to_uV
+ffffffff8186fff0 T viapm_get_timecount
+ffffffff81871000 T amdiic_match
+ffffffff81871020 T amdiic_attach
+ffffffff818711f0 T amdiic_intr
+ffffffff818712c0 T amdiic_i2c_acquire_bus
+ffffffff81871320 T amdiic_i2c_release_bus
+ffffffff81871370 T amdiic_i2c_exec
+ffffffff818715e0 T amdiic_read
+ffffffff81871730 T amdiic_wait
+ffffffff818717d0 T amdiic_write
+ffffffff81872000 T nviic_match
+ffffffff81872020 T nviic_attach
+ffffffff81872270 T nviic_i2c_acquire_bus
+ffffffff818722b0 T nviic_i2c_release_bus
+ffffffff818722f0 T nviic_i2c_exec
+ffffffff81872510 T nviic_write
+ffffffff81872560 T nviic_read
+ffffffff81873000 T sdhc_pci_match
+ffffffff81873060 T sdhc_pci_attach
+ffffffff818733a0 T sdhc_pci_activate
+ffffffff818733f0 T sdhc_takecontroller
+ffffffff81873490 T sdhc_ricohfix
+ffffffff818735f0 T sdhc_pci_conf_write
+ffffffff81874000 T kate_match
+ffffffff81874190 T kate_attach
+ffffffff81874440 T kate_refresh
+ffffffff81875000 T km_match
+ffffffff81875050 T km_attach
+ffffffff818750e0 T km_refresh
+ffffffff81876000 T ksmn_match
+ffffffff81876050 T ksmn_attach
+ffffffff81876140 T ksmn_refresh
+ffffffff81877000 T itherm_probe
+ffffffff81877020 T itherm_attach
+ffffffff81877380 T itherm_activate
+ffffffff81877400 T itherm_enable
+ffffffff81877460 T itherm_refresh
+ffffffff81877470 T itherm_refresh_sensor_data
+ffffffff818778a0 T itherm_bias_temperature_sensor
+ffffffff81878000 T pchtemp_match
+ffffffff81878020 T pchtemp_attach
+ffffffff81878180 T pchtemp_refresh
+ffffffff81879000 T rtsx_pci_match
+ffffffff81879090 T rtsx_pci_attach
+ffffffff8187a000 T xspd_match
+ffffffff8187a020 T xspd_attach
+ffffffff8187a1e0 T xspd_intr
+ffffffff8187b000 T virtio_pci_match
+ffffffff8187b070 T virtio_pci_attach
+ffffffff8187b400 T virtio_pci_detach
+ffffffff8187b4d0 T virtio_pci_kick
+ffffffff8187b520 T virtio_pci_read_device_config_1
+ffffffff8187b540 T virtio_pci_read_device_config_2
+ffffffff8187b570 T virtio_pci_read_device_config_4
+ffffffff8187b5a0 T virtio_pci_read_device_config_8
+ffffffff8187b620 T virtio_pci_write_device_config_1
+ffffffff8187b650 T virtio_pci_write_device_config_2
+ffffffff8187b680 T virtio_pci_write_device_config_4
+ffffffff8187b6b0 T virtio_pci_write_device_config_8
+ffffffff8187b720 T virtio_pci_read_queue_size
+ffffffff8187b7a0 T virtio_pci_setup_queue
+ffffffff8187ba90 T virtio_pci_set_status
+ffffffff8187bb40 T virtio_pci_negotiate_features
+ffffffff8187bc70 T virtio_pci_poll_intr
+ffffffff8187bcd0 T virtio_pci_find_cap
+ffffffff8187beb0 T virtio_pci_attach_10
+ffffffff8187c320 T virtio_pci_attach_09
+ffffffff8187c440 T virtio_pci_adjust_config_region
+ffffffff8187c4e0 T virtio_pci_setup_msix
+ffffffff8187c880 T virtio_pci_legacy_intr
+ffffffff8187c930 T virtio_pci_legacy_intr_mpsafe
+ffffffff8187c9c0 T virtio_pci_free_irqs
+ffffffff8187cc20 T virtio_pci_negotiate_features_10
+ffffffff8187ce90 T virtio_pci_msix_establish
+ffffffff8187cf60 T virtio_pci_set_msix_queue_vector
+ffffffff8187cff0 T virtio_pci_set_msix_config_vector
+ffffffff8187d030 T virtio_pci_config_intr
+ffffffff8187d070 T virtio_pci_shared_queue_intr
+ffffffff8187d080 T virtio_pci_queue_intr
+ffffffff8187e000 T dwiic_pci_match
+ffffffff8187e020 T dwiic_pci_attach
+ffffffff8187e320 T dwiic_pci_activate
+ffffffff8187e390 T dwiic_pci_bus_scan
+ffffffff8187f000 T bwfm_pci_buscore_read
+ffffffff8187f060 T bwfm_pci_buscore_write
+ffffffff8187f0d0 T bwfm_pci_buscore_prepare
+ffffffff8187f100 T bwfm_pci_buscore_reset
+ffffffff8187f2b0 T bwfm_pci_buscore_activate
+ffffffff8187f2e0 T bwfm_pci_preinit
+ffffffff81880350 T bwfm_pci_stop
+ffffffff818803e0 T bwfm_pci_txcheck
+ffffffff818804b0 T bwfm_pci_txdata
+ffffffff81880800 T bwfm_pci_msgbuf_query_dcmd
+ffffffff81880c40 T bwfm_pci_msgbuf_set_dcmd
+ffffffff81880c80 T bwfm_pci_match
+ffffffff81880ca0 T bwfm_pci_attach
+ffffffff81880f10 T bwfm_pci_detach
+ffffffff81881240 T bwfm_pci_intr
+ffffffff818813a0 T bwfm_pci_select_core
+ffffffff81881470 T bwfm_pci_load_microcode
+ffffffff81881750 T bwfm_pci_dmamem_alloc
+ffffffff818818f0 T bwfm_pci_setup_ring
+ffffffff81881af0 T bwfm_pci_intr_enable
+ffffffff81881b20 T bwfm_pci_fill_rx_rings
+ffffffff81881b60 T bwfm_pci_dmamem_free
+ffffffff81881bd0 T bwfm_pci_pktid_avail
+ffffffff81881c40 T bwfm_pci_pktid_new
+ffffffff81881db0 T bwfm_pci_pktid_free
+ffffffff81881e50 T bwfm_pci_fill_rx_buf_ring
+ffffffff818821a0 T bwfm_pci_fill_rx_ioctl_ring
+ffffffff81882510 T bwfm_pci_ring_write_reserve
+ffffffff81882600 T bwfm_pci_ring_write_cancel
+ffffffff81882640 T bwfm_pci_ring_write_commit
+ffffffff81882710 T bwfm_pci_ring_write_rptr
+ffffffff81882790 T bwfm_pci_ring_write_wptr
+ffffffff81882810 T bwfm_pci_setup_flowring
+ffffffff81882970 T bwfm_pci_ring_bell
+ffffffff818829a0 T bwfm_pci_ring_update_rptr
+ffffffff81882a50 T bwfm_pci_ring_update_wptr
+ffffffff81882af0 T bwfm_pci_ring_write_reserve_multi
+ffffffff81882c10 T bwfm_pci_ring_read_avail
+ffffffff81882d10 T bwfm_pci_ring_read_commit
+ffffffff81882da0 T bwfm_pci_ring_rx
+ffffffff81882fa0 T bwfm_pci_msg_rx
+ffffffff81883570 T bwfm_pci_msgbuf_rxioctl
+ffffffff81883660 T bwfm_pci_flowring_lookup
+ffffffff818837c0 T bwfm_pci_flowring_create
+ffffffff818838e0 T bwfm_pci_flowring_create_cb
+ffffffff81883c10 T bwfm_pci_flowring_delete
+ffffffff81883e60 T bwfm_pci_intr_disable
+ffffffff81884000 T ccp_pci_match
+ffffffff81884020 T ccp_pci_attach
+ffffffff81885000 T bnxt_match
+ffffffff81885020 T bnxt_attach
+ffffffff81885d10 T bnxt_dmamem_alloc
+ffffffff81885ea0 T bnxt_dmamem_free
+ffffffff81885f10 T bnxt_hwrm_ver_get
+ffffffff81886060 T bnxt_hwrm_nvm_get_dev_info
+ffffffff818861a0 T bnxt_hwrm_func_drv_rgtr
+ffffffff818862c0 T bnxt_hwrm_func_rgtr_async_events
+ffffffff818863e0 T bnxt_hwrm_func_qcaps
+ffffffff818864c0 T bnxt_intr
+ffffffff81886950 T bnxt_hwrm_func_qcfg
+ffffffff81886a00 T bnxt_hwrm_queue_qportcfg
+ffffffff81886be0 T bnxt_hwrm_func_reset
+ffffffff81886c90 T bnxt_mark_cpr_invalid
+ffffffff81886cf0 T bnxt_hwrm_ring_alloc
+ffffffff81886ea0 T bnxt_cfg_async_cr
+ffffffff81886fa0 T bnxt_write_cp_doorbell
+ffffffff81886fe0 T bnxt_hwrm_cmd_hdr_init
+ffffffff81887030 T hwrm_send_message
+ffffffff818870b0 T bnxt_ioctl
+ffffffff81887310 T bnxt_start
+ffffffff81887710 T bnxt_watchdog
+ffffffff81887740 T bnxt_media_change
+ffffffff818878a0 T bnxt_media_status
+ffffffff818878b0 T bnxt_refill
+ffffffff81887910 T bnxt_media_autonegotiate
+ffffffff81887a00 T bnxt_hwrm_port_phy_qcfg
+ffffffff81887f30 T bnxt_free_slots
+ffffffff81887fc0 T bnxt_up
+ffffffff818891c0 T bnxt_hwrm_stat_ctx_alloc
+ffffffff818892c0 T bnxt_write_tx_doorbell
+ffffffff81889330 T bnxt_write_rx_doorbell
+ffffffff818893a0 T bnxt_hwrm_ring_grp_alloc
+ffffffff818894b0 T bnxt_hwrm_vnic_ctx_alloc
+ffffffff81889590 T bnxt_hwrm_vnic_alloc
+ffffffff81889680 T bnxt_hwrm_vnic_cfg
+ffffffff818897c0 T bnxt_hwrm_vnic_cfg_placement
+ffffffff81889890 T bnxt_hwrm_set_filter
+ffffffff81889a10 T bnxt_iff
+ffffffff81889b80 T bnxt_rx_fill
+ffffffff81889c80 T bnxt_hwrm_free_filter
+ffffffff81889d70 T bnxt_hwrm_vnic_free
+ffffffff81889e50 T bnxt_hwrm_vnic_ctx_free
+ffffffff81889f30 T bnxt_hwrm_ring_grp_free
+ffffffff8188a010 T bnxt_hwrm_ring_free
+ffffffff8188a100 T bnxt_hwrm_stat_ctx_free
+ffffffff8188a1f0 T bnxt_down
+ffffffff8188aa30 T bnxt_hwrm_cfa_l2_set_rx_mask
+ffffffff8188ab00 T bnxt_rxrinfo
+ffffffff8188abe0 T bnxt_get_sffpage
+ffffffff8188aef0 T bnxt_load_mbuf
+ffffffff8188afa0 T bnxt_handle_async_event
+ffffffff8188afe0 T bnxt_cpr_next_cmpl
+ffffffff8188b060 T bnxt_cpr_commit
+ffffffff8188b090 T bnxt_cpr_rollback
+ffffffff8188b0c0 T bnxt_rx
+ffffffff8188b2d0 T bnxt_txeof
+ffffffff8188b3f0 T bnxt_write_cp_doorbell_index
+ffffffff8188b460 T bnxt_get_media_type
+ffffffff8188b9b0 T bnxt_add_media_type
+ffffffff8188bb80 T _hwrm_send_message
+ffffffff8188e9c0 T bnxt_rx_fill_slots
+ffffffff8188eb70 T bnxt_hwrm_err_map
+ffffffff8188ebb0 T _bnxt_hwrm_set_async_event_bit
+ffffffff8188f000 t mcx_match
+ffffffff8188f020 t mcx_attach
+ffffffff81891da0 T mcx_rx_fill_slots
+ffffffff81891f30 T mcx_rx_fill
+ffffffff81891fb0 T mcx_load_mbuf
+ffffffff81892060 t mcx_dmamem_alloc
+ffffffff818921c0 t mcx_pages
+ffffffff81892aa0 t mcx_iff
+ffffffff81892ec0 t mcx_intr
+ffffffff81893430 t mcx_ioctl
+ffffffff81896050 t mcx_start
+ffffffff818964a0 t mcx_watchdog
+ffffffff818964d0 t mcx_media_change
+ffffffff81896730 t mcx_media_status
+ffffffff81896860 t mcx_refill
+ffffffff81896910 t mcx_calibrate
+ffffffff81896ab0 t mcx_port_change
+ffffffff81896c20 t mcx_set_flow_table_entry
+ffffffff818970f0 t mcx_delete_flow_table_entry
+ffffffff81897570 t mcx_arm_cq
+ffffffff81897610 t mcx_access_hca_reg
+ffffffff81897c10 t mcx_down
+ffffffff81898fd0 t mcx_create_flow_group
+ffffffff8189a000 t iavf_match
+ffffffff8189a020 t iavf_attach
+ffffffff8189a920 t iavf_reset
+ffffffff8189ac10 t iavf_dmamem_alloc
+ffffffff8189ad70 t iavf_arq_fill
+ffffffff8189b020 t iavf_arq_timeout
+ffffffff8189b040 t iavf_init_admin_queue
+ffffffff8189b1f0 t iavf_get_version
+ffffffff8189b420 t iavf_get_vf_resources
+ffffffff8189b600 t iavf_config_irq_map
+ffffffff8189b800 t iavf_intr
+ffffffff8189be70 t iavf_ioctl
+ffffffff8189ca70 t iavf_start
+ffffffff8189cdb0 t iavf_watchdog
+ffffffff8189cde0 t iavf_media_change
+ffffffff8189ce10 t iavf_media_status
+ffffffff8189cea0 t iavf_arq_unfill
+ffffffff8189cf90 t iavf_down
+ffffffff8189d4c0 t iavf_up
+ffffffff8189e130 t iavf_queue_select
+ffffffff8189e340 t iavf_rxfill
+ffffffff8189e570 t iavf_rxrefill
+ffffffff8189e590 t iavf_process_arq
+ffffffff8189f000 T rge_match
+ffffffff8189f020 T rge_attach
+ffffffff8189f4a0 T rge_intr
+ffffffff8189f770 T rge_config_imtype
+ffffffff8189f7f0 T rge_exit_oob
+ffffffff8189fc10 T rge_hw_init
+ffffffff818a00a0 T rge_get_macaddr
+ffffffff818a0120 T rge_set_phy_power
+ffffffff818a0310 T rge_phy_config
+ffffffff818a50b0 T rge_allocmem
+ffffffff818a54c0 T rge_ioctl
+ffffffff818a5660 T rge_start
+ffffffff818a5820 T rge_watchdog
+ffffffff818a5860 T rge_tick
+ffffffff818a58e0 T rge_txstart
+ffffffff818a5910 T rge_ifmedia_upd
+ffffffff818a5e20 T rge_ifmedia_sts
+ffffffff818a5f10 T rge_add_media_types
+ffffffff818a5fc0 T rge_rxeof
+ffffffff818a6300 T rge_txeof
+ffffffff818a64e0 T rge_init
+ffffffff818a77f0 T rge_setup_intr
+ffffffff818a7940 T rge_encap
+ffffffff818a7be0 T rge_stop
+ffffffff818a7dc0 T rge_iff
+ffffffff818a7f40 T rge_set_macaddr
+ffffffff818a8020 T rge_rx_list_init
+ffffffff818a80d0 T rge_tx_list_init
+ffffffff818a8180 T rge_read_csi
+ffffffff818a8250 T rge_write_csi
+ffffffff818a8320 T rge_write_mac_ocp
+ffffffff818a8360 T rge_read_mac_ocp
+ffffffff818a83d0 T rge_reset
+ffffffff818a8530 T rge_write_phy_ocp
+ffffffff818a85f0 T rge_read_phy_ocp
+ffffffff818a86a0 T rge_write_phy
+ffffffff818a8780 T rge_get_link_status
+ffffffff818a87d0 T rge_newbuf
+ffffffff818a8960 T rge_discard_rxbuf
+ffffffff818a89d0 T rge_write_ephy
+ffffffff818a8a80 T rge_patch_phy_mcu
+ffffffff818a8cf0 T rge_disable_phy_ocp_pwrsave
+ffffffff818a8ec0 T rge_disable_sim_im
+ffffffff818a8f20 T rge_setup_sim_im
+ffffffff818a8fa0 T rge_link_state
+ffffffff818aa000 T com_pci_match
+ffffffff818aa020 T com_pci_attach
+ffffffff818aa2e0 T com_pci_detach
+ffffffff818aa370 T com_pci_activate
+ffffffff818aa460 T com_pci_intr_designware
+ffffffff818ab000 T agpdev_print
+ffffffff818ab050 T agpbus_probe
+ffffffff818ab0b0 T agpvga_match
+ffffffff818ab110 T agp_attach_bus
+ffffffff818ab190 T agp_probe
+ffffffff818ab1c0 T agp_attach
+ffffffff818ab2d0 T agp_alloc_gatt
+ffffffff818ab490 T agp_alloc_dmamem
+ffffffff818ab5c0 T agp_free_dmamem
+ffffffff818ab620 T agp_free_gatt
+ffffffff818ab6a0 T agp_generic_enable
+ffffffff818ab820 T agp_find_device
+ffffffff818ab860 T agp_state
+ffffffff818ab890 T agp_get_info
+ffffffff818ab930 T agp_acquire
+ffffffff818ab980 T agp_release
+ffffffff818ab9d0 T agp_enable
+ffffffff818aba00 T agp_mmap
+ffffffff818ac000 T agp_i810_probe
+ffffffff818ac050 T agp_i810_attach
+ffffffff818ac670 T agp_i810_activate
+ffffffff818ac6b0 T agp_i810_bind_page
+ffffffff818ac770 T agp_i810_unbind_page
+ffffffff818ac830 T agp_i810_flush_tlb
+ffffffff818ac860 T agp_i810_enable
+ffffffff818ac890 T agp_i810_get_chiptype
+ffffffff818acb00 T intagp_gmch_match
+ffffffff818acb60 T agp_i810_configure
+ffffffff818accb0 T intagp_write_gtt
+ffffffff818ad000 T drm_agp_info
+ffffffff818ad0a0 T drm_agp_acquire
+ffffffff818ad100 T drm_agp_release
+ffffffff818ad160 T drm_agp_enable
+ffffffff818ad1d0 T drm_agp_takedown
+ffffffff818ad240 T drm_agp_init
+ffffffff818ae000 T __drm_crtc_commit_free
+ffffffff818ae020 T drm_atomic_state_default_release
+ffffffff818ae080 T drm_atomic_state_init
+ffffffff818ae190 T drm_atomic_state_alloc
+ffffffff818ae230 T drm_atomic_state_default_clear
+ffffffff818ae530 T drm_atomic_state_clear
+ffffffff818ae560 T __drm_atomic_state_free
+ffffffff818ae620 T drm_atomic_get_crtc_state
+ffffffff818ae750 T drm_atomic_set_mode_for_crtc
+ffffffff818ae890 T drm_atomic_set_mode_prop_for_crtc
+ffffffff818aea10 T drm_atomic_crtc_set_property
+ffffffff818aecb0 T drm_atomic_get_plane_state
+ffffffff818aeea0 T drm_atomic_private_obj_init
+ffffffff818aeed0 T drm_atomic_private_obj_fini
+ffffffff818aeef0 T drm_atomic_get_private_obj_state
+ffffffff818af050 T drm_atomic_get_connector_state
+ffffffff818af250 T drm_atomic_get_property
+ffffffff818af820 T drm_atomic_set_crtc_for_plane
+ffffffff818af960 T drm_atomic_set_fb_for_plane
+ffffffff818afa10 T drm_atomic_set_fence_for_plane
+ffffffff818afa80 T drm_atomic_set_crtc_for_connector
+ffffffff818afbb0 T drm_atomic_set_writeback_fb_for_connector
+ffffffff818afcb0 T drm_atomic_add_affected_connectors
+ffffffff818afdc0 T drm_atomic_add_affected_planes
+ffffffff818afed0 T drm_atomic_check_only
+ffffffff818b05b0 T drm_atomic_commit
+ffffffff818b0640 T drm_atomic_nonblocking_commit
+ffffffff818b06d0 T drm_state_dump
+ffffffff818b0890 T drm_atomic_connector_commit_dpms
+ffffffff818b0a00 T drm_atomic_set_property
+ffffffff818b1030 T drm_mode_atomic_ioctl
+ffffffff818b1ba0 t drm_atomic_plane_print_state
+ffffffff818b1de0 t drm_atomic_crtc_print_state
+ffffffff818b3000 T drm_atomic_helper_check_modeset
+ffffffff818b3c20 t handle_conflicting_encoders
+ffffffff818b3f40 T drm_atomic_helper_check_plane_state
+ffffffff818b4240 T drm_atomic_helper_check_planes
+ffffffff818b44b0 T drm_atomic_helper_check
+ffffffff818b4560 T drm_atomic_helper_async_check
+ffffffff818b4750 T drm_atomic_helper_update_legacy_modeset_state
+ffffffff818b49f0 T drm_atomic_helper_commit_modeset_disables
+ffffffff818b4e70 T drm_atomic_helper_commit_modeset_enables
+ffffffff818b50f0 T drm_atomic_helper_wait_for_fences
+ffffffff818b5240 T drm_atomic_helper_wait_for_vblanks
+ffffffff818b55f0 T drm_atomic_helper_wait_for_flip_done
+ffffffff818b57a0 T drm_atomic_helper_commit_tail
+ffffffff818b5920 T drm_atomic_helper_commit_planes
+ffffffff818b5bc0 T drm_atomic_helper_fake_vblank
+ffffffff818b5ca0 T drm_atomic_helper_commit_hw_done
+ffffffff818b5e50 T drm_atomic_helper_cleanup_planes
+ffffffff818b5f00 T drm_atomic_helper_commit_tail_rpm
+ffffffff818b6080 T drm_atomic_helper_async_commit
+ffffffff818b6310 T drm_atomic_helper_commit
+ffffffff818b66a0 T drm_atomic_helper_prepare_planes
+ffffffff818b67c0 T drm_atomic_helper_setup_commit
+ffffffff818b6f70 t commit_work
+ffffffff818b6f80 T drm_atomic_helper_swap_state
+ffffffff818b75a0 t commit_tail
+ffffffff818b7640 t release_crtc_commit
+ffffffff818b7680 T drm_atomic_helper_wait_for_dependencies
+ffffffff818b7c30 T drm_atomic_helper_commit_cleanup_done
+ffffffff818b7e10 T drm_atomic_helper_commit_planes_on_crtc
+ffffffff818b8050 T drm_atomic_helper_disable_planes_on_crtc
+ffffffff818b81a0 T drm_atomic_helper_update_plane
+ffffffff818b82e0 T drm_atomic_helper_disable_plane
+ffffffff818b83d0 T __drm_atomic_helper_disable_plane
+ffffffff818b8450 T drm_atomic_helper_set_config
+ffffffff818b8500 T __drm_atomic_helper_set_config
+ffffffff818b8870 T drm_atomic_helper_disable_all
+ffffffff818b8880 t __drm_atomic_helper_disable_all
+ffffffff818b8a30 T drm_atomic_helper_shutdown
+ffffffff818b8ae0 T drm_atomic_helper_suspend
+ffffffff818b8be0 T drm_atomic_helper_duplicate_state
+ffffffff818b8d40 T drm_atomic_helper_commit_duplicated_state
+ffffffff818b8e70 T drm_atomic_helper_resume
+ffffffff818b8f50 T drm_atomic_helper_page_flip
+ffffffff818b9010 t page_flip_common
+ffffffff818b9110 T drm_atomic_helper_page_flip_target
+ffffffff818b9220 T drm_atomic_helper_best_encoder
+ffffffff818b92a0 T drm_atomic_helper_crtc_reset
+ffffffff818b9320 T __drm_atomic_helper_crtc_destroy_state
+ffffffff818b93f0 T __drm_atomic_helper_crtc_duplicate_state
+ffffffff818b94a0 T drm_atomic_helper_crtc_duplicate_state
+ffffffff818b95c0 T drm_atomic_helper_crtc_destroy_state
+ffffffff818b95f0 T drm_atomic_helper_plane_reset
+ffffffff818b96a0 T __drm_atomic_helper_plane_destroy_state
+ffffffff818b9750 T __drm_atomic_helper_plane_duplicate_state
+ffffffff818b97c0 T drm_atomic_helper_plane_duplicate_state
+ffffffff818b9890 T drm_atomic_helper_plane_destroy_state
+ffffffff818b98c0 T __drm_atomic_helper_connector_reset
+ffffffff818b9900 T drm_atomic_helper_connector_reset
+ffffffff818b99c0 T __drm_atomic_helper_connector_destroy_state
+ffffffff818b9a30 T __drm_atomic_helper_connector_duplicate_state
+ffffffff818b9aa0 T drm_atomic_helper_connector_duplicate_state
+ffffffff818b9b70 T drm_atomic_helper_connector_destroy_state
+ffffffff818b9bd0 T drm_atomic_helper_legacy_gamma_set
+ffffffff818b9db0 T __drm_atomic_helper_private_obj_duplicate_state
+ffffffff818b9de0 t set_best_encoder
+ffffffff818ba000 T drm_plane_create_alpha_property
+ffffffff818ba0a0 T drm_plane_create_rotation_property
+ffffffff818ba1e0 T drm_rotation_simplify
+ffffffff818ba250 T drm_plane_create_zpos_property
+ffffffff818ba300 T drm_plane_create_zpos_immutable_property
+ffffffff818ba3b0 T drm_atomic_normalize_zpos
+ffffffff818bb000 T drm_bridge_add
+ffffffff818bb050 T drm_bridge_remove
+ffffffff818bb0a0 T drm_bridge_attach
+ffffffff818bb150 T drm_bridge_detach
+ffffffff818bb200 T drm_bridge_mode_fixup
+ffffffff818bb280 T drm_bridge_mode_valid
+ffffffff818bb300 T drm_bridge_disable
+ffffffff818bb360 T drm_bridge_post_disable
+ffffffff818bb3c0 T drm_bridge_mode_set
+ffffffff818bb430 T drm_bridge_pre_enable
+ffffffff818bb490 T drm_bridge_enable
+ffffffff818bc000 T drm_clflush_pages
+ffffffff818bc090 T drm_clflush_sg
+ffffffff818bc160 T drm_clflush_virt_range
+ffffffff818bd000 T drm_color_lut_extract
+ffffffff818bd050 T drm_crtc_enable_color_mgmt
+ffffffff818bd130 T drm_mode_crtc_set_gamma_size
+ffffffff818bd260 T drm_mode_gamma_set_ioctl
+ffffffff818bd470 T drm_mode_gamma_get_ioctl
+ffffffff818bd5c0 T drm_get_color_encoding_name
+ffffffff818bd630 T drm_get_color_range_name
+ffffffff818bd6a0 T drm_plane_create_color_properties
+ffffffff818be000 T drm_connector_ida_init
+ffffffff818be0f0 T drm_connector_ida_destroy
+ffffffff818be1e0 T drm_connector_free_work_fn
+ffffffff818be2a0 T drm_connector_init
+ffffffff818be590 t drm_connector_free
+ffffffff818be5d0 t kasprintf
+ffffffff818be6b0 T drm_connector_attach_encoder
+ffffffff818be750 T drm_connector_has_possible_encoder
+ffffffff818be830 T drm_connector_cleanup
+ffffffff818beab0 T drm_connector_unregister
+ffffffff818beb00 T drm_mode_put_tile_group
+ffffffff818beb80 T drm_connector_register
+ffffffff818bec20 T drm_connector_unregister_all
+ffffffff818bed70 T drm_connector_list_iter_begin
+ffffffff818beda0 T drm_connector_list_iter_next
+ffffffff818beea0 T drm_connector_list_iter_end
+ffffffff818bef60 T drm_connector_register_all
+ffffffff818bf160 T drm_get_connector_status_name
+ffffffff818bf1b0 T drm_get_connector_force_name
+ffffffff818bf1f0 T drm_get_subpixel_order_name
+ffffffff818bf220 T drm_get_dpms_name
+ffffffff818bf260 T drm_display_info_set_bus_formats
+ffffffff818bf330 T drm_get_dvi_i_select_name
+ffffffff818bf390 T drm_get_dvi_i_subconnector_name
+ffffffff818bf3f0 T drm_get_tv_select_name
+ffffffff818bf440 T drm_get_tv_subconnector_name
+ffffffff818bf490 T drm_get_content_protection_name
+ffffffff818bf4f0 T drm_connector_create_standard_properties
+ffffffff818bf640 T drm_mode_create_dvi_i_properties
+ffffffff818bf6d0 T drm_connector_attach_content_type_property
+ffffffff818bf760 T drm_mode_create_content_type_property
+ffffffff818bf7e0 T drm_hdmi_avi_infoframe_content_type
+ffffffff818bf820 T drm_mode_create_tv_properties
+ffffffff818bfb20 T drm_mode_create_scaling_mode_property
+ffffffff818bfb90 T drm_connector_attach_scaling_mode_property
+ffffffff818bfd70 T drm_connector_attach_content_protection_property
+ffffffff818bfe00 T drm_mode_create_aspect_ratio_property
+ffffffff818bfe80 T drm_mode_create_suggested_offset_properties
+ffffffff818bff40 T drm_connector_set_path_property
+ffffffff818bff90 T drm_connector_set_tile_property
+ffffffff818c00b0 T drm_connector_update_edid_property
+ffffffff818c0170 T drm_connector_set_link_status_property
+ffffffff818c01c0 T drm_connector_init_panel_orientation_property
+ffffffff818c0290 T drm_connector_set_obj_prop
+ffffffff818c0360 T drm_connector_property_set_ioctl
+ffffffff818c03c0 T drm_mode_getconnector
+ffffffff818c0950 T drm_mode_get_tile_group
+ffffffff818c0a30 T drm_mode_create_tile_group
+ffffffff818c1000 T drm_crtc_from_index
+ffffffff818c1060 T drm_crtc_force_disable
+ffffffff818c1170 T drm_mode_set_config_internal
+ffffffff818c11e0 T drm_crtc_force_disable_all
+ffffffff818c1270 T drm_crtc_register_all
+ffffffff818c1300 T drm_crtc_unregister_all
+ffffffff818c1370 T drm_crtc_create_fence
+ffffffff818c1420 T drm_crtc_init_with_planes
+ffffffff818c1810 t kasprintf
+ffffffff818c18f0 T drm_crtc_cleanup
+ffffffff818c1a10 T drm_mode_getcrtc
+ffffffff818c1ba0 t __drm_mode_set_config_internal
+ffffffff818c1d30 T drm_crtc_check_viewport
+ffffffff818c1de0 T drm_mode_setcrtc
+ffffffff818c23b0 T drm_mode_crtc_set_obj_prop
+ffffffff818c2430 t drm_crtc_fence_get_driver_name
+ffffffff818c24a0 t drm_crtc_fence_get_timeline_name
+ffffffff818c3000 T drm_helper_encoder_in_use
+ffffffff818c3120 T drm_helper_crtc_in_use
+ffffffff818c31f0 T drm_helper_disable_unused_functions
+ffffffff818c3240 t __drm_helper_disable_unused_functions
+ffffffff818c3340 T drm_crtc_helper_set_mode
+ffffffff818c38b0 T drm_crtc_helper_set_config
+ffffffff818c4220 T drm_helper_connector_dpms
+ffffffff818c4500 T drm_helper_resume_force_mode
+ffffffff818c47f0 T drm_helper_crtc_mode_set
+ffffffff818c4940 T drm_helper_crtc_mode_set_base
+ffffffff818c4a70 t drm_encoder_disable
+ffffffff818c5000 T drm_dp_dual_mode_read
+ffffffff818c5090 T drm_dp_dual_mode_write
+ffffffff818c5180 T drm_dp_dual_mode_detect
+ffffffff818c5330 T drm_dp_dual_mode_max_tmds_clock
+ffffffff818c5400 T drm_dp_dual_mode_get_tmds_output
+ffffffff818c54d0 T drm_dp_dual_mode_set_tmds_output
+ffffffff818c5820 T drm_dp_get_dual_mode_type_name
+ffffffff818c5890 T drm_lspcon_get_mode
+ffffffff818c59a0 T drm_lspcon_set_mode
+ffffffff818c6000 T drm_dp_channel_eq_ok
+ffffffff818c6070 T drm_dp_clock_recovery_ok
+ffffffff818c60d0 T drm_dp_get_adjust_request_voltage
+ffffffff818c6110 T drm_dp_get_adjust_request_pre_emphasis
+ffffffff818c6150 T drm_dp_link_train_clock_recovery_delay
+ffffffff818c61d0 T drm_dp_link_train_channel_eq_delay
+ffffffff818c6250 T drm_dp_link_rate_to_bw_code
+ffffffff818c62d0 T drm_dp_bw_code_to_link_rate
+ffffffff818c6350 T drm_dp_dpcd_read
+ffffffff818c6570 T drm_dp_dpcd_write
+ffffffff818c66d0 T drm_dp_dpcd_read_link_status
+ffffffff818c66f0 T drm_dp_link_probe
+ffffffff818c67c0 T drm_dp_link_power_up
+ffffffff818c6850 T drm_dp_link_power_down
+ffffffff818c68d0 T drm_dp_link_configure
+ffffffff818c6990 T drm_dp_downstream_max_clock
+ffffffff818c69f0 T drm_dp_downstream_max_bpc
+ffffffff818c6a40 T drm_dp_downstream_id
+ffffffff818c6a60 T drm_dp_downstream_debug
+ffffffff818c6b00 T drm_dp_aux_init
+ffffffff818c6ba0 t drm_dp_aux_crc_work
+ffffffff818c6c80 T drm_dp_aux_register
+ffffffff818c6d50 T drm_dp_aux_unregister
+ffffffff818c6d80 T drm_dp_psr_setup_time
+ffffffff818c6dc0 T drm_dp_start_crc
+ffffffff818c6e60 T drm_dp_stop_crc
+ffffffff818c6ef0 T drm_dp_read_desc
+ffffffff818c6f90 t drm_dp_aux_get_crc
+ffffffff818c7060 t drm_dp_i2c_xfer
+ffffffff818c7280 t drm_dp_i2c_functionality
+ffffffff818c72b0 t drm_dp_i2c_do_msg
+ffffffff818c8000 T drm_dp_send_power_updown_phy
+ffffffff818c81b0 t drm_dp_put_port
+ffffffff818c82f0 t drm_dp_mst_wait_tx_reply
+ffffffff818c84f0 T drm_dp_update_payload_part1
+ffffffff818c88d0 T drm_dp_update_payload_part2
+ffffffff818c89d0 T drm_dp_mst_topology_mgr_set_mst
+ffffffff818c8cd0 t drm_dp_dpcd_write_payload
+ffffffff818c8de0 T drm_dp_mst_topology_mgr_suspend
+ffffffff818c8e70 T drm_dp_mst_topology_mgr_resume
+ffffffff818c8f50 t drm_dp_check_mstb_guid
+ffffffff818c9170 T drm_dp_mst_hpd_irq
+ffffffff818c9c30 T drm_dp_mst_detect_port
+ffffffff818c9d20 T drm_dp_mst_port_has_audio
+ffffffff818c9db0 T drm_dp_mst_get_edid
+ffffffff818c9e80 T drm_dp_find_vcpi_slots
+ffffffff818c9ec0 T drm_dp_atomic_find_vcpi_slots
+ffffffff818ca000 T drm_atomic_get_mst_topology_state
+ffffffff818ca080 T drm_dp_atomic_release_vcpi_slots
+ffffffff818ca130 T drm_dp_mst_allocate_vcpi
+ffffffff818ca380 T drm_dp_mst_get_vcpi_slots
+ffffffff818ca410 T drm_dp_mst_reset_vcpi_slots
+ffffffff818ca4b0 T drm_dp_mst_deallocate_vcpi
+ffffffff818ca620 T drm_dp_check_act_status
+ffffffff818ca6c0 T drm_dp_calc_pbn_mode
+ffffffff818ca7f0 T drm_dp_mst_topology_mgr_init
+ffffffff818caa50 t drm_dp_mst_link_probe_work
+ffffffff818caaf0 t drm_dp_tx_work
+ffffffff818cab40 t drm_dp_destroy_connector_work
+ffffffff818cadd0 T drm_dp_mst_topology_mgr_destroy
+ffffffff818caea0 t drm_dp_mst_get_port_ref_locked
+ffffffff818caf30 t kref_put
+ffffffff818caf70 t drm_dp_encode_sideband_req
+ffffffff818cb320 t process_single_down_tx_qlock
+ffffffff818cb470 t process_single_tx_qlock
+ffffffff818cb8a0 t drm_dp_msg_data_crc4
+ffffffff818cb9a0 t drm_dp_payload_send_msg
+ffffffff818cbdb0 t drm_dp_mst_get_validated_mstb_ref_locked
+ffffffff818cbe40 t drm_dp_destroy_mst_branch_device
+ffffffff818cbff0 t drm_dp_free_mst_branch_device
+ffffffff818cc060 t drm_dp_free_mst_port
+ffffffff818cc100 t drm_dp_get_one_sb_msg
+ffffffff818cc580 t drm_dp_get_mst_branch_device
+ffffffff818cc6a0 t drm_dp_send_up_ack_reply
+ffffffff818cc7c0 t get_mst_branch_device_by_guid_helper
+ffffffff818cc850 t drm_dp_port_setup_pdt
+ffffffff818cc9f0 t drm_dp_mst_i2c_xfer
+ffffffff818ccd50 t drm_dp_mst_i2c_functionality
+ffffffff818ccd80 t drm_dp_check_and_send_link_address
+ffffffff818cceb0 t drm_dp_send_link_address
+ffffffff818cd440 t drm_dp_send_enum_path_resources
+ffffffff818cd5a0 t drm_dp_mst_duplicate_state
+ffffffff818cd630 t drm_dp_mst_destroy_state
+ffffffff818ce000 T drm_attach_pci
+ffffffff818ce110 T drmprint
+ffffffff818ce160 T drmsubmatch
+ffffffff818ce1b0 T drm_pciprobe
+ffffffff818ce250 T drm_find_description
+ffffffff818ce300 T drm_probe
+ffffffff818ce350 T drm_attach
+ffffffff818ce700 T drm_lastclose
+ffffffff818ce780 T drm_detach
+ffffffff818ce8c0 T drm_quiesce
+ffffffff818ce940 T drm_wakeup
+ffffffff818ce990 T drm_activate
+ffffffff818cea70 T drm_file_cmp
+ffffffff818ceab0 T drm_file_tree_SPLAY_INSERT
+ffffffff818ceb70 T drm_file_tree_SPLAY
+ffffffff818cecf0 T drm_file_tree_SPLAY_REMOVE
+ffffffff818ced90 T drm_file_tree_SPLAY_MINMAX
+ffffffff818ceed0 T drm_find_file_by_minor
+ffffffff818cef50 T drm_get_device_from_kdev
+ffffffff818cefc0 T drm_firstopen
+ffffffff818cf030 T filt_drmdetach
+ffffffff818cf0a0 T filt_drmkms
+ffffffff818cf0e0 T drmkqfilter
+ffffffff818cf1b0 T drmopen
+ffffffff818cf680 T drmclose
+ffffffff818cf980 T drmread
+ffffffff818cfc80 T drm_dequeue_event
+ffffffff818cfd70 T drmpoll
+ffffffff818cfed0 T drmmmap
+ffffffff818cff00 T drm_dmamem_alloc
+ffffffff818d00c0 T drm_dmamem_free
+ffffffff818d0150 T drm_pci_alloc
+ffffffff818d0210 T drm_pci_free
+ffffffff818d02d0 T drm_getmagic
+ffffffff818d0370 T drm_authmagic
+ffffffff818d0530 T drm_order
+ffffffff818d0590 T drm_getpciinfo
+ffffffff818d0640 T drm_dev_register
+ffffffff818d0690 T drm_dev_unregister
+ffffffff818d1000 T drm_mode_create_dumb
+ffffffff818d1100 T drm_mode_create_dumb_ioctl
+ffffffff818d1200 T drm_mode_mmap_dumb_ioctl
+ffffffff818d1280 T drm_mode_destroy_dumb
+ffffffff818d12f0 T drm_mode_destroy_dumb_ioctl
+ffffffff818d2000 T drm_edid_header_is_valid
+ffffffff818d2080 T drm_edid_block_valid
+ffffffff818d22d0 T drm_edid_is_valid
+ffffffff818d2360 T drm_add_override_edid_modes
+ffffffff818d2440 T drm_add_edid_modes
+ffffffff818d4ee0 T drm_do_get_edid
+ffffffff818d5310 t connector_bad_edid
+ffffffff818d54a0 T drm_probe_ddc
+ffffffff818d54e0 t drm_do_probe_ddc_edid
+ffffffff818d5750 T drm_get_edid
+ffffffff818d5b00 T drm_get_edid_switcheroo
+ffffffff818d5b10 T drm_edid_duplicate
+ffffffff818d5b80 T drm_mode_find_dmt
+ffffffff818d5c80 T drm_mode_fixup_1366x768
+ffffffff818d5cd0 T drm_match_cea_mode
+ffffffff818d5ec0 T drm_get_cea_aspect_ratio
+ffffffff818d5f00 T drm_edid_get_monitor_name
+ffffffff818d5f90 t get_monitor_name
+ffffffff818d6320 T drm_edid_to_sad
+ffffffff818d64b0 t drm_find_cea_extension
+ffffffff818d66d0 T drm_edid_to_speaker_allocation
+ffffffff818d6810 T drm_av_sync_delay
+ffffffff818d68d0 T drm_detect_hdmi_monitor
+ffffffff818d69f0 T drm_detect_monitor_audio
+ffffffff818d6ab0 T drm_rgb_quant_range_selectable
+ffffffff818d6ba0 T drm_default_rgb_quant_range
+ffffffff818d6be0 T drm_reset_display_info
+ffffffff818d6c90 T drm_add_display_info
+ffffffff818d7320 T drm_add_modes_noedid
+ffffffff818d7410 T drm_set_preferred_mode
+ffffffff818d7470 T drm_hdmi_avi_infoframe_from_display_mode
+ffffffff818d76d0 T drm_hdmi_avi_infoframe_quant_range
+ffffffff818d7750 T drm_hdmi_vendor_infoframe_from_display_mode
+ffffffff818d7940 t drm_for_each_detailed_block
+ffffffff818d7b00 t do_detailed_mode
+ffffffff818d82c0 t drm_cvt_modes
+ffffffff818d8500 t drm_mode_std
+ffffffff818d9300 t do_standard_modes
+ffffffff818d9440 t drm_monitor_supports_rb
+ffffffff818d96a0 t drm_gtf2_hbreak
+ffffffff818d9930 t do_inferred_modes
+ffffffff818d9df0 t mode_in_range
+ffffffff818da000 T drm_encoder_register_all
+ffffffff818da090 T drm_encoder_unregister_all
+ffffffff818da100 T drm_encoder_init
+ffffffff818da2d0 t kasprintf
+ffffffff818da3b0 T drm_encoder_cleanup
+ffffffff818da4c0 T drm_mode_getencoder
+ffffffff818db000 T drm_fb_helper_add_one_connector
+ffffffff818db070 t __drm_fb_helper_add_one_connector
+ffffffff818db150 T drm_fb_helper_single_add_all_connectors
+ffffffff818db290 T drm_fb_helper_remove_one_connector
+ffffffff818db3c0 T drm_fb_helper_debug_enter
+ffffffff818db4d0 T drm_fb_helper_debug_leave
+ffffffff818db650 T drm_fb_helper_restore_fbdev_mode_unlocked
+ffffffff818db840 T drm_fb_helper_hotplug_event
+ffffffff818db9e0 T drm_fb_helper_blank
+ffffffff818dba70 t drm_fb_helper_dpms
+ffffffff818dbc30 T drm_fb_helper_prepare
+ffffffff818dbd10 t drm_fb_helper_resume_worker
+ffffffff818dbd40 t drm_fb_helper_dirty_work
+ffffffff818dbe20 T drm_fb_helper_init
+ffffffff818dc020 t drm_fb_helper_crtc_free
+ffffffff818dc190 T drm_fb_helper_alloc_fbi
+ffffffff818dc1f0 T drm_fb_helper_unregister_fbi
+ffffffff818dc220 T drm_fb_helper_fini
+ffffffff818dc2e0 T drm_fb_helper_set_suspend
+ffffffff818dc310 T drm_fb_helper_set_suspend_unlocked
+ffffffff818dc340 T drm_fb_helper_set_par
+ffffffff818dc3a0 T drm_has_preferred_mode
+ffffffff818dc400 T drm_pick_cmdline_mode
+ffffffff818dc540 T drm_fb_helper_initial_config
+ffffffff818dc570 t __drm_fb_helper_initial_config_and_unlock
+ffffffff818dc8b0 t drm_setup_crtcs
+ffffffff818dd360 t drm_setup_crtcs_fb
+ffffffff818dd460 T drm_fb_helper_lastclose
+ffffffff818dd480 T drm_fb_helper_output_poll_changed
+ffffffff818dd4a0 T drm_fb_helper_modinit
+ffffffff818dd4d0 t restore_fbdev_mode_atomic
+ffffffff818dd6f0 t drm_pick_crtcs
+ffffffff818de000 T drm_events_release
+ffffffff818de0d0 T drm_event_reserve_init_locked
+ffffffff818de140 T drm_event_reserve_init
+ffffffff818de200 T drm_event_cancel_free
+ffffffff818de2b0 T drm_send_event_locked
+ffffffff818de510 T drm_send_event
+ffffffff818df000 T drm_mode_legacy_fb_format
+ffffffff818df0a0 T drm_get_format_name
+ffffffff818df1c0 T __drm_format_info
+ffffffff818df240 T drm_format_info
+ffffffff818df300 T drm_get_format_info
+ffffffff818df400 T drm_format_num_planes
+ffffffff818df4e0 T drm_format_plane_cpp
+ffffffff818df5e0 T drm_format_horz_chroma_subsampling
+ffffffff818df6c0 T drm_format_vert_chroma_subsampling
+ffffffff818df7a0 T drm_format_plane_width
+ffffffff818df8b0 T drm_format_plane_height
+ffffffff818e0000 T drm_framebuffer_check_src_coords
+ffffffff818e0090 T drm_mode_addfb
+ffffffff818e0230 T drm_mode_addfb2
+ffffffff818e02e0 T drm_mode_addfb_ioctl
+ffffffff818e02f0 T drm_internal_framebuffer_create
+ffffffff818e0650 T drm_mode_rmfb
+ffffffff818e07f0 T drm_framebuffer_lookup
+ffffffff818e0840 t drm_mode_rmfb_work_fn
+ffffffff818e08c0 T drm_mode_rmfb_ioctl
+ffffffff818e08d0 T drm_mode_getfb
+ffffffff818e0a10 T drm_mode_dirtyfb_ioctl
+ffffffff818e0bc0 T drm_fb_release
+ffffffff818e0cc0 T drm_framebuffer_free
+ffffffff818e0cf0 T drm_framebuffer_init
+ffffffff818e0e50 T drm_framebuffer_unregister_private
+ffffffff818e0e90 T drm_framebuffer_cleanup
+ffffffff818e0ef0 T drm_framebuffer_remove
+ffffffff818e12e0 T drm_framebuffer_plane_width
+ffffffff818e1330 T drm_framebuffer_plane_height
+ffffffff818e1380 T drm_framebuffer_print_info
+ffffffff818e2000 T drm_ref
+ffffffff818e2030 T drm_unref
+ffffffff818e2050 T drm_fault
+ffffffff818e2220 T drm_flush
+ffffffff818e2250 T drm_gem_object_put_unlocked
+ffffffff818e23e0 T udv_attach_drm
+ffffffff818e2550 T drm_gem_init
+ffffffff818e2600 T drm_gem_destroy
+ffffffff818e2660 T drm_gem_object_init
+ffffffff818e2770 T drm_gem_private_object_init
+ffffffff818e2800 T drm_gem_handle_delete
+ffffffff818e28c0 t drm_gem_object_release_handle
+ffffffff818e2970 T drm_gem_dumb_map_offset
+ffffffff818e2a50 T drm_gem_object_lookup
+ffffffff818e2ac0 T drm_gem_create_mmap_offset
+ffffffff818e2af0 T drm_gem_dumb_destroy
+ffffffff818e2b00 T drm_gem_handle_create_tail
+ffffffff818e2c80 t drm_gem_object_handle_put_unlocked
+ffffffff818e2d40 T drm_gem_handle_create
+ffffffff818e2d80 T drm_gem_free_mmap_offset
+ffffffff818e2da0 T drm_gem_create_mmap_offset_size
+ffffffff818e2dd0 T drm_gem_close_ioctl
+ffffffff818e2e20 T drm_gem_flink_ioctl
+ffffffff818e2f40 T drm_gem_open_ioctl
+ffffffff818e3010 T drm_gem_open
+ffffffff818e3040 T drm_gem_release
+ffffffff818e3070 T drm_gem_object_release
+ffffffff818e3100 T drm_gem_object_free
+ffffffff818e31b0 T drm_gem_object_put
+ffffffff818e32b0 T drm_gem_print_info
+ffffffff818e4000 T drm_gem_fb_destroy
+ffffffff818e4060 T drm_gem_fb_create_handle
+ffffffff818e5000 T drm_global_init
+ffffffff818e50c0 T drm_global_release
+ffffffff818e5170 T drm_global_item_ref
+ffffffff818e5260 T drm_global_item_unref
+ffffffff818e6000 T drm_ht_create
+ffffffff818e6050 T drm_ht_verbose_list
+ffffffff818e6070 T drm_ht_find_key
+ffffffff818e60c0 T drm_ht_find_key_rcu
+ffffffff818e6110 T drm_ht_insert_item
+ffffffff818e6160 T drm_ht_just_insert_please
+ffffffff818e61b0 T drm_ht_find_item
+ffffffff818e6200 T drm_ht_remove_key
+ffffffff818e6250 T drm_ht_remove_item
+ffffffff818e62a0 T drm_ht_remove
+ffffffff818e7000 T drm_getunique
+ffffffff818e7070 T drm_getclient
+ffffffff818e70e0 T drm_noop
+ffffffff818e7110 T drm_invalid_op
+ffffffff818e7140 T drm_version
+ffffffff818e72d0 T pledge_ioctl_drm
+ffffffff818e7380 T drm_setunique
+ffffffff818e73b0 T drm_do_ioctl
+ffffffff818e7540 T drmioctl
+ffffffff818e76a0 t drm_getstats
+ffffffff818e76e0 t drm_setversion
+ffffffff818e77a0 t drm_getcap
+ffffffff818e7990 t drm_setclientcap
+ffffffff818e8000 T drm_irq_install
+ffffffff818e80b0 T drm_irq_uninstall
+ffffffff818e8260 T drm_legacy_irq_control
+ffffffff818e9000 T tasklet_run
+ffffffff818e9060 T set_current_state
+ffffffff818e9140 T __set_current_state
+ffffffff818e9220 T schedule
+ffffffff818e9230 T schedule_timeout
+ffffffff818e9400 T wake_up_process
+ffffffff818e9420 T flush_workqueue
+ffffffff818e9460 T flush_work
+ffffffff818e94a0 T flush_delayed_work
+ffffffff818e9540 T kthread_func
+ffffffff818e9570 T kthread_run
+ffffffff818e9640 T kthread_lookup
+ffffffff818e96b0 T kthread_should_park
+ffffffff818e9730 T kthread_parkme
+ffffffff818e97e0 T kthread_park
+ffffffff818e98b0 T kthread_unpark
+ffffffff818e9910 T kthread_should_stop
+ffffffff818e9990 T kthread_stop
+ffffffff818e9a80 T ns_to_timespec
+ffffffff818e9b20 T timeval_to_ns
+ffffffff818e9b60 T ns_to_timeval
+ffffffff818e9c10 T timeval_to_ms
+ffffffff818e9c60 T timeval_to_us
+ffffffff818e9c90 T dmi_match
+ffffffff818e9d40 T dmi_first_match
+ffffffff818e9e20 T dmi_get_system_info
+ffffffff818e9e90 T dmi_check_system
+ffffffff818e9f80 T alloc_pages
+ffffffff818ea050 T __free_pages
+ffffffff818ea0e0 T __pagevec_release
+ffffffff818ea190 T kmap
+ffffffff818ea1c0 T kunmap
+ffffffff818ea1e0 T vmap
+ffffffff818ea2c0 T vunmap
+ffffffff818ea300 T print_hex_dump
+ffffffff818ea3c0 T memchr_inv
+ffffffff818ea410 T panic_cmp
+ffffffff818ea430 T linux_root_RB_INSERT_COLOR
+ffffffff818ea650 T linux_root_RB_REMOVE_COLOR
+ffffffff818ea990 T linux_root_RB_REMOVE
+ffffffff818eaaf0 T linux_root_RB_INSERT
+ffffffff818eab60 T linux_root_RB_FIND
+ffffffff818eabb0 T linux_root_RB_NFIND
+ffffffff818eac00 T linux_root_RB_NEXT
+ffffffff818eac70 T linux_root_RB_PREV
+ffffffff818eace0 T linux_root_RB_MINMAX
+ffffffff818ead30 T idr_init
+ffffffff818eadb0 T idr_destroy
+ffffffff818eaed0 T idr_tree_SPLAY_REMOVE
+ffffffff818eaf60 T idr_preload
+ffffffff818eaff0 T idr_alloc
+ffffffff818eb180 T idr_tree_SPLAY_INSERT
+ffffffff818eb220 T idr_replace
+ffffffff818eb2a0 T idr_remove
+ffffffff818eb360 T idr_find
+ffffffff818eb3d0 T idr_get_next
+ffffffff818eb4f0 T idr_for_each
+ffffffff818eb610 T idr_cmp
+ffffffff818eb650 T idr_tree_SPLAY
+ffffffff818eb780 T idr_tree_SPLAY_MINMAX
+ffffffff818eb870 T ida_init
+ffffffff818eb8a0 T ida_destroy
+ffffffff818eb8d0 T ida_remove
+ffffffff818eb900 T ida_simple_get
+ffffffff818eb980 T ida_simple_remove
+ffffffff818eb9b0 T sg_alloc_table
+ffffffff818eba20 T sg_free_table
+ffffffff818eba50 T sg_copy_from_buffer
+ffffffff818eba70 T i2c_master_xfer
+ffffffff818ebbc0 T i2c_transfer
+ffffffff818ebbf0 T i2c_bb_master_xfer
+ffffffff818ebc90 T i2c_bb_functionality
+ffffffff818ebcc0 T i2c_bit_add_bus
+ffffffff818ebd00 T vga_disable_bridge
+ffffffff818ebdb0 T vga_get_uninterruptible
+ffffffff818ebe00 T vga_put
+ffffffff818ebe80 T acpi_get_table
+ffffffff818ebf50 T acpi_get_handle
+ffffffff818ebfa0 T acpi_get_name
+ffffffff818ec040 T acpi_evaluate_object
+ffffffff818ec240 T drm_linux_acpi_notify
+ffffffff818ec2c0 T register_acpi_notifier
+ffffffff818ec300 T unregister_acpi_notifier
+ffffffff818ec390 T acpi_format_exception
+ffffffff818ec3e0 T backlight_do_update_status
+ffffffff818ec400 T backlight_device_register
+ffffffff818ec490 T backlight_device_unregister
+ffffffff818ec4b0 T backlight_schedule_update_status
+ffffffff818ec4d0 T drm_sysfs_hotplug_event
+ffffffff818ec4f0 T dma_fence_context_alloc
+ffffffff818ec520 T dma_fence_default_wait
+ffffffff818ec720 t dma_fence_default_wait_cb
+ffffffff818ec750 T dma_fence_wait_any_timeout
+ffffffff818eca90 t dma_fence_add_callback
+ffffffff818ecc10 T dma_fence_array_create
+ffffffff818ecd30 t irq_dma_fence_array_work
+ffffffff818ece40 t dma_fence_array_get_driver_name
+ffffffff818ece70 t dma_fence_array_get_timeline_name
+ffffffff818ecea0 t dma_fence_array_enable_signaling
+ffffffff818ecfb0 t dma_fence_array_signaled
+ffffffff818ecff0 t dma_fence_array_release
+ffffffff818ed0b0 T dmabuf_read
+ffffffff818ed0e0 T dmabuf_write
+ffffffff818ed110 T dmabuf_ioctl
+ffffffff818ed140 T dmabuf_poll
+ffffffff818ed170 T dmabuf_kqfilter
+ffffffff818ed1a0 T dmabuf_stat
+ffffffff818ed260 T dmabuf_close
+ffffffff818ed2d0 T dmabuf_seek
+ffffffff818ed350 T dma_buf_export
+ffffffff818ed3f0 T dma_buf_get
+ffffffff818ed480 T dma_buf_put
+ffffffff818ed530 T dma_buf_fd
+ffffffff818ed640 T get_dma_buf
+ffffffff818ed680 T pcie_get_speed_cap
+ffffffff818ed7d0 T pcie_get_width_cap
+ffffffff818ed880 T default_wake_function
+ffffffff818ed8e0 T autoremove_wake_function
+ffffffff818ed960 T wait_on_bit
+ffffffff818eda20 T wait_on_bit_timeout
+ffffffff818edaf0 T wake_up_bit
+ffffffff818edb30 T drm_linux_init
+ffffffff818edc40 T pci_resize_resource
+ffffffff818edd80 T register_shrinker
+ffffffff818eddd0 T unregister_shrinker
+ffffffff818ede30 T drmbackoff
+ffffffff818edec0 t dma_fence_array_cb_func
+ffffffff818ee000 T drm_mtrr_add
+ffffffff818ee070 T drm_mtrr_del
+ffffffff818ef000 T mipi_dsi_attach
+ffffffff818ef050 T mipi_dsi_detach
+ffffffff818ef0a0 T mipi_dsi_packet_format_is_short
+ffffffff818ef0f0 T mipi_dsi_packet_format_is_long
+ffffffff818ef140 T mipi_dsi_create_packet
+ffffffff818ef240 T mipi_dsi_shutdown_peripheral
+ffffffff818ef2e0 T mipi_dsi_turn_on_peripheral
+ffffffff818ef380 T mipi_dsi_set_maximum_return_packet_size
+ffffffff818ef430 T mipi_dsi_generic_write
+ffffffff818ef4e0 T mipi_dsi_generic_read
+ffffffff818ef590 T mipi_dsi_dcs_write_buffer
+ffffffff818ef650 T mipi_dsi_dcs_write
+ffffffff818ef7b0 T mipi_dsi_dcs_read
+ffffffff818ef840 T mipi_dsi_dcs_nop
+ffffffff818ef8f0 T mipi_dsi_dcs_soft_reset
+ffffffff818ef9a0 T mipi_dsi_dcs_get_power_mode
+ffffffff818efa60 T mipi_dsi_dcs_get_pixel_format
+ffffffff818efb20 T mipi_dsi_dcs_enter_sleep_mode
+ffffffff818efbd0 T mipi_dsi_dcs_exit_sleep_mode
+ffffffff818efc80 T mipi_dsi_dcs_set_display_off
+ffffffff818efd30 T mipi_dsi_dcs_set_display_on
+ffffffff818efde0 T mipi_dsi_dcs_set_column_address
+ffffffff818efef0 T mipi_dsi_dcs_set_page_address
+ffffffff818f0000 T mipi_dsi_dcs_set_tear_off
+ffffffff818f00b0 T mipi_dsi_dcs_set_tear_on
+ffffffff818f01a0 T mipi_dsi_dcs_set_pixel_format
+ffffffff818f1000 T drm_mm_interval_tree_iter_first
+ffffffff818f1070 T __drm_mm_interval_first
+ffffffff818f10e0 T drm_mm_reserve_node
+ffffffff818f1280 T drm_mm_insert_node_in_range_generic
+ffffffff818f1600 T drm_mm_remove_node
+ffffffff818f16d0 T drm_mm_replace_node
+ffffffff818f1770 T drm_mm_scan_init_with_range
+ffffffff818f17f0 T drm_mm_scan_add_block
+ffffffff818f1930 T drm_mm_scan_remove_block
+ffffffff818f19a0 T drm_mm_scan_color_evict
+ffffffff818f1a50 T drm_mm_init
+ffffffff818f1ae0 T drm_mm_takedown
+ffffffff818f1b20 T drm_mm_print
+ffffffff818f2000 T drm_modeset_register_all
+ffffffff818f20a0 T drm_modeset_unregister_all
+ffffffff818f20d0 T drm_mode_getresources
+ffffffff818f2350 T drm_mode_config_reset
+ffffffff818f24b0 T drm_mode_config_init
+ffffffff818f2a90 T drm_mode_config_cleanup
+ffffffff818f3000 T __drm_mode_object_add
+ffffffff818f30d0 T drm_mode_object_add
+ffffffff818f3170 T drm_mode_object_register
+ffffffff818f31c0 T drm_mode_object_unregister
+ffffffff818f3220 T drm_mode_object_lease_required
+ffffffff818f3260 T __drm_mode_object_find
+ffffffff818f3310 T drm_mode_object_find
+ffffffff818f33c0 T drm_mode_object_put
+ffffffff818f3410 T drm_mode_object_get
+ffffffff818f3440 T drm_object_attach_property
+ffffffff818f34a0 T drm_object_property_set_value
+ffffffff818f3570 T drm_object_property_get_value
+ffffffff818f35f0 t __drm_object_property_get_value
+ffffffff818f36d0 T drm_mode_object_get_properties
+ffffffff818f3830 T drm_mode_obj_get_properties_ioctl
+ffffffff818f3980 T drm_mode_obj_find_prop_id
+ffffffff818f39d0 T drm_mode_obj_set_property_ioctl
+ffffffff818f4000 T drm_mode_debug_printmodeline
+ffffffff818f4030 T drm_mode_create
+ffffffff818f40b0 T drm_mode_destroy
+ffffffff818f4100 T drm_mode_probed_add
+ffffffff818f41a0 T drm_cvt_mode
+ffffffff818f4690 T drm_mode_set_name
+ffffffff818f46e0 T drm_gtf_mode_complex
+ffffffff818f4a10 T drm_gtf_mode
+ffffffff818f4a60 T drm_mode_hsync
+ffffffff818f4ac0 T drm_mode_vrefresh
+ffffffff818f4b50 T drm_mode_get_hv_timing
+ffffffff818f4ba0 T drm_mode_set_crtcinfo
+ffffffff818f4dd0 T drm_mode_copy
+ffffffff818f4e40 T drm_mode_duplicate
+ffffffff818f4f10 T drm_mode_match
+ffffffff818f5090 T drm_mode_equal
+ffffffff818f50b0 T drm_mode_equal_no_clocks
+ffffffff818f50d0 T drm_mode_equal_no_clocks_no_stereo
+ffffffff818f5180 T drm_mode_validate_driver
+ffffffff818f5250 T drm_mode_validate_size
+ffffffff818f52a0 T drm_mode_validate_ycbcr420
+ffffffff818f5300 T drm_get_mode_status_name
+ffffffff818f5370 T drm_mode_prune_invalid
+ffffffff818f5410 T drm_mode_sort
+ffffffff818f5430 t drm_mode_compare
+ffffffff818f5490 T drm_connector_list_update
+ffffffff818f5660 T drm_mode_parse_command_line_for_connector
+ffffffff818f5690 T drm_mode_create_from_cmdline_mode
+ffffffff818f5770 T drm_mode_convert_to_umode
+ffffffff818f58f0 T drm_mode_convert_umode
+ffffffff818f5b50 T drm_mode_is_420_only
+ffffffff818f5ba0 T drm_mode_is_420_also
+ffffffff818f5bf0 T drm_mode_is_420
+ffffffff818f6000 T drm_helper_move_panel_connectors_to_head
+ffffffff818f60f0 T drm_helper_mode_fill_fb_struct
+ffffffff818f61b0 T drm_crtc_init
+ffffffff818f6260 T drm_mode_config_helper_suspend
+ffffffff818f62f0 T drm_mode_config_helper_resume
+ffffffff818f7000 T drm_modeset_lock_all
+ffffffff818f7270 T drm_modeset_acquire_init
+ffffffff818f7300 T drm_modeset_lock_all_ctx
+ffffffff818f73d0 T drm_modeset_backoff
+ffffffff818f7490 T drm_modeset_acquire_fini
+ffffffff818f74c0 T drm_warn_on_modeset_not_all_locked
+ffffffff818f7610 T drm_modeset_unlock_all
+ffffffff818f76f0 T drm_modeset_drop_locks
+ffffffff818f7780 T drm_modeset_unlock
+ffffffff818f7840 t modeset_lock
+ffffffff818f7ac0 T drm_modeset_lock_init
+ffffffff818f7b20 T drm_modeset_lock
+ffffffff818f7c40 T drm_modeset_lock_single_interruptible
+ffffffff818f7d60 t __ww_mutex_lock
+ffffffff818f8000 T drm_panel_init
+ffffffff818f8030 T drm_panel_add
+ffffffff818f80a0 T drm_panel_remove
+ffffffff818f80f0 T drm_panel_attach
+ffffffff818f8130 T drm_panel_detach
+ffffffff818f9000 T drm_get_panel_orientation_quirk
+ffffffff818fa000 T drm_universal_plane_init
+ffffffff818fa680 t kasprintf
+ffffffff818fa760 T drm_plane_register_all
+ffffffff818fa7f0 T drm_plane_unregister_all
+ffffffff818fa860 T drm_plane_init
+ffffffff818fa8b0 T drm_plane_cleanup
+ffffffff818faa00 T drm_plane_from_index
+ffffffff818faa60 T drm_plane_force_disable
+ffffffff818fab60 T drm_mode_plane_set_obj_prop
+ffffffff818fabe0 T drm_mode_getplane_res
+ffffffff818facc0 T drm_mode_getplane
+ffffffff818fae20 T drm_plane_check_pixel_format
+ffffffff818faee0 T drm_mode_setplane
+ffffffff818fb0f0 T drm_mode_cursor_ioctl
+ffffffff818fb150 t drm_mode_cursor_common
+ffffffff818fb690 T drm_mode_cursor2_ioctl
+ffffffff818fb6a0 T drm_mode_page_flip_ioctl
+ffffffff818fbbb0 t __setplane_atomic
+ffffffff818fbe60 t __setplane_internal
+ffffffff818fd000 T drm_plane_helper_check_update
+ffffffff818fd260 T drm_primary_helper_update
+ffffffff818fd450 t get_connectors_for_crtc
+ffffffff818fd560 T drm_primary_helper_disable
+ffffffff818fd590 T drm_primary_helper_destroy
+ffffffff818fd5c0 T drm_plane_helper_commit
+ffffffff818fd870 T drm_plane_helper_update
+ffffffff818fd9a0 T drm_plane_helper_disable
+ffffffff818fe000 T drm_prime_remove_buf_handle_locked
+ffffffff818fe0c0 T drm_gem_dmabuf_export
+ffffffff818fe110 T drm_gem_dmabuf_release
+ffffffff818fe120 T drm_gem_prime_export
+ffffffff818fe1b0 T drm_gem_prime_handle_to_fd
+ffffffff818fe360 t drm_prime_add_buf_handle
+ffffffff818fe4b0 T drm_gem_prime_import_dev
+ffffffff818fe510 T drm_gem_prime_import
+ffffffff818fe570 T drm_gem_prime_fd_to_handle
+ffffffff818fe730 T drm_prime_handle_to_fd_ioctl
+ffffffff818fe7a0 T drm_prime_fd_to_handle_ioctl
+ffffffff818fe800 T drm_prime_gem_destroy
+ffffffff818fe830 T drm_prime_init_file_private
+ffffffff818fe880 T drm_prime_destroy_file_private
+ffffffff818ff000 T __drm_puts_coredump
+ffffffff818ff0e0 T __drm_printfn_coredump
+ffffffff818ff200 T __drm_puts_seq_file
+ffffffff818ff230 T __drm_printfn_seq_file
+ffffffff818ff260 T __drm_printfn_info
+ffffffff818ff290 T __drm_printfn_debug
+ffffffff818ff2c0 T drm_puts
+ffffffff818ff2f0 T drm_printf
+ffffffff818ff370 T drm_dev_printk
+ffffffff818ff3f0 T drm_dev_dbg
+ffffffff818ff480 T drm_dbg
+ffffffff818ff510 T drm_err
+ffffffff81900000 T drm_crtc_mode_valid
+ffffffff81900040 T drm_encoder_mode_valid
+ffffffff81900080 T drm_connector_mode_valid
+ffffffff819000c0 T drm_kms_helper_poll_enable
+ffffffff819001b0 T drm_helper_probe_detect
+ffffffff81900380 T drm_helper_probe_single_connector_modes
+ffffffff81900a60 T drm_kms_helper_hotplug_event
+ffffffff81900ab0 T drm_kms_helper_poll_disable
+ffffffff81900b20 T drm_kms_helper_poll_init
+ffffffff81900b80 t output_poll_execute
+ffffffff81900da0 T drm_kms_helper_poll_fini
+ffffffff81900e10 T drm_helper_hpd_irq_event
+ffffffff81900f20 t __delayed_work_tick
+ffffffff81901000 T drm_property_create
+ffffffff819011e0 T drm_property_create_enum
+ffffffff81901290 T drm_property_add_enum
+ffffffff81901490 T drm_property_destroy
+ffffffff81901540 T drm_property_create_bitmask
+ffffffff81901670 T drm_property_create_range
+ffffffff819016d0 T drm_property_create_signed_range
+ffffffff81901740 T drm_property_create_object
+ffffffff819017d0 T drm_property_create_bool
+ffffffff81901830 T drm_mode_getproperty_ioctl
+ffffffff81901a20 T drm_property_create_blob
+ffffffff81901b50 t drm_property_free_blob
+ffffffff81901bc0 T drm_property_blob_put
+ffffffff81901bf0 T drm_property_destroy_user_blobs
+ffffffff81901c70 T drm_property_blob_get
+ffffffff81901cb0 T drm_property_lookup_blob
+ffffffff81901cd0 T drm_property_replace_global_blob
+ffffffff81901de0 T drm_property_replace_blob
+ffffffff81901e50 T drm_mode_getblob_ioctl
+ffffffff81901f00 T drm_mode_createblob_ioctl
+ffffffff81902000 T drm_mode_destroyblob_ioctl
+ffffffff81902110 T drm_property_change_valid_get
+ffffffff81902380 T drm_property_change_valid_put
+ffffffff81903000 T drm_rect_intersect
+ffffffff81903090 T drm_rect_clip_scaled
+ffffffff819032a0 T drm_rect_calc_hscale
+ffffffff81903360 T drm_rect_calc_vscale
+ffffffff81903420 T drm_rect_calc_hscale_relaxed
+ffffffff81903540 T drm_rect_calc_vscale_relaxed
+ffffffff81903660 T drm_rect_debug_print
+ffffffff81903690 T drm_rect_rotate
+ffffffff81903750 T drm_rect_rotate_inv
+ffffffff81904000 T drm_scdc_read
+ffffffff81904090 T drm_scdc_write
+ffffffff81904180 T drm_scdc_get_scrambling_status
+ffffffff81904210 T drm_scdc_set_scrambling
+ffffffff81904330 T drm_scdc_set_high_tmds_clock_ratio
+ffffffff81905000 T drm_syncobj_find
+ffffffff81905070 T drm_syncobj_add_callback
+ffffffff819050d0 T drm_syncobj_remove_callback
+ffffffff81905120 T drm_syncobj_replace_fence
+ffffffff81905230 T drm_syncobj_find_fence
+ffffffff81905300 T drm_syncobj_free
+ffffffff81905330 T drm_syncobj_create
+ffffffff81905550 T drm_syncobj_get_handle
+ffffffff81905610 T drm_syncobj_get_fd
+ffffffff81905660 T drm_syncobj_open
+ffffffff81905690 T drm_syncobj_release
+ffffffff819056c0 t drm_syncobj_release_handle
+ffffffff81905720 T drm_syncobj_create_ioctl
+ffffffff819057e0 T drm_syncobj_destroy_ioctl
+ffffffff819058b0 T drm_syncobj_handle_to_fd_ioctl
+ffffffff819059d0 T drm_syncobj_fd_to_handle_ioctl
+ffffffff81905a60 T drm_syncobj_wait_ioctl
+ffffffff81906380 t drm_syncobj_array_find
+ffffffff81906570 T drm_syncobj_reset_ioctl
+ffffffff819066b0 T drm_syncobj_signal_ioctl
+ffffffff81906940 t drm_syncobj_null_fence_get_name
+ffffffff81906970 t drm_syncobj_null_fence_enable_signaling
+ffffffff81906b10 t syncobj_wait_syncobj_func
+ffffffff81906b30 t syncobj_wait_fence_func
+ffffffff81907000 T drm_crtc_accurate_vblank_count
+ffffffff819070f0 t drm_update_vblank_count
+ffffffff81907580 T drm_vblank_disable_and_save
+ffffffff819076d0 T drm_vblank_cleanup
+ffffffff819077c0 T drm_vblank_init
+ffffffff81907950 t vblank_disable_fn
+ffffffff819079b0 T drm_crtc_vblank_waitqueue
+ffffffff819079f0 T drm_calc_timestamping_constants
+ffffffff81907b40 T drm_calc_vbltimestamp_from_scanoutpos
+ffffffff81907ff0 T drm_crtc_vblank_count
+ffffffff81908070 T drm_crtc_vblank_count_and_time
+ffffffff81908140 T drm_crtc_arm_vblank_event
+ffffffff81908220 T drm_crtc_send_vblank_event
+ffffffff81908360 T drm_crtc_vblank_get
+ffffffff81908460 T drm_crtc_vblank_put
+ffffffff81908560 T drm_wait_one_vblank
+ffffffff81908ae0 T drm_crtc_wait_one_vblank
+ffffffff81908b00 T drm_crtc_vblank_off
+ffffffff81908f20 T drm_crtc_vblank_reset
+ffffffff81909000 T drm_crtc_set_max_vblank_count
+ffffffff819090c0 T drm_crtc_vblank_on
+ffffffff819091f0 t drm_reset_vblank_timestamp
+ffffffff81909470 t drm_vblank_enable
+ffffffff81909620 T drm_vblank_restore
+ffffffff81909a40 t __get_vblank_counter
+ffffffff81909b80 T drm_crtc_vblank_restore
+ffffffff81909ba0 T drm_legacy_modeset_ctl_ioctl
+ffffffff81909e70 T drm_wait_vblank_ioctl
+ffffffff8190a900 T drm_handle_vblank
+ffffffff8190ab80 t drm_handle_vblank_events
+ffffffff8190ae90 T drm_crtc_handle_vblank
+ffffffff8190aeb0 T drm_crtc_get_sequence_ioctl
+ffffffff8190b180 T drm_crtc_queue_sequence_ioctl
+ffffffff8190c000 T drm_vma_offset_manager_init
+ffffffff8190c050 T drm_vma_offset_manager_destroy
+ffffffff8190c080 T drm_vma_offset_lookup
+ffffffff8190c130 T drm_vma_offset_lookup_locked
+ffffffff8190c1b0 T drm_vma_offset_add
+ffffffff8190c300 T drm_vma_offset_remove
+ffffffff8190c3d0 T drm_vma_node_allow
+ffffffff8190c500 T drm_vma_node_revoke
+ffffffff8190c580 T drm_vma_node_is_allowed
+ffffffff8190d000 T hdmi_avi_infoframe_init
+ffffffff8190d080 T hdmi_avi_infoframe_pack
+ffffffff8190d2d0 T hdmi_spd_infoframe_init
+ffffffff8190d370 T hdmi_spd_infoframe_pack
+ffffffff8190d4b0 T hdmi_audio_infoframe_init
+ffffffff8190d500 T hdmi_audio_infoframe_pack
+ffffffff8190d690 T hdmi_vendor_infoframe_init
+ffffffff8190d6f0 T hdmi_vendor_infoframe_pack
+ffffffff8190d8a0 T hdmi_infoframe_pack
+ffffffff8190dbd0 T hdmi_infoframe_log
+ffffffff8190e790 T hdmi_infoframe_unpack
+ffffffff8190f000 T list_sort
+ffffffff81910000 T radix_tree_lookup
+ffffffff819100b0 T radix_tree_iter_find
+ffffffff819101c0 T radix_tree_delete
+ffffffff81910360 T radix_tree_iter_delete
+ffffffff81910380 T radix_tree_insert
+ffffffff81911000 T reservation_object_reserve_shared
+ffffffff819110e0 T reservation_object_add_shared_fence
+ffffffff81911570 T reservation_object_add_excl_fence
+ffffffff819116c0 T reservation_object_copy_fences
+ffffffff819119c0 T reservation_object_get_fences_rcu
+ffffffff81911ea0 T reservation_object_wait_timeout_rcu
+ffffffff819122c0 T reservation_object_test_signaled_rcu
+ffffffff81912400 t reservation_object_test_signaled_single
+ffffffff81913000 T ttm_agp_tt_create
+ffffffff819130a0 T ttm_agp_tt_populate
+ffffffff819130d0 T ttm_agp_tt_unpopulate
+ffffffff819130e0 t ttm_agp_bind
+ffffffff819131e0 t ttm_agp_unbind
+ffffffff819132a0 t ttm_agp_destroy
+ffffffff81914000 T ttm_get_kobj
+ffffffff81914030 T ttm_bo_add_to_lru
+ffffffff81914150 T ttm_bo_del_from_lru
+ffffffff81914240 t kref_put
+ffffffff81914280 T ttm_bo_del_sub_from_lru
+ffffffff81914370 T ttm_bo_move_to_lru_tail
+ffffffff81914540 T ttm_bo_put
+ffffffff819145f0 T ttm_bo_unref
+ffffffff81914610 T ttm_bo_lock_delayed_workqueue
+ffffffff81914680 T ttm_bo_unlock_delayed_workqueue
+ffffffff819146f0 T ttm_bo_eviction_valuable
+ffffffff81914750 T ttm_bo_mem_put
+ffffffff819147a0 T ttm_bo_mem_space
+ffffffff81914c70 t ttm_bo_add_move_fence
+ffffffff81914d10 T ttm_bo_mem_compat
+ffffffff81914ea0 T ttm_bo_validate
+ffffffff81914ff0 T ttm_bo_init_reserved
+ffffffff819156d0 t ttm_bo_default_destroy
+ffffffff819156f0 T ttm_bo_init
+ffffffff81915960 T ttm_bo_acc_size
+ffffffff819159d0 T ttm_bo_dma_acc_size
+ffffffff81915a50 T ttm_bo_create
+ffffffff81915b60 T ttm_bo_clean_mm
+ffffffff81915c80 t ttm_bo_force_list_clean
+ffffffff81915f30 t dma_fence_put
+ffffffff81915f90 T ttm_bo_evict_mm
+ffffffff81916010 T ttm_bo_init_mm
+ffffffff819161d0 T ttm_bo_global_release
+ffffffff81916220 T ttm_bo_global_init
+ffffffff81916320 T ttm_bo_device_release
+ffffffff81916450 t ttm_bo_delayed_delete
+ffffffff81916750 T ttm_bo_device_init
+ffffffff81916890 t ttm_bo_delayed_workqueue
+ffffffff81916920 T ttm_mem_reg_is_pci
+ffffffff81916980 T ttm_bo_unmap_virtual_locked
+ffffffff81916a90 T ttm_bo_unmap_virtual
+ffffffff81916ae0 T ttm_bo_wait
+ffffffff81916b90 T ttm_bo_synccpu_write_grab
+ffffffff81916ef0 T ttm_bo_synccpu_write_release
+ffffffff81916f20 T ttm_bo_swapout
+ffffffff81917490 t ttm_bo_cleanup_refs
+ffffffff81917940 t ttm_bo_release_list
+ffffffff81917c50 t ttm_bo_handle_move_mem
+ffffffff81918030 T ttm_bo_swapout_all
+ffffffff819180b0 T ttm_bo_wait_unreserved
+ffffffff81918200 t reservation_object_lock_interruptible
+ffffffff81918320 t ttm_bo_cleanup_refs_or_queue
+ffffffff81918bc0 t ttm_mem_evict_first
+ffffffff81919480 t ttm_bo_global_kobj_release
+ffffffff819194a0 t __delayed_work_tick
+ffffffff8191a000 t ttm_bo_man_init
+ffffffff8191a090 t ttm_bo_man_takedown
+ffffffff8191a120 t ttm_bo_man_get_node
+ffffffff8191a240 t ttm_bo_man_put_node
+ffffffff8191a2c0 t ttm_bo_man_debug
+ffffffff8191b000 T ttm_bo_free_old_node
+ffffffff8191b010 T ttm_bo_move_ttm
+ffffffff8191b120 T ttm_mem_io_lock
+ffffffff8191b190 T ttm_mem_io_unlock
+ffffffff8191b1d0 T ttm_mem_io_reserve
+ffffffff8191b2e0 T ttm_mem_io_free
+ffffffff8191b350 T ttm_mem_io_reserve_vm
+ffffffff8191b420 T ttm_mem_io_free_vm
+ffffffff8191b4e0 T ttm_kmap_atomic_prot
+ffffffff8191b540 T ttm_kunmap_atomic_prot
+ffffffff8191b570 T ttm_bo_move_memcpy
+ffffffff8191bc20 t ttm_mem_reg_ioremap
+ffffffff8191bdf0 T ttm_io_prot
+ffffffff8191be30 T ttm_bo_kmap
+ffffffff8191c100 T ttm_bo_kunmap
+ffffffff8191c280 T ttm_bo_move_accel_cleanup
+ffffffff8191c410 t ttm_buffer_object_transfer
+ffffffff8191c680 t ttm_bo_unreserve
+ffffffff8191c760 T ttm_bo_pipeline_move
+ffffffff8191ca10 T ttm_bo_pipeline_gutting
+ffffffff8191cb30 t ttm_transfered_destroy
+ffffffff8191d000 T ttm_bo_vm_fault
+ffffffff8191d5c0 t ttm_bo_unreserve
+ffffffff8191d6a0 T ttm_bo_vm_reference
+ffffffff8191d6d0 T ttm_bo_vm_detach
+ffffffff8191d710 T ttm_bo_mmap
+ffffffff8191e000 T ttm_eu_backoff_reservation
+ffffffff8191e140 T ttm_eu_reserve_buffers
+ffffffff8191e600 T ttm_eu_fence_buffer_objects
+ffffffff8191e760 t __ww_mutex_lock
+ffffffff8191f000 T ttm_mem_global_init
+ffffffff8191f220 t ttm_shrink_work
+ffffffff8191f2f0 T ttm_mem_global_release
+ffffffff8191f3d0 T ttm_mem_global_free
+ffffffff8191f430 T ttm_check_under_lowerlimit
+ffffffff8191f490 T ttm_mem_global_alloc
+ffffffff8191f4b0 t ttm_mem_global_alloc_zone
+ffffffff8191f740 T ttm_mem_global_alloc_page
+ffffffff8191f780 T ttm_mem_global_free_page
+ffffffff8191f820 T ttm_round_pot
+ffffffff8191f880 T ttm_get_kernel_zone_memory_size
+ffffffff8191f8b0 t ttm_mem_zone_kobj_release
+ffffffff81920000 T ttm_page_alloc_init
+ffffffff81920380 T ttm_page_alloc_fini
+ffffffff819204a0 t ttm_page_pool_free
+ffffffff819207e0 T ttm_pool_populate
+ffffffff81920e20 T ttm_pool_unpopulate
+ffffffff81920ed0 T ttm_populate_and_map_pages
+ffffffff81921080 T ttm_unmap_and_unpopulate_pages
+ffffffff81921130 T ttm_page_alloc_debugfs
+ffffffff81921160 t ttm_pool_kobj_release
+ffffffff81921180 t ttm_pool_shrink_count
+ffffffff81921210 t ttm_pool_shrink_scan
+ffffffff819213a0 t ttm_put_pages
+ffffffff81921540 t ttm_alloc_new_pages
+ffffffff81922000 T ttm_tt_create
+ffffffff819220d0 T ttm_tt_set_placement_caching
+ffffffff819221a0 T ttm_tt_destroy
+ffffffff819222e0 T ttm_tt_unbind
+ffffffff81922350 T ttm_tt_unpopulate
+ffffffff81922410 T ttm_tt_init_fields
+ffffffff81922470 T ttm_tt_init
+ffffffff81922530 T ttm_tt_fini
+ffffffff81922580 T ttm_dma_tt_init
+ffffffff81922720 T ttm_sg_tt_init
+ffffffff81922900 T ttm_dma_tt_fini
+ffffffff81922980 T ttm_tt_bind
+ffffffff81922a20 T ttm_tt_populate
+ffffffff81922a70 T ttm_tt_swapin
+ffffffff81922ba0 T ttm_tt_swapout
+ffffffff81923000 T drm_sched_entity_init
+ffffffff81923130 T drm_sched_entity_flush
+ffffffff819234a0 T drm_sched_entity_fini
+ffffffff819238d0 t drm_sched_entity_kill_jobs_cb
+ffffffff81923980 T drm_sched_entity_destroy
+ffffffff819239d0 T drm_sched_entity_set_rq
+ffffffff81923af0 T drm_sched_dependency_optimized
+ffffffff81923c10 T drm_sched_entity_push_job
+ffffffff81923d80 T drm_sched_hw_job_reset
+ffffffff81924050 T drm_sched_job_recovery
+ffffffff81924360 t drm_sched_process_job
+ffffffff81924440 T drm_sched_job_init
+ffffffff81924550 t drm_sched_job_finish
+ffffffff81924730 t drm_sched_job_timedout
+ffffffff81924750 T drm_sched_init
+ffffffff81924980 t drm_sched_main
+ffffffff819253f0 T drm_sched_fini
+ffffffff81925430 t __delayed_work_tick
+ffffffff81925450 t drm_sched_select_entity
+ffffffff81925570 t drm_sched_entity_clear_dep
+ffffffff819255e0 t drm_sched_entity_wakeup
+ffffffff819256e0 t drm_sched_job_finish_cb
+ffffffff81926000 T drm_sched_fence_slab_init
+ffffffff81926060 T drm_sched_fence_slab_fini
+ffffffff81926080 T drm_sched_fence_scheduled
+ffffffff81926160 T drm_sched_fence_finished
+ffffffff81926240 t drm_sched_fence_get_driver_name
+ffffffff81926270 t drm_sched_fence_get_timeline_name
+ffffffff819262b0 t drm_sched_fence_release_scheduled
+ffffffff81926340 t drm_sched_fence_release_finished
+ffffffff819263c0 T to_drm_sched_fence
+ffffffff81926420 T drm_sched_fence_create
+ffffffff81927000 T chash_table_alloc
+ffffffff81927150 T chash_table_free
+ffffffff81927170 T __chash_table_copy_in
+ffffffff81927330 t chash_table_find
+ffffffff81927770 T __chash_table_copy_out
+ffffffff819278c0 t chash_iter_relocate
+ffffffff81928000 t ch7017_init
+ffffffff819280e0 t ch7017_dpms
+ffffffff81928330 t ch7017_mode_valid
+ffffffff81928370 t ch7017_mode_set
+ffffffff819285e0 t ch7017_detect
+ffffffff81928610 t ch7017_get_hw_state
+ffffffff81928690 t ch7017_destroy
+ffffffff819286e0 t ch7017_dump_regs
+ffffffff81929000 t ch7xxx_init
+ffffffff81929150 t ch7xxx_dpms
+ffffffff819291e0 t ch7xxx_mode_valid
+ffffffff81929220 t ch7xxx_mode_set
+ffffffff81929490 t ch7xxx_detect
+ffffffff819295e0 t ch7xxx_get_hw_state
+ffffffff81929660 t ch7xxx_destroy
+ffffffff819296b0 t ch7xxx_dump_regs
+ffffffff8192a000 t ivch_init
+ffffffff8192a250 t ivch_dpms
+ffffffff8192a4a0 t ivch_mode_valid
+ffffffff8192a4e0 t ivch_mode_set
+ffffffff8192a710 t ivch_detect
+ffffffff8192a740 t ivch_get_hw_state
+ffffffff8192a870 t ivch_destroy
+ffffffff8192a8c0 t ivch_dump_regs
+ffffffff8192b000 t ns2501_init
+ffffffff8192b130 t ns2501_dpms
+ffffffff8192b5d0 t ns2501_mode_valid
+ffffffff8192b650 t ns2501_mode_set
+ffffffff8192bda0 t ns2501_detect
+ffffffff8192bdd0 t ns2501_get_hw_state
+ffffffff8192be60 t ns2501_destroy
+ffffffff8192c000 t sil164_init
+ffffffff8192c130 t sil164_dpms
+ffffffff8192c200 t sil164_mode_valid
+ffffffff8192c230 t sil164_mode_set
+ffffffff8192c260 t sil164_detect
+ffffffff8192c2f0 t sil164_get_hw_state
+ffffffff8192c380 t sil164_destroy
+ffffffff8192c3d0 t sil164_dump_regs
+ffffffff8192d000 t tfp410_init
+ffffffff8192d1d0 t tfp410_dpms
+ffffffff8192d2a0 t tfp410_mode_valid
+ffffffff8192d2d0 t tfp410_mode_set
+ffffffff8192d300 t tfp410_detect
+ffffffff8192d3a0 t tfp410_get_hw_state
+ffffffff8192d430 t tfp410_destroy
+ffffffff8192d480 t tfp410_dump_regs
+ffffffff8192e000 T intel_engine_init_cmd_parser
+ffffffff8192e610 t gen7_render_get_cmd_length_mask
+ffffffff8192e670 t gen7_bsd_get_cmd_length_mask
+ffffffff8192e6e0 t gen7_blt_get_cmd_length_mask
+ffffffff8192e720 t gen9_blt_get_cmd_length_mask
+ffffffff8192e760 T intel_engine_cleanup_cmd_parser
+ffffffff8192e830 T intel_engine_cmd_parser
+ffffffff8192f330 T i915_cmd_parser_get_version
+ffffffff81930000 T __i915_printk
+ffffffff81930070 T i915_get_bridge_dev
+ffffffff819300f0 T i915_driver_load
+ffffffff81930c00 T i915_reset
+ffffffff81930f40 T i915_reset_engine
+ffffffff819310b0 T vlv_force_gfx_clock
+ffffffff819311a0 T intagpsubmatch
+ffffffff819311f0 T intagp_print
+ffffffff81931240 T inteldrm_wsioctl
+ffffffff819313a0 T inteldrm_wsmmap
+ffffffff819313d0 T inteldrm_alloc_screen
+ffffffff81931400 T inteldrm_free_screen
+ffffffff81931420 T inteldrm_show_screen
+ffffffff819314f0 T inteldrm_load_font
+ffffffff81931510 T inteldrm_list_font
+ffffffff81931530 T inteldrm_scrollback
+ffffffff81931550 T inteldrm_getchar
+ffffffff81931570 T inteldrm_burner
+ffffffff819315f0 T inteldrm_enter_ddb
+ffffffff81931650 T inteldrm_doswitch
+ffffffff819316e0 T inteldrm_burner_cb
+ffffffff81931700 T inteldrm_backlight_update_status
+ffffffff81931750 T inteldrm_backlight_get_brightness
+ffffffff819317a0 T inteldrm_match
+ffffffff81931820 T inteldrm_attach
+ffffffff81931bd0 T inteldrm_detach
+ffffffff81931c00 T inteldrm_activate
+ffffffff819335a0 T inteldrm_intr
+ffffffff819335f0 T inteldrm_attachhook
+ffffffff81933830 T inteldrm_forcedetach
+ffffffff81933870 T inteldrm_init_backlight
+ffffffff81933a50 T inteldrm_native_backlight
+ffffffff81933b30 T inteldrm_firmware_backlight
+ffffffff81933c30 t i915_engines_cleanup
+ffffffff81933d30 t intel_pch_match
+ffffffff81933d80 t intel_pch_type
+ffffffff819341a0 t i915_driver_open
+ffffffff819341b0 t i915_driver_postclose
+ffffffff81934210 t i915_driver_lastclose
+ffffffff81934220 t i915_getparam_ioctl
+ffffffff81934870 t i915_gem_reject_pin_ioctl
+ffffffff819348a0 t vlv_wait_for_pw_status
+ffffffff81935000 T i915_mutex_lock_interruptible
+ffffffff819351c0 T i915_gem_park
+ffffffff81935290 T i915_gem_unpark
+ffffffff81935440 T i915_gem_get_aperture_ioctl
+ffffffff81935520 T i915_gem_object_unbind
+ffffffff819355f0 T i915_gem_object_set_to_cpu_domain
+ffffffff819356f0 T i915_gem_object_wait_priority
+ffffffff81935910 T i915_gem_object_wait
+ffffffff81935cf0 T i915_gem_object_alloc
+ffffffff81935d10 T i915_gem_object_free
+ffffffff81935d30 T i915_gem_dumb_create
+ffffffff81935e10 T i915_gem_create_ioctl
+ffffffff81935f40 T i915_gem_flush_ggtt_writes
+ffffffff81935fa0 T i915_gem_obj_prepare_shmem_read
+ffffffff81936150 t flush_write_domain
+ffffffff819362d0 T i915_gem_obj_prepare_shmem_write
+ffffffff819364a0 T i915_gem_pread_ioctl
+ffffffff81936ee0 T i915_gem_pwrite_ioctl
+ffffffff81937af0 T i915_gem_set_domain_ioctl
+ffffffff81937d50 T i915_gem_object_set_to_wc_domain
+ffffffff81937f20 T i915_gem_object_set_to_gtt_domain
+ffffffff819380e0 t i915_gem_object_bump_inactive_ggtt
+ffffffff81938260 T i915_gem_sw_finish_ioctl
+ffffffff81938330 T i915_gem_object_flush_if_display
+ffffffff819383c0 T i915_gem_mmap_ioctl
+ffffffff819385a0 T i915_gem_mmap_gtt_version
+ffffffff819385d0 T i915_gem_fault
+ffffffff81938d40 T i915_gem_object_ggtt_pin
+ffffffff81938d70 T i915_gem_release_mmap
+ffffffff81938db0 t __i915_gem_object_release_mmap
+ffffffff81938f50 T i915_gem_runtime_suspend
+ffffffff81939030 T i915_gem_mmap_gtt
+ffffffff81939150 T i915_gem_mmap_gtt_ioctl
+ffffffff81939170 T __i915_gem_object_invalidate
+ffffffff81939250 T __i915_gem_object_put_pages
+ffffffff81939350 t __i915_gem_object_unset_pages
+ffffffff81939490 T __i915_gem_object_set_pages
+ffffffff819397b0 T __i915_gem_object_get_pages
+ffffffff81939910 T i915_gem_object_pin_map
+ffffffff81939db0 T i915_gem_find_active_request
+ffffffff81939ea0 T i915_gem_reset_prepare_engine
+ffffffff81939f10 T i915_gem_reset_prepare
+ffffffff81939fe0 T i915_gem_reset_engine
+ffffffff8193a300 T i915_gem_reset
+ffffffff8193a460 T i915_gem_reset_finish_engine
+ffffffff8193a490 T i915_gem_reset_finish
+ffffffff8193a670 T i915_gem_set_wedged
+ffffffff8193ac30 t nop_submit_request
+ffffffff8193ac50 t nop_complete_submit_request
+ffffffff8193aca0 T i915_gem_unset_wedged
+ffffffff8193ade0 T i915_gem_close_object
+ffffffff8193b020 T __i915_gem_object_release_unless_active
+ffffffff8193b080 T i915_gem_wait_ioctl
+ffffffff8193b2a0 T i915_gem_wait_for_idle
+ffffffff8193b670 t wait_for_timeline
+ffffffff8193b810 T i915_gem_object_set_cache_level
+ffffffff8193ba00 T i915_gem_get_caching_ioctl
+ffffffff8193ba80 T i915_gem_set_caching_ioctl
+ffffffff8193bbf0 T i915_gem_object_pin_to_display_plane
+ffffffff8193bd40 T i915_gem_object_unpin_from_display_plane
+ffffffff8193be50 T i915_gem_object_pin
+ffffffff8193c0b0 t i915_ggtt_offset
+ffffffff8193c200 T i915_gem_busy_ioctl
+ffffffff8193c380 T i915_gem_throttle_ioctl
+ffffffff8193c570 T i915_gem_madvise_ioctl
+ffffffff8193c8f0 T i915_gem_object_init
+ffffffff8193ca70 t frontbuffer_retire
+ffffffff8193cab0 T i915_gem_object_create
+ffffffff8193cb80 T i915_gem_free_object
+ffffffff8193ccf0 T i915_gem_sanitize
+ffffffff8193cdb0 T i915_gem_suspend
+ffffffff8193cf40 t assert_kernel_context_is_current
+ffffffff8193d210 T i915_gem_suspend_late
+ffffffff8193d2e0 T i915_gem_resume
+ffffffff8193d3a0 T i915_gem_init_hw
+ffffffff8193db30 T i915_gem_init_swizzling
+ffffffff8193dca0 T i915_gem_init
+ffffffff8193e350 T i915_gem_cleanup_engines
+ffffffff8193e450 T i915_gem_fini
+ffffffff8193e610 T i915_gem_init_mmio
+ffffffff8193e620 T i915_gem_load_init_fences
+ffffffff8193e720 T i915_gem_init_early
+ffffffff8193ea50 t i915_gem_retire_work_handler
+ffffffff8193eb10 t i915_gem_idle_work_handler
+ffffffff8193efc0 T i915_gem_cleanup_early
+ffffffff8193f0d0 T i915_gem_freeze
+ffffffff8193f110 T i915_gem_freeze_late
+ffffffff8193f220 T i915_gem_release
+ffffffff8193f270 T i915_gem_open
+ffffffff8193f340 T i915_gem_track_fb
+ffffffff8193f3e0 T i915_gem_object_create_from_data
+ffffffff8193f430 T i915_gem_object_get_sg
+ffffffff8193f760 T i915_gem_object_get_page
+ffffffff8193f800 T i915_gem_object_get_dirty_page
+ffffffff8193f8b0 T i915_gem_object_get_dma_address
+ffffffff8193f8f0 T i915_gem_object_attach_phys
+ffffffff8193fc70 t __fence_set_priority
+ffffffff8193fd90 t i915_gem_object_wait_fence
+ffffffff8193ff00 t i915_gem_object_get_pages_gtt
+ffffffff819402b0 t i915_gem_object_put_pages_gtt
+ffffffff819403f0 t i915_gem_object_pwrite_gtt
+ffffffff81940570 t __i915_gem_object_release_shmem
+ffffffff81940650 t __i915_gem_free_objects
+ffffffff81940d00 t __i915_gem_free_work
+ffffffff81940db0 t __delayed_work_tick
+ffffffff81940dd0 t __sleep_work
+ffffffff81940e20 t i915_gem_object_get_pages_phys
+ffffffff819410a0 t i915_gem_object_put_pages_phys
+ffffffff819412e0 t i915_gem_object_release_phys
+ffffffff81942000 T i915_gem_batch_pool_init
+ffffffff81942060 T i915_gem_batch_pool_fini
+ffffffff81942160 T i915_gem_batch_pool_get
+ffffffff81943000 T i915_gem_clflush_object
+ffffffff81943440 t i915_clflush_notify
+ffffffff819434d0 t i915_clflush_work
+ffffffff81943750 t i915_clflush_get_driver_name
+ffffffff81943780 t i915_clflush_get_timeline_name
+ffffffff819437b0 t i915_clflush_enable_signaling
+ffffffff819437e0 t i915_clflush_release
+ffffffff81944000 T i915_gem_context_release
+ffffffff81944080 T i915_gem_context_create_gvt
+ffffffff819440b0 T i915_gem_context_create_kernel
+ffffffff81944150 t i915_gem_create_context
+ffffffff819445f0 T i915_gem_contexts_init
+ffffffff81944850 t contexts_free_worker
+ffffffff819448c0 T i915_gem_contexts_lost
+ffffffff81944980 T i915_gem_contexts_fini
+ffffffff81944a40 T i915_gem_context_open
+ffffffff81944b10 T i915_gem_context_close
+ffffffff81944b50 t context_idr_cleanup
+ffffffff81944b90 T i915_gem_switch_to_kernel_context
+ffffffff81944ed0 T i915_gem_context_create_ioctl
+ffffffff81944fd0 T i915_gem_context_destroy_ioctl
+ffffffff81945120 T i915_gem_context_getparam_ioctl
+ffffffff81945280 T i915_gem_context_setparam_ioctl
+ffffffff819454c0 T i915_gem_context_reset_stats_ioctl
+ffffffff81945570 t i915_gem_context_free
+ffffffff81945730 t kasprintf
+ffffffff81945810 t context_close
+ffffffff81946000 T i915_gem_prime_export
+ffffffff81946090 T i915_gem_prime_import
+ffffffff81947000 T i915_gem_evict_something
+ffffffff81947400 t ggtt_is_idle
+ffffffff81947510 T i915_gem_evict_for_node
+ffffffff81947860 T i915_gem_evict_vm
+ffffffff81948000 T i915_gem_execbuffer_ioctl
+ffffffff819482f0 t i915_gem_do_execbuffer
+ffffffff81949260 T i915_gem_execbuffer2_ioctl
+ffffffff81949620 t eb_release_vmas
+ffffffff81949790 t eb_lookup_vmas
+ffffffff8194a670 t eb_relocate_vma
+ffffffff8194a890 t eb_relocate_slow
+ffffffff8194afb0 t eb_relocate_entry
+ffffffff8194bd10 t reloc_cache_reset
+ffffffff8194bf40 t reloc_gpu_flush
+ffffffff8194d000 T i915_vma_put_fence
+ffffffff8194d040 t fence_update
+ffffffff8194d330 T i915_vma_pin_fence
+ffffffff8194d670 T i915_reserve_fence
+ffffffff8194d7b0 T i915_unreserve_fence
+ffffffff8194d800 T i915_gem_revoke_fences
+ffffffff8194d8c0 T i915_gem_restore_fences
+ffffffff8194da90 t fence_write
+ffffffff8194e150 T i915_gem_detect_bit_6_swizzle
+ffffffff8194e420 T i915_gem_object_do_bit_17_swizzle
+ffffffff8194ea50 T i915_gem_object_save_bit_17_swizzle
+ffffffff8194f000 T intel_sanitize_enable_ppgtt
+ffffffff8194f150 T gen6_ppgtt_pin
+ffffffff8194f290 T gen6_ppgtt_unpin
+ffffffff8194f3c0 T i915_ppgtt_init_hw
+ffffffff8194fa70 T i915_ppgtt_create
+ffffffff81950b70 T i915_ppgtt_close
+ffffffff81950bf0 T i915_ppgtt_release
+ffffffff81950d90 t i915_address_space_fini
+ffffffff81950e20 T i915_check_and_clear_faults
+ffffffff81950f90 T i915_gem_suspend_gtt_mappings
+ffffffff81951010 T i915_gem_gtt_prepare_pages
+ffffffff81951040 T i915_gem_gtt_finish_pages
+ffffffff819510c0 T i915_gem_init_aliasing_ppgtt
+ffffffff81951240 t ggtt_bind_vma
+ffffffff819512e0 t aliasing_gtt_bind_vma
+ffffffff819513e0 t ggtt_unbind_vma
+ffffffff81951430 t aliasing_gtt_unbind_vma
+ffffffff819514f0 T i915_gem_fini_aliasing_ppgtt
+ffffffff81951570 T i915_gem_init_ggtt
+ffffffff819516c0 T i915_ggtt_cleanup_hw
+ffffffff81951880 T intel_ppat_get
+ffffffff81951b20 t __alloc_ppat_entry
+ffffffff81951c20 T intel_ppat_put
+ffffffff81951d00 T i915_ggtt_probe_hw
+ffffffff819525c0 T i915_ggtt_init_hw
+ffffffff819527b0 t i915_address_space_init
+ffffffff819528c0 t i915_gtt_color_adjust
+ffffffff81952910 T i915_ggtt_enable_hw
+ffffffff81952960 T i915_ggtt_enable_guc
+ffffffff81952a10 t gen6_ggtt_invalidate
+ffffffff81952a40 t guc_ggtt_invalidate
+ffffffff81952a90 T i915_ggtt_disable_guc
+ffffffff81952b10 T i915_gem_restore_gtt_mappings
+ffffffff81952d40 T i915_gem_gtt_reserve
+ffffffff81952fa0 T i915_gem_gtt_insert
+ffffffff81953500 t gen6_alloc_va_range
+ffffffff81953850 t gen6_ppgtt_clear_range
+ffffffff819539d0 t gen6_ppgtt_insert_entries
+ffffffff81953bb0 t gen6_ppgtt_cleanup
+ffffffff81953cc0 t gen6_dump_ppgtt
+ffffffff81953d40 t ppgtt_bind_vma
+ffffffff81953dd0 t ppgtt_unbind_vma
+ffffffff81953e00 t ppgtt_set_pages
+ffffffff81953eb0 t clear_pages
+ffffffff81953f70 t setup_page_dma
+ffffffff81954550 t vm_free_pages_release
+ffffffff81954710 t pd_vma_bind
+ffffffff819549a0 t pd_vma_unbind
+ffffffff81954aa0 t pd_vma_set_pages
+ffffffff81954ad0 t pd_vma_clear_pages
+ffffffff81954b50 t gen8_ppgtt_alloc_4lvl
+ffffffff81954d60 t gen8_ppgtt_insert_4lvl
+ffffffff81955270 t gen8_ppgtt_clear_4lvl
+ffffffff81955420 t gen8_ppgtt_alloc_3lvl
+ffffffff81955440 t gen8_ppgtt_insert_3lvl
+ffffffff81955510 t gen8_ppgtt_clear_3lvl
+ffffffff81955530 t gen8_ppgtt_notify_vgt
+ffffffff81955710 t gen8_ppgtt_cleanup
+ffffffff819558d0 t gen8_dump_ppgtt
+ffffffff81955be0 t alloc_pdp
+ffffffff81955da0 t gen8_ppgtt_alloc_pdp
+ffffffff81956480 t free_pdp
+ffffffff81956550 t gen8_ppgtt_clear_pdp
+ffffffff81956790 t gen8_ppgtt_clear_pd
+ffffffff81956b30 t gen8_ppgtt_insert_pte_entries
+ffffffff81956df0 t gen8_ppgtt_cleanup_3lvl
+ffffffff81956f70 t __free_ppat_entry
+ffffffff81957080 t i915_ggtt_insert_page
+ffffffff819570b0 t i915_ggtt_insert_entries
+ffffffff819570f0 t i915_ggtt_clear_range
+ffffffff81957110 t i915_gmch_remove
+ffffffff81957120 t gmch_ggtt_invalidate
+ffffffff81957130 t ggtt_set_pages
+ffffffff819572f0 t intel_rotate_pages
+ffffffff81957650 t intel_partial_pages
+ffffffff819577f0 t gen6_ggtt_clear_range
+ffffffff819579c0 t gen6_ggtt_insert_page
+ffffffff81957a70 t gen6_ggtt_insert_entries
+ffffffff81957c00 t gen6_gmch_remove
+ffffffff81957c20 t iris_pte_encode
+ffffffff81957c70 t hsw_pte_encode
+ffffffff81957cc0 t byt_pte_encode
+ffffffff81957d10 t ivb_pte_encode
+ffffffff81957d90 t snb_pte_encode
+ffffffff81957e10 t ggtt_probe_common
+ffffffff81958010 t gen8_ggtt_insert_page
+ffffffff819580b0 t nop_clear_range
+ffffffff819580e0 t gen8_ggtt_clear_range
+ffffffff819582b0 t gen8_ggtt_insert_entries
+ffffffff81958400 t cnl_private_pat_update_hw
+ffffffff81958550 t bdw_private_pat_match
+ffffffff819585a0 t bdw_private_pat_update_hw
+ffffffff81958740 t chv_private_pat_match
+ffffffff81959000 T i915_gem_object_create_internal
+ffffffff81959130 t i915_gem_object_get_pages_internal
+ffffffff81959390 t i915_gem_object_put_pages_internal
+ffffffff819593e0 t internal_free_pages
+ffffffff8195a000 T i915_gem_object_set_cache_coherency
+ffffffff8195b000 T i915_gem_render_state_emit
+ffffffff8195c000 T i915_gem_shrink
+ffffffff8195c400 T i915_gem_shrink_all
+ffffffff8195c460 T i915_gem_shrinker_register
+ffffffff8195c4f0 t i915_gem_shrinker_scan
+ffffffff8195c640 t i915_gem_shrinker_count
+ffffffff8195c7e0 T i915_gem_shrinker_unregister
+ffffffff8195c800 T i915_gem_shrinker_taints_mutex
+ffffffff8195d000 T i915_gem_stolen_insert_node_in_range
+ffffffff8195d0f0 T i915_gem_stolen_insert_node
+ffffffff8195d1c0 T i915_gem_stolen_remove_node
+ffffffff8195d200 T i915_gem_cleanup_stolen
+ffffffff8195d240 T i915_gem_init_stolen
+ffffffff8195d870 T i915_gem_object_create_stolen
+ffffffff8195d9c0 t _i915_gem_object_create_stolen
+ffffffff8195da80 T i915_gem_object_create_stolen_for_preallocated
+ffffffff8195dea0 t i915_gem_object_get_pages_stolen
+ffffffff8195dff0 t i915_gem_object_put_pages_stolen
+ffffffff8195e020 t i915_gem_object_release_stolen
+ffffffff8195f000 T i915_gem_fence_size
+ffffffff8195f170 T i915_gem_fence_alignment
+ffffffff8195f200 T i915_gem_object_set_tiling
+ffffffff8195f9c0 T i915_gem_set_tiling_ioctl
+ffffffff8195fbb0 T i915_gem_get_tiling_ioctl
+ffffffff81960000 T i915_gem_userptr_ioctl
+ffffffff81960030 T i915_gem_init_userptr
+ffffffff81960130 T i915_gem_cleanup_userptr
+ffffffff81961000 T i915_gemfs_init
+ffffffff81961030 T i915_gemfs_fini
+ffffffff81962000 T i915_error_printf
+ffffffff81962070 t i915_error_vprintf
+ffffffff819621d0 T i915_error_state_to_str
+ffffffff81963aa0 t print_error_buffers
+ffffffff81963ca0 t i915_error_puts
+ffffffff81963dc0 T i915_error_state_buf_init
+ffffffff81963ed0 T __i915_gpu_state_free
+ffffffff81964a60 T i915_capture_gpu_state
+ffffffff81966450 T i915_capture_error_state
+ffffffff81966720 T i915_first_error_state
+ffffffff81966780 T i915_reset_error_state
+ffffffff81966810 t __i915_printfn_error
+ffffffff81966830 t i915_error_object_create
+ffffffff81966b30 t record_request
+ffffffff81966ce0 t capture_error_bo
+ffffffff81967000 T i915_hotplug_interrupt_update
+ffffffff819670b0 T ilk_update_display_irq
+ffffffff819671b0 T gen5_enable_gt_irq
+ffffffff81967240 T gen5_disable_gt_irq
+ffffffff81967290 T gen6_unmask_pm_irq
+ffffffff819673a0 T gen6_mask_pm_irq
+ffffffff819674b0 T gen11_reset_rps_interrupts
+ffffffff819675a0 T gen6_reset_rps_interrupts
+ffffffff81967680 T gen6_enable_rps_interrupts
+ffffffff81967910 T gen6_disable_rps_interrupts
+ffffffff81967c00 T gen9_reset_guc_interrupts
+ffffffff81967d20 T gen9_enable_guc_interrupts
+ffffffff81967f50 T gen9_disable_guc_interrupts
+ffffffff819680d0 T bdw_update_pipe_irq
+ffffffff819681e0 T ibx_display_interrupt_update
+ffffffff819682b0 T i915_pipestat_enable_mask
+ffffffff819683f0 T i915_enable_pipestat
+ffffffff81968520 T i915_disable_pipestat
+ffffffff81968640 T intel_get_crtc_scanline
+ffffffff819686a0 t __intel_get_crtc_scanline
+ffffffff819688a0 T gen6_rps_reset_ei
+ffffffff819688f0 T i915_handle_error
+ffffffff81969120 T gen8_irq_power_well_post_enable
+ffffffff819692d0 T gen8_irq_power_well_pre_disable
+ffffffff81969430 T valleyview_enable_display_irqs
+ffffffff819694a0 t vlv_display_irq_reset
+ffffffff819696c0 t vlv_display_irq_postinstall
+ffffffff81969960 T valleyview_disable_display_irqs
+ffffffff819699b0 T intel_irq_init
+ffffffff81969ed0 t gen6_pm_rps_work
+ffffffff8196a300 t ivybridge_parity_work
+ffffffff8196a690 t g4x_get_vblank_counter
+ffffffff8196a6d0 t i915_get_vblank_counter
+ffffffff8196a810 t i915_get_crtc_scanoutpos
+ffffffff8196aa90 t cherryview_irq_handler
+ffffffff8196ade0 t cherryview_irq_reset
+ffffffff8196af20 t cherryview_irq_postinstall
+ffffffff8196afd0 t i965_enable_vblank
+ffffffff8196b0d0 t i965_disable_vblank
+ffffffff8196b1b0 t i915_hpd_irq_setup
+ffffffff8196b2a0 t valleyview_irq_handler
+ffffffff8196b5d0 t valleyview_irq_reset
+ffffffff8196b660 t valleyview_irq_postinstall
+ffffffff8196b700 t gen11_irq_handler
+ffffffff8196bb50 t gen11_irq_reset
+ffffffff8196c250 t gen11_irq_postinstall
+ffffffff8196c6b0 t gen8_enable_vblank
+ffffffff8196c7b0 t gen8_disable_vblank
+ffffffff8196c870 t gen11_hpd_irq_setup
+ffffffff8196cb10 t gen8_irq_handler
+ffffffff8196cc50 t gen8_irq_reset
+ffffffff8196d060 t gen8_irq_postinstall
+ffffffff8196d380 t bxt_hpd_irq_setup
+ffffffff8196d540 t spt_hpd_irq_setup
+ffffffff8196d730 t ilk_hpd_irq_setup
+ffffffff8196db80 t ironlake_irq_handler
+ffffffff8196e6b0 t ironlake_irq_reset
+ffffffff8196e820 t ironlake_irq_postinstall
+ffffffff8196edd0 t ironlake_enable_vblank
+ffffffff8196eee0 t ironlake_disable_vblank
+ffffffff8196efb0 t i8xx_irq_reset
+ffffffff8196f110 t i8xx_irq_postinstall
+ffffffff8196f3a0 t i8xx_irq_handler
+ffffffff8196f5f0 t i8xx_enable_vblank
+ffffffff8196f6f0 t i8xx_disable_vblank
+ffffffff8196f7d0 t i915_irq_reset
+ffffffff8196f9e0 t i915_irq_postinstall
+ffffffff8196fdf0 t i915_irq_handler
+ffffffff81970170 t i965_irq_reset
+ffffffff81970370 t i965_irq_postinstall
+ffffffff81970810 t i965_irq_handler
+ffffffff81970c20 T intel_irq_fini
+ffffffff81970c60 T intel_irq_install
+ffffffff81970c90 T intel_irq_uninstall
+ffffffff81970ce0 T intel_runtime_pm_disable_interrupts
+ffffffff81970d30 T intel_runtime_pm_enable_interrupts
+ffffffff81970d80 t wedge_me
+ffffffff81970de0 t __delayed_work_tick
+ffffffff81970e00 t kasprintf
+ffffffff81970ed0 t i9xx_pipestat_irq_ack
+ffffffff81971030 t gen8_gt_irq_handler
+ffffffff81971300 t i9xx_hpd_irq_handler
+ffffffff819714e0 t valleyview_pipestat_irq_handler
+ffffffff819715d0 t gen6_rps_irq_handler
+ffffffff81971770 t notify_ring
+ffffffff81971a20 t i9xx_pipe_crc_irq_handler
+ffffffff81971b50 t gmbus_irq_handler
+ffffffff81971bd0 t gen8_gt_irq_reset
+ffffffff81971ec0 t gen8_gt_irq_postinstall
+ffffffff819722d0 t snb_gt_irq_handler
+ffffffff81972460 t gen5_gt_irq_reset
+ffffffff81972610 t gen5_gt_irq_postinstall
+ffffffff819728d0 t gen8_de_irq_handler
+ffffffff81973550 t ilk_hpd_irq_handler
+ffffffff81973680 t cpt_irq_handler
+ffffffff81973880 t ibx_hpd_irq_handler
+ffffffff819739e0 t gen8_de_irq_postinstall
+ffffffff81974170 t ibx_irq_reset
+ffffffff81975000 T i915_memcpy_from_wc
+ffffffff81975030 T i915_memcpy_init_early
+ffffffff81976000 T i915_params_dump
+ffffffff81976460 t _print_param
+ffffffff81977000 T i915_oa_init_reg_state
+ffffffff81977140 T i915_perf_open_ioctl
+ffffffff81977360 T i915_perf_register
+ffffffff81977380 T i915_perf_unregister
+ffffffff819773f0 T i915_perf_add_config_ioctl
+ffffffff81977440 T i915_perf_remove_config_ioctl
+ffffffff819775e0 T i915_perf_init
+ffffffff819778d0 t gen7_is_valid_b_counter_addr
+ffffffff81977920 t hsw_is_valid_mux_addr
+ffffffff819779a0 t gen7_init_oa_buffer
+ffffffff81977aa0 t hsw_enable_metric_set
+ffffffff81977c10 t hsw_disable_metric_set
+ffffffff81977cf0 t gen7_oa_enable
+ffffffff81977e60 t gen7_oa_disable
+ffffffff81977ef0 t gen7_oa_read
+ffffffff81978380 t gen7_oa_hw_tail_read
+ffffffff819783d0 t gen8_init_oa_buffer
+ffffffff81978500 t gen8_oa_enable
+ffffffff81978640 t gen8_oa_disable
+ffffffff819786d0 t gen8_oa_read
+ffffffff81978c00 t gen8_oa_hw_tail_read
+ffffffff81978c50 t gen8_is_valid_mux_addr
+ffffffff81978cc0 t gen8_is_valid_flex_addr
+ffffffff81978d40 t chv_is_valid_mux_addr
+ffffffff81978da0 t gen8_enable_metric_set
+ffffffff81978ec0 t gen8_disable_metric_set
+ffffffff81978f20 t gen10_is_valid_mux_addr
+ffffffff81978f90 t gen10_disable_metric_set
+ffffffff81978ff0 t oa_poll_check_timer_cb
+ffffffff81979030 T i915_perf_fini
+ffffffff81979110 t destroy_config
+ffffffff819791b0 t i915_ggtt_offset
+ffffffff81979300 t gen8_configure_all_contexts
+ffffffff8197a000 T i915_query_ioctl
+ffffffff8197a100 t query_topology_info
+ffffffff8197b000 t i915_fence_get_driver_name
+ffffffff8197b030 t i915_fence_get_timeline_name
+ffffffff8197b0d0 t i915_fence_enable_signaling
+ffffffff8197b130 t i915_fence_signaled
+ffffffff8197b1e0 t i915_fence_wait
+ffffffff8197b240 t i915_fence_release
+ffffffff8197b2b0 T i915_gem_set_global_seqno
+ffffffff8197b2f0 t reset_all_global_seqno
+ffffffff8197b510 T i915_gem_retire_noop
+ffffffff8197b540 T i915_request_retire_upto
+ffffffff8197b630 t i915_request_retire
+ffffffff8197bf60 T __i915_request_submit
+ffffffff8197c1d0 T i915_request_submit
+ffffffff8197c210 T __i915_request_unsubmit
+ffffffff8197c3f0 T i915_request_unsubmit
+ffffffff8197c430 T i915_request_alloc
+ffffffff8197cb60 t submit_notify
+ffffffff8197cbf0 T i915_request_await_dma_fence
+ffffffff8197d000 T i915_request_await_object
+ffffffff8197d210 T i915_request_skip
+ffffffff8197d2c0 T i915_request_add
+ffffffff8197d790 T i915_request_wait
+ffffffff8197de90 t __i915_spin_request
+ffffffff8197e090 T i915_retire_requests
+ffffffff8197f000 T i915_save_state
+ffffffff8197f400 T i915_restore_state
+ffffffff81980000 T __i915_sw_fence_init
+ffffffff81980090 T i915_sw_fence_commit
+ffffffff819800d0 T i915_sw_fence_await_sw_fence
+ffffffff819800e0 t __i915_sw_fence_await_sw_fence
+ffffffff81980300 T i915_sw_fence_await_sw_fence_gfp
+ffffffff81980320 T i915_sw_fence_await_dma_fence
+ffffffff81980680 t dma_i915_sw_fence_wake
+ffffffff819806e0 t irq_i915_sw_fence_work
+ffffffff81980750 t timer_i915_sw_fence_wake
+ffffffff81980820 t dma_i915_sw_fence_wake_timer
+ffffffff81980890 T i915_sw_fence_await_reservation
+ffffffff81980aa0 t __i915_sw_fence_complete
+ffffffff81980c20 t i915_sw_fence_wake
+ffffffff81981000 T i915_syncmap_init
+ffffffff81981030 T i915_syncmap_is_later
+ffffffff819811d0 T i915_syncmap_set
+ffffffff81981300 t __sync_set
+ffffffff81981850 T i915_syncmap_free
+ffffffff819818a0 t __sync_free
+ffffffff81982000 T i915_timeline_init
+ffffffff819820a0 T i915_timelines_park
+ffffffff81982100 T i915_timeline_fini
+ffffffff819821a0 T i915_timeline_create
+ffffffff819822a0 T __i915_timeline_free
+ffffffff81983000 T i915_check_vgpu
+ffffffff81983060 T intel_vgpu_has_full_48bit_ppgtt
+ffffffff81983090 T intel_vgt_deballoon
+ffffffff819831a0 T intel_vgt_balloon
+ffffffff81984000 T i915_vma_instance
+ffffffff819847c0 t vma_lookup
+ffffffff819848d0 T i915_vma_bind
+ffffffff81984ab0 T i915_vma_pin_iomap
+ffffffff81984d40 T i915_vma_flush_writes
+ffffffff81984d90 T i915_vma_unpin_iomap
+ffffffff81984f30 T i915_vma_unpin_and_release
+ffffffff81985100 T i915_vma_close
+ffffffff819851d0 T i915_vma_misplaced
+ffffffff819852b0 T __i915_vma_set_map_and_fenceable
+ffffffff81985430 T i915_gem_valid_gtt_space
+ffffffff81985540 T __i915_vma_do_pin
+ffffffff81986050 t i915_vma_remove
+ffffffff81986350 T i915_vma_reopen
+ffffffff819863b0 T i915_vma_destroy
+ffffffff81986750 T i915_vma_unbind
+ffffffff81986d20 T i915_vma_parked
+ffffffff81986e10 T i915_vma_revoke_mmap
+ffffffff81986fa0 T i915_vma_move_to_active
+ffffffff819876d0 t i915_vma_last_retire
+ffffffff819876e0 t __i915_vma_retire
+ffffffff81987a70 t i915_vma_retire
+ffffffff81988000 T intel_digital_connector_atomic_get_property
+ffffffff81988080 T intel_digital_connector_atomic_set_property
+ffffffff81988100 T intel_digital_connector_atomic_check
+ffffffff819881c0 T intel_digital_connector_duplicate_state
+ffffffff81988240 T intel_crtc_duplicate_state
+ffffffff819882e0 T intel_crtc_destroy_state
+ffffffff819882f0 T intel_atomic_setup_scalers
+ffffffff81988600 T intel_atomic_state_alloc
+ffffffff81988680 T intel_atomic_state_clear
+ffffffff81989000 T intel_create_plane_state
+ffffffff81989060 T intel_plane_duplicate_state
+ffffffff81989100 T intel_plane_destroy_state
+ffffffff81989140 T intel_plane_atomic_check_with_state
+ffffffff81989320 t intel_plane_atomic_check
+ffffffff819893a0 t intel_plane_atomic_update
+ffffffff81989410 T intel_plane_atomic_get_property
+ffffffff81989440 T intel_plane_atomic_set_property
+ffffffff8198a000 T intel_audio_codec_enable
+ffffffff8198a190 T intel_audio_codec_disable
+ffffffff8198a290 T intel_init_audio_hooks
+ffffffff8198a340 t g4x_audio_codec_enable
+ffffffff8198a580 t g4x_audio_codec_disable
+ffffffff8198a610 t ilk_audio_codec_enable
+ffffffff8198a930 t ilk_audio_codec_disable
+ffffffff8198aa70 t hsw_audio_codec_enable
+ffffffff8198af60 t hsw_audio_codec_disable
+ffffffff8198b060 T i915_audio_component_init
+ffffffff8198b090 T i915_audio_component_cleanup
+ffffffff8198b0b0 T intel_audio_init
+ffffffff8198b0c0 T intel_audio_deinit
+ffffffff8198c000 T intel_bios_is_valid_vbt
+ffffffff8198c080 T intel_bios_init
+ffffffff8198dfe0 T intel_bios_cleanup
+ffffffff8198e0f0 T intel_bios_is_tv_present
+ffffffff8198e190 T intel_bios_is_lvds_present
+ffffffff8198e280 T intel_bios_is_port_present
+ffffffff8198e350 T intel_bios_is_port_edp
+ffffffff8198e3f0 T intel_bios_is_port_dp_dual_mode
+ffffffff8198e4a0 T intel_bios_is_dsi_present
+ffffffff8198e520 T intel_bios_is_port_hpd_inverted
+ffffffff8198e660 T intel_bios_is_lspcon_present
+ffffffff8198e740 t fill_detail_timing_data
+ffffffff8198f000 T intel_engine_wakeup
+ffffffff8198f090 T __intel_engine_disarm_breadcrumbs
+ffffffff8198f210 T intel_engine_pin_breadcrumbs_irq
+ffffffff8198f330 T intel_engine_unpin_breadcrumbs_irq
+ffffffff8198f3f0 T intel_engine_disarm_breadcrumbs
+ffffffff8198f640 t missed_breadcrumb
+ffffffff8198f6f0 T intel_engine_add_wait
+ffffffff8198f780 t __intel_engine_add_wait
+ffffffff8198fda0 T intel_engine_remove_wait
+ffffffff8198fe60 t __intel_engine_remove_wait
+ffffffff819901e0 T intel_engine_enable_signaling
+ffffffff81990350 T intel_engine_cancel_signaling
+ffffffff81990410 T intel_engine_init_breadcrumbs
+ffffffff81990510 t intel_breadcrumbs_fake_irq
+ffffffff81990640 t intel_breadcrumbs_hangcheck
+ffffffff81990780 t intel_breadcrumbs_signaler
+ffffffff81990be0 T intel_engine_reset_breadcrumbs
+ffffffff81990d00 T intel_engine_fini_breadcrumbs
+ffffffff81991000 T skl_init_cdclk
+ffffffff819911b0 t skl_set_cdclk
+ffffffff81991700 T skl_uninit_cdclk
+ffffffff819917b0 T bxt_init_cdclk
+ffffffff81991970 t bxt_set_cdclk
+ffffffff81991d00 T bxt_uninit_cdclk
+ffffffff81991d90 T icl_init_cdclk
+ffffffff81991fb0 T intel_update_cdclk
+ffffffff81992030 T intel_dump_cdclk_state
+ffffffff81992060 t icl_calc_cdclk_pll_vco
+ffffffff81992170 t icl_set_cdclk
+ffffffff81992360 T icl_uninit_cdclk
+ffffffff81992450 T cnl_init_cdclk
+ffffffff819925d0 t cnl_set_cdclk
+ffffffff81992820 T cnl_uninit_cdclk
+ffffffff819928a0 T intel_cdclk_needs_modeset
+ffffffff819928e0 T intel_cdclk_changed
+ffffffff81992930 T intel_set_cdclk
+ffffffff81992a40 T intel_crtc_compute_min_cdclk
+ffffffff81992cb0 T intel_update_max_cdclk
+ffffffff81993050 T intel_update_rawclk
+ffffffff81993230 T intel_init_cdclk_hooks
+ffffffff81993550 t chv_set_cdclk
+ffffffff81993860 t vlv_modeset_calc_cdclk
+ffffffff81993b00 t vlv_set_cdclk
+ffffffff81993ff0 t bdw_set_cdclk
+ffffffff819944d0 t bdw_modeset_calc_cdclk
+ffffffff819946e0 t bxt_modeset_calc_cdclk
+ffffffff81994a90 t skl_modeset_calc_cdclk
+ffffffff81994d70 t cnl_modeset_calc_cdclk
+ffffffff81995320 t icl_modeset_calc_cdclk
+ffffffff81995a80 t icl_get_cdclk
+ffffffff81995c20 t cnl_get_cdclk
+ffffffff81995d80 t skl_get_cdclk
+ffffffff81995f70 t bxt_get_cdclk
+ffffffff819960d0 t bdw_get_cdclk
+ffffffff819961b0 t hsw_get_cdclk
+ffffffff81996270 t vlv_get_cdclk
+ffffffff81996320 t fixed_400mhz_get_cdclk
+ffffffff81996350 t fixed_450mhz_get_cdclk
+ffffffff81996380 t gm45_get_cdclk
+ffffffff819964e0 t g33_get_cdclk
+ffffffff81996660 t i965gm_get_cdclk
+ffffffff819967c0 t pnv_get_cdclk
+ffffffff81996850 t i945gm_get_cdclk
+ffffffff819968c0 t i915gm_get_cdclk
+ffffffff81996930 t fixed_333mhz_get_cdclk
+ffffffff81996960 t fixed_266mhz_get_cdclk
+ffffffff81996990 t i85x_get_cdclk
+ffffffff81996a10 t fixed_200mhz_get_cdclk
+ffffffff81996a40 t fixed_133mhz_get_cdclk
+ffffffff81996a70 t cnl_cdclk_pll_disable
+ffffffff81996bc0 t cnl_cdclk_pll_enable
+ffffffff81997000 T intel_color_set_csc
+ffffffff81997040 T intel_color_load_luts
+ffffffff81997060 T intel_color_check
+ffffffff81997120 T intel_color_init
+ffffffff81997240 t cherryview_load_csc_matrix
+ffffffff81997600 t cherryview_load_luts
+ffffffff819978f0 t ilk_load_csc_matrix
+ffffffff81998140 t haswell_load_luts
+ffffffff81998220 t broadwell_load_luts
+ffffffff81998530 t glk_load_luts
+ffffffff81998760 t i9xx_load_luts
+ffffffff81998780 t i9xx_load_luts_internal
+ffffffff819989a0 t bdw_load_gamma_lut
+ffffffff81999000 T intel_crt_port_enabled
+ffffffff81999080 T intel_crt_reset
+ffffffff81999130 T intel_crt_init
+ffffffff81999510 t hsw_crt_get_config
+ffffffff819995c0 t hsw_crt_compute_config
+ffffffff81999650 t hsw_pre_pll_enable_crt
+ffffffff819996a0 t hsw_pre_enable_crt
+ffffffff81999720 t hsw_enable_crt
+ffffffff81999890 t hsw_disable_crt
+ffffffff819998e0 t hsw_post_disable_crt
+ffffffff81999a30 t pch_crt_compute_config
+ffffffff81999a70 t pch_disable_crt
+ffffffff81999aa0 t pch_post_disable_crt
+ffffffff81999b80 t intel_crt_compute_config
+ffffffff81999bb0 t intel_disable_crt
+ffffffff81999c90 t intel_crt_get_config
+ffffffff81999d30 t intel_crt_get_hw_state
+ffffffff81999df0 t intel_enable_crt
+ffffffff81999ed0 t intel_crt_destroy
+ffffffff81999f00 t intel_spurious_crt_detect_dmi_callback
+ffffffff81999f30 t intel_crt_get_modes
+ffffffff8199a0e0 t intel_crt_detect
+ffffffff8199a9b0 t intel_crt_mode_valid
+ffffffff8199aa90 t intel_crt_detect_ddc
+ffffffff8199b000 T intel_csr_load_program
+ffffffff8199b250 T intel_csr_ucode_init
+ffffffff8199b370 t csr_load_work_fn
+ffffffff8199b7f0 T intel_csr_ucode_suspend
+ffffffff8199b860 T intel_csr_ucode_resume
+ffffffff8199b8b0 T intel_csr_ucode_fini
+ffffffff8199c000 T hsw_fdi_link_train
+ffffffff8199c550 t intel_prepare_dp_ddi_buffers
+ffffffff8199c860 T intel_ddi_set_pipe_settings
+ffffffff8199c970 T intel_ddi_set_vc_payload_alloc
+ffffffff8199ca20 T intel_ddi_enable_transcoder_func
+ffffffff8199ccb0 T intel_ddi_disable_transcoder_func
+ffffffff8199cd90 T intel_ddi_toggle_hdcp_signalling
+ffffffff8199cef0 T intel_ddi_connector_get_hw_state
+ffffffff8199d000 T intel_ddi_get_hw_state
+ffffffff8199d210 T intel_ddi_enable_pipe_clock
+ffffffff8199d330 T intel_ddi_disable_pipe_clock
+ffffffff8199d390 T intel_ddi_dp_voltage_max
+ffffffff8199d690 t intel_ddi_get_buf_trans_edp
+ffffffff8199d8c0 T intel_ddi_dp_pre_emphasis_max
+ffffffff8199d8f0 T bxt_signal_levels
+ffffffff8199da10 t icl_ddi_vswing_sequence
+ffffffff8199dfc0 t cnl_ddi_vswing_sequence
+ffffffff8199e850 T ddi_signal_levels
+ffffffff8199e900 t skl_ddi_set_iboost
+ffffffff8199ed80 T icl_map_plls_to_ports
+ffffffff8199ef60 T icl_unmap_plls_to_ports
+ffffffff8199f090 T intel_ddi_fdi_post_disable
+ffffffff8199f1d0 t intel_disable_ddi_buf
+ffffffff8199f360 t intel_ddi_clk_disable
+ffffffff8199f4e0 T intel_ddi_prepare_link_retrain
+ffffffff8199f740 T intel_ddi_compute_min_voltage_level
+ffffffff8199f7a0 T intel_ddi_get_config
+ffffffff819a0100 T intel_ddi_init
+ffffffff819a0580 t intel_ddi_hotplug
+ffffffff819a0890 t intel_ddi_compute_output_type
+ffffffff819a0910 t intel_ddi_compute_config
+ffffffff819a0a00 t intel_enable_ddi
+ffffffff819a0c60 t bxt_ddi_pre_pll_enable
+ffffffff819a0c80 t intel_ddi_pre_enable
+ffffffff819a1770 t intel_disable_ddi
+ffffffff819a1840 t intel_ddi_post_disable
+ffffffff819a19d0 t intel_ddi_get_power_domains
+ffffffff819a1a70 t cnl_calc_wrpll_link
+ffffffff819a1c00 t intel_ddi_clk_select
+ffffffff819a2000 T intel_platform_name
+ffffffff819a2090 T intel_device_info_dump_flags
+ffffffff819a2800 T intel_device_info_dump_runtime
+ffffffff819a2b80 T intel_device_info_dump
+ffffffff819a2c30 T intel_device_info_dump_topology
+ffffffff819a2e60 T intel_device_info_runtime_init
+ffffffff819a5030 T intel_driver_caps_print
+ffffffff819a5090 T intel_device_info_init_mmio
+ffffffff819a6000 T vlv_get_hpll_vco
+ffffffff819a6070 T vlv_get_cck_clock
+ffffffff819a6130 T vlv_get_cck_clock_hpll
+ffffffff819a6230 T chv_calc_dpll_params
+ffffffff819a62f0 T bxt_find_best_dpll
+ffffffff819a6310 t chv_find_best_dpll
+ffffffff819a6610 T intel_crtc_active
+ffffffff819a6670 T intel_pipe_to_cpu_transcoder
+ffffffff819a66b0 T assert_pll
+ffffffff819a6790 T assert_dsi_pll
+ffffffff819a6870 T assert_fdi_rx_pll
+ffffffff819a6930 T assert_panel_unlocked
+ffffffff819a6b10 T assert_pipe
+ffffffff819a6c90 T assert_pch_transcoder_disabled
+ffffffff819a6d20 T vlv_wait_port_ready
+ffffffff819a6e50 T lpt_disable_pch_transcoder
+ffffffff819a6f20 T intel_crtc_pch_transcoder
+ffffffff819a6f60 T intel_fb_align_height
+ffffffff819a6fe0 T intel_rotation_info_size
+ffffffff819a7020 T intel_pin_and_fence_fb_obj
+ffffffff819a7260 T intel_unpin_fb_vma
+ffffffff819a7310 T intel_fb_xy_to_linear
+ffffffff819a7350 T intel_add_fb_offsets
+ffffffff819a73c0 T intel_compute_tile_offset
+ffffffff819a7580 t _intel_compute_tile_offset
+ffffffff819a7790 T skl_format_to_fourcc
+ffffffff819a7810 T skl_check_plane_surface
+ffffffff819a7ff0 T i9xx_check_plane_surface
+ffffffff819a8110 T skl_plane_stride
+ffffffff819a81e0 T skl_plane_ctl
+ffffffff819a8510 T glk_plane_color_ctl
+ffffffff819a85a0 T intel_prepare_reset
+ffffffff819a8760 T intel_finish_reset
+ffffffff819a89c0 t __intel_display_resume
+ffffffff819a8b00 T intel_pps_unlock_regs_wa
+ffffffff819a8bd0 T intel_modeset_init_hw
+ffffffff819a8c60 T intel_has_pending_fb_unpin
+ffffffff819a8d50 T lpt_disable_iclkip
+ffffffff819a8dc0 T lpt_get_iclkip
+ffffffff819a8ec0 T skl_scaler_calc_phase
+ffffffff819a8f20 T skl_update_scaler_crtc
+ffffffff819a8f90 t skl_update_scaler
+ffffffff819a9140 T hsw_enable_ips
+ffffffff819a9290 T hsw_disable_ips
+ffffffff819a93d0 T intel_port_is_tc
+ffffffff819a9410 T intel_port_to_tc
+ffffffff819a9450 T intel_port_to_power_domain
+ffffffff819a94b0 T intel_display_suspend
+ffffffff819a9520 T intel_encoder_destroy
+ffffffff819a9550 T intel_connector_init
+ffffffff819a95b0 T intel_connector_alloc
+ffffffff819a9630 T intel_connector_free
+ffffffff819a9670 T intel_connector_get_hw_state
+ffffffff819a96c0 T hsw_crtc_state_ips_capable
+ffffffff819a9770 T intel_link_compute_m_n
+ffffffff819a9910 T intel_dp_set_m_n
+ffffffff819a9a60 t intel_cpu_transcoder_set_m_n
+ffffffff819a9d60 T vlv_force_pll_on
+ffffffff819a9ee0 t chv_prepare_pll
+ffffffff819aa1d0 t chv_enable_pll
+ffffffff819aa4b0 t vlv_prepare_pll
+ffffffff819aa820 t vlv_enable_pll
+ffffffff819aaa00 T vlv_force_pll_off
+ffffffff819aaae0 t chv_disable_pll
+ffffffff819aac10 T intel_mode_from_pipe_config
+ffffffff819aacb0 T intel_init_pch_refclk
+ffffffff819ab130 t lpt_init_pch_refclk
+ffffffff819ab7b0 T ironlake_get_lanes_required
+ffffffff819ab810 T intel_dp_get_m_n
+ffffffff819ab960 t intel_cpu_transcoder_get_m_n
+ffffffff819abcc0 T hsw_enable_pc8
+ffffffff819ac5a0 t lpt_disable_clkout_dp
+ffffffff819ac680 T hsw_disable_pc8
+ffffffff819aca80 T intel_framebuffer_create
+ffffffff819acb10 t intel_framebuffer_init
+ffffffff819ad800 T intel_get_load_detect_pipe
+ffffffff819adba0 T intel_release_load_detect_pipe
+ffffffff819adc00 T intel_dotclock_calculate
+ffffffff819adc50 T intel_encoder_current_mode
+ffffffff819ade20 T intel_plane_atomic_calc_changes
+ffffffff819ae400 T intel_crtc_get_vblank_counter
+ffffffff819ae450 T intel_prepare_plane_fb
+ffffffff819ae870 t add_rps_boost_after_vblank
+ffffffff819ae9d0 T intel_cleanup_plane_fb
+ffffffff819aead0 T skl_max_scale
+ffffffff819aebd0 T intel_crtc_arm_fifo_underrun
+ffffffff819aec70 T intel_plane_destroy
+ffffffff819aeca0 T skl_plane_has_planar
+ffffffff819aed30 T intel_get_pipe_from_connector
+ffffffff819aedc0 T intel_get_pipe_from_crtc_id_ioctl
+ffffffff819aee40 T intel_init_display_hooks
+ffffffff819af0e0 t haswell_get_pipe_config
+ffffffff819afbf0 t skylake_get_initial_plane_config
+ffffffff819afff0 t haswell_crtc_compute_clock
+ffffffff819b0140 t haswell_crtc_enable
+ffffffff819b0f40 t haswell_crtc_disable
+ffffffff819b12b0 t i9xx_get_initial_plane_config
+ffffffff819b1600 t ironlake_get_pipe_config
+ffffffff819b19f0 t ironlake_crtc_compute_clock
+ffffffff819b1cf0 t ironlake_crtc_enable
+ffffffff819b32e0 t ironlake_crtc_disable
+ffffffff819b3d00 t i9xx_get_pipe_config
+ffffffff819b4410 t chv_crtc_compute_clock
+ffffffff819b4500 t valleyview_crtc_enable
+ffffffff819b4a00 t i9xx_crtc_disable
+ffffffff819b4f90 t vlv_crtc_compute_clock
+ffffffff819b54a0 t g4x_crtc_compute_clock
+ffffffff819b55e0 t i9xx_crtc_enable
+ffffffff819b5d80 t pnv_crtc_compute_clock
+ffffffff819b6110 t i9xx_crtc_compute_clock
+ffffffff819b6200 t i8xx_crtc_compute_clock
+ffffffff819b6430 t ironlake_fdi_link_train
+ffffffff819b6850 t gen6_fdi_link_train
+ffffffff819b6eb0 t ivb_manual_fdi_link_train
+ffffffff819b74f0 t skl_update_crtcs
+ffffffff819b77a0 t intel_update_crtcs
+ffffffff819b7840 T intel_modeset_init
+ffffffff819b95a0 t intel_atomic_helper_free_state_worker
+ffffffff819b9620 t i915_disable_vga
+ffffffff819b96e0 t intel_modeset_setup_hw_state
+ffffffff819ba8a0 T i830_enable_pipe
+ffffffff819bade0 T i830_disable_pipe
+ffffffff819bb040 T i915_redisable_vga_power_on
+ffffffff819bb0c0 T i915_redisable_vga
+ffffffff819bb160 T intel_display_resume
+ffffffff819bb260 T intel_connector_register
+ffffffff819bb270 T intel_connector_unregister
+ffffffff819bb290 T intel_modeset_cleanup
+ffffffff819bb3f0 T intel_connector_attach_encoder
+ffffffff819bb410 T intel_modeset_vga_set_state
+ffffffff819bb500 T intel_display_capture_error_state
+ffffffff819bbac0 T intel_display_print_error_state
+ffffffff819bbe70 t intel_PLL_is_valid
+ffffffff819bbf70 t intel_tile_width_bytes
+ffffffff819bc100 t skl_max_plane_width
+ffffffff819bc1f0 t _intel_adjust_tile_offset
+ffffffff819bc420 t do_rps_boost
+ffffffff819bc510 t intel_user_framebuffer_destroy
+ffffffff819bc720 t intel_user_framebuffer_create_handle
+ffffffff819bc770 t intel_user_framebuffer_dirty
+ffffffff819bc7e0 t intel_get_pipe_timings
+ffffffff819bca50 t intel_set_pipe_timings
+ffffffff819bcdf0 t skylake_pfit_enable
+ffffffff819bcf40 t intel_enable_pipe
+ffffffff819bd390 t ironlake_pch_transcoder_set_timings
+ffffffff819bd650 t intel_disable_pipe
+ffffffff819bd840 t i9xx_crtc_clock_get
+ffffffff819bdb10 t g4x_find_best_dpll
+ffffffff819bde60 t assert_pch_dp_disabled
+ffffffff819bdf60 t assert_pch_hdmi_disabled
+ffffffff819be060 t i9xx_set_pipeconf
+ffffffff819be230 t i9xx_pfit_enable
+ffffffff819be370 t i9xx_compute_dpll
+ffffffff819be4f0 t i9xx_find_best_dpll
+ffffffff819be7e0 t intel_update_crtc
+ffffffff819be8d0 t intel_pre_plane_update
+ffffffff819beba0 t intel_user_framebuffer_create
+ffffffff819bec90 t intel_get_format_info
+ffffffff819bed30 t intel_mode_valid
+ffffffff819bee20 t intel_atomic_check
+ffffffff819bfe80 t intel_atomic_commit
+ffffffff819c01d0 t intel_atomic_state_free
+ffffffff819c0200 t intel_dump_pipe_config
+ffffffff819c0390 t intel_pipe_config_compare
+ffffffff819c2350 t pipe_config_err
+ffffffff819c2400 t intel_atomic_commit_ready
+ffffffff819c2480 t intel_atomic_commit_work
+ffffffff819c2490 t intel_atomic_commit_tail
+ffffffff819c3a80 t modeset_get_crtc_power_domains
+ffffffff819c3bb0 t intel_atomic_cleanup_work
+ffffffff819c3c70 t verify_connector_state
+ffffffff819c3f00 t verify_single_dpll_state
+ffffffff819c4240 t quirk_ssc_force_disable
+ffffffff819c4270 t quirk_invert_brightness
+ffffffff819c42a0 t quirk_backlight_present
+ffffffff819c42d0 t quirk_increase_t12_delay
+ffffffff819c4300 t quirk_increase_ddi_disabled_time
+ffffffff819c4330 t intel_dmi_reverse_brightness
+ffffffff819c4360 t intel_check_primary_plane
+ffffffff819c4720 t i9xx_update_plane
+ffffffff819c4a60 t i9xx_disable_plane
+ffffffff819c4b20 t i9xx_plane_get_hw_state
+ffffffff819c4bf0 t skl_plane_format_mod_supported
+ffffffff819c4d20 t intel_plane_ggtt_offset
+ffffffff819c4e90 t i965_plane_format_mod_supported
+ffffffff819c4f20 t i8xx_plane_format_mod_supported
+ffffffff819c4fa0 t i845_update_cursor
+ffffffff819c51f0 t i845_disable_cursor
+ffffffff819c5320 t i845_cursor_get_hw_state
+ffffffff819c53b0 t i845_check_cursor
+ffffffff819c5480 t i9xx_update_cursor
+ffffffff819c5780 t i9xx_disable_cursor
+ffffffff819c5790 t i9xx_cursor_get_hw_state
+ffffffff819c5870 t i9xx_check_cursor
+ffffffff819c5a60 t intel_check_cursor
+ffffffff819c5b50 t intel_legacy_cursor_update
+ffffffff819c6000 t intel_cursor_format_mod_supported
+ffffffff819c6040 t intel_crtc_destroy
+ffffffff819c6070 t intel_crtc_atomic_check
+ffffffff819c6380 t intel_begin_crtc_commit
+ffffffff819c6860 t intel_finish_crtc_commit
+ffffffff819c6930 t intel_plane_disable_noatomic
+ffffffff819c6a40 t wait_for_pipe_scanline_moving
+ffffffff819c7000 T intel_dp_is_edp
+ffffffff819c7030 T intel_dp_max_lane_count
+ffffffff819c7060 T intel_dp_link_required
+ffffffff819c70a0 T intel_dp_max_data_rate
+ffffffff819c70d0 T intel_dp_get_link_train_fallback_values
+ffffffff819c7230 T intel_dp_pack_aux
+ffffffff819c72a0 T intel_power_sequencer_reset
+ffffffff819c73d0 T intel_dp_source_supports_hbr2
+ffffffff819c7410 T intel_dp_source_supports_hbr3
+ffffffff819c7450 T intel_dp_max_link_rate
+ffffffff819c74f0 T intel_dp_rate_select
+ffffffff819c7560 T intel_dp_compute_rate
+ffffffff819c7600 T intel_dp_compute_config
+ffffffff819c7c70 T intel_dp_set_link_params
+ffffffff819c7cb0 T intel_edp_panel_vdd_on
+ffffffff819c7d90 t edp_panel_vdd_on
+ffffffff819c8020 T intel_edp_panel_on
+ffffffff819c80c0 t edp_panel_on
+ffffffff819c8310 T intel_edp_panel_off
+ffffffff819c84f0 T intel_edp_backlight_on
+ffffffff819c8560 t _intel_edp_backlight_on
+ffffffff819c8770 T intel_edp_backlight_off
+ffffffff819c87e0 t _intel_edp_backlight_off
+ffffffff819c89f0 T intel_dp_sink_dpms
+ffffffff819c8b30 T intel_dp_port_enabled
+ffffffff819c8c90 T intel_dp_get_link_status
+ffffffff819c8ce0 T intel_dp_voltage_max
+ffffffff819c8d70 T intel_dp_pre_emphasis_max
+ffffffff819c8e10 T intel_dp_set_signal_levels
+ffffffff819c9190 T intel_dp_program_link_training_pattern
+ffffffff819c9360 T intel_dp_set_idle_link_train
+ffffffff819c9460 T intel_dp_read_dpcd
+ffffffff819c94d0 T intel_dp_retrain_link
+ffffffff819c9740 T intel_digital_port_connected
+ffffffff819c9a10 T intel_dp_encoder_destroy
+ffffffff819c9b10 t edp_panel_vdd_off_sync
+ffffffff819c9cd0 T intel_dp_encoder_suspend
+ffffffff819c9db0 T intel_dp_encoder_reset
+ffffffff819c9f60 t vlv_active_pipe
+ffffffff819ca0c0 t intel_dp_pps_init
+ffffffff819ca320 T intel_dp_hpd_pulse
+ffffffff819ca580 t intel_dp_check_mst_status
+ffffffff819ca710 T intel_dp_is_port_edp
+ffffffff819ca760 T intel_edp_drrs_enable
+ffffffff819ca830 T intel_edp_drrs_disable
+ffffffff819ca930 t intel_dp_set_drrs_state
+ffffffff819caab0 T intel_edp_drrs_invalidate
+ffffffff819cabb0 T intel_edp_drrs_flush
+ffffffff819cad20 T intel_dp_init_connector
+ffffffff819cbcd0 t intel_dp_modeset_retry_work_fn
+ffffffff819cbd30 t edp_panel_vdd_work
+ffffffff819cbda0 T intel_dp_init
+ffffffff819cc050 t intel_dp_hotplug
+ffffffff819cc120 t intel_dp_get_hw_state
+ffffffff819cc2e0 t intel_dp_get_config
+ffffffff819cc500 t chv_dp_pre_pll_enable
+ffffffff819cc530 t chv_pre_enable_dp
+ffffffff819cc570 t vlv_enable_dp
+ffffffff819cc5e0 t vlv_disable_dp
+ffffffff819cc6f0 t chv_post_disable_dp
+ffffffff819cc740 t chv_dp_post_pll_disable
+ffffffff819cc750 t vlv_dp_pre_pll_enable
+ffffffff819cc780 t vlv_pre_enable_dp
+ffffffff819cc7c0 t vlv_post_disable_dp
+ffffffff819cc7d0 t g4x_pre_enable_dp
+ffffffff819cca80 t g4x_enable_dp
+ffffffff819ccb10 t g4x_disable_dp
+ffffffff819ccc20 t g4x_post_disable_dp
+ffffffff819cce00 T intel_dp_mst_suspend
+ffffffff819cce80 T intel_dp_mst_resume
+ffffffff819ccf10 t wait_panel_power_cycle
+ffffffff819cd080 t wait_panel_status
+ffffffff819cd1e0 t intel_pps_readout_hw_state
+ffffffff819cd3c0 t intel_pps_get_registers
+ffffffff819cd520 t vlv_power_sequencer_pipe
+ffffffff819cda70 t intel_dp_init_panel_power_sequencer_registers
+ffffffff819cdd40 t intel_dp_init_panel_power_sequencer
+ffffffff819cdf30 t intel_dp_get_dpcd
+ffffffff819ce0a0 t intel_dp_handle_test_request
+ffffffff819ce360 t intel_dp_set_common_rates
+ffffffff819ce490 t intel_dp_force
+ffffffff819ce5f0 t intel_dp_connector_register
+ffffffff819ce690 t intel_dp_connector_unregister
+ffffffff819ce6e0 t intel_dp_connector_destroy
+ffffffff819ce760 t intel_dp_get_modes
+ffffffff819ce820 t intel_dp_detect
+ffffffff819cef40 t intel_dp_mode_valid
+ffffffff819cf0f0 t skl_aux_ctl_reg
+ffffffff819cf160 t skl_aux_data_reg
+ffffffff819cf1e0 t ilk_aux_ctl_reg
+ffffffff819cf260 t ilk_aux_data_reg
+ffffffff819cf2e0 t g4x_aux_ctl_reg
+ffffffff819cf360 t g4x_aux_data_reg
+ffffffff819cf3e0 t skl_get_aux_clock_divider
+ffffffff819cf410 t hsw_get_aux_clock_divider
+ffffffff819cf4a0 t ilk_get_aux_clock_divider
+ffffffff819cf500 t g4x_get_aux_clock_divider
+ffffffff819cf550 t skl_get_aux_send_ctl
+ffffffff819cf580 t g4x_get_aux_send_ctl
+ffffffff819cf5e0 t kasprintf
+ffffffff819cf6c0 t intel_dp_aux_transfer
+ffffffff819cf8a0 t intel_dp_aux_xfer
+ffffffff819d01d0 t __delayed_work_tick
+ffffffff819d01f0 t edp_notify_handler
+ffffffff819d0340 t intel_edp_backlight_power
+ffffffff819d04c0 t intel_edp_drrs_downclock_work
+ffffffff819d0540 t intel_dp_hdcp_write_an_aksv
+ffffffff819d0650 t intel_dp_hdcp_read_bksv
+ffffffff819d06c0 t intel_dp_hdcp_read_bstatus
+ffffffff819d0730 t intel_dp_hdcp_repeater_present
+ffffffff819d07c0 t intel_dp_hdcp_read_ri_prime
+ffffffff819d0830 t intel_dp_hdcp_read_ksv_ready
+ffffffff819d08c0 t intel_dp_hdcp_read_ksv_fifo
+ffffffff819d09a0 t intel_dp_hdcp_read_v_prime_part
+ffffffff819d0a30 t intel_dp_hdcp_toggle_signalling
+ffffffff819d0a60 t intel_dp_hdcp_check_link
+ffffffff819d0ae0 t intel_dp_hdcp_capable
+ffffffff819d0b70 t intel_dp_prepare
+ffffffff819d0e40 t intel_enable_dp
+ffffffff819d13c0 t intel_dp_link_down
+ffffffff819d2000 T intel_dp_aux_init_backlight_funcs
+ffffffff819d20a0 t intel_dp_aux_setup_backlight
+ffffffff819d21c0 t intel_dp_aux_enable_backlight
+ffffffff819d24f0 t intel_dp_aux_disable_backlight
+ffffffff819d25a0 t intel_dp_aux_set_backlight
+ffffffff819d2620 t intel_dp_aux_get_backlight
+ffffffff819d3000 T intel_dp_stop_link_train
+ffffffff819d3070 T intel_dp_start_link_train
+ffffffff819d34e0 t intel_get_adjust_train
+ffffffff819d4000 T intel_dp_mst_encoder_init
+ffffffff819d41c0 T intel_dp_mst_encoder_cleanup
+ffffffff819d4200 t intel_dp_add_mst_connector
+ffffffff819d4350 t intel_dp_register_mst_connector
+ffffffff819d4390 t intel_dp_destroy_mst_connector
+ffffffff819d43d0 t intel_dp_mst_hotplug
+ffffffff819d43f0 t intel_dp_mst_get_hw_state
+ffffffff819d4450 t intel_dp_mst_detect
+ffffffff819d44a0 t intel_dp_mst_connector_destroy
+ffffffff819d44f0 t intel_dp_mst_get_modes
+ffffffff819d4590 t intel_dp_mst_mode_valid
+ffffffff819d4670 t intel_mst_atomic_best_encoder
+ffffffff819d46b0 t intel_dp_mst_atomic_check
+ffffffff819d4760 t intel_dp_mst_compute_config
+ffffffff819d4910 t intel_mst_disable_dp
+ffffffff819d49c0 t intel_mst_post_disable_dp
+ffffffff819d4ab0 t intel_mst_pre_pll_enable_dp
+ffffffff819d4b10 t intel_mst_pre_enable_dp
+ffffffff819d4c40 t intel_mst_enable_dp
+ffffffff819d4d20 t intel_dp_mst_enc_get_hw_state
+ffffffff819d4d60 t intel_dp_mst_enc_get_config
+ffffffff819d4d80 t intel_dp_mst_encoder_destroy
+ffffffff819d5000 T bxt_port_to_phy_channel
+ffffffff819d5100 T bxt_ddi_phy_set_signal_level
+ffffffff819d54d0 T bxt_ddi_phy_is_enabled
+ffffffff819d55c0 T bxt_ddi_phy_uninit
+ffffffff819d56b0 T bxt_ddi_phy_init
+ffffffff819d58a0 t _bxt_ddi_phy_init
+ffffffff819d5e80 T bxt_ddi_phy_verify_state
+ffffffff819d6150 T bxt_ddi_phy_calc_lane_lat_optim_mask
+ffffffff819d61c0 T bxt_ddi_phy_set_lane_optim_mask
+ffffffff819d64b0 T bxt_ddi_phy_get_lane_lat_optim_mask
+ffffffff819d66c0 T chv_set_phy_signal_level
+ffffffff819d6a40 T chv_data_lane_soft_reset
+ffffffff819d6c20 T chv_phy_pre_pll_enable
+ffffffff819d6eb0 T chv_phy_pre_encoder_enable
+ffffffff819d7130 T chv_phy_release_cl2_override
+ffffffff819d71a0 T chv_phy_post_pll_disable
+ffffffff819d7240 T vlv_set_phy_signal_level
+ffffffff819d73b0 T vlv_phy_pre_pll_enable
+ffffffff819d74c0 T vlv_phy_pre_encoder_enable
+ffffffff819d75d0 T vlv_phy_reset_lanes
+ffffffff819d8000 T intel_get_shared_dpll_by_id
+ffffffff819d8040 T intel_get_shared_dpll_id
+ffffffff819d80d0 T assert_shared_dpll
+ffffffff819d81c0 T intel_prepare_shared_dpll
+ffffffff819d8350 T intel_enable_shared_dpll
+ffffffff819d8520 T intel_disable_shared_dpll
+ffffffff819d86c0 T intel_shared_dpll_swap_state
+ffffffff819d87a0 T icl_calc_dp_combo_pll_link
+ffffffff819d88e0 T intel_shared_dpll_init
+ffffffff819d8ae0 T intel_get_shared_dpll
+ffffffff819d8b40 T intel_release_shared_dpll
+ffffffff819d8c90 T intel_dpll_dump_hw_state
+ffffffff819d8cd0 t icl_get_dpll
+ffffffff819d9840 t icl_dump_hw_state
+ffffffff819d9870 t icl_pll_enable
+ffffffff819d9ca0 t icl_pll_disable
+ffffffff819d9e20 t icl_pll_get_hw_state
+ffffffff819da0f0 t cnl_ddi_calculate_wrpll
+ffffffff819da430 t cnl_get_dpll
+ffffffff819da9e0 t cnl_dump_hw_state
+ffffffff819daa10 t cnl_ddi_pll_enable
+ffffffff819dabf0 t cnl_ddi_pll_disable
+ffffffff819dad40 t cnl_ddi_pll_get_hw_state
+ffffffff819dae30 t skl_get_dpll
+ffffffff819dbb10 t skl_dump_hw_state
+ffffffff819dbb40 t skl_ddi_dpll0_enable
+ffffffff819dbbf0 t skl_ddi_dpll0_disable
+ffffffff819dbc20 t skl_ddi_dpll0_get_hw_state
+ffffffff819dbd00 t skl_ddi_pll_enable
+ffffffff819dbef0 t skl_ddi_pll_disable
+ffffffff819dbf80 t skl_ddi_pll_get_hw_state
+ffffffff819dc0b0 t bxt_get_dpll
+ffffffff819dc7b0 t bxt_dump_hw_state
+ffffffff819dc7e0 t bxt_ddi_pll_enable
+ffffffff819dd240 t bxt_ddi_pll_disable
+ffffffff819dd3e0 t bxt_ddi_pll_get_hw_state
+ffffffff819dd7e0 t hsw_get_dpll
+ffffffff819de420 t hsw_dump_hw_state
+ffffffff819de450 t hsw_ddi_wrpll_enable
+ffffffff819de4c0 t hsw_ddi_wrpll_disable
+ffffffff819de540 t hsw_ddi_wrpll_get_hw_state
+ffffffff819de5e0 t hsw_ddi_spll_enable
+ffffffff819de640 t hsw_ddi_spll_disable
+ffffffff819de6b0 t hsw_ddi_spll_get_hw_state
+ffffffff819de740 t hsw_ddi_lcpll_enable
+ffffffff819de770 t hsw_ddi_lcpll_disable
+ffffffff819de7a0 t hsw_ddi_lcpll_get_hw_state
+ffffffff819de7d0 t ibx_get_dpll
+ffffffff819deaa0 t ibx_dump_hw_state
+ffffffff819dead0 t ibx_pch_dpll_prepare
+ffffffff819deb40 t ibx_pch_dpll_enable
+ffffffff819deca0 t ibx_pch_dpll_disable
+ffffffff819ded70 t ibx_pch_dpll_get_hw_state
+ffffffff819df000 T intel_dsi_dcs_init_backlight_funcs
+ffffffff819df0a0 t dcs_setup_backlight
+ffffffff819df0e0 t dcs_enable_backlight
+ffffffff819df4a0 t dcs_disable_backlight
+ffffffff819df870 t dcs_set_backlight
+ffffffff819df9f0 t dcs_get_backlight
+ffffffff819e0000 T intel_dsi_vbt_exec_sequence
+ffffffff819e0190 T intel_dsi_vbt_get_modes
+ffffffff819e01f0 T intel_dsi_vbt_init
+ffffffff819e07b0 t mipi_exec_send_packet
+ffffffff819e08d0 t mipi_exec_delay
+ffffffff819e0910 t mipi_exec_gpio
+ffffffff819e0b20 t mipi_exec_i2c
+ffffffff819e0b50 t mipi_exec_spi
+ffffffff819e0b80 t mipi_exec_pmic
+ffffffff819e1000 T intel_dvo_init
+ffffffff819e1470 t intel_disable_dvo
+ffffffff819e1510 t intel_enable_dvo
+ffffffff819e15f0 t intel_dvo_get_hw_state
+ffffffff819e1650 t intel_dvo_get_config
+ffffffff819e16f0 t intel_dvo_compute_config
+ffffffff819e1750 t intel_dvo_pre_enable
+ffffffff819e1820 t intel_dvo_connector_get_hw_state
+ffffffff819e18a0 t intel_dvo_enc_destroy
+ffffffff819e18e0 t intel_dvo_detect
+ffffffff819e1910 t intel_dvo_destroy
+ffffffff819e1950 t intel_dvo_get_modes
+ffffffff819e19f0 t intel_dvo_mode_valid
+ffffffff819e2000 T intel_engines_init_mmio
+ffffffff819e2690 T intel_engines_init
+ffffffff819e2950 T intel_engine_init_global_seqno
+ffffffff819e2ab0 T intel_engine_setup_common
+ffffffff819e2b10 T intel_engine_create_scratch
+ffffffff819e2ce0 T intel_engine_cleanup_scratch
+ffffffff819e2d00 T intel_engine_init_common
+ffffffff819e3100 t __intel_context_unpin
+ffffffff819e3200 T intel_engine_cleanup_common
+ffffffff819e3450 T intel_engine_get_active_head
+ffffffff819e35c0 T intel_engine_get_last_batch_head
+ffffffff819e3730 T intel_engine_stop_cs
+ffffffff819e37d0 T i915_cache_level_str
+ffffffff819e3850 T intel_calculate_mcr_s_ss_select
+ffffffff819e38e0 T intel_engine_get_instdone
+ffffffff819e3b50 t read_subslice_reg
+ffffffff819e3d20 T intel_engine_is_idle
+ffffffff819e3ea0 T intel_engines_are_idle
+ffffffff819e3fa0 T intel_engine_has_kernel_context
+ffffffff819e4000 T intel_engines_reset_default_submission
+ffffffff819e4100 T intel_engines_sanitize
+ffffffff819e4230 T intel_engines_park
+ffffffff819e4570 T intel_engine_dump
+ffffffff819e5650 T intel_engines_unpark
+ffffffff819e56f0 T intel_engine_lost_context
+ffffffff819e57e0 T intel_engine_can_store_dword
+ffffffff819e5840 T intel_engines_has_context_isolation
+ffffffff819e5980 t print_request
+ffffffff819e5b20 t i915_ggtt_offset
+ffffffff819e5c70 T intel_engine_lookup_user
+ffffffff819e5cd0 T intel_enable_engine_stats
+ffffffff819e5e30 T intel_engine_get_busy_time
+ffffffff819e5f20 T intel_disable_engine_stats
+ffffffff819e7000 T intel_fbc_is_active
+ffffffff819e7030 T intel_fbc_cleanup_cfb
+ffffffff819e70e0 T intel_fbc_pre_update
+ffffffff819e7230 t intel_fbc_update_state_cache
+ffffffff819e7360 T intel_fbc_post_update
+ffffffff819e73f0 t __intel_fbc_post_update
+ffffffff819e8150 T intel_fbc_invalidate
+ffffffff819e8240 T intel_fbc_flush
+ffffffff819e8360 T intel_fbc_choose_crtc
+ffffffff819e8490 T intel_fbc_enable
+ffffffff819e89c0 T intel_fbc_disable
+ffffffff819e8a70 t __intel_fbc_disable
+ffffffff819e8b90 T intel_fbc_global_disable
+ffffffff819e8c30 T intel_fbc_reset_underrun
+ffffffff819e8cc0 T intel_fbc_handle_fifo_underrun_irq
+ffffffff819e8d20 T intel_fbc_init_pipe_state
+ffffffff819e8dc0 T intel_fbc_init
+ffffffff819e8f70 t intel_fbc_underrun_work_fn
+ffffffff819e9000 t intel_fbc_hw_deactivate
+ffffffff819ea000 T intel_fbdev_init
+ffffffff819ea2b0 t intel_fbdev_suspend_worker
+ffffffff819ea2e0 T intel_fbdev_initial_config_async
+ffffffff819ea360 T intel_fbdev_unregister
+ffffffff819ea3b0 T intel_fbdev_fini
+ffffffff819ea470 T intel_fbdev_set_suspend
+ffffffff819ea4a0 T intel_fbdev_output_poll_changed
+ffffffff819ea540 T intel_fbdev_restore_mode
+ffffffff819ea5d0 t intelfb_create
+ffffffff819ea9f0 t intel_fb_initial_config
+ffffffff819eb000 T intel_set_cpu_fifo_underrun_reporting
+ffffffff819eb290 T intel_set_pch_fifo_underrun_reporting
+ffffffff819eb410 T intel_cpu_fifo_underrun_irq_handler
+ffffffff819eb4b0 T intel_pch_fifo_underrun_irq_handler
+ffffffff819eb510 T intel_check_cpu_fifo_underruns
+ffffffff819eb6d0 T intel_check_pch_fifo_underruns
+ffffffff819ec000 T __intel_fb_obj_invalidate
+ffffffff819ec080 T __intel_fb_obj_flush
+ffffffff819ec160 T intel_frontbuffer_flip_prepare
+ffffffff819ec1b0 T intel_frontbuffer_flip_complete
+ffffffff819ec280 T intel_frontbuffer_flip
+ffffffff819ed000 T inteldrm_gmch_match
+ffffffff819ed060 T i915_alloc_ifp
+ffffffff819ed180 T i965_alloc_ifp
+ffffffff819ed2e0 T intel_gtt_chipset_setup
+ffffffff819ed440 T intel_enable_gtt
+ffffffff819ed490 T intel_gmch_probe
+ffffffff819ed4c0 T intel_gtt_get
+ffffffff819ed510 T intel_gtt_chipset_flush
+ffffffff819ed610 T intel_gmch_remove
+ffffffff819ed630 T intel_gtt_insert_sg_entries
+ffffffff819ed7f0 T intel_gtt_insert_page
+ffffffff819ed930 T intel_gtt_clear_range
+ffffffff819ee000 T intel_guc_init_send_regs
+ffffffff819ee0f0 T intel_guc_init_early
+ffffffff819ee180 T intel_guc_send_nop
+ffffffff819ee1d0 T intel_guc_to_host_event_handler_nop
+ffffffff819ee1f0 t gen8_guc_raise_irq
+ffffffff819ee220 T intel_guc_init_misc
+ffffffff819ee3e0 T intel_guc_fini_misc
+ffffffff819ee470 T intel_guc_init
+ffffffff819ee5e0 t guc_shared_data_destroy
+ffffffff819ee6b0 T intel_guc_fini
+ffffffff819ee6f0 T intel_guc_init_params
+ffffffff819ee9d0 T intel_guc_send_mmio
+ffffffff819eee50 T intel_guc_to_host_event_handler_mmio
+ffffffff819eef30 T intel_guc_to_host_process_recv_msg
+ffffffff819eef70 T intel_guc_sample_forcewake
+ffffffff819eeff0 T intel_guc_auth_huc
+ffffffff819ef040 T intel_guc_suspend
+ffffffff819ef0b0 t intel_guc_ggtt_offset
+ffffffff819ef2c0 T intel_guc_reset_engine
+ffffffff819ef390 T intel_guc_resume
+ffffffff819ef400 T intel_guc_allocate_vma
+ffffffff819f0000 T intel_guc_ads_create
+ffffffff819f0480 t intel_guc_ggtt_offset
+ffffffff819f0690 T intel_guc_ads_destroy
+ffffffff819f1000 T intel_guc_ct_init_early
+ffffffff819f1070 t ct_incoming_request_worker_func
+ffffffff819f1170 T intel_guc_ct_enable
+ffffffff819f1690 t intel_guc_send_ct
+ffffffff819f2070 t intel_guc_to_host_event_handler_ct
+ffffffff819f2660 T intel_guc_ct_disable
+ffffffff819f27b0 t ctch_fini
+ffffffff819f3000 T intel_guc_fw_init_early
+ffffffff819f30d0 T intel_guc_fw_upload
+ffffffff819f30f0 t guc_fw_xfer
+ffffffff819f4000 T intel_guc_log_init_early
+ffffffff819f4050 t capture_logs_work
+ffffffff819f4060 T intel_guc_log_create
+ffffffff819f4120 T intel_guc_log_destroy
+ffffffff819f4130 T intel_guc_log_set_level
+ffffffff819f42c0 T intel_guc_log_relay_enabled
+ffffffff819f42f0 T intel_guc_log_relay_open
+ffffffff819f4380 T intel_guc_log_relay_flush
+ffffffff819f4410 t guc_log_capture_logs
+ffffffff819f4500 T intel_guc_log_relay_close
+ffffffff819f4660 T intel_guc_log_handle_flush_event
+ffffffff819f5000 T intel_guc_submission_init
+ffffffff819f5710 t inject_preempt_context
+ffffffff819f5870 t guc_stage_desc_pool_destroy
+ffffffff819f5950 T intel_guc_submission_fini
+ffffffff819f5b50 T intel_guc_submission_enable
+ffffffff819f61c0 t guc_set_default_submission
+ffffffff819f6230 T intel_guc_submission_disable
+ffffffff819f6500 t guc_client_alloc
+ffffffff819f6ab0 t guc_client_free
+ffffffff819f6c50 t intel_guc_ggtt_offset
+ffffffff819f6e60 t create_doorbell
+ffffffff819f6f80 t __destroy_doorbell
+ffffffff819f7150 t guc_submission_tasklet
+ffffffff819f7ab0 t guc_submission_park
+ffffffff819f7ac0 t guc_submission_unpark
+ffffffff819f7ad0 t guc_reset_prepare
+ffffffff819f8000 T intel_engine_init_hangcheck
+ffffffff819f8050 T intel_hangcheck_init
+ffffffff819f80b0 t i915_hangcheck_elapsed
+ffffffff819f8800 t __delayed_work_tick
+ffffffff819f8820 t semaphore_passed
+ffffffff819f9000 T is_hdcp_supported
+ffffffff819f9050 T intel_hdcp_init
+ffffffff819f9120 t intel_hdcp_check_work
+ffffffff819f9190 t intel_hdcp_prop_work
+ffffffff819f9200 T intel_hdcp_enable
+ffffffff819f92c0 t _intel_hdcp_enable
+ffffffff819facd0 T intel_hdcp_disable
+ffffffff819fad80 t _intel_hdcp_disable
+ffffffff819fae90 T intel_hdcp_atomic_check
+ffffffff819faf00 T intel_hdcp_check_link
+ffffffff819fb110 t __delayed_work_tick
+ffffffff819fc000 T enc_to_intel_hdmi
+ffffffff819fc030 T intel_dp_dual_mode_set_tmds_output
+ffffffff819fc0b0 T intel_hdmi_compute_config
+ffffffff819fc6a0 t hdmi_port_clock_valid
+ffffffff819fc800 T intel_hdmi_handle_sink_scrambling
+ffffffff819fc8a0 T intel_infoframe_init
+ffffffff819fc990 t vlv_write_infoframe
+ffffffff819fcc20 t vlv_set_infoframes
+ffffffff819fcf70 t vlv_infoframe_enabled
+ffffffff819fd030 t g4x_write_infoframe
+ffffffff819fd230 t g4x_set_infoframes
+ffffffff819fd520 t g4x_infoframe_enabled
+ffffffff819fd5b0 t hsw_write_infoframe
+ffffffff819fd9a0 t hsw_set_infoframes
+ffffffff819fdc80 t hsw_infoframe_enabled
+ffffffff819fdcf0 t ibx_write_infoframe
+ffffffff819fdf20 t ibx_set_infoframes
+ffffffff819fe250 t ibx_infoframe_enabled
+ffffffff819fe2f0 t cpt_write_infoframe
+ffffffff819fe520 t cpt_set_infoframes
+ffffffff819fe7f0 t cpt_infoframe_enabled
+ffffffff819fe860 T intel_hdmi_init_connector
+ffffffff819febd0 T intel_hdmi_init
+ffffffff819fef10 t pch_disable_hdmi
+ffffffff819fef50 t pch_post_disable_hdmi
+ffffffff819fef60 t g4x_disable_hdmi
+ffffffff819fefb0 t intel_hdmi_get_hw_state
+ffffffff819ff040 t intel_hdmi_get_config
+ffffffff819ff190 t chv_hdmi_pre_pll_enable
+ffffffff819ff1c0 t chv_hdmi_pre_enable
+ffffffff819ff320 t vlv_enable_hdmi
+ffffffff819ff350 t chv_hdmi_post_disable
+ffffffff819ff3a0 t chv_hdmi_post_pll_disable
+ffffffff819ff3b0 t vlv_hdmi_pre_pll_enable
+ffffffff819ff3e0 t vlv_hdmi_pre_enable
+ffffffff819ff540 t vlv_hdmi_post_disable
+ffffffff819ff550 t intel_hdmi_pre_enable
+ffffffff819ff5c0 t cpt_enable_hdmi
+ffffffff819ff7d0 t ibx_enable_hdmi
+ffffffff819ff9e0 t g4x_enable_hdmi
+ffffffff819ffae0 t intel_hdmi_set_gcp_infoframe
+ffffffff819ffc90 t intel_hdmi_set_avi_infoframe
+ffffffff819ffdd0 t intel_hdmi_detect
+ffffffff819ffe80 t intel_hdmi_force
+ffffffff819fff10 t intel_hdmi_destroy
+ffffffff819fff50 t intel_hdmi_set_edid
+ffffffff81a00120 t intel_hdmi_get_modes
+ffffffff81a00160 t intel_hdmi_mode_valid
+ffffffff81a002f0 t intel_hdmi_hdcp_write_an_aksv
+ffffffff81a00430 t intel_hdmi_hdcp_read_bksv
+ffffffff81a004f0 t intel_hdmi_hdcp_read_bstatus
+ffffffff81a005b0 t intel_hdmi_hdcp_repeater_present
+ffffffff81a00680 t intel_hdmi_hdcp_read_ri_prime
+ffffffff81a00740 t intel_hdmi_hdcp_read_ksv_ready
+ffffffff81a00810 t intel_hdmi_hdcp_read_ksv_fifo
+ffffffff81a008d0 t intel_hdmi_hdcp_read_v_prime_part
+ffffffff81a009b0 t intel_hdmi_hdcp_toggle_signalling
+ffffffff81a00a40 t intel_hdmi_hdcp_check_link
+ffffffff81a00c10 t intel_disable_hdmi
+ffffffff81a00e50 t intel_hdmi_prepare
+ffffffff81a01000 T intel_hpd_pin_default
+ffffffff81a010c0 T intel_encoder_hotplug
+ffffffff81a01140 T intel_hpd_irq_handler
+ffffffff81a01430 T intel_hpd_init
+ffffffff81a01540 T intel_hpd_poll_init
+ffffffff81a01570 T intel_hpd_init_work
+ffffffff81a01640 t i915_hotplug_work_func
+ffffffff81a01850 t i915_digport_work_func
+ffffffff81a019f0 t i915_hpd_poll_init_work
+ffffffff81a01b30 t intel_hpd_irq_storm_reenable_work
+ffffffff81a01c70 T intel_hpd_cancel_work
+ffffffff81a01d40 T intel_hpd_disable
+ffffffff81a01dd0 T intel_hpd_enable
+ffffffff81a01e40 t __delayed_work_tick
+ffffffff81a02000 T intel_huc_init_early
+ffffffff81a02010 T intel_huc_init_misc
+ffffffff81a02050 T intel_huc_auth
+ffffffff81a02410 T intel_huc_check_status
+ffffffff81a03000 T intel_huc_fw_init_early
+ffffffff81a030c0 T intel_huc_fw_upload
+ffffffff81a030e0 t huc_fw_xfer
+ffffffff81a04000 T intel_gmbus_is_valid_pin
+ffffffff81a04100 T intel_i2c_reset
+ffffffff81a04160 T intel_bb_set_bits
+ffffffff81a04280 T intel_bb_set_dir
+ffffffff81a042b0 T intel_bb_read_bits
+ffffffff81a04430 T intel_acquire_bus
+ffffffff81a04610 T intel_release_bus
+ffffffff81a047a0 T intel_send_start
+ffffffff81a047c0 T intel_send_stop
+ffffffff81a047e0 T intel_initiate_xfer
+ffffffff81a04800 T intel_read_byte
+ffffffff81a04820 T intel_write_byte
+ffffffff81a04840 T intel_gmbus_output_aksv
+ffffffff81a04910 t do_gmbus_xfer
+ffffffff81a04e00 T intel_setup_gmbus
+ffffffff81a052a0 T intel_gmbus_get_adapter
+ffffffff81a05410 T intel_gmbus_set_speed
+ffffffff81a05450 T intel_gmbus_force_bit
+ffffffff81a054a0 T intel_teardown_gmbus
+ffffffff81a054d0 t gmbus_xfer_read
+ffffffff81a05780 t gmbus_xfer_write
+ffffffff81a059a0 t gmbus_wait
+ffffffff81a05d50 t gmbus_wait_idle
+ffffffff81a05ed0 t gmbus_xfer
+ffffffff81a05fa0 t gmbus_func
+ffffffff81a06000 T intel_lpe_audio_irq_handler
+ffffffff81a06020 T intel_lpe_audio_init
+ffffffff81a06050 T intel_lpe_audio_teardown
+ffffffff81a06070 T intel_lpe_audio_notify
+ffffffff81a07000 T execlists_unwind_incomplete_requests
+ffffffff81a07040 t __unwind_incomplete_requests
+ffffffff81a07300 T execlists_user_begin
+ffffffff81a07330 T execlists_user_end
+ffffffff81a07360 T execlists_cancel_port_requests
+ffffffff81a074c0 t execlists_context_schedule_out
+ffffffff81a075f0 T intel_logical_ring_cleanup
+ffffffff81a07700 T intel_execlists_set_default_submission
+ffffffff81a077c0 t execlists_submit_request
+ffffffff81a079f0 t execlists_cancel_requests
+ffffffff81a07c50 t execlists_schedule
+ffffffff81a08220 t execlists_submission_tasklet
+ffffffff81a08250 t execlists_reset_prepare
+ffffffff81a083a0 T logical_render_ring_init
+ffffffff81a08850 t gen9_init_render_ring
+ffffffff81a088a0 t gen8_init_render_ring
+ffffffff81a08930 t gen8_init_rcs_context
+ffffffff81a089a0 t gen8_emit_flush_render
+ffffffff81a08b90 t gen8_emit_breadcrumb_rcs
+ffffffff81a08d70 t logical_ring_init
+ffffffff81a08f00 T logical_xcs_ring_init
+ffffffff81a09040 T intel_lr_context_resume
+ffffffff81a09220 t unwind_wa_tail
+ffffffff81a09320 t __execlists_submission_tasklet
+ffffffff81a09d70 t process_csb
+ffffffff81a0a2f0 t port_assign
+ffffffff81a0a420 t nop_submission_tasklet
+ffffffff81a0a450 t gen8_init_common_ring
+ffffffff81a0a5d0 t execlists_reset
+ffffffff81a0a700 t execlists_reset_finish
+ffffffff81a0a7a0 t execlists_context_pin
+ffffffff81a0af50 t execlists_request_alloc
+ffffffff81a0aff0 t gen8_emit_flush
+ffffffff81a0b0d0 t gen8_emit_breadcrumb
+ffffffff81a0b2f0 t gen8_logical_ring_enable_irq
+ffffffff81a0b370 t gen8_logical_ring_disable_irq
+ffffffff81a0b3a0 t gen8_emit_bb_start
+ffffffff81a0b640 t execlists_init_reg_state
+ffffffff81a0bae0 t i915_ggtt_offset
+ffffffff81a0bc30 t execlists_context_unpin
+ffffffff81a0bdf0 t execlists_context_destroy
+ffffffff81a0bee0 t gen10_init_indirectctx_bb
+ffffffff81a0bf70 t gen9_init_indirectctx_bb
+ffffffff81a0c150 t gen8_init_indirectctx_bb
+ffffffff81a0d000 T lspcon_resume
+ffffffff81a0d160 t lspcon_wait_mode
+ffffffff81a0d2a0 T lspcon_wait_pcon_mode
+ffffffff81a0d2c0 T lspcon_init
+ffffffff81a0e000 T intel_lvds_port_enabled
+ffffffff81a0e080 T intel_get_lvds_encoder
+ffffffff81a0e0e0 T intel_is_dual_link_lvds
+ffffffff81a0e150 T intel_lvds_init
+ffffffff81a0e820 t intel_enable_lvds
+ffffffff81a0e950 t intel_pre_enable_lvds
+ffffffff81a0ec00 t intel_lvds_compute_config
+ffffffff81a0ed10 t pch_disable_lvds
+ffffffff81a0ed30 t pch_post_disable_lvds
+ffffffff81a0ed40 t gmch_disable_lvds
+ffffffff81a0ed70 t intel_lvds_get_hw_state
+ffffffff81a0ee30 t intel_lvds_get_config
+ffffffff81a0ef30 t intel_no_lvds_dmi_callback
+ffffffff81a0ef60 t intel_lvds_detect
+ffffffff81a0ef90 t intel_lvds_destroy
+ffffffff81a0eff0 t intel_disable_lvds
+ffffffff81a0f100 t intel_lvds_get_modes
+ffffffff81a0f180 t intel_lvds_mode_valid
+ffffffff81a0f1f0 t intel_dual_link_lvds_callback
+ffffffff81a10000 T intel_mocs_init_engine
+ffffffff81a10350 T intel_mocs_init_l3cc_table
+ffffffff81a10540 T intel_rcs_context_init_mocs
+ffffffff81a11000 T intel_connector_update_modes
+ffffffff81a11030 T intel_ddc_get_modes
+ffffffff81a110b0 T intel_attach_force_audio_property
+ffffffff81a11150 T intel_attach_broadcast_rgb_property
+ffffffff81a111f0 T intel_attach_aspect_ratio_property
+ffffffff81a12000 T intel_opregion_notify_encoder
+ffffffff81a120f0 t swsci
+ffffffff81a123a0 T intel_opregion_notify_adapter
+ffffffff81a123f0 T intel_opregion_asle_intr
+ffffffff81a12440 T intel_opregion_register
+ffffffff81a124b0 T intel_opregion_unregister
+ffffffff81a125d0 T intel_opregion_setup
+ffffffff81a12a60 t asle_work
+ffffffff81a12bf0 T intel_opregion_get_panel_type
+ffffffff81a12c70 t intel_no_opregion_vbt_callback
+ffffffff81a12ca0 t intel_use_opregion_panel_type_callback
+ffffffff81a13000 T intel_overlay_reset
+ffffffff81a13060 t intel_overlay_release_old_vid
+ffffffff81a13280 T intel_overlay_switch_off
+ffffffff81a13580 T intel_overlay_put_image_ioctl
+ffffffff81a14670 T intel_overlay_attrs_ioctl
+ffffffff81a14b70 T intel_setup_overlay
+ffffffff81a14eb0 T intel_cleanup_overlay
+ffffffff81a14f40 T intel_overlay_capture_error_state
+ffffffff81a15010 T intel_overlay_print_error_state
+ffffffff81a153e0 t intel_overlay_release_old_vid_tail
+ffffffff81a15480 t intel_overlay_submit_request
+ffffffff81a15570 t intel_overlay_off_tail
+ffffffff81a156f0 t i915_ggtt_offset
+ffffffff81a16000 T intel_fixed_panel_mode
+ffffffff81a16030 T intel_find_panel_downclock
+ffffffff81a16110 T intel_pch_panel_fitting
+ffffffff81a16290 T intel_gmch_panel_fitting
+ffffffff81a166b0 T intel_panel_set_backlight_acpi
+ffffffff81a16880 T intel_panel_disable_backlight
+ffffffff81a16920 T intel_panel_enable_backlight
+ffffffff81a16a60 T intel_backlight_device_register
+ffffffff81a16be0 T intel_backlight_device_unregister
+ffffffff81a16c30 T intel_panel_setup_backlight
+ffffffff81a16d00 T intel_panel_destroy_backlight
+ffffffff81a16d30 T intel_panel_init
+ffffffff81a16fd0 T intel_panel_fini
+ffffffff81a17030 t intel_backlight_device_update_status
+ffffffff81a17210 t intel_backlight_device_get_brightness
+ffffffff81a17380 t bxt_setup_backlight
+ffffffff81a175b0 t bxt_enable_backlight
+ffffffff81a177f0 t bxt_disable_backlight
+ffffffff81a17940 t bxt_set_backlight
+ffffffff81a17980 t bxt_get_backlight
+ffffffff81a179c0 t bxt_hz_to_pwm
+ffffffff81a179f0 t cnp_setup_backlight
+ffffffff81a17be0 t cnp_enable_backlight
+ffffffff81a17d90 t cnp_disable_backlight
+ffffffff81a17e70 t cnp_hz_to_pwm
+ffffffff81a17eb0 t lpt_setup_backlight
+ffffffff81a180c0 t lpt_enable_backlight
+ffffffff81a182c0 t lpt_disable_backlight
+ffffffff81a183d0 t lpt_set_backlight
+ffffffff81a18440 t lpt_get_backlight
+ffffffff81a18490 t lpt_hz_to_pwm
+ffffffff81a18500 t spt_hz_to_pwm
+ffffffff81a18550 t pch_setup_backlight
+ffffffff81a18740 t pch_enable_backlight
+ffffffff81a18950 t pch_disable_backlight
+ffffffff81a18a50 t pch_set_backlight
+ffffffff81a18ac0 t pch_get_backlight
+ffffffff81a18b10 t pch_hz_to_pwm
+ffffffff81a18b60 t pwm_setup_backlight
+ffffffff81a18bc0 t pwm_enable_backlight
+ffffffff81a18c50 t pwm_disable_backlight
+ffffffff81a18c70 t pwm_set_backlight
+ffffffff81a18ca0 t pwm_get_backlight
+ffffffff81a18cd0 t vlv_setup_backlight
+ffffffff81a18ef0 t vlv_enable_backlight
+ffffffff81a190a0 t vlv_disable_backlight
+ffffffff81a19180 t vlv_set_backlight
+ffffffff81a19210 t vlv_get_backlight
+ffffffff81a192a0 t vlv_hz_to_pwm
+ffffffff81a19340 t i965_setup_backlight
+ffffffff81a195b0 t i965_enable_backlight
+ffffffff81a19780 t i965_disable_backlight
+ffffffff81a19850 t i9xx_set_backlight
+ffffffff81a19970 t i9xx_get_backlight
+ffffffff81a19a20 t i965_hz_to_pwm
+ffffffff81a19a80 t i9xx_setup_backlight
+ffffffff81a19d00 t i9xx_enable_backlight
+ffffffff81a19ed0 t i9xx_disable_backlight
+ffffffff81a19f50 t i9xx_hz_to_pwm
+ffffffff81a1a000 T intel_set_memory_cxsr
+ffffffff81a1a0a0 t _intel_set_memory_cxsr
+ffffffff81a1a300 T ilk_wm_max_level
+ffffffff81a1a350 T ilk_disable_lp_wm
+ffffffff81a1a420 T intel_enable_sagv
+ffffffff81a1a510 T sandybridge_pcode_write_timeout
+ffffffff81a1a6f0 T intel_disable_sagv
+ffffffff81a1a7f0 T skl_pcode_request
+ffffffff81a1aae0 T intel_can_enable_sagv
+ffffffff81a1ad00 T skl_ddb_get_hw_state
+ffffffff81a1b0a0 T skl_check_pipe_max_pixel_rate
+ffffffff81a1b430 t skl_plane_downscale_amount
+ffffffff81a1b590 T skl_wm_level_equals
+ffffffff81a1b5e0 T skl_ddb_allocation_overlaps
+ffffffff81a1b660 T skl_pipe_wm_get_hw_state
+ffffffff81a1b8c0 T skl_wm_get_hw_state
+ffffffff81a1ba20 T g4x_wm_get_hw_state
+ffffffff81a1c120 T g4x_wm_sanitize
+ffffffff81a1c2a0 t g4x_program_watermarks
+ffffffff81a1c5e0 T vlv_wm_get_hw_state
+ffffffff81a1d440 T vlv_wm_sanitize
+ffffffff81a1d5e0 t vlv_program_watermarks
+ffffffff81a1dc90 T ilk_wm_get_hw_state
+ffffffff81a1e0e0 T intel_update_watermarks
+ffffffff81a1e120 T intel_enable_ipc
+ffffffff81a1e1b0 T intel_init_ipc
+ffffffff81a1e270 T ironlake_set_drps
+ffffffff81a1e340 T intel_rps_mark_interactive
+ffffffff81a1e430 t rps_set_power
+ffffffff81a1e790 T gen6_rps_busy
+ffffffff81a1e880 T intel_set_rps
+ffffffff81a1e980 T gen6_rps_idle
+ffffffff81a1ea60 t gen6_set_rps
+ffffffff81a1ebb0 T gen6_rps_boost
+ffffffff81a1ed10 t valleyview_set_rps
+ffffffff81a1ee40 T i915_chipset_val
+ffffffff81a1eea0 t __i915_chipset_val
+ffffffff81a1f050 T i915_mch_val
+ffffffff81a1f0e0 T i915_update_gfx_val
+ffffffff81a1f200 T i915_gfx_val
+ffffffff81a1f260 t __i915_gfx_val
+ffffffff81a1f4c0 T i915_read_mch_val
+ffffffff81a1f540 T i915_gpu_raise
+ffffffff81a1f5b0 T i915_gpu_lower
+ffffffff81a1f620 T i915_gpu_busy
+ffffffff81a1f680 T i915_gpu_turbo_disable
+ffffffff81a1f780 T intel_gpu_ips_init
+ffffffff81a1f7c0 T intel_gpu_ips_teardown
+ffffffff81a1f7f0 T i915_rc6_ctx_wa_suspend
+ffffffff81a1f830 T i915_rc6_ctx_wa_resume
+ffffffff81a1f8a0 T i915_rc6_ctx_wa_check
+ffffffff81a1f970 T intel_init_gt_powersave
+ffffffff81a202e0 T intel_freq_opcode
+ffffffff81a20380 T sandybridge_pcode_read
+ffffffff81a20560 T intel_cleanup_gt_powersave
+ffffffff81a20600 T intel_suspend_gt_powersave
+ffffffff81a20630 T intel_sanitize_gt_powersave
+ffffffff81a20680 T intel_disable_gt_powersave
+ffffffff81a20970 t __intel_disable_rc6
+ffffffff81a20a60 T intel_enable_gt_powersave
+ffffffff81a22bf0 T intel_init_clock_gating
+ffffffff81a22c10 T intel_suspend_hw
+ffffffff81a22ca0 T intel_init_clock_gating_hooks
+ffffffff81a22e60 t icl_init_clock_gating
+ffffffff81a22ec0 t cnl_init_clock_gating
+ffffffff81a230a0 t cfl_init_clock_gating
+ffffffff81a23150 t skl_init_clock_gating
+ffffffff81a231f0 t kbl_init_clock_gating
+ffffffff81a23300 t bxt_init_clock_gating
+ffffffff81a23400 t glk_init_clock_gating
+ffffffff81a234e0 t bdw_init_clock_gating
+ffffffff81a238b0 t chv_init_clock_gating
+ffffffff81a23a90 t hsw_init_clock_gating
+ffffffff81a23cd0 t ivb_init_clock_gating
+ffffffff81a23fe0 t vlv_init_clock_gating
+ffffffff81a24220 t gen6_init_clock_gating
+ffffffff81a244a0 t ilk_init_clock_gating
+ffffffff81a246f0 t g4x_init_clock_gating
+ffffffff81a247e0 t i965gm_init_clock_gating
+ffffffff81a248c0 t i965g_init_clock_gating
+ffffffff81a24950 t gen3_init_clock_gating
+ffffffff81a24a40 t i85x_init_clock_gating
+ffffffff81a24ab0 t i830_init_clock_gating
+ffffffff81a24ae0 t nop_init_clock_gating
+ffffffff81a24b10 T intel_init_pm
+ffffffff81a254a0 t skl_initial_wm
+ffffffff81a25590 t skl_atomic_update_crtc_wm
+ffffffff81a25b40 t skl_compute_wm
+ffffffff81a270a0 t ilk_compute_pipe_wm
+ffffffff81a274a0 t ilk_compute_intermediate_wm
+ffffffff81a27660 t ilk_initial_watermarks
+ffffffff81a276d0 t ilk_optimize_watermarks
+ffffffff81a27740 t vlv_compute_pipe_wm
+ffffffff81a28350 t vlv_compute_intermediate_wm
+ffffffff81a286d0 t vlv_initial_watermarks
+ffffffff81a28780 t vlv_optimize_watermarks
+ffffffff81a28860 t vlv_atomic_update_fifo
+ffffffff81a28a80 t g4x_compute_pipe_wm
+ffffffff81a29550 t g4x_compute_intermediate_wm
+ffffffff81a299b0 t g4x_initial_watermarks
+ffffffff81a29a30 t g4x_optimize_watermarks
+ffffffff81a29ae0 t pineview_update_wm
+ffffffff81a2a020 t i965_update_wm
+ffffffff81a2a340 t i9xx_update_wm
+ffffffff81a2a830 t i9xx_get_fifo_size
+ffffffff81a2a890 t i845_update_wm
+ffffffff81a2a9f0 t i845_get_fifo_size
+ffffffff81a2aa40 t i830_get_fifo_size
+ffffffff81a2aab0 T intel_gpu_freq
+ffffffff81a2ab70 T intel_pm_setup
+ffffffff81a2abf0 T intel_rc6_residency_ns
+ffffffff81a2ae00 T intel_get_cagf
+ffffffff81a2ae50 t chv_set_memory_dvfs
+ffffffff81a2afe0 t gen6_set_rps_thresholds
+ffffffff81a2b130 t gen9_init_clock_gating
+ffffffff81a2b320 t g4x_disable_trickle_feed
+ffffffff81a2b470 t cpt_init_clock_gating
+ffffffff81a2b5e0 t intel_read_wm_latency
+ffffffff81a2ba20 t skl_compute_plane_wm_params
+ffffffff81a2be30 t skl_compute_wm_levels
+ffffffff81a2c420 t ilk_compute_wm_level
+ffffffff81a2c900 t ilk_validate_pipe_wm
+ffffffff81a2ca50 t ilk_program_watermarks
+ffffffff81a2d770 t ilk_wm_merge
+ffffffff81a2e000 T intel_psr_irq_control
+ffffffff81a2e050 T intel_psr_irq_handler
+ffffffff81a2e1c0 T intel_psr_init_dpcd
+ffffffff81a2e300 T intel_psr_compute_config
+ffffffff81a2e490 T intel_psr_enable
+ffffffff81a2e890 t intel_psr_activate
+ffffffff81a2eb50 T intel_psr_disable
+ffffffff81a2ec10 t intel_psr_disable_locked
+ffffffff81a2ee10 T intel_psr_wait_for_idle
+ffffffff81a2ee90 T intel_psr_invalidate
+ffffffff81a2ef80 t intel_psr_exit
+ffffffff81a2f080 T intel_psr_flush
+ffffffff81a2f1f0 T intel_psr_init
+ffffffff81a2f2d0 t intel_psr_work
+ffffffff81a2f3c0 T intel_psr_short_pulse
+ffffffff81a30000 T intel_ring_update_space
+ffffffff81a30090 T intel_ring_pin
+ffffffff81a30350 T intel_ring_reset
+ffffffff81a30430 T intel_ring_unpin
+ffffffff81a30680 T intel_engine_create_ring
+ffffffff81a308d0 T intel_ring_free
+ffffffff81a30930 T intel_engine_cleanup
+ffffffff81a30a20 T intel_legacy_submission_resume
+ffffffff81a30c90 T intel_ring_wait_for_space
+ffffffff81a30d90 t wait_for_space
+ffffffff81a30f70 T intel_ring_begin
+ffffffff81a313d0 T intel_ring_cacheline_align
+ffffffff81a315a0 T intel_init_render_ring_buffer
+ffffffff81a316b0 t intel_ring_default_vfuncs
+ffffffff81a31a10 t intel_rcs_ctx_init
+ffffffff81a31a60 t gen7_render_ring_flush
+ffffffff81a31ba0 t gen6_render_ring_flush
+ffffffff81a31d90 t gen4_render_ring_flush
+ffffffff81a31f10 t gen2_render_ring_flush
+ffffffff81a31fd0 t hsw_emit_bb_start
+ffffffff81a320a0 t init_render_ring
+ffffffff81a32250 t intel_init_ring_buffer
+ffffffff81a323f0 T intel_init_bsd_ring_buffer
+ffffffff81a32480 t gen6_bsd_set_default_submission
+ffffffff81a324d0 t gen6_bsd_ring_flush
+ffffffff81a325a0 t bsd_ring_flush
+ffffffff81a32650 T intel_init_blt_ring_buffer
+ffffffff81a32690 t gen6_ring_flush
+ffffffff81a32760 T intel_init_vebox_ring_buffer
+ffffffff81a327c0 t hsw_vebox_irq_enable
+ffffffff81a32810 t hsw_vebox_irq_disable
+ffffffff81a32860 t init_ring_common
+ffffffff81a32f20 t reset_prepare
+ffffffff81a32f60 t reset_ring
+ffffffff81a330f0 t reset_finish
+ffffffff81a33120 t intel_ring_context_pin
+ffffffff81a335a0 t ring_request_alloc
+ffffffff81a33f10 t i9xx_emit_breadcrumb
+ffffffff81a33fa0 t gen6_sema_emit_breadcrumb
+ffffffff81a34110 t i9xx_set_default_submission
+ffffffff81a34160 t gen6_emit_bb_start
+ffffffff81a34230 t i965_emit_bb_start
+ffffffff81a34300 t i830_emit_bb_start
+ffffffff81a344d0 t i915_emit_bb_start
+ffffffff81a34590 t gen6_irq_enable
+ffffffff81a345e0 t gen6_irq_disable
+ffffffff81a34630 t gen6_seqno_barrier
+ffffffff81a34680 t gen5_irq_enable
+ffffffff81a346a0 t gen5_irq_disable
+ffffffff81a346c0 t gen5_seqno_barrier
+ffffffff81a346e0 t i9xx_irq_enable
+ffffffff81a34760 t i9xx_irq_disable
+ffffffff81a347a0 t i8xx_irq_enable
+ffffffff81a34810 t i8xx_irq_disable
+ffffffff81a34850 t gen6_ring_sync_to
+ffffffff81a34950 t gen6_signal
+ffffffff81a34b80 t stop_ring
+ffffffff81a34d40 t i915_ggtt_offset
+ffffffff81a34e90 t intel_ring_context_unpin
+ffffffff81a34f10 t intel_ring_context_destroy
+ffffffff81a35000 t __context_unpin
+ffffffff81a350e0 t assert_ring_tail_valid
+ffffffff81a351b0 t i9xx_submit_request
+ffffffff81a35290 t cancel_requests
+ffffffff81a35360 t gen6_bsd_submit_request
+ffffffff81a36000 T intel_display_power_domain_str
+ffffffff81a36060 T __intel_display_power_is_enabled
+ffffffff81a36100 T intel_display_power_is_enabled
+ffffffff81a361d0 T intel_display_set_init_power
+ffffffff81a36240 T intel_display_power_get
+ffffffff81a36370 T intel_display_power_put
+ffffffff81a36500 T gen9_sanitize_dc_state
+ffffffff81a36580 T bxt_enable_dc9
+ffffffff81a36690 t gen9_set_dc_state
+ffffffff81a36840 T bxt_disable_dc9
+ffffffff81a368d0 T gen9_enable_dc5
+ffffffff81a36b20 T chv_phy_powergate_ch
+ffffffff81a36c00 t assert_chv_phy_status
+ffffffff81a36f10 T chv_phy_powergate_lanes
+ffffffff81a37140 T intel_runtime_pm_get
+ffffffff81a371d0 T intel_display_power_get_if_enabled
+ffffffff81a373f0 T intel_runtime_pm_get_if_in_use
+ffffffff81a37480 T intel_runtime_pm_put
+ffffffff81a37510 T intel_display_power_well_is_enabled
+ffffffff81a37570 T intel_power_domains_init
+ffffffff81a37900 T intel_power_domains_fini
+ffffffff81a37980 T icl_dbuf_slices_update
+ffffffff81a37b50 T bxt_display_core_init
+ffffffff81a37d20 T bxt_display_core_uninit
+ffffffff81a37e60 T intel_power_domains_init_hw
+ffffffff81a38a90 T intel_power_domains_suspend
+ffffffff81a39010 T intel_power_domains_verify_state
+ffffffff81a391a0 T intel_runtime_pm_get_noresume
+ffffffff81a39230 T intel_runtime_pm_enable
+ffffffff81a39260 t i9xx_power_well_sync_hw_noop
+ffffffff81a39290 t i9xx_always_on_power_well_noop
+ffffffff81a392c0 t i9xx_always_on_power_well_enabled
+ffffffff81a392f0 t hsw_power_well_sync_hw
+ffffffff81a39440 t hsw_power_well_enable
+ffffffff81a39720 t hsw_power_well_disable
+ffffffff81a397e0 t hsw_power_well_enabled
+ffffffff81a39870 t hsw_wait_for_power_well_disable
+ffffffff81a39af0 t gen9_dc_off_power_well_enable
+ffffffff81a39ca0 t gen9_dc_off_power_well_disable
+ffffffff81a39ec0 t gen9_dc_off_power_well_enabled
+ffffffff81a39f10 t icl_combo_phy_aux_power_well_enable
+ffffffff81a3a080 t icl_combo_phy_aux_power_well_disable
+ffffffff81a3a170 t bxt_dpio_cmn_power_well_enable
+ffffffff81a3a180 t bxt_dpio_cmn_power_well_disable
+ffffffff81a3a190 t bxt_dpio_cmn_power_well_enabled
+ffffffff81a3a1a0 t chv_pipe_power_well_enable
+ffffffff81a3a200 t chv_pipe_power_well_disable
+ffffffff81a3a290 t chv_pipe_power_well_enabled
+ffffffff81a3a360 t chv_set_pipe_power_well
+ffffffff81a3a540 t vlv_display_power_well_init
+ffffffff81a3a7b0 t chv_dpio_cmn_power_well_enable
+ffffffff81a3a950 t chv_dpio_cmn_power_well_disable
+ffffffff81a3aa40 t vlv_power_well_enabled
+ffffffff81a3ab10 t vlv_set_power_well
+ffffffff81a3acf0 t vlv_display_power_well_enable
+ffffffff81a3ad50 t vlv_display_power_well_disable
+ffffffff81a3adf0 t vlv_power_well_enable
+ffffffff81a3ae10 t vlv_power_well_disable
+ffffffff81a3ae20 t vlv_dpio_cmn_power_well_enable
+ffffffff81a3aed0 t vlv_dpio_cmn_power_well_disable
+ffffffff81a3afa0 t i830_pipes_power_well_sync_hw
+ffffffff81a3b080 t i830_pipes_power_well_enable
+ffffffff81a3b130 t i830_pipes_power_well_disable
+ffffffff81a3b160 t i830_pipes_power_well_enabled
+ffffffff81a3b1f0 t cnl_set_procmon_ref_values
+ffffffff81a3c000 T intel_sdvo_port_enabled
+ffffffff81a3c0a0 T intel_sdvo_init
+ffffffff81a3c720 t intel_sdvo_compute_config
+ffffffff81a3cae0 t pch_disable_sdvo
+ffffffff81a3cb10 t pch_post_disable_sdvo
+ffffffff81a3cb20 t intel_disable_sdvo
+ffffffff81a3cca0 t intel_sdvo_pre_enable
+ffffffff81a3d590 t intel_enable_sdvo
+ffffffff81a3d730 t intel_sdvo_get_hw_state
+ffffffff81a3d810 t intel_sdvo_get_config
+ffffffff81a3da90 t intel_sdvo_ddc_proxy_xfer
+ffffffff81a3db30 t intel_sdvo_ddc_proxy_func
+ffffffff81a3db60 t __intel_sdvo_write_cmd
+ffffffff81a3df90 t intel_sdvo_enc_destroy
+ffffffff81a3dfc0 t intel_sdvo_get_preferred_input_mode
+ffffffff81a3e2c0 t intel_sdvo_get_dtd_from_mode
+ffffffff81a3e430 t intel_sdvo_read_response
+ffffffff81a3e7e0 t intel_sdvo_write_sdvox
+ffffffff81a3e9c0 t intel_sdvo_write_infoframe
+ffffffff81a3eb40 t intel_sdvo_dvi_init
+ffffffff81a3ed90 t intel_sdvo_tv_init
+ffffffff81a3f080 t intel_sdvo_analog_init
+ffffffff81a3f1b0 t intel_sdvo_lvds_init
+ffffffff81a3f2f0 t intel_sdvo_hotplug
+ffffffff81a3f330 t intel_sdvo_connector_get_hw_state
+ffffffff81a3f3c0 t intel_sdvo_detect
+ffffffff81a3f6a0 t intel_sdvo_connector_register
+ffffffff81a3f6b0 t intel_sdvo_connector_unregister
+ffffffff81a3f6c0 t intel_sdvo_destroy
+ffffffff81a3f6f0 t intel_sdvo_connector_duplicate_state
+ffffffff81a3f770 t intel_sdvo_connector_atomic_set_property
+ffffffff81a3f940 t intel_sdvo_connector_atomic_get_property
+ffffffff81a3fb50 t intel_sdvo_get_modes
+ffffffff81a3fdd0 t intel_sdvo_mode_valid
+ffffffff81a3fe60 t intel_sdvo_atomic_check
+ffffffff81a3ff10 t intel_sdvo_create_enhance_property
+ffffffff81a41000 T vlv_punit_read
+ffffffff81a410a0 t vlv_sideband_rw
+ffffffff81a41240 T vlv_punit_write
+ffffffff81a412e0 T vlv_bunit_read
+ffffffff81a41330 T vlv_bunit_write
+ffffffff81a41380 T vlv_nc_read
+ffffffff81a41420 T vlv_iosf_sb_read
+ffffffff81a41470 T vlv_iosf_sb_write
+ffffffff81a414c0 T vlv_cck_read
+ffffffff81a41510 T vlv_cck_write
+ffffffff81a41560 T vlv_ccu_read
+ffffffff81a415b0 T vlv_ccu_write
+ffffffff81a41600 T vlv_dpio_read
+ffffffff81a41690 T vlv_dpio_write
+ffffffff81a416e0 T intel_sbi_read
+ffffffff81a41890 T intel_sbi_write
+ffffffff81a41a40 T vlv_flisdsi_read
+ffffffff81a41a90 T vlv_flisdsi_write
+ffffffff81a42000 T gen3_stolen_base
+ffffffff81a42050 T gen11_stolen_base
+ffffffff81a420d0 T i830_stolen_size
+ffffffff81a42140 T gen3_stolen_size
+ffffffff81a421b0 T gen6_stolen_size
+ffffffff81a42200 T chv_stolen_size
+ffffffff81a42270 T gen8_stolen_size
+ffffffff81a422c0 T gen9_stolen_size
+ffffffff81a42330 T intel_init_stolen_res
+ffffffff81a43000 T intel_usecs_to_scanlines
+ffffffff81a43050 T intel_pipe_update_start
+ffffffff81a43430 T intel_pipe_update_end
+ffffffff81a435d0 T skl_update_plane
+ffffffff81a43a00 t intel_plane_ggtt_offset
+ffffffff81a43b70 T skl_disable_plane
+ffffffff81a43bf0 T skl_plane_get_hw_state
+ffffffff81a43cb0 T intel_sprite_set_colorkey_ioctl
+ffffffff81a43f90 T skl_plane_has_ccs
+ffffffff81a43ff0 T intel_sprite_plane_create
+ffffffff81a44430 t vlv_update_plane
+ffffffff81a44870 t vlv_disable_plane
+ffffffff81a448f0 t vlv_plane_get_hw_state
+ffffffff81a449a0 t ivb_update_plane
+ffffffff81a44c00 t ivb_disable_plane
+ffffffff81a44ca0 t ivb_plane_get_hw_state
+ffffffff81a44d50 t g4x_update_plane
+ffffffff81a44f80 t g4x_disable_plane
+ffffffff81a45010 t g4x_plane_get_hw_state
+ffffffff81a450c0 t intel_check_sprite_plane
+ffffffff81a45790 t skl_plane_format_mod_supported
+ffffffff81a458c0 t vlv_sprite_format_mod_supported
+ffffffff81a45990 t snb_sprite_format_mod_supported
+ffffffff81a45a20 t g4x_sprite_format_mod_supported
+ffffffff81a46000 T intel_tv_init
+ffffffff81a46390 t intel_tv_compute_config
+ffffffff81a46400 t intel_tv_get_config
+ffffffff81a46440 t intel_tv_pre_enable
+ffffffff81a46ca0 t intel_enable_tv
+ffffffff81a46d10 t intel_disable_tv
+ffffffff81a46d70 t intel_tv_get_hw_state
+ffffffff81a46dd0 t intel_tv_destroy
+ffffffff81a46e00 t intel_tv_get_modes
+ffffffff81a47000 t intel_tv_detect
+ffffffff81a47340 t intel_tv_mode_valid
+ffffffff81a473e0 t intel_tv_atomic_check
+ffffffff81a48000 T intel_uc_init_early
+ffffffff81a482c0 T intel_uc_cleanup_early
+ffffffff81a48310 T intel_uc_init_mmio
+ffffffff81a48330 T intel_uc_init_misc
+ffffffff81a48440 T intel_uc_fini_misc
+ffffffff81a484e0 T intel_uc_init
+ffffffff81a48600 T intel_uc_fini
+ffffffff81a486f0 T intel_uc_sanitize
+ffffffff81a488a0 T intel_uc_init_hw
+ffffffff81a48c80 T intel_uc_fini_hw
+ffffffff81a48dc0 T intel_uc_suspend
+ffffffff81a48e70 T intel_uc_resume
+ffffffff81a49000 T intel_uc_fw_fetch
+ffffffff81a493d0 T intel_uc_fw_upload
+ffffffff81a49580 T intel_uc_fw_fini
+ffffffff81a495e0 T intel_uc_fw_dump
+ffffffff81a4a000 T intel_uncore_forcewake_domain_to_str
+ffffffff81a4a060 T intel_uncore_fw_release_timer
+ffffffff81a4a150 T intel_uncore_edram_size
+ffffffff81a4a1c0 T intel_uncore_suspend
+ffffffff81a4a200 t intel_uncore_forcewake_reset
+ffffffff81a4a410 T intel_uncore_resume_early
+ffffffff81a4a440 t __intel_uncore_early_sanitize
+ffffffff81a4a5c0 T intel_uncore_runtime_resume
+ffffffff81a4a5f0 T intel_uncore_sanitize
+ffffffff81a4a600 T intel_uncore_forcewake_get
+ffffffff81a4a740 T intel_uncore_forcewake_user_get
+ffffffff81a4a850 T intel_uncore_forcewake_get__locked
+ffffffff81a4a920 T intel_uncore_forcewake_user_put
+ffffffff81a4aaf0 T intel_uncore_unclaimed_mmio
+ffffffff81a4abc0 T intel_uncore_forcewake_put__locked
+ffffffff81a4acc0 T intel_uncore_forcewake_put
+ffffffff81a4ade0 T assert_forcewakes_inactive
+ffffffff81a4ae30 T assert_forcewakes_active
+ffffffff81a4af00 T intel_uncore_init
+ffffffff81a4bdf0 t i915_pmic_bus_access_notifier
+ffffffff81a4be60 t gen2_write8
+ffffffff81a4bf00 t gen2_write16
+ffffffff81a4bfb0 t gen2_write32
+ffffffff81a4c050 t gen2_read8
+ffffffff81a4c0f0 t gen2_read16
+ffffffff81a4c190 t gen2_read32
+ffffffff81a4c230 t gen2_read64
+ffffffff81a4c2d0 t gen5_write8
+ffffffff81a4c390 t gen5_write16
+ffffffff81a4c450 t gen5_write32
+ffffffff81a4c510 t gen5_read8
+ffffffff81a4c5c0 t gen5_read16
+ffffffff81a4c670 t gen5_read32
+ffffffff81a4c720 t gen5_read64
+ffffffff81a4c7d0 t gen6_write8
+ffffffff81a4ca20 t gen6_write16
+ffffffff81a4cc70 t gen6_write32
+ffffffff81a4cec0 t fwtable_read8
+ffffffff81a4d1e0 t fwtable_read16
+ffffffff81a4d500 t fwtable_read32
+ffffffff81a4d820 t fwtable_read64
+ffffffff81a4db40 t gen6_read8
+ffffffff81a4ddc0 t gen6_read16
+ffffffff81a4e040 t gen6_read32
+ffffffff81a4e2c0 t gen6_read64
+ffffffff81a4e540 t fwtable_write8
+ffffffff81a4e8a0 t fwtable_write16
+ffffffff81a4ec00 t fwtable_write32
+ffffffff81a4ef60 t gen8_write8
+ffffffff81a4f220 t gen8_write16
+ffffffff81a4f4e0 t gen8_write32
+ffffffff81a4f7a0 t gen11_fwtable_write8
+ffffffff81a4fb10 t gen11_fwtable_write16
+ffffffff81a4fe80 t gen11_fwtable_write32
+ffffffff81a501f0 t gen11_fwtable_read8
+ffffffff81a50520 t gen11_fwtable_read16
+ffffffff81a50850 t gen11_fwtable_read32
+ffffffff81a50b80 t gen11_fwtable_read64
+ffffffff81a50eb0 T intel_uncore_prune
+ffffffff81a51340 T intel_uncore_fini
+ffffffff81a51360 T i915_reg_read_ioctl
+ffffffff81a51510 T __intel_wait_for_register_fw
+ffffffff81a51870 t local_clock
+ffffffff81a518c0 T __intel_wait_for_register
+ffffffff81a51bc0 T intel_uncore_forcewake_for_reg
+ffffffff81a520c0 T intel_gpu_reset
+ffffffff81a522e0 T intel_has_gpu_reset
+ffffffff81a52340 T intel_has_reset_engine
+ffffffff81a52380 T intel_reset_guc
+ffffffff81a52470 T intel_uncore_arm_unclaimed_mmio_detection
+ffffffff81a52560 t fw_domains_get_with_fallback
+ffffffff81a52a70 t fw_domains_put
+ffffffff81a52b60 t fw_domains_get
+ffffffff81a52ed0 t fw_domains_get_with_thread_status
+ffffffff81a52fe0 t fw_domain_wait_ack_with_fallback
+ffffffff81a53230 t __gen6_gt_wait_for_fifo
+ffffffff81a53320 t ___force_wake_auto
+ffffffff81a533f0 t gen8_reset_engines
+ffffffff81a53650 t gen6_reset_engines
+ffffffff81a53720 t ironlake_do_reset
+ffffffff81a53820 t g4x_do_reset
+ffffffff81a53af0 t g33_do_reset
+ffffffff81a53c00 t i915_do_reset
+ffffffff81a54000 T intel_wopcm_init_early
+ffffffff81a54030 T intel_wopcm_init
+ffffffff81a54220 T intel_wopcm_init_hw
+ffffffff81a55000 T intel_ctx_workarounds_init
+ffffffff81a55610 T intel_ctx_workarounds_emit
+ffffffff81a55780 T intel_gt_workarounds_apply
+ffffffff81a561b0 T intel_whitelist_workarounds_apply
+ffffffff81a564c0 t wa_add
+ffffffff81a56730 t gen9_ctx_workarounds_init
+ffffffff81a568f0 t gen9_gt_workarounds_apply
+ffffffff81a56af0 t wa_init_mcr
+ffffffff81a57000 T pixel_format_from_register_bits
+ffffffff81a57060 T vlv_dsi_wait_for_fifo_empty
+ffffffff81a570f0 T vlv_dsi_init
+ffffffff81a575b0 t intel_dsi_compute_config
+ffffffff81a576c0 t intel_dsi_pre_enable
+ffffffff81a59220 t intel_dsi_enable_nop
+ffffffff81a59250 t intel_dsi_disable
+ffffffff81a594a0 t intel_dsi_post_disable
+ffffffff81a5a3f0 t intel_dsi_get_hw_state
+ffffffff81a5a650 t intel_dsi_get_config
+ffffffff81a5ad30 t intel_dsi_encoder_destroy
+ffffffff81a5ad40 t intel_dsi_prepare
+ffffffff81a5b9b0 t intel_dsi_host_attach
+ffffffff81a5b9e0 t intel_dsi_host_detach
+ffffffff81a5ba10 t intel_dsi_host_transfer
+ffffffff81a5be10 t intel_dsi_connector_destroy
+ffffffff81a5be50 t intel_dsi_get_modes
+ffffffff81a5bec0 t intel_dsi_mode_valid
+ffffffff81a5c000 T vlv_dsi_pll_compute
+ffffffff81a5c370 T vlv_dsi_pll_enable
+ffffffff81a5c530 T vlv_dsi_pll_disable
+ffffffff81a5c590 T bxt_dsi_pll_is_enabled
+ffffffff81a5c630 T bxt_dsi_pll_disable
+ffffffff81a5c6f0 T vlv_dsi_get_pclk
+ffffffff81a5c8d0 T bxt_dsi_get_pclk
+ffffffff81a5c9b0 T vlv_dsi_reset_clocks
+ffffffff81a5ca40 T bxt_dsi_pll_compute
+ffffffff81a5cb30 T bxt_dsi_pll_enable
+ffffffff81a5ce80 T bxt_dsi_reset_clocks
+ffffffff81a5d000 T atom_execute_table_scratch_unlocked
+ffffffff81a5d0a0 t atom_execute_table_locked
+ffffffff81a5d420 T atom_execute_table
+ffffffff81a5d4d0 T atom_parse
+ffffffff81a5d720 T atom_destroy
+ffffffff81a5d760 T atom_asic_init
+ffffffff81a5d970 T atom_parse_data_header
+ffffffff81a5da20 T atom_parse_cmd_header
+ffffffff81a5dab0 T atom_allocate_fb_scratch
+ffffffff81a5db70 t atom_op_move
+ffffffff81a5dd50 t atom_op_and
+ffffffff81a5df20 t atom_op_or
+ffffffff81a5e0f0 t atom_op_shift_left
+ffffffff81a5e310 t atom_op_shift_right
+ffffffff81a5e530 t atom_op_mul
+ffffffff81a5e690 t atom_op_div
+ffffffff81a5e810 t atom_op_add
+ffffffff81a5e9e0 t atom_op_sub
+ffffffff81a5ebc0 t atom_op_setport
+ffffffff81a5ed30 t atom_op_setregblock
+ffffffff81a5edf0 t atom_op_setfbbase
+ffffffff81a5eec0 t atom_op_compare
+ffffffff81a5f0d0 t atom_op_switch
+ffffffff81a5f320 t atom_op_jump
+ffffffff81a5f5c0 t atom_op_test
+ffffffff81a5f790 t atom_op_delay
+ffffffff81a5f880 t atom_op_calltable
+ffffffff81a5f9d0 t atom_op_repeat
+ffffffff81a5fa00 t atom_op_clear
+ffffffff81a5fb10 t atom_op_nop
+ffffffff81a5fb40 t atom_op_eot
+ffffffff81a5fb70 t atom_op_mask
+ffffffff81a5fe40 t atom_op_postcard
+ffffffff81a5fee0 t atom_op_beep
+ffffffff81a5ff00 t atom_op_savereg
+ffffffff81a5ff30 t atom_op_restorereg
+ffffffff81a5ff60 t atom_op_setdatablock
+ffffffff81a600a0 t atom_op_xor
+ffffffff81a60270 t atom_op_shl
+ffffffff81a60480 t atom_op_shr
+ffffffff81a60690 t atom_op_debug
+ffffffff81a606c0 t atom_put_dst
+ffffffff81a60bc0 t atom_get_src_int
+ffffffff81a61360 t atom_iio_execute
+ffffffff81a62000 T atombios_crtc_dpms
+ffffffff81a621b0 t atombios_blank_crtc
+ffffffff81a622d0 T atombios_crtc_set_base
+ffffffff81a62320 t dce4_crtc_do_set_base
+ffffffff81a62e20 t avivo_crtc_do_set_base
+ffffffff81a63640 T atombios_crtc_set_base_atomic
+ffffffff81a63680 T radeon_atom_disp_eng_pll_init
+ffffffff81a63760 t atombios_crtc_set_disp_eng_pll
+ffffffff81a63870 t atombios_crtc_program_ss
+ffffffff81a63ad0 T atombios_crtc_mode_set
+ffffffff81a64640 T radeon_atombios_init_crtc
+ffffffff81a64730 t radeon_bo_reserve
+ffffffff81a648e0 t radeon_bo_unreserve
+ffffffff81a649d0 t atombios_disable_ss
+ffffffff81a64b40 t atombios_crtc_program_pll
+ffffffff81a64e00 t atombios_crtc_prepare
+ffffffff81a64eb0 t atombios_crtc_commit
+ffffffff81a64f20 t atombios_crtc_mode_fixup
+ffffffff81a65ce0 t atombios_crtc_disable
+ffffffff81a65f40 t radeon_get_shared_nondp_ppll
+ffffffff81a67000 T radeon_atom_copy_swap
+ffffffff81a67010 T radeon_dp_aux_init
+ffffffff81a670e0 t radeon_dp_aux_transfer_atom
+ffffffff81a672c0 T radeon_dp_getsinktype
+ffffffff81a67330 T radeon_dp_getdpcd
+ffffffff81a67410 T radeon_dp_get_panel_mode
+ffffffff81a67510 T radeon_dp_set_link_config
+ffffffff81a67590 t radeon_dp_get_dp_link_config
+ffffffff81a67720 T radeon_dp_mode_valid_helper
+ffffffff81a677d0 T radeon_dp_needs_link_train
+ffffffff81a67840 T radeon_dp_set_rx_power_state
+ffffffff81a678c0 T radeon_dp_link_train
+ffffffff81a68100 t radeon_process_aux_ch
+ffffffff81a69000 T atombios_get_backlight_level
+ffffffff81a69080 T atombios_set_backlight_level
+ffffffff81a69240 T atombios_dig_transmitter_setup
+ffffffff81a69260 T radeon_atom_backlight_init
+ffffffff81a69420 t radeon_atom_backlight_get_brightness
+ffffffff81a69490 T atombios_dvo_setup
+ffffffff81a69660 T atombios_digital_setup
+ffffffff81a698e0 T atombios_get_encoder_mode
+ffffffff81a69bc0 T atombios_dig_encoder_setup2
+ffffffff81a6a000 T atombios_dig_encoder_setup
+ffffffff81a6a020 T atombios_dig_transmitter_setup2
+ffffffff81a6a9f0 T atombios_set_edp_panel_power
+ffffffff81a6ab10 T atombios_set_mst_encoder_crtc_source
+ffffffff81a6abf0 T radeon_atom_release_dig_encoder
+ffffffff81a6ac30 T radeon_atom_pick_dig_encoder
+ffffffff81a6ae50 T radeon_atom_encoder_init
+ffffffff81a6af20 t atombios_external_encoder_setup
+ffffffff81a6b170 T radeon_atom_ext_encoder_setup_ddc
+ffffffff81a6b1c0 T radeon_enc_destroy
+ffffffff81a6b260 T radeon_add_atom_encoder
+ffffffff81a6b6b0 t radeon_atom_backlight_update_status
+ffffffff81a6b710 t radeon_atom_encoder_dpms
+ffffffff81a6b9f0 t radeon_atom_mode_fixup
+ffffffff81a6bb50 t radeon_atom_encoder_prepare
+ffffffff81a6c010 t radeon_atom_encoder_commit
+ffffffff81a6c040 t radeon_atom_encoder_mode_set
+ffffffff81a6c3d0 t radeon_atom_dig_detect
+ffffffff81a6c4d0 t radeon_atom_encoder_disable
+ffffffff81a6c6f0 t radeon_atom_encoder_dpms_avivo
+ffffffff81a6c940 t radeon_atom_encoder_dpms_dig
+ffffffff81a6ce80 t atombios_yuv_setup
+ffffffff81a6cfd0 t atombios_tv_setup
+ffffffff81a6d080 t radeon_atom_dac_detect
+ffffffff81a6d230 t radeon_atom_ext_dpms
+ffffffff81a6d260 t radeon_atom_ext_prepare
+ffffffff81a6d290 t radeon_atom_ext_commit
+ffffffff81a6d2c0 t radeon_atom_ext_mode_set
+ffffffff81a6d2f0 t radeon_atom_ext_disable
+ffffffff81a6e000 T radeon_atom_hw_i2c_xfer
+ffffffff81a6e370 T radeon_atom_hw_i2c_func
+ffffffff81a6f000 T btc_get_max_clock_from_voltage_dependency_table
+ffffffff81a6f0d0 T btc_apply_voltage_dependency_rules
+ffffffff81a6f150 T btc_skip_blacklist_clocks
+ffffffff81a6f240 T btc_adjust_clock_combinations
+ffffffff81a6f350 T btc_apply_voltage_delta_rules
+ffffffff81a6f480 T btc_program_mgcg_hw_sequence
+ffffffff81a6f5a0 T btc_dpm_enabled
+ffffffff81a6f5b0 T btc_notify_uvd_to_smc
+ffffffff81a6f640 T btc_reset_to_default
+ffffffff81a6f690 T btc_read_arb_registers
+ffffffff81a6f760 T btc_dpm_vblank_too_short
+ffffffff81a6f7c0 T btc_dpm_pre_set_power_state
+ffffffff81a70720 T btc_dpm_set_power_state
+ffffffff81a70c00 T btc_dpm_post_set_power_state
+ffffffff81a70d20 T btc_dpm_enable
+ffffffff81a71f70 t btc_enable_dynamic_pcie_gen2
+ffffffff81a72110 T btc_dpm_disable
+ffffffff81a72620 T btc_dpm_setup_asic
+ffffffff81a72740 T btc_dpm_init
+ffffffff81a72b40 T btc_dpm_fini
+ffffffff81a72be0 T btc_dpm_debugfs_print_current_performance_level
+ffffffff81a72c20 T btc_dpm_get_current_sclk
+ffffffff81a72cb0 T btc_dpm_get_current_mclk
+ffffffff81a72d40 T btc_dpm_get_sclk
+ffffffff81a72d90 T btc_dpm_get_mclk
+ffffffff81a73000 T ci_dpm_powergate_uvd
+ffffffff81a734a0 T ci_dpm_vblank_too_short
+ffffffff81a73520 T ci_fan_ctrl_get_fan_speed_percent
+ffffffff81a735c0 T ci_fan_ctrl_set_fan_speed_percent
+ffffffff81a73690 T ci_fan_ctrl_set_mode
+ffffffff81a73850 t ci_fan_ctrl_set_static_mode
+ffffffff81a73910 t ci_thermal_start_smc_fan_control
+ffffffff81a73bb0 T ci_fan_ctrl_get_mode
+ffffffff81a73c00 T ci_dpm_force_performance_level
+ffffffff81a74600 t ci_send_msg_to_smc
+ffffffff81a746e0 t ci_upload_dpm_level_enable_mask
+ffffffff81a74ad0 T ci_dpm_pre_set_power_state
+ffffffff81a74dc0 T ci_dpm_post_set_power_state
+ffffffff81a74e90 T ci_dpm_setup_asic
+ffffffff81a75110 T ci_dpm_enable
+ffffffff81a794e0 t ci_enable_didt
+ffffffff81a797c0 t ci_enable_power_containment
+ffffffff81a79da0 T ci_dpm_late_enable
+ffffffff81a79fd0 T ci_dpm_disable
+ffffffff81a7a9d0 T ci_dpm_set_power_state
+ffffffff81a7bd00 T ci_dpm_display_configuration_changed
+ffffffff81a7bef0 T ci_dpm_fini
+ffffffff81a7bf90 T ci_dpm_init
+ffffffff81a7d680 T ci_dpm_debugfs_print_current_performance_level
+ffffffff81a7d850 T ci_dpm_print_power_state
+ffffffff81a7d910 T ci_dpm_get_current_sclk
+ffffffff81a7da20 T ci_dpm_get_current_mclk
+ffffffff81a7db30 T ci_dpm_get_sclk
+ffffffff81a7db80 T ci_dpm_get_mclk
+ffffffff81a7dbd0 t ci_populate_all_graphic_levels
+ffffffff81a7e140 t ci_populate_all_memory_levels
+ffffffff81a7eac0 t ci_do_program_memory_timing_parameters
+ffffffff81a7ed60 t ci_populate_smc_voltage_table
+ffffffff81a7eec0 t ci_enable_sclk_mclk_dpm
+ffffffff81a80000 T ci_copy_bytes_to_smc
+ffffffff81a80330 T ci_start_smc
+ffffffff81a80370 T ci_reset_smc
+ffffffff81a803b0 T ci_program_jump_on_start
+ffffffff81a803e0 T ci_stop_smc_clock
+ffffffff81a80420 T ci_start_smc_clock
+ffffffff81a80460 T ci_is_smc_running
+ffffffff81a804d0 T ci_load_smc_ucode
+ffffffff81a806c0 T ci_read_smc_sram_dword
+ffffffff81a807e0 T ci_write_smc_sram_dword
+ffffffff81a81000 T cik_get_allowed_info_register
+ffffffff81a810b0 T cik_didt_rreg
+ffffffff81a81170 T cik_didt_wreg
+ffffffff81a81210 T ci_get_temp
+ffffffff81a81260 T kv_get_temp
+ffffffff81a812b0 T cik_pciep_rreg
+ffffffff81a81370 T cik_pciep_wreg
+ffffffff81a81420 T cik_get_xclk
+ffffffff81a81490 T cik_mm_rdoorbell
+ffffffff81a814f0 T cik_mm_wdoorbell
+ffffffff81a81530 T ci_mc_load_microcode
+ffffffff81a819b0 T cik_ring_test
+ffffffff81a81c50 T cik_fence_gfx_ring_emit
+ffffffff81a82050 T cik_fence_compute_ring_emit
+ffffffff81a822d0 T cik_semaphore_ring_emit
+ffffffff81a824a0 T cik_copy_cpdma
+ffffffff81a82890 T cik_ring_ib_execute
+ffffffff81a82e50 T cik_ib_test
+ffffffff81a83130 T cik_gfx_get_rptr
+ffffffff81a83190 T cik_gfx_get_wptr
+ffffffff81a831c0 T cik_gfx_set_wptr
+ffffffff81a83210 T cik_compute_get_rptr
+ffffffff81a83310 T cik_compute_get_wptr
+ffffffff81a83410 T cik_compute_set_wptr
+ffffffff81a83470 T cik_gpu_check_soft_reset
+ffffffff81a83620 T cik_asic_reset
+ffffffff81a83c00 t cik_gpu_pci_config_reset
+ffffffff81a84730 T cik_gfx_is_lockup
+ffffffff81a84790 T cik_pcie_gart_tlb_flush
+ffffffff81a847f0 T cik_ib_parse
+ffffffff81a84820 T cik_vm_init
+ffffffff81a84890 T cik_vm_fini
+ffffffff81a848c0 T cik_vm_flush
+ffffffff81a85600 T cik_enter_rlc_safe_mode
+ffffffff81a85710 T cik_exit_rlc_safe_mode
+ffffffff81a85740 T cik_update_cg
+ffffffff81a85e80 t cik_enable_mgcg
+ffffffff81a86550 t cik_enable_cgcg
+ffffffff81a86a10 T cik_init_cp_pg_table
+ffffffff81a86ce0 T cik_get_csb_size
+ffffffff81a86d70 T cik_get_csb_buffer
+ffffffff81a86f20 T cik_irq_set
+ffffffff81a87c80 t cik_disable_interrupt_state
+ffffffff81a88300 T cik_irq_process
+ffffffff81a89290 t cik_irq_ack
+ffffffff81a89f30 T cik_resume
+ffffffff81a89fc0 t cik_init_golden_registers
+ffffffff81a8a180 t cik_startup
+ffffffff81a90460 T cik_suspend
+ffffffff81a90740 t cik_irq_suspend
+ffffffff81a908d0 t cik_pcie_gart_disable
+ffffffff81a90a40 T cik_init
+ffffffff81a911a0 t cik_init_microcode
+ffffffff81a92240 T cik_fini
+ffffffff81a925a0 T dce8_program_fmt
+ffffffff81a926e0 T dce8_bandwidth_update
+ffffffff81a92fe0 T cik_get_gpu_clock_counter
+ffffffff81a930c0 T cik_set_uvd_clocks
+ffffffff81a93130 t cik_set_uvd_clock
+ffffffff81a932b0 T cik_set_vce_clocks
+ffffffff81a93500 t cik_wait_for_rlc_serdes
+ffffffff81a93720 t cik_get_cu_active_bitmap
+ffffffff81a938e0 t radeon_bo_reserve
+ffffffff81a93a90 t radeon_bo_unreserve
+ffffffff81a93b80 t cik_update_gfx_pg
+ffffffff81a93e30 t cik_compute_stop
+ffffffff81a93ff0 t cik_cp_compute_fini
+ffffffff81a941a0 t dce8_latency_watermark
+ffffffff81a95000 T cik_sdma_get_rptr
+ffffffff81a95080 T cik_sdma_get_wptr
+ffffffff81a950e0 T cik_sdma_set_wptr
+ffffffff81a95150 T cik_sdma_ring_ib_execute
+ffffffff81a95570 T cik_sdma_fence_ring_emit
+ffffffff81a95750 t cik_sdma_hdp_flush_ring_emit
+ffffffff81a95990 T cik_sdma_semaphore_ring_emit
+ffffffff81a95ab0 T cik_sdma_enable
+ffffffff81a95d90 T cik_sdma_resume
+ffffffff81a96440 T cik_sdma_fini
+ffffffff81a96480 T cik_copy_dma
+ffffffff81a96880 T cik_sdma_ring_test
+ffffffff81a96b20 T cik_sdma_ib_test
+ffffffff81a96d50 T cik_sdma_is_lockup
+ffffffff81a96dd0 T cik_sdma_vm_copy_pages
+ffffffff81a96ee0 T cik_sdma_vm_write_pages
+ffffffff81a97080 T cik_sdma_vm_set_pages
+ffffffff81a971f0 T cik_sdma_vm_pad_ib
+ffffffff81a97240 T cik_dma_vm_flush
+ffffffff81a98000 T cypress_enable_spread_spectrum
+ffffffff81a981e0 T cypress_start_dpm
+ffffffff81a98240 T cypress_enable_sclk_control
+ffffffff81a982b0 T cypress_enable_mclk_control
+ffffffff81a98320 T cypress_notify_smc_display_change
+ffffffff81a98360 T cypress_program_response_times
+ffffffff81a98430 T cypress_advertise_gen2_capability
+ffffffff81a98500 T cypress_notify_link_speed_change_after_state_change
+ffffffff81a985d0 T cypress_notify_link_speed_change_before_state_change
+ffffffff81a98680 T cypress_get_strobe_mode_settings
+ffffffff81a98780 T cypress_get_mclk_frequency_ratio
+ffffffff81a98830 T cypress_map_clkf_to_ibias
+ffffffff81a988f0 T cypress_convert_power_level_to_smc
+ffffffff81a98d00 t cypress_populate_mclk_value
+ffffffff81a990f0 T cypress_upload_sw_state
+ffffffff81a99280 T cypress_upload_mc_reg_table
+ffffffff81a99330 t cypress_convert_mc_reg_table_to_smc
+ffffffff81a99590 T cypress_calculate_burst_time
+ffffffff81a99610 T cypress_program_memory_timing_parameters
+ffffffff81a99790 T cypress_populate_smc_initial_state
+ffffffff81a99b20 T cypress_populate_smc_acpi_state
+ffffffff81a99eb0 T cypress_construct_voltage_tables
+ffffffff81a99f50 t cypress_trim_voltage_table_to_fit_state_table
+ffffffff81a9a140 T cypress_populate_smc_voltage_tables
+ffffffff81a9a280 T cypress_get_mvdd_configuration
+ffffffff81a9a360 T cypress_populate_mc_reg_table
+ffffffff81a9a5a0 T cypress_get_table_locations
+ffffffff81a9a680 T cypress_enable_display_gap
+ffffffff81a9a6e0 T cypress_dpm_setup_asic
+ffffffff81a9a7d0 T cypress_dpm_enable
+ffffffff81a9b360 t cypress_force_mc_use_s1
+ffffffff81a9b650 t cypress_enable_dynamic_pcie_gen2
+ffffffff81a9b7d0 t cypress_gfx_clock_gating_enable
+ffffffff81a9bbd0 t cypress_mg_clock_gating_enable
+ffffffff81a9bfb0 T cypress_dpm_disable
+ffffffff81a9c290 T cypress_dpm_set_power_state
+ffffffff81a9c570 T cypress_dpm_display_configuration_changed
+ffffffff81a9c690 T cypress_dpm_init
+ffffffff81a9c900 T cypress_dpm_fini
+ffffffff81a9c990 T cypress_dpm_vblank_too_short
+ffffffff81a9c9f0 t cypress_wait_for_mc_sequencer
+ffffffff81a9d000 T dce3_2_afmt_hdmi_write_speaker_allocation
+ffffffff81a9d070 T dce3_2_afmt_dp_write_speaker_allocation
+ffffffff81a9d0e0 T dce3_2_afmt_write_sad_regs
+ffffffff81a9d1f0 T dce3_2_audio_set_dto
+ffffffff81a9d3f0 T dce3_2_hdmi_update_acr
+ffffffff81a9d7c0 T dce3_2_set_audio_packet
+ffffffff81a9d990 T dce3_2_set_mute
+ffffffff81a9e000 T dce6_endpoint_rreg
+ffffffff81a9e0f0 T dce6_endpoint_wreg
+ffffffff81a9e210 T dce6_audio_get_pin
+ffffffff81a9e380 T dce6_afmt_select_pin
+ffffffff81a9e420 T dce6_afmt_write_latency_fields
+ffffffff81a9e4d0 T dce6_afmt_hdmi_write_speaker_allocation
+ffffffff81a9e5a0 T dce6_afmt_dp_write_speaker_allocation
+ffffffff81a9e670 T dce6_afmt_write_sad_regs
+ffffffff81a9e7c0 T dce6_audio_enable
+ffffffff81a9e810 T dce6_hdmi_audio_set_dto
+ffffffff81a9e8a0 T dce6_dp_audio_set_dto
+ffffffff81a9f000 T eg_cg_rreg
+ffffffff81a9f0a0 T eg_cg_wreg
+ffffffff81a9f120 T eg_pif_phy0_rreg
+ffffffff81a9f1c0 T eg_pif_phy0_wreg
+ffffffff81a9f240 T eg_pif_phy1_rreg
+ffffffff81a9f2e0 T eg_pif_phy1_wreg
+ffffffff81a9f360 T evergreen_get_allowed_info_register
+ffffffff81a9f400 T evergreen_tiling_fields
+ffffffff81a9f4a0 T sumo_set_uvd_clocks
+ffffffff81a9f5a0 t sumo_set_uvd_clock
+ffffffff81a9f7d0 T evergreen_set_uvd_clocks
+ffffffff81a9ff80 T evergreen_fix_pci_max_read_req_size
+ffffffff81aa0040 T dce4_program_fmt
+ffffffff81aa0160 T dce4_wait_for_vblank
+ffffffff81aa0460 T evergreen_page_flip
+ffffffff81aa05b0 T evergreen_page_flip_pending
+ffffffff81aa0630 T evergreen_get_temp
+ffffffff81aa0720 T sumo_get_temp
+ffffffff81aa0780 T sumo_pm_init_profile
+ffffffff81aa08c0 T btc_pm_init_profile
+ffffffff81aa09d0 T evergreen_pm_misc
+ffffffff81aa0b20 T evergreen_pm_prepare
+ffffffff81aa0c40 T evergreen_pm_finish
+ffffffff81aa0d60 T evergreen_hpd_sense
+ffffffff81aa0de0 T evergreen_hpd_set_polarity
+ffffffff81aa0f20 T evergreen_hpd_init
+ffffffff81aa1010 T evergreen_hpd_fini
+ffffffff81aa10c0 T evergreen_get_number_of_dram_channels
+ffffffff81aa1120 T evergreen_bandwidth_update
+ffffffff81aa12f0 t evergreen_line_buffer_adjust
+ffffffff81aa1520 t evergreen_program_watermarks
+ffffffff81aa2010 T evergreen_mc_wait_for_idle
+ffffffff81aa20b0 T evergreen_pcie_gart_tlb_flush
+ffffffff81aa21a0 T evergreen_mc_stop
+ffffffff81aa2db0 T evergreen_mc_resume
+ffffffff81aa35f0 T evergreen_mc_program
+ffffffff81aa3b10 T evergreen_ring_ib_execute
+ffffffff81aa3fd0 T evergreen_mc_init
+ffffffff81aa4160 T evergreen_print_gpu_status_regs
+ffffffff81aa4190 T evergreen_is_display_hung
+ffffffff81aa43b0 T evergreen_gpu_check_soft_reset
+ffffffff81aa4530 T evergreen_gpu_pci_config_reset
+ffffffff81aa46f0 T evergreen_asic_reset
+ffffffff81aa4b10 T evergreen_gfx_is_lockup
+ffffffff81aa4b70 T sumo_rlc_fini
+ffffffff81aa4d30 t radeon_bo_reserve
+ffffffff81aa4ee0 t radeon_bo_unreserve
+ffffffff81aa4fd0 T sumo_rlc_init
+ffffffff81aa57c0 T evergreen_rlc_resume
+ffffffff81aa5c90 T evergreen_get_vblank_counter
+ffffffff81aa5d10 T evergreen_disable_interrupt_state
+ffffffff81aa6130 T evergreen_irq_set
+ffffffff81aa6700 T evergreen_irq_suspend
+ffffffff81aa6750 T evergreen_irq_process
+ffffffff81aa6e20 t evergreen_get_ih_wptr
+ffffffff81aa6f60 t evergreen_irq_ack
+ffffffff81aa78b0 T evergreen_resume
+ffffffff81aa7990 t evergreen_init_golden_registers
+ffffffff81aa7ba0 t evergreen_startup
+ffffffff81aaaa50 T evergreen_suspend
+ffffffff81aaab00 t evergreen_pcie_gart_disable
+ffffffff81aaaca0 T evergreen_init
+ffffffff81aab0d0 T evergreen_fini
+ffffffff81aab1d0 T evergreen_pcie_gen2_enable
+ffffffff81aab410 T evergreen_program_aspm
+ffffffff81aabda0 t evergreen_latency_watermark
+ffffffff81aac000 T evergreen_cs_parse
+ffffffff81aae920 T evergreen_dma_cs_parse
+ffffffff81aafc50 T evergreen_ib_parse
+ffffffff81ab0110 T evergreen_dma_ib_parse
+ffffffff81ab0370 t evergreen_cs_track_check
+ffffffff81ab1420 t evergreen_cs_handle_reg
+ffffffff81ab33a0 t evergreen_surface_value_conv_check
+ffffffff81ab3680 t evergreen_surface_check
+ffffffff81ab3b20 t evergreen_cs_track_validate_htile
+ffffffff81ab3dd0 t evergreen_vm_reg_valid
+ffffffff81ab5000 T evergreen_dma_fence_ring_emit
+ffffffff81ab52c0 T evergreen_dma_ring_ib_execute
+ffffffff81ab5640 T evergreen_copy_dma
+ffffffff81ab5a00 T evergreen_dma_is_lockup
+ffffffff81ab6000 T dce4_audio_enable
+ffffffff81ab60e0 T evergreen_hdmi_update_acr
+ffffffff81ab6330 T dce4_afmt_write_latency_fields
+ffffffff81ab63a0 T dce4_afmt_hdmi_write_speaker_allocation
+ffffffff81ab6410 T dce4_afmt_dp_write_speaker_allocation
+ffffffff81ab6480 T evergreen_hdmi_write_sad_regs
+ffffffff81ab6590 T evergreen_set_avi_packet
+ffffffff81ab6760 T dce4_hdmi_audio_set_dto
+ffffffff81ab6890 T dce4_dp_audio_set_dto
+ffffffff81ab69c0 T dce4_set_vbi_packet
+ffffffff81ab6a10 T dce4_hdmi_set_color_depth
+ffffffff81ab6b00 T dce4_set_audio_packet
+ffffffff81ab6d40 T dce4_set_mute
+ffffffff81ab6e20 T evergreen_hdmi_enable
+ffffffff81ab7110 T evergreen_dp_enable
+ffffffff81ab8000 T kv_dpm_enable_bapm
+ffffffff81ab8060 T kv_dpm_enable
+ffffffff81ab96d0 t kv_enable_didt
+ffffffff81ab99b0 T kv_dpm_late_enable
+ffffffff81ab9ba0 T kv_dpm_powergate_uvd
+ffffffff81ab9d10 T kv_dpm_disable
+ffffffff81aba090 T kv_dpm_force_performance_level
+ffffffff81aba220 t kv_force_dpm_lowest
+ffffffff81aba300 T kv_dpm_pre_set_power_state
+ffffffff81aba900 T kv_dpm_set_power_state
+ffffffff81abb0f0 t kv_set_valid_clock_range
+ffffffff81abb2b0 t kv_calculate_ds_divider
+ffffffff81abb430 t kv_calculate_nbps_level_settings
+ffffffff81abb5c0 t kv_update_vce_dpm
+ffffffff81abb7a0 T kv_dpm_post_set_power_state
+ffffffff81abb840 T kv_dpm_setup_asic
+ffffffff81abb8a0 T kv_dpm_init
+ffffffff81abc170 T kv_dpm_debugfs_print_current_performance_level
+ffffffff81abc1d0 T kv_dpm_get_current_sclk
+ffffffff81abc240 T kv_dpm_get_current_mclk
+ffffffff81abc270 T kv_dpm_print_power_state
+ffffffff81abc310 T kv_dpm_fini
+ffffffff81abc3a0 T kv_dpm_display_configuration_changed
+ffffffff81abc3d0 T kv_dpm_get_sclk
+ffffffff81abc420 T kv_dpm_get_mclk
+ffffffff81abd000 T kv_notify_message_to_smu
+ffffffff81abd0e0 T kv_dpm_get_enable_mask
+ffffffff81abd1d0 T kv_send_msg_to_smc_with_parameter
+ffffffff81abd2d0 T kv_read_smc_sram_dword
+ffffffff81abd3b0 T kv_smc_dpm_enable
+ffffffff81abd500 T kv_smc_bapm_enable
+ffffffff81abd650 T kv_copy_bytes_to_smc
+ffffffff81abe000 T tn_smc_rreg
+ffffffff81abe090 T tn_smc_wreg
+ffffffff81abe110 T ni_mc_load_microcode
+ffffffff81abe3b0 T ni_init_microcode
+ffffffff81abe940 T cayman_get_allowed_info_register
+ffffffff81abe9e0 T tn_get_temp
+ffffffff81abea80 T cayman_pcie_gart_tlb_flush
+ffffffff81abeae0 T cayman_cp_int_cntl_setup
+ffffffff81abeb40 T cayman_fence_ring_emit
+ffffffff81abeee0 T cayman_ring_ib_execute
+ffffffff81abf360 T cayman_gfx_get_rptr
+ffffffff81abf410 T cayman_gfx_get_wptr
+ffffffff81abf480 T cayman_gfx_set_wptr
+ffffffff81abf540 T cayman_gpu_check_soft_reset
+ffffffff81abf700 T cayman_asic_reset
+ffffffff81abfb20 T cayman_gfx_is_lockup
+ffffffff81abfb80 T cayman_resume
+ffffffff81abfc10 t ni_init_golden_registers
+ffffffff81abfcf0 t cayman_startup
+ffffffff81ac29c0 T cayman_suspend
+ffffffff81ac2ab0 t cayman_pcie_gart_disable
+ffffffff81ac2c80 T cayman_init
+ffffffff81ac3170 T cayman_fini
+ffffffff81ac3300 T cayman_vm_init
+ffffffff81ac3370 T cayman_vm_fini
+ffffffff81ac33a0 T cayman_vm_decode_fault
+ffffffff81ac3430 T cayman_vm_flush
+ffffffff81ac38b0 T tn_set_vce_clocks
+ffffffff81ac4000 T cayman_dma_get_rptr
+ffffffff81ac4080 T cayman_dma_get_wptr
+ffffffff81ac40e0 T cayman_dma_set_wptr
+ffffffff81ac4120 T cayman_dma_ring_ib_execute
+ffffffff81ac44c0 T cayman_dma_stop
+ffffffff81ac45b0 T cayman_dma_resume
+ffffffff81ac48c0 T cayman_dma_fini
+ffffffff81ac49b0 T cayman_dma_is_lockup
+ffffffff81ac4a30 T cayman_dma_vm_copy_pages
+ffffffff81ac4b20 T cayman_dma_vm_write_pages
+ffffffff81ac4ca0 T cayman_dma_vm_set_pages
+ffffffff81ac4e00 T cayman_dma_vm_pad_ib
+ffffffff81ac4e50 T cayman_dma_vm_flush
+ffffffff81ac6000 T ni_get_pi
+ffffffff81ac6030 T ni_get_ps
+ffffffff81ac6060 T ni_dpm_vblank_too_short
+ffffffff81ac60c0 T ni_dpm_force_performance_level
+ffffffff81ac6240 T ni_copy_and_switch_arb_sets
+ffffffff81ac66d0 T ni_set_uvd_clock_before_set_eng_clock
+ffffffff81ac6750 T ni_set_uvd_clock_after_set_eng_clock
+ffffffff81ac67d0 T ni_dpm_setup_asic
+ffffffff81ac6ab0 T ni_update_current_ps
+ffffffff81ac6b60 T ni_update_requested_ps
+ffffffff81ac6c10 T ni_dpm_enable
+ffffffff81ac9fc0 t ni_enable_dynamic_pcie_gen2
+ffffffff81aca150 t ni_populate_smc_tdp_limits
+ffffffff81aca320 T ni_dpm_disable
+ffffffff81aca750 T ni_dpm_pre_set_power_state
+ffffffff81acad40 T ni_dpm_set_power_state
+ffffffff81acbe80 T ni_dpm_post_set_power_state
+ffffffff81acbf50 T ni_dpm_init
+ffffffff81acc9a0 T ni_dpm_fini
+ffffffff81acca40 T ni_dpm_print_power_state
+ffffffff81accb20 T ni_dpm_debugfs_print_current_performance_level
+ffffffff81accb60 T ni_dpm_get_current_sclk
+ffffffff81accbe0 T ni_dpm_get_current_mclk
+ffffffff81accc60 T ni_dpm_get_sclk
+ffffffff81acccc0 T ni_dpm_get_mclk
+ffffffff81accd20 t ni_do_program_memory_timing_parameters
+ffffffff81acce80 t ni_calculate_sclk_params
+ffffffff81acd0a0 t ni_calculate_power_boost_limit
+ffffffff81acd230 t ni_populate_mclk_value
+ffffffff81ace000 T r100_wait_for_vblank
+ffffffff81ace240 T r100_page_flip
+ffffffff81ace4b0 T r100_page_flip_pending
+ffffffff81ace590 T r100_pm_get_dynpm_state
+ffffffff81ace790 T r100_pm_init_profile
+ffffffff81ace870 T r100_pm_misc
+ffffffff81acec30 T r100_pm_prepare
+ffffffff81aced20 T r100_pm_finish
+ffffffff81acee10 T r100_gui_idle
+ffffffff81acee60 T r100_hpd_sense
+ffffffff81aceee0 T r100_hpd_set_polarity
+ffffffff81acf010 T r100_hpd_init
+ffffffff81acf0a0 T r100_hpd_fini
+ffffffff81acf100 T r100_pci_gart_tlb_flush
+ffffffff81acf130 T r100_pci_gart_init
+ffffffff81acf200 T r100_pci_gart_get_page_entry
+ffffffff81acf230 T r100_pci_gart_set_page
+ffffffff81acf260 T r100_pci_gart_enable
+ffffffff81acf390 T r100_pci_gart_disable
+ffffffff81acf420 T r100_pci_gart_fini
+ffffffff81acf4c0 T r100_irq_set
+ffffffff81acf5e0 T r100_irq_disable
+ffffffff81acf670 T r100_irq_process
+ffffffff81acf990 T r100_get_vblank_counter
+ffffffff81acf9d0 T r100_fence_ring_emit
+ffffffff81acfe40 T r100_semaphore_ring_emit
+ffffffff81acfe70 T r100_copy_blit
+ffffffff81ad0500 T r100_ring_start
+ffffffff81ad05f0 T r100_gfx_get_rptr
+ffffffff81ad0650 T r100_gfx_get_wptr
+ffffffff81ad0680 T r100_gfx_set_wptr
+ffffffff81ad06d0 T r100_cp_init
+ffffffff81ad0cf0 T r100_debugfs_cp_init
+ffffffff81ad0d20 T r100_cp_fini
+ffffffff81ad0dc0 T r100_cp_disable
+ffffffff81ad0f40 T r100_gui_wait_for_idle
+ffffffff81ad1030 T r100_reloc_pitch_offset
+ffffffff81ad1160 T r100_packet3_load_vbpntr
+ffffffff81ad1420 T r100_cs_parse_packet0
+ffffffff81ad1530 T r100_cs_packet_parse_vline
+ffffffff81ad1720 T r100_cs_track_check_pkt3_indx_buffer
+ffffffff81ad17a0 T r100_cs_parse
+ffffffff81ad29b0 T r100_cs_track_clear
+ffffffff81ad2d00 T r100_cs_track_check
+ffffffff81ad35f0 T r100_mc_wait_for_idle
+ffffffff81ad3680 T r100_gpu_is_lockup
+ffffffff81ad3700 T r100_enable_bm
+ffffffff81ad3760 T r100_bm_disable
+ffffffff81ad3870 T r100_asic_reset
+ffffffff81ad3da0 T r100_mc_stop
+ffffffff81ad4080 T r100_mc_resume
+ffffffff81ad41b0 T r100_set_common_regs
+ffffffff81ad4410 T r100_vram_init_sizes
+ffffffff81ad4640 T r100_vga_set_state
+ffffffff81ad46b0 T r100_pll_errata_after_index
+ffffffff81ad4730 T r100_pll_rreg
+ffffffff81ad4910 T r100_pll_wreg
+ffffffff81ad4ad0 T r100_debugfs_rbbm_init
+ffffffff81ad4b00 T r100_debugfs_mc_info_init
+ffffffff81ad4b30 T r100_set_surface_reg
+ffffffff81ad4da0 T r100_clear_surface_reg
+ffffffff81ad4e60 T r100_bandwidth_update
+ffffffff81ad5910 T r100_ring_test
+ffffffff81ad5c10 T r100_ring_ib_execute
+ffffffff81ad5e70 T r100_ib_test
+ffffffff81ad6210 T r100_vga_render_disable
+ffffffff81ad6280 T r100_resume
+ffffffff81ad64d0 t r100_startup
+ffffffff81ad6a90 T r100_suspend
+ffffffff81ad6bd0 T r100_fini
+ffffffff81ad6d90 T r100_restore_sanity
+ffffffff81ad6e80 T r100_init
+ffffffff81ad7550 T r100_mm_rreg_slow
+ffffffff81ad75e0 T r100_mm_wreg_slow
+ffffffff81ad7660 T r100_io_rreg
+ffffffff81ad76d0 T r100_io_wreg
+ffffffff81ad7730 t r100_get_vtx_size
+ffffffff81ad7860 t r100_cs_track_texture_print
+ffffffff81ad8000 T r200_copy_dma
+ffffffff81ad8480 T r200_packet0_check
+ffffffff81ad9420 T r200_set_safe_registers
+ffffffff81ada000 T rv370_pcie_rreg
+ffffffff81ada0a0 T rv370_pcie_wreg
+ffffffff81ada130 T rv370_pcie_gart_tlb_flush
+ffffffff81ada2f0 T rv370_pcie_gart_get_page_entry
+ffffffff81ada340 T rv370_pcie_gart_set_page
+ffffffff81ada380 T rv370_pcie_gart_init
+ffffffff81ada450 T rv370_pcie_gart_enable
+ffffffff81ada8e0 T rv370_pcie_gart_disable
+ffffffff81adab10 T rv370_pcie_gart_fini
+ffffffff81adab40 T r300_fence_ring_emit
+ffffffff81adb0d0 T r300_ring_start
+ffffffff81adbae0 T r300_mc_wait_for_idle
+ffffffff81adbb70 T r300_asic_reset
+ffffffff81adbea0 T r300_mc_init
+ffffffff81adbf70 T rv370_set_pcie_lanes
+ffffffff81adc1d0 T rv370_get_pcie_lanes
+ffffffff81adc2a0 T r300_cs_parse
+ffffffff81adc620 t r300_packet0_check
+ffffffff81add510 T r300_set_reg_safe
+ffffffff81add550 T r300_mc_program
+ffffffff81add750 T r300_clock_startup
+ffffffff81add7d0 T r300_resume
+ffffffff81add9d0 t r300_startup
+ffffffff81addd60 T r300_suspend
+ffffffff81addde0 T r300_fini
+ffffffff81addec0 T r300_init
+ffffffff81adf000 T r420_pm_init_profile
+ffffffff81adf0e0 T r420_pipes_init
+ffffffff81adf320 T r420_mc_rreg
+ffffffff81adf3c0 T r420_mc_wreg
+ffffffff81adf450 T r420_resume
+ffffffff81adf650 t r420_startup
+ffffffff81adfa00 T r420_suspend
+ffffffff81adfba0 T r420_fini
+ffffffff81adfc80 T r420_init
+ffffffff81adff40 T r420_debugfs_pipes_info_init
+ffffffff81ae0000 T r520_mc_wait_for_idle
+ffffffff81ae0090 T r520_resume
+ffffffff81ae01b0 t r520_startup
+ffffffff81ae05e0 T r520_init
+ffffffff81ae1000 T r600_rcu_rreg
+ffffffff81ae10a0 T r600_rcu_wreg
+ffffffff81ae1130 T r600_uvd_ctx_rreg
+ffffffff81ae11d0 T r600_uvd_ctx_wreg
+ffffffff81ae1260 T r600_get_allowed_info_register
+ffffffff81ae12f0 T r600_get_xclk
+ffffffff81ae1320 T r600_set_uvd_clocks
+ffffffff81ae1a20 T dce3_program_fmt
+ffffffff81ae1b40 T rv6xx_get_temp
+ffffffff81ae1bc0 T r600_pm_get_dynpm_state
+ffffffff81ae1fc0 T rs780_pm_init_profile
+ffffffff81ae2100 T r600_pm_init_profile
+ffffffff81ae2390 T r600_pm_misc
+ffffffff81ae2440 T r600_gui_idle
+ffffffff81ae2490 T r600_hpd_sense
+ffffffff81ae2610 T r600_hpd_set_polarity
+ffffffff81ae2960 T r600_hpd_init
+ffffffff81ae2b90 T r600_hpd_fini
+ffffffff81ae2d80 T r600_pcie_gart_tlb_flush
+ffffffff81ae2f10 T r600_pcie_gart_init
+ffffffff81ae2fb0 T r600_mc_wait_for_idle
+ffffffff81ae3050 T rs780_mc_rreg
+ffffffff81ae3110 T rs780_mc_wreg
+ffffffff81ae31c0 T r600_vram_scratch_init
+ffffffff81ae32c0 t radeon_bo_reserve
+ffffffff81ae3470 t radeon_bo_unreserve
+ffffffff81ae3560 T r600_vram_scratch_fini
+ffffffff81ae35d0 T r600_set_bios_scratch_engine_hung
+ffffffff81ae3640 T r600_gpu_check_soft_reset
+ffffffff81ae39d0 T r600_asic_reset
+ffffffff81ae3ea0 t r600_gpu_pci_config_reset
+ffffffff81ae4160 T r600_gfx_is_lockup
+ffffffff81ae41c0 T r6xx_remap_render_backend
+ffffffff81ae4350 T r600_count_pipe_bits
+ffffffff81ae43c0 T r600_pciep_rreg
+ffffffff81ae4480 T r600_pciep_wreg
+ffffffff81ae4530 T r600_cp_stop
+ffffffff81ae45d0 T r600_init_microcode
+ffffffff81ae4e00 T r600_gfx_get_rptr
+ffffffff81ae4e60 T r600_gfx_get_wptr
+ffffffff81ae4e90 T r600_gfx_set_wptr
+ffffffff81ae4ee0 T r600_cp_start
+ffffffff81ae5270 T r600_cp_resume
+ffffffff81ae56c0 T r600_ring_init
+ffffffff81ae5760 T r600_cp_fini
+ffffffff81ae5800 T r600_scratch_init
+ffffffff81ae5870 T r600_ring_test
+ffffffff81ae5b10 T r600_fence_ring_emit
+ffffffff81ae63c0 T r600_semaphore_ring_emit
+ffffffff81ae65a0 T r600_copy_cpdma
+ffffffff81ae6b30 T r600_set_surface_reg
+ffffffff81ae6b60 T r600_clear_surface_reg
+ffffffff81ae6b90 T r600_vga_set_state
+ffffffff81ae6bf0 T r600_resume
+ffffffff81ae6c80 t r600_startup
+ffffffff81ae9490 T r600_suspend
+ffffffff81ae9670 T r600_irq_suspend
+ffffffff81ae9790 t r600_pcie_gart_disable
+ffffffff81ae9ad0 T r600_init
+ffffffff81aea310 T r600_debugfs_mc_info_init
+ffffffff81aea340 T r600_ih_ring_init
+ffffffff81aea3b0 T r600_irq_fini
+ffffffff81aea540 T r600_fini
+ffffffff81aea6e0 T r600_ring_ib_execute
+ffffffff81aeab60 T r600_ib_test
+ffffffff81aeae00 T r600_ih_ring_alloc
+ffffffff81aeaf20 T r600_ih_ring_fini
+ffffffff81aeafb0 T r600_rlc_stop
+ffffffff81aeb180 T r600_disable_interrupts
+ffffffff81aeb290 T r600_irq_init
+ffffffff81aeb8b0 t r600_disable_interrupt_state
+ffffffff81aebd90 T r600_irq_disable
+ffffffff81aebea0 T r600_irq_set
+ffffffff81aec690 t r600_irq_ack
+ffffffff81aece30 T r600_irq_process
+ffffffff81aed3b0 t r600_get_ih_wptr
+ffffffff81aed4f0 T r600_mmio_hdp_flush
+ffffffff81aed590 T r600_set_pcie_lanes
+ffffffff81aed6d0 T r600_get_pcie_lanes
+ffffffff81aed7b0 T r600_get_gpu_clock_counter
+ffffffff81aee000 T r600_fmt_is_valid_color
+ffffffff81aee040 T r600_fmt_is_valid_texture
+ffffffff81aee090 T r600_fmt_get_blocksize
+ffffffff81aee0d0 T r600_fmt_get_nblocksx
+ffffffff81aee120 T r600_fmt_get_nblocksy
+ffffffff81aee170 T r600_cs_common_vline_parse
+ffffffff81aee440 T r600_mip_minify
+ffffffff81aee4a0 T r600_cs_parse
+ffffffff81af0600 T r600_dma_cs_next_reloc
+ffffffff81af0680 T r600_dma_cs_parse
+ffffffff81af0df0 t r600_cs_track_check
+ffffffff81af2010 t r600_cs_check_reg
+ffffffff81af3000 T r600_dma_get_rptr
+ffffffff81af3070 T r600_dma_get_wptr
+ffffffff81af30c0 T r600_dma_set_wptr
+ffffffff81af30f0 T r600_dma_stop
+ffffffff81af3190 T r600_dma_resume
+ffffffff81af3450 T r600_dma_fini
+ffffffff81af34e0 T r600_dma_is_lockup
+ffffffff81af3540 T r600_dma_ring_test
+ffffffff81af37a0 T r600_dma_fence_ring_emit
+ffffffff81af3990 T r600_dma_semaphore_ring_emit
+ffffffff81af3ab0 T r600_dma_ib_test
+ffffffff81af3ca0 T r600_dma_ring_ib_execute
+ffffffff81af4020 T r600_copy_dma
+ffffffff81af5000 T r600_dpm_print_class_info
+ffffffff81af52c0 T r600_dpm_print_cap_info
+ffffffff81af5340 T r600_dpm_print_ps_status
+ffffffff81af53d0 T r600_dpm_get_vblank_time
+ffffffff81af5490 T r600_dpm_get_vrefresh
+ffffffff81af5520 T r600_calculate_u_and_p
+ffffffff81af5590 T r600_calculate_at
+ffffffff81af5640 T r600_gfx_clockgating_enable
+ffffffff81af57b0 T r600_dynamicpm_enable
+ffffffff81af5820 T r600_enable_thermal_protection
+ffffffff81af5890 T r600_enable_acpi_pm
+ffffffff81af58f0 T r600_enable_dynamic_pcie_gen2
+ffffffff81af5960 T r600_dynamicpm_enabled
+ffffffff81af59b0 T r600_enable_sclk_control
+ffffffff81af5a20 T r600_enable_mclk_control
+ffffffff81af5a90 T r600_enable_spll_bypass
+ffffffff81af5b00 T r600_wait_for_spll_change
+ffffffff81af5b90 T r600_set_bsp
+ffffffff81af5bc0 T r600_set_at
+ffffffff81af5c30 T r600_set_tc
+ffffffff81af5c90 T r600_select_td
+ffffffff81af5da0 T r600_set_vrc
+ffffffff81af5dd0 T r600_set_tpu
+ffffffff81af5e30 T r600_set_tpc
+ffffffff81af5e90 T r600_set_sstu
+ffffffff81af5ef0 T r600_set_sst
+ffffffff81af5f50 T r600_set_git
+ffffffff81af5fb0 T r600_set_fctu
+ffffffff81af6010 T r600_set_fct
+ffffffff81af6070 T r600_set_ctxcgtt3d_rphc
+ffffffff81af60d0 T r600_set_ctxcgtt3d_rsdc
+ffffffff81af6140 T r600_set_vddc3d_oorsu
+ffffffff81af61a0 T r600_set_vddc3d_oorphc
+ffffffff81af6200 T r600_set_vddc3d_oorsdc
+ffffffff81af6270 T r600_set_mpll_lock_time
+ffffffff81af62d0 T r600_set_mpll_reset_time
+ffffffff81af6330 T r600_engine_clock_entry_enable
+ffffffff81af6400 T r600_engine_clock_entry_enable_pulse_skipping
+ffffffff81af64d0 T r600_engine_clock_entry_enable_post_divider
+ffffffff81af65a0 T r600_engine_clock_entry_set_post_divider
+ffffffff81af6660 T r600_engine_clock_entry_set_reference_divider
+ffffffff81af6720 T r600_engine_clock_entry_set_feedback_divider
+ffffffff81af67e0 T r600_engine_clock_entry_set_step_time
+ffffffff81af68a0 T r600_vid_rt_set_ssu
+ffffffff81af6900 T r600_vid_rt_set_vru
+ffffffff81af6960 T r600_vid_rt_set_vrt
+ffffffff81af69c0 T r600_voltage_control_enable_pins
+ffffffff81af6a20 T r600_voltage_control_program_voltages
+ffffffff81af6ae0 T r600_voltage_control_deactivate_static_control
+ffffffff81af6bd0 T r600_power_level_enable
+ffffffff81af6c60 T r600_power_level_set_voltage_index
+ffffffff81af6ce0 T r600_power_level_set_mem_clock_index
+ffffffff81af6d60 T r600_power_level_set_eng_clock_index
+ffffffff81af6de0 T r600_power_level_set_watermark_id
+ffffffff81af6e70 T r600_power_level_set_pcie_gen2
+ffffffff81af6ef0 T r600_power_level_get_current_index
+ffffffff81af6f40 T r600_power_level_get_target_index
+ffffffff81af6f90 T r600_power_level_set_enter_index
+ffffffff81af6ff0 T r600_wait_for_power_level_unequal
+ffffffff81af70e0 T r600_wait_for_power_level
+ffffffff81af71d0 T r600_start_dpm
+ffffffff81af75e0 T r600_stop_dpm
+ffffffff81af7640 T r600_dpm_pre_set_power_state
+ffffffff81af7670 T r600_dpm_post_set_power_state
+ffffffff81af76a0 T r600_is_uvd_state
+ffffffff81af76d0 T r600_is_internal_thermal_sensor
+ffffffff81af7710 T r600_dpm_late_enable
+ffffffff81af7870 T r600_get_platform_caps
+ffffffff81af7910 T r600_parse_extended_power_table
+ffffffff81af88c0 T r600_free_extended_power_table
+ffffffff81af89c0 T r600_get_pcie_gen_support
+ffffffff81af8a10 T r600_get_pcie_lane_support
+ffffffff81af8a70 T r600_encode_pci_lane_width
+ffffffff81af9000 T r600_audio_update_hdmi
+ffffffff81af9190 t r600_audio_status
+ffffffff81af92e0 T r600_hdmi_buffer_status_changed
+ffffffff81af9380 T r600_hdmi_update_audio_settings
+ffffffff81af9760 T r600_audio_enable
+ffffffff81af9840 T r600_audio_get_pin
+ffffffff81af9870 T r600_hdmi_update_acr
+ffffffff81af9cb0 T r600_set_avi_packet
+ffffffff81af9f10 T r600_hdmi_audio_workaround
+ffffffff81af9fd0 T r600_hdmi_audio_set_dto
+ffffffff81afa0f0 T r600_set_vbi_packet
+ffffffff81afa1a0 T r600_set_audio_packet
+ffffffff81afa540 T r600_set_mute
+ffffffff81afa620 T r600_hdmi_enable
+ffffffff81afb000 T radeon_acpi_is_pcie_performance_request_supported
+ffffffff81afb040 T radeon_acpi_pcie_notify_device_ready
+ffffffff81afb130 T radeon_acpi_pcie_performance_request
+ffffffff81afb530 T radeon_acpi_init
+ffffffff81afbaf0 t radeon_acpi_event
+ffffffff81afbd80 T radeon_acpi_fini
+ffffffff81afc000 T radeon_agp_init
+ffffffff81afc390 T radeon_agp_resume
+ffffffff81afc410 T radeon_agp_fini
+ffffffff81afc450 T radeon_agp_suspend
+ffffffff81afd000 T radeon_agp_disable
+ffffffff81afd100 T radeon_asic_init
+ffffffff81afda20 t radeon_invalid_rreg
+ffffffff81afda60 t radeon_invalid_wreg
+ffffffff81afdaa0 t radeon_invalid_get_allowed_info_register
+ffffffff81afe000 T radeon_atombios_i2c_init
+ffffffff81afe370 T radeon_atombios_lookup_gpio
+ffffffff81afe480 T radeon_get_atom_connector_info_from_object_table
+ffffffff81afee20 t radeon_lookup_i2c_gpio
+ffffffff81aff110 t radeon_atom_apply_quirks
+ffffffff81aff580 T radeon_get_atom_connector_info_from_supported_devices_table
+ffffffff81affad0 T radeon_atom_get_clock_info
+ffffffff81affe10 T radeon_atombios_sideport_present
+ffffffff81affec0 T radeon_atombios_get_tmds_info
+ffffffff81b000b0 T radeon_atombios_get_ppll_ss_info
+ffffffff81b001d0 T radeon_atombios_get_asic_ss_info
+ffffffff81b00550 T radeon_atombios_get_lvds_info
+ffffffff81b008c0 T radeon_atombios_get_primary_dac_info
+ffffffff81b00980 T radeon_atom_get_tv_timings
+ffffffff81b00c30 T radeon_atombios_get_tv_info
+ffffffff81b00cc0 T radeon_atombios_get_tv_dac_info
+ffffffff81b00e10 T radeon_atombios_get_default_voltages
+ffffffff81b00ed0 T radeon_atombios_get_power_modes
+ffffffff81b01f90 T radeon_atom_get_clock_dividers
+ffffffff81b02290 T radeon_atom_get_memory_pll_dividers
+ffffffff81b023d0 T radeon_atom_set_clock_gating
+ffffffff81b02420 T radeon_atom_get_engine_clock
+ffffffff81b02470 T radeon_atom_get_memory_clock
+ffffffff81b024c0 T radeon_atom_set_engine_clock
+ffffffff81b02510 T radeon_atom_set_memory_clock
+ffffffff81b02560 T radeon_atom_set_engine_dram_timings
+ffffffff81b025d0 T radeon_atom_update_memory_dll
+ffffffff81b02620 T radeon_atom_set_ac_timing
+ffffffff81b02670 T radeon_atom_set_voltage
+ffffffff81b02740 T radeon_atom_get_max_vddc
+ffffffff81b02810 T radeon_atom_get_leakage_vddc_based_on_leakage_idx
+ffffffff81b02830 T radeon_atom_get_leakage_id_from_vbios
+ffffffff81b028f0 T radeon_atom_get_leakage_vddc_based_on_leakage_params
+ffffffff81b02ae0 T radeon_atom_get_voltage_evv
+ffffffff81b02ba0 T radeon_atom_get_voltage_gpio_settings
+ffffffff81b02ca0 T radeon_atom_is_voltage_gpio
+ffffffff81b02e40 T radeon_atom_get_svi2_info
+ffffffff81b02f20 T radeon_atom_get_max_voltage
+ffffffff81b03090 T radeon_atom_get_min_voltage
+ffffffff81b031f0 T radeon_atom_get_voltage_step
+ffffffff81b032f0 T radeon_atom_round_to_true_voltage
+ffffffff81b033c0 T radeon_atom_get_voltage_table
+ffffffff81b03610 T radeon_atom_get_memory_info
+ffffffff81b037b0 T radeon_atom_get_mclk_range_table
+ffffffff81b039e0 T radeon_atom_init_mc_reg_table
+ffffffff81b03c50 T radeon_atom_initialize_bios_scratch_regs
+ffffffff81b03d80 T radeon_save_bios_scratch_regs
+ffffffff81b03ee0 T radeon_restore_bios_scratch_regs
+ffffffff81b04020 T radeon_atom_output_lock
+ffffffff81b040c0 T radeon_atombios_connected_scratch_regs
+ffffffff81b04570 T radeon_atombios_encoder_crtc_scratch_regs
+ffffffff81b04740 T radeon_atombios_encoder_dpms_scratch_regs
+ffffffff81b04a10 t radeon_atombios_parse_misc_flags_1_3
+ffffffff81b04c00 t radeon_atombios_add_pplib_thermal_controller
+ffffffff81b04db0 t radeon_atombios_parse_pplib_clock_info
+ffffffff81b05070 t radeon_atombios_parse_pplib_non_clock_info
+ffffffff81b06000 T radeon_audio_init
+ffffffff81b062b0 T radeon_audio_endpoint_rreg
+ffffffff81b062f0 T radeon_audio_endpoint_wreg
+ffffffff81b06330 T radeon_audio_get_pin
+ffffffff81b06380 T radeon_audio_detect
+ffffffff81b06690 T radeon_audio_fini
+ffffffff81b067b0 T radeon_audio_mode_set
+ffffffff81b067f0 T radeon_audio_dpms
+ffffffff81b06840 T radeon_audio_decode_dfs_div
+ffffffff81b068a0 t radeon_audio_hdmi_mode_set
+ffffffff81b06ef0 t radeon_audio_write_sad_regs
+ffffffff81b06fc0 t radeon_audio_set_avi_packet
+ffffffff81b07110 t radeon_audio_dp_mode_set
+ffffffff81b072d0 t radeon_audio_rreg
+ffffffff81b07310 t radeon_audio_wreg
+ffffffff81b08000 T radeon_benchmark
+ffffffff81b08940 t radeon_benchmark_move
+ffffffff81b08cf0 t radeon_bo_reserve
+ffffffff81b08ea0 t radeon_bo_unreserve
+ffffffff81b09000 T radeon_get_bios
+ffffffff81b0a510 t igp_read_bios_from_vram
+ffffffff81b0a630 t radeon_read_bios
+ffffffff81b0b000 T radeon_legacy_get_engine_clock
+ffffffff81b0b0d0 T radeon_legacy_get_memory_clock
+ffffffff81b0b1a0 T radeon_get_clock_info
+ffffffff81b0b740 T radeon_legacy_set_engine_clock
+ffffffff81b0bad0 T radeon_legacy_set_clock_gating
+ffffffff81b0e000 T radeon_combios_check_hardcoded_edid
+ffffffff81b0e100 T radeon_bios_get_hardcoded_edid
+ffffffff81b0e180 T radeon_combios_i2c_init
+ffffffff81b0e650 t combios_setup_i2c_bus
+ffffffff81b0e930 T radeon_combios_get_clock_info
+ffffffff81b0eb70 T radeon_combios_sideport_present
+ffffffff81b0ec00 T radeon_combios_get_primary_dac_info
+ffffffff81b0ed60 T radeon_combios_get_tv_info
+ffffffff81b0edf0 T radeon_combios_get_tv_dac_info
+ffffffff81b0f0b0 T radeon_combios_get_lvds_info
+ffffffff81b0f710 T radeon_legacy_get_tmds_info_from_table
+ffffffff81b0f7e0 T radeon_legacy_get_tmds_info_from_combios
+ffffffff81b0f970 T radeon_legacy_get_ext_tmds_info_from_table
+ffffffff81b0fa10 T radeon_legacy_get_ext_tmds_info_from_combios
+ffffffff81b0fb80 T radeon_get_legacy_connector_info_from_table
+ffffffff81b11630 T radeon_get_legacy_connector_info_from_bios
+ffffffff81b12390 T radeon_combios_get_power_modes
+ffffffff81b12a90 T radeon_external_tmds_setup
+ffffffff81b12b50 T radeon_combios_external_tmds_setup
+ffffffff81b131a0 T radeon_combios_asic_init
+ffffffff81b13900 t combios_parse_mmio_table
+ffffffff81b13b40 t combios_parse_pll_table
+ffffffff81b13e30 T radeon_combios_initialize_bios_scratch_regs
+ffffffff81b13f20 T radeon_combios_output_lock
+ffffffff81b13f90 T radeon_combios_connected_scratch_regs
+ffffffff81b141c0 T radeon_combios_encoder_crtc_scratch_regs
+ffffffff81b142d0 T radeon_combios_encoder_dpms_scratch_regs
+ffffffff81b15000 T radeon_connector_hotplug
+ffffffff81b15130 T radeon_get_monitor_bpc
+ffffffff81b15450 T radeon_connector_edid
+ffffffff81b15500 T radeon_connector_encoder_get_dp_bridge_encoder_id
+ffffffff81b155e0 T radeon_connector_is_dp12_capable
+ffffffff81b156e0 T radeon_add_atom_connector
+ffffffff81b164f0 T radeon_add_legacy_connector
+ffffffff81b169e0 T radeon_setup_mst_connector
+ffffffff81b16a70 t radeon_dp_detect
+ffffffff81b16d40 t radeon_dvi_force
+ffffffff81b16d80 t radeon_connector_set_property
+ffffffff81b17420 t radeon_connector_unregister
+ffffffff81b17480 t radeon_connector_destroy
+ffffffff81b174f0 t radeon_best_single_encoder
+ffffffff81b175a0 t radeon_connector_update_scratch_regs
+ffffffff81b17750 t radeon_connector_get_edid
+ffffffff81b17870 t radeon_find_encoder
+ffffffff81b17950 t radeon_dp_get_modes
+ffffffff81b17d10 t radeon_dp_mode_valid
+ffffffff81b17ea0 t radeon_dvi_encoder
+ffffffff81b18060 t radeon_add_common_modes
+ffffffff81b18150 t radeon_lvds_set_property
+ffffffff81b18200 t radeon_vga_detect
+ffffffff81b183d0 t radeon_connector_analog_encoder_conflict_solve
+ffffffff81b18590 t radeon_vga_get_modes
+ffffffff81b18650 t radeon_vga_mode_valid
+ffffffff81b186b0 t radeon_dvi_detect
+ffffffff81b18cc0 t radeon_dvi_mode_valid
+ffffffff81b18e50 t radeon_tv_detect
+ffffffff81b18ef0 t radeon_tv_get_modes
+ffffffff81b18fa0 t radeon_tv_mode_valid
+ffffffff81b18ff0 t radeon_lvds_detect
+ffffffff81b190b0 t radeon_lvds_get_modes
+ffffffff81b19300 t radeon_lvds_mode_valid
+ffffffff81b1a000 T radeon_cs_parser_init
+ffffffff81b1a480 T radeon_cs_ioctl
+ffffffff81b1afa0 t radeon_cs_parser_fini
+ffffffff81b1b110 T radeon_cs_packet_parse
+ffffffff81b1b2b0 T radeon_cs_packet_next_is_pkt3_nop
+ffffffff81b1b300 T radeon_cs_dump_packet
+ffffffff81b1b340 T radeon_cs_packet_next_reloc
+ffffffff81b1b490 t cmp_size_smaller_first
+ffffffff81b1c000 T radeon_crtc_cursor_move
+ffffffff81b1c070 t radeon_lock_cursor
+ffffffff81b1c200 t radeon_cursor_move_locked
+ffffffff81b1c760 T radeon_crtc_cursor_set2
+ffffffff81b1c9b0 t radeon_hide_cursor
+ffffffff81b1ca80 t radeon_bo_reserve
+ffffffff81b1cc30 t radeon_bo_unreserve
+ffffffff81b1cd20 t radeon_show_cursor
+ffffffff81b1d010 T radeon_cursor_reset
+ffffffff81b1e000 T radeon_is_px
+ffffffff81b1e040 T radeon_program_register_sequence
+ffffffff81b1e190 T radeon_pci_config_reset
+ffffffff81b1e1c0 T radeon_surface_init
+ffffffff81b1e390 T radeon_scratch_init
+ffffffff81b1e410 T radeon_scratch_get
+ffffffff81b1e490 T radeon_scratch_free
+ffffffff81b1e4e0 T radeon_doorbell_get
+ffffffff81b1e590 T radeon_doorbell_free
+ffffffff81b1e5d0 T radeon_wb_disable
+ffffffff81b1e600 T radeon_wb_fini
+ffffffff81b1e690 t radeon_bo_reserve
+ffffffff81b1e840 t radeon_bo_unreserve
+ffffffff81b1e930 T radeon_wb_init
+ffffffff81b1ec20 T radeon_vram_location
+ffffffff81b1ed50 T radeon_gtt_location
+ffffffff81b1ee80 T radeon_device_is_virtual
+ffffffff81b1eeb0 T radeon_card_posted
+ffffffff81b1f160 T radeon_update_bandwidth_info
+ffffffff81b1f1e0 T radeon_boot_test_post_card
+ffffffff81b1f290 T radeon_dummy_page_init
+ffffffff81b1f340 T radeon_dummy_page_fini
+ffffffff81b1f3a0 T radeon_atombios_init
+ffffffff81b1f530 t cail_reg_read
+ffffffff81b1f580 t cail_reg_write
+ffffffff81b1f5d0 t cail_ioreg_read
+ffffffff81b1f5f0 t cail_ioreg_write
+ffffffff81b1f610 t cail_mc_read
+ffffffff81b1f630 t cail_mc_write
+ffffffff81b1f650 t cail_pll_read
+ffffffff81b1f670 t cail_pll_write
+ffffffff81b1f690 T radeon_atombios_fini
+ffffffff81b1f720 T radeon_combios_init
+ffffffff81b1f760 T radeon_combios_fini
+ffffffff81b1f790 T radeon_device_init
+ffffffff81b20350 T radeon_device_fini
+ffffffff81b20430 T radeon_suspend_kms
+ffffffff81b20740 T radeon_resume_kms
+ffffffff81b209a0 T radeon_gpu_reset
+ffffffff81b20d60 T radeon_debugfs_add_files
+ffffffff81b21000 T radeon_crtc_load_lut
+ffffffff81b21f10 T radeon_crtc_handle_vblank
+ffffffff81b22050 T radeon_get_crtc_scanoutpos
+ffffffff81b226d0 T radeon_crtc_handle_flip
+ffffffff81b227d0 T radeon_compute_pll_avivo
+ffffffff81b22d00 T radeon_compute_pll_legacy
+ffffffff81b233e0 T radeon_framebuffer_init
+ffffffff81b23450 T radeon_update_display_priority
+ffffffff81b234b0 T radeon_modeset_init
+ffffffff81b23bf0 T radeon_modeset_fini
+ffffffff81b23d40 T radeon_crtc_scaling_mode_fixup
+ffffffff81b24090 t radeon_user_framebuffer_create
+ffffffff81b241c0 t radeon_crtc_gamma_set
+ffffffff81b24200 t radeon_crtc_destroy
+ffffffff81b24240 t radeon_crtc_set_config
+ffffffff81b24300 t radeon_crtc_page_flip_target
+ffffffff81b24770 t radeon_flip_work_func
+ffffffff81b249e0 t radeon_unpin_work_func
+ffffffff81b24a60 t radeon_bo_reserve
+ffffffff81b24c10 t radeon_bo_unreserve
+ffffffff81b25000 T radeon_dp_aux_transfer_native
+ffffffff81b26000 T radeon_dp_mst_prepare_pll
+ffffffff81b26100 T radeon_dp_mst_init
+ffffffff81b26170 T radeon_dp_mst_probe
+ffffffff81b26230 T radeon_dp_mst_check_status
+ffffffff81b26380 T radeon_mst_debugfs_init
+ffffffff81b263b0 t radeon_dp_add_mst_connector
+ffffffff81b265a0 t radeon_dp_register_mst_connector
+ffffffff81b265d0 t radeon_dp_destroy_mst_connector
+ffffffff81b26620 t radeon_dp_mst_hotplug
+ffffffff81b26640 t radeon_dp_mst_detect
+ffffffff81b26660 t radeon_dp_mst_connector_destroy
+ffffffff81b266b0 t radeon_dp_mst_get_modes
+ffffffff81b26730 t radeon_dp_mst_mode_valid
+ffffffff81b26770 t radeon_mst_best_encoder
+ffffffff81b267a0 t radeon_dp_mst_encoder_destroy
+ffffffff81b267d0 t radeon_mst_encoder_dpms
+ffffffff81b26cf0 t radeon_mst_mode_fixup
+ffffffff81b26d90 t radeon_mst_encoder_prepare
+ffffffff81b26ea0 t radeon_mst_encoder_commit
+ffffffff81b26eb0 t radeon_mst_encoder_mode_set
+ffffffff81b26ee0 t radeon_dp_mst_set_be_cntl
+ffffffff81b270c0 t radeon_dp_mst_update_stream_attribs
+ffffffff81b27270 t radeon_dp_mst_set_stream_attrib
+ffffffff81b28000 t radeon_get_crtc_scanout_position
+ffffffff81b29000 T radeon_setup_encoder_clones
+ffffffff81b290b0 T radeon_get_encoder_enum
+ffffffff81b29230 T radeon_link_encoder_connector
+ffffffff81b29370 T radeon_encoder_set_active_device
+ffffffff81b293d0 T radeon_get_connector_for_encoder
+ffffffff81b29480 T radeon_get_connector_for_encoder_init
+ffffffff81b29500 T radeon_get_external_encoder
+ffffffff81b29580 T radeon_encoder_get_dp_bridge_encoder_id
+ffffffff81b29610 T radeon_panel_mode_fixup
+ffffffff81b297d0 T radeon_dig_monitor_is_duallink
+ffffffff81b29950 T radeon_encoder_is_digital
+ffffffff81b2a000 T radeon_align_pitch
+ffffffff81b2a080 T radeon_fbdev_init
+ffffffff81b2a1f0 T radeondrm_burner_cb
+ffffffff81b2a210 T radeon_fbdev_fini
+ffffffff81b2a280 T radeon_fbdev_set_suspend
+ffffffff81b2a2b0 T radeon_fbdev_robj_is_fb
+ffffffff81b2a300 T radeon_fb_add_connector
+ffffffff81b2a340 T radeon_fb_remove_connector
+ffffffff81b2a380 T radeondrm_burner
+ffffffff81b2a400 t radeonfb_create
+ffffffff81b2a760 t radeon_bo_reserve
+ffffffff81b2a910 t radeon_bo_unreserve
+ffffffff81b2b000 T radeon_fence_emit
+ffffffff81b2b140 T radeon_fence_process
+ffffffff81b2b1f0 t radeon_fence_activity
+ffffffff81b2b3c0 T radeon_fence_signaled
+ffffffff81b2b540 T radeon_fence_wait_timeout
+ffffffff81b2b710 t radeon_fence_wait_seq_timeout
+ffffffff81b2bb40 T radeon_fence_wait
+ffffffff81b2bb80 T radeon_fence_wait_any
+ffffffff81b2bcd0 T radeon_fence_wait_next
+ffffffff81b2bd90 T radeon_fence_wait_empty
+ffffffff81b2bea0 T radeon_fence_ref
+ffffffff81b2bed0 T radeon_fence_unref
+ffffffff81b2bf40 T radeon_fence_count_emitted
+ffffffff81b2c020 T radeon_fence_need_sync
+ffffffff81b2c070 T radeon_fence_note_sync
+ffffffff81b2c240 T radeon_fence_driver_start_ring
+ffffffff81b2c440 T radeon_fence_driver_init
+ffffffff81b2c580 T radeon_debugfs_fence_init
+ffffffff81b2c5b0 T radeon_fence_driver_fini
+ffffffff81b2c7a0 T radeon_fence_driver_force_completion
+ffffffff81b2c890 t radeon_fence_get_driver_name
+ffffffff81b2c8c0 t radeon_fence_get_timeline_name
+ffffffff81b2c950 t radeon_fence_enable_signaling
+ffffffff81b2cb40 t radeon_fence_is_signaled
+ffffffff81b2cc70 t radeon_fence_default_wait
+ffffffff81b2cf70 t radeon_fence_any_seq_signaled
+ffffffff81b2d0b0 t radeon_fence_check_lockup
+ffffffff81b2d300 t __delayed_work_tick
+ffffffff81b2d320 t radeon_fence_check_signaled
+ffffffff81b2d450 t radeon_fence_wait_cb
+ffffffff81b2e000 T radeon_gart_table_ram_alloc
+ffffffff81b2e0c0 T radeon_gart_table_ram_free
+ffffffff81b2e120 T radeon_gart_table_vram_alloc
+ffffffff81b2e190 T radeon_gart_table_vram_pin
+ffffffff81b2e2d0 t radeon_bo_reserve
+ffffffff81b2e480 t radeon_bo_unreserve
+ffffffff81b2e570 T radeon_gart_table_vram_unpin
+ffffffff81b2e5f0 T radeon_gart_table_vram_free
+ffffffff81b2e630 T radeon_gart_unbind
+ffffffff81b2e760 T radeon_gart_bind
+ffffffff81b2e880 T radeon_gart_init
+ffffffff81b2e9a0 T radeon_gart_fini
+ffffffff81b2f000 T radeon_gem_object_free
+ffffffff81b2f050 T radeon_gem_object_create
+ffffffff81b2f1f0 T radeon_gem_init
+ffffffff81b2f230 T radeon_gem_fini
+ffffffff81b2f240 T radeon_gem_object_open
+ffffffff81b2f2e0 t radeon_bo_reserve
+ffffffff81b2f520 t radeon_bo_unreserve
+ffffffff81b2f610 T radeon_gem_object_close
+ffffffff81b2f700 T radeon_gem_info_ioctl
+ffffffff81b2f770 T radeon_gem_pread_ioctl
+ffffffff81b2f7c0 T radeon_gem_pwrite_ioctl
+ffffffff81b2f810 T radeon_gem_create_ioctl
+ffffffff81b2f910 T radeon_gem_userptr_ioctl
+ffffffff81b2f940 T radeon_gem_set_domain_ioctl
+ffffffff81b2fa80 T radeon_mode_dumb_mmap
+ffffffff81b2fb10 T radeon_gem_mmap_ioctl
+ffffffff81b2fba0 T radeon_gem_busy_ioctl
+ffffffff81b2fc40 T radeon_gem_wait_idle_ioctl
+ffffffff81b2fd30 T radeon_gem_set_tiling_ioctl
+ffffffff81b2fdb0 T radeon_gem_get_tiling_ioctl
+ffffffff81b2fe50 T radeon_gem_va_ioctl
+ffffffff81b30200 T radeon_gem_op_ioctl
+ffffffff81b302e0 T radeon_mode_dumb_create
+ffffffff81b303c0 T radeon_gem_debugfs_init
+ffffffff81b31000 T radeon_ddc_probe
+ffffffff81b310c0 T radeon_router_select_ddc_port
+ffffffff81b31240 T radeon_bb_set_bits
+ffffffff81b313b0 T radeon_bb_set_dir
+ffffffff81b313e0 T radeon_bb_read_bits
+ffffffff81b314d0 T radeon_acquire_bus
+ffffffff81b31a10 T radeon_release_bus
+ffffffff81b31bd0 T radeon_send_start
+ffffffff81b31bf0 T radeon_send_stop
+ffffffff81b31c10 T radeon_initiate_xfer
+ffffffff81b31c30 T radeon_read_byte
+ffffffff81b31c50 T radeon_write_byte
+ffffffff81b31c70 T radeon_i2c_create
+ffffffff81b31e80 T radeon_i2c_destroy
+ffffffff81b31ee0 T radeon_i2c_init
+ffffffff81b31f00 T radeon_i2c_fini
+ffffffff81b31f90 T radeon_i2c_add
+ffffffff81b32140 T radeon_i2c_lookup
+ffffffff81b32300 T radeon_i2c_get_byte
+ffffffff81b32380 T radeon_i2c_put_byte
+ffffffff81b323f0 T radeon_router_select_cd_port
+ffffffff81b32570 t radeon_hw_i2c_xfer
+ffffffff81b33410 t radeon_hw_i2c_func
+ffffffff81b33440 t r100_hw_i2c_xfer
+ffffffff81b33c80 t radeon_get_i2c_prescale
+ffffffff81b34000 T radeon_ib_get
+ffffffff81b34100 T radeon_ib_free
+ffffffff81b34150 T radeon_ib_schedule
+ffffffff81b343e0 T radeon_ib_pool_init
+ffffffff81b34470 T radeon_ib_pool_fini
+ffffffff81b344e0 T radeon_ib_ring_tests
+ffffffff81b35000 T radeon_driver_irq_handler_kms
+ffffffff81b35050 T radeon_driver_irq_preinstall_kms
+ffffffff81b35140 T radeon_driver_irq_postinstall_kms
+ffffffff81b35190 T radeon_driver_irq_uninstall_kms
+ffffffff81b352a0 T radeon_msi_ok
+ffffffff81b353a0 T radeon_irq_kms_init
+ffffffff81b354d0 t radeon_hotplug_work_func
+ffffffff81b35570 t radeon_dp_work_func
+ffffffff81b355e0 T radeon_irq_kms_fini
+ffffffff81b35640 T radeon_irq_kms_sw_irq_get
+ffffffff81b356e0 T radeon_irq_kms_sw_irq_get_delayed
+ffffffff81b35720 T radeon_irq_kms_sw_irq_put
+ffffffff81b357b0 T radeon_irq_kms_pflip_irq_get
+ffffffff81b35860 T radeon_irq_kms_pflip_irq_put
+ffffffff81b35900 T radeon_irq_kms_enable_afmt
+ffffffff81b35980 T radeon_irq_kms_disable_afmt
+ffffffff81b35a00 T radeon_irq_kms_enable_hpd
+ffffffff81b35ae0 T radeon_irq_kms_disable_hpd
+ffffffff81b35bc0 T radeon_irq_kms_set_irq_n_enabled
+ffffffff81b35ce0 t __delayed_work_tick
+ffffffff81b36000 T radeondrm_probe
+ffffffff81b36060 T radeondrm_attach_kms
+ffffffff81b36730 T radeondrm_detach_kms
+ffffffff81b367c0 T radeondrm_activate_kms
+ffffffff81b36870 T radeondrm_wsioctl
+ffffffff81b368e0 T radeondrm_wsmmap
+ffffffff81b36910 T radeondrm_alloc_screen
+ffffffff81b36940 T radeondrm_free_screen
+ffffffff81b36950 T radeondrm_show_screen
+ffffffff81b369d0 T radeondrm_enter_ddb
+ffffffff81b36a30 T radeondrm_doswitch
+ffffffff81b36b30 T radeondrm_attachhook
+ffffffff81b36e40 T radeondrm_forcedetach
+ffffffff81b36ef0 T radeon_driver_lastclose_kms
+ffffffff81b36f00 T radeon_driver_open_kms
+ffffffff81b37030 t radeon_bo_reserve
+ffffffff81b371e0 T radeon_driver_postclose_kms
+ffffffff81b373f0 T radeon_get_vblank_counter_kms
+ffffffff81b37580 T radeon_enable_vblank_kms
+ffffffff81b37620 T radeon_disable_vblank_kms
+ffffffff81b376b0 t radeon_info_ioctl
+ffffffff81b39000 T radeon_crtc_set_base
+ffffffff81b39020 T radeon_crtc_do_set_base
+ffffffff81b39610 T radeon_crtc_set_base_atomic
+ffffffff81b39630 t radeon_bo_reserve
+ffffffff81b397e0 t radeon_bo_unreserve
+ffffffff81b398d0 T radeon_legacy_init_crtc
+ffffffff81b39910 t radeon_crtc_dpms
+ffffffff81b39ba0 t radeon_crtc_prepare
+ffffffff81b39c10 t radeon_crtc_commit
+ffffffff81b39c80 t radeon_crtc_mode_fixup
+ffffffff81b39c90 t radeon_crtc_mode_set
+ffffffff81b3b2a0 t radeon_crtc_disable
+ffffffff81b3c000 T radeon_legacy_get_backlight_level
+ffffffff81b3c060 T radeon_legacy_set_backlight_level
+ffffffff81b3c0b0 t radeon_legacy_lvds_update
+ffffffff81b3c4c0 T radeon_legacy_backlight_init
+ffffffff81b3c690 t radeon_legacy_backlight_get_brightness
+ffffffff81b3c700 T radeon_add_legacy_encoder
+ffffffff81b3ca80 t radeon_legacy_backlight_update_status
+ffffffff81b3cb20 t radeon_lvds_enc_destroy
+ffffffff81b3cba0 t radeon_legacy_lvds_dpms
+ffffffff81b3cbc0 t radeon_legacy_mode_fixup
+ffffffff81b3cc20 t radeon_legacy_lvds_prepare
+ffffffff81b3cc90 t radeon_legacy_lvds_commit
+ffffffff81b3ccf0 t radeon_legacy_lvds_mode_set
+ffffffff81b3cf10 t radeon_legacy_encoder_disable
+ffffffff81b3cf60 t radeon_legacy_tmds_int_dpms
+ffffffff81b3d020 t radeon_legacy_tmds_int_prepare
+ffffffff81b3d0e0 t radeon_legacy_tmds_int_commit
+ffffffff81b3d1a0 t radeon_legacy_tmds_int_mode_set
+ffffffff81b3d430 t radeon_legacy_primary_dac_dpms
+ffffffff81b3d5b0 t radeon_legacy_primary_dac_prepare
+ffffffff81b3d600 t radeon_legacy_primary_dac_commit
+ffffffff81b3d650 t radeon_legacy_primary_dac_mode_set
+ffffffff81b3d870 t radeon_legacy_primary_dac_detect
+ffffffff81b3db40 t radeon_legacy_tv_dac_dpms
+ffffffff81b3dda0 t radeon_legacy_tv_dac_prepare
+ffffffff81b3ddf0 t radeon_legacy_tv_dac_commit
+ffffffff81b3de40 t radeon_legacy_tv_dac_mode_set
+ffffffff81b3e330 t radeon_legacy_tv_dac_detect
+ffffffff81b3f410 t radeon_ext_tmds_enc_destroy
+ffffffff81b3f450 t radeon_legacy_tmds_ext_dpms
+ffffffff81b3f520 t radeon_legacy_tmds_ext_prepare
+ffffffff81b3f5d0 t radeon_legacy_tmds_ext_commit
+ffffffff81b3f680 t radeon_legacy_tmds_ext_mode_set
+ffffffff81b40000 T radeon_legacy_tv_mode_set
+ffffffff81b40fa0 t radeon_wait_pll_lock
+ffffffff81b41150 T radeon_legacy_tv_adjust_crtc_reg
+ffffffff81b41260 T radeon_legacy_tv_adjust_pll1
+ffffffff81b41350 T radeon_legacy_tv_adjust_pll2
+ffffffff81b42000 T radeon_ttm_bo_is_radeon_bo
+ffffffff81b42030 t radeon_ttm_bo_destroy
+ffffffff81b42170 T radeon_ttm_placement_from_domain
+ffffffff81b42350 T radeon_bo_create
+ffffffff81b42540 T radeon_bo_kmap
+ffffffff81b42600 T radeon_bo_check_tiling
+ffffffff81b426d0 T radeon_bo_kunmap
+ffffffff81b42750 T radeon_bo_ref
+ffffffff81b42790 T radeon_bo_unref
+ffffffff81b427e0 T radeon_bo_pin_restricted
+ffffffff81b42a70 T radeon_bo_pin
+ffffffff81b42a90 T radeon_bo_unpin
+ffffffff81b42c00 T radeon_bo_evict_vram
+ffffffff81b42c20 T radeon_bo_force_delete
+ffffffff81b42d70 T radeon_bo_init
+ffffffff81b42e10 T radeon_bo_fini
+ffffffff81b42e50 T radeon_bo_list_validate
+ffffffff81b430e0 T radeon_bo_get_surface_reg
+ffffffff81b43360 T radeon_bo_set_tiling_flags
+ffffffff81b434a0 T radeon_bo_get_tiling_flags
+ffffffff81b434e0 T radeon_bo_move_notify
+ffffffff81b43610 T radeon_bo_fault_reserve_notify
+ffffffff81b438f0 T radeon_bo_wait
+ffffffff81b43980 t ttm_bo_reserve
+ffffffff81b43b50 t ttm_bo_unreserve
+ffffffff81b43c30 T radeon_bo_fence
+ffffffff81b44000 T radeon_pm_get_type_index
+ffffffff81b44070 T radeon_pm_acpi_event_handler
+ffffffff81b44260 t radeon_pm_set_clocks
+ffffffff81b44af0 T radeon_dpm_enable_uvd
+ffffffff81b44bb0 T radeon_pm_compute_clocks
+ffffffff81b45650 T radeon_dpm_enable_vce
+ffffffff81b456b0 T radeon_pm_suspend
+ffffffff81b457a0 T radeon_pm_resume
+ffffffff81b45a90 T radeon_pm_init
+ffffffff81b45fb0 T radeon_pm_late_init
+ffffffff81b46060 T radeon_pm_fini
+ffffffff81b46190 t radeon_dpm_thermal_work_handler
+ffffffff81b46250 t radeon_dynpm_idle_work_handler
+ffffffff81b46530 t __delayed_work_tick
+ffffffff81b47000 T radeon_gem_prime_res_obj
+ffffffff81b47030 T radeon_gem_prime_export
+ffffffff81b48000 T radeon_ring_supports_scratch_reg
+ffffffff81b48030 T radeon_ring_free_size
+ffffffff81b480d0 T radeon_ring_lockup_update
+ffffffff81b48130 T radeon_ring_alloc
+ffffffff81b482b0 T radeon_ring_lock
+ffffffff81b48330 T radeon_ring_commit
+ffffffff81b48430 T radeon_ring_unlock_commit
+ffffffff81b48460 T radeon_ring_undo
+ffffffff81b48490 T radeon_ring_unlock_undo
+ffffffff81b484b0 T radeon_ring_test_lockup
+ffffffff81b485c0 T radeon_ring_backup
+ffffffff81b48790 T radeon_ring_restore
+ffffffff81b48930 T radeon_ring_init
+ffffffff81b48b10 t radeon_bo_reserve
+ffffffff81b48cc0 t radeon_bo_unreserve
+ffffffff81b48db0 T radeon_ring_fini
+ffffffff81b49000 T radeon_sa_bo_manager_init
+ffffffff81b491a0 T radeon_sa_bo_manager_fini
+ffffffff81b49380 T radeon_sa_bo_manager_start
+ffffffff81b494b0 t radeon_bo_reserve
+ffffffff81b49660 t radeon_bo_unreserve
+ffffffff81b49750 T radeon_sa_bo_manager_suspend
+ffffffff81b497f0 T radeon_sa_bo_new
+ffffffff81b4a060 T radeon_sa_bo_free
+ffffffff81b4b000 T radeon_semaphore_create
+ffffffff81b4b0e0 T radeon_semaphore_emit_signal
+ffffffff81b4b170 T radeon_semaphore_emit_wait
+ffffffff81b4b200 T radeon_semaphore_free
+ffffffff81b4c000 T radeon_sync_create
+ffffffff81b4c090 T radeon_sync_fence
+ffffffff81b4c140 T radeon_sync_resv
+ffffffff81b4c350 T radeon_sync_rings
+ffffffff81b4c530 T radeon_sync_free
+ffffffff81b4d000 T radeon_test_moves
+ffffffff81b4d070 t radeon_do_test_moves
+ffffffff81b4d600 T radeon_test_ring_sync
+ffffffff81b4d8c0 t radeon_test_create_and_emit_fence
+ffffffff81b4da30 T radeon_test_syncing
+ffffffff81b4dc10 t radeon_test_ring_sync2
+ffffffff81b4df70 t radeon_bo_reserve
+ffffffff81b4e120 t radeon_bo_unreserve
+ffffffff81b4f000 T radeon_ttm_tt_set_userptr
+ffffffff81b4f050 T radeon_ttm_tt_has_userptr
+ffffffff81b4f0a0 T radeon_ttm_tt_is_readonly
+ffffffff81b4f0e0 T radeon_ttm_init
+ffffffff81b4f390 T radeon_ttm_set_active_vram_size
+ffffffff81b4f3d0 t radeon_bo_reserve
+ffffffff81b4f580 t radeon_bo_unreserve
+ffffffff81b4f670 T radeon_ttm_fini
+ffffffff81b4f750 T radeon_mmap
+ffffffff81b4f7f0 t radeon_ttm_fault
+ffffffff81b4f8b0 t radeon_ttm_backend_bind
+ffffffff81b4f990 t radeon_ttm_backend_unbind
+ffffffff81b4f9f0 t radeon_ttm_backend_destroy
+ffffffff81b4fa20 t radeon_ttm_mem_global_init
+ffffffff81b4fa30 t radeon_ttm_mem_global_release
+ffffffff81b4fa40 t radeon_ttm_tt_create
+ffffffff81b4fb20 t radeon_ttm_tt_populate
+ffffffff81b4fbf0 t radeon_ttm_tt_unpopulate
+ffffffff81b4fc90 t radeon_invalidate_caches
+ffffffff81b4fcc0 t radeon_init_mem_type
+ffffffff81b4fdd0 t radeon_evict_flags
+ffffffff81b4ff40 t radeon_bo_move
+ffffffff81b50310 t radeon_verify_access
+ffffffff81b50380 t radeon_ttm_io_mem_reserve
+ffffffff81b50460 t radeon_ttm_io_mem_free
+ffffffff81b50490 t radeon_move_blit
+ffffffff81b51000 T radeon_ucode_print_mc_hdr
+ffffffff81b51050 T radeon_ucode_print_smc_hdr
+ffffffff81b510a0 T radeon_ucode_print_gfx_hdr
+ffffffff81b510f0 T radeon_ucode_print_rlc_hdr
+ffffffff81b51140 T radeon_ucode_print_sdma_hdr
+ffffffff81b51190 T radeon_ucode_validate
+ffffffff81b52000 T radeon_uvd_init
+ffffffff81b524d0 t radeon_uvd_idle_work_handler
+ffffffff81b526a0 t radeon_bo_reserve
+ffffffff81b528e0 t radeon_bo_unreserve
+ffffffff81b529d0 T radeon_uvd_fini
+ffffffff81b52a90 T radeon_uvd_suspend
+ffffffff81b52c60 T radeon_uvd_note_usage
+ffffffff81b52ea0 T radeon_uvd_get_destroy_msg
+ffffffff81b52fb0 T radeon_uvd_resume
+ffffffff81b53040 T radeon_uvd_force_into_uvd_segment
+ffffffff81b530e0 T radeon_uvd_free_handles
+ffffffff81b532a0 T radeon_uvd_cs_parse
+ffffffff81b53a30 T radeon_uvd_get_create_msg
+ffffffff81b53b80 t radeon_uvd_send_msg
+ffffffff81b53d20 T radeon_uvd_calc_upll_dividers
+ffffffff81b53ec0 T radeon_uvd_send_upll_ctlreq
+ffffffff81b54290 t __delayed_work_tick
+ffffffff81b55000 T radeon_vce_init
+ffffffff81b555c0 t radeon_vce_idle_work_handler
+ffffffff81b55690 t radeon_bo_reserve
+ffffffff81b55840 t radeon_bo_unreserve
+ffffffff81b55930 T radeon_vce_fini
+ffffffff81b559b0 T radeon_vce_suspend
+ffffffff81b55a90 T radeon_vce_resume
+ffffffff81b55be0 T radeon_vce_note_usage
+ffffffff81b55cf0 T radeon_vce_free_handles
+ffffffff81b55db0 T radeon_vce_get_destroy_msg
+ffffffff81b56050 T radeon_vce_get_create_msg
+ffffffff81b56410 T radeon_vce_cs_reloc
+ffffffff81b56520 T radeon_vce_cs_parse
+ffffffff81b56d10 T radeon_vce_semaphore_emit
+ffffffff81b56ed0 T radeon_vce_ib_execute
+ffffffff81b57060 T radeon_vce_fence_emit
+ffffffff81b57290 T radeon_vce_ring_test
+ffffffff81b573e0 T radeon_vce_ib_test
+ffffffff81b57500 t __delayed_work_tick
+ffffffff81b58000 T radeon_vm_manager_init
+ffffffff81b58060 T radeon_vm_manager_fini
+ffffffff81b58180 T radeon_vm_get_bos
+ffffffff81b582b0 T radeon_vm_grab_id
+ffffffff81b58430 T radeon_vm_flush
+ffffffff81b58570 T radeon_vm_fence
+ffffffff81b58620 T radeon_vm_bo_find
+ffffffff81b58680 T radeon_vm_bo_add
+ffffffff81b58760 T radeon_vm_bo_set_addr
+ffffffff81b58b10 t radeon_bo_unreserve
+ffffffff81b58c00 t radeon_vm_clear_bo
+ffffffff81b58de0 T radeon_vm_map_gart
+ffffffff81b58e20 T radeon_vm_update_page_directory
+ffffffff81b59110 T radeon_vm_bo_update
+ffffffff81b59780 T radeon_vm_clear_freed
+ffffffff81b59860 T radeon_vm_clear_invalids
+ffffffff81b59900 T radeon_vm_bo_rmv
+ffffffff81b599d0 T radeon_vm_bo_invalidate
+ffffffff81b59a80 T radeon_vm_init
+ffffffff81b59ce0 T radeon_vm_fini
+ffffffff81b5a030 t radeon_bo_reserve
+ffffffff81b5a1e0 t radeon_vm_frag_ptes
+ffffffff81b5b000 T rs400_gart_adjust_size
+ffffffff81b5b0c0 T rs400_gart_tlb_flush
+ffffffff81b5b140 T rs400_gart_init
+ffffffff81b5b230 T rs400_gart_enable
+ffffffff81b5b5b0 T rs400_gart_disable
+ffffffff81b5b610 T rs400_gart_fini
+ffffffff81b5b680 T rs400_gart_get_page_entry
+ffffffff81b5b6e0 T rs400_gart_set_page
+ffffffff81b5b710 T rs400_mc_wait_for_idle
+ffffffff81b5b7a0 T rs400_mc_rreg
+ffffffff81b5b860 T rs400_mc_wreg
+ffffffff81b5b910 T rs400_resume
+ffffffff81b5ba70 t rs400_mc_program
+ffffffff81b5bb80 t rs400_startup
+ffffffff81b5bda0 T rs400_suspend
+ffffffff81b5be40 T rs400_fini
+ffffffff81b5bf30 T rs400_init
+ffffffff81b5d000 T avivo_wait_for_vblank
+ffffffff81b5d300 T rs600_page_flip
+ffffffff81b5d590 T rs600_page_flip_pending
+ffffffff81b5d610 T avivo_program_fmt
+ffffffff81b5d750 T rs600_pm_misc
+ffffffff81b5da60 T rs600_pm_prepare
+ffffffff81b5db80 T rs600_pm_finish
+ffffffff81b5dca0 T rs600_hpd_sense
+ffffffff81b5dd20 T rs600_hpd_set_polarity
+ffffffff81b5de50 T rs600_hpd_init
+ffffffff81b5df50 T rs600_hpd_fini
+ffffffff81b5e020 T rs600_asic_reset
+ffffffff81b5e3f0 T rs600_gart_tlb_flush
+ffffffff81b5e4c0 T rs600_gart_get_page_entry
+ffffffff81b5e520 T rs600_gart_set_page
+ffffffff81b5e560 T rs600_irq_set
+ffffffff81b5e800 T rs600_irq_disable
+ffffffff81b5e8b0 t rs600_irq_ack
+ffffffff81b5eb30 T rs600_irq_process
+ffffffff81b5ee60 T rs600_get_vblank_counter
+ffffffff81b5eea0 T rs600_mc_wait_for_idle
+ffffffff81b5ef30 T rs600_bandwidth_update
+ffffffff81b5f0a0 T rs600_mc_rreg
+ffffffff81b5f140 T rs600_mc_wreg
+ffffffff81b5f1d0 T rs600_set_safe_registers
+ffffffff81b5f210 T rs600_resume
+ffffffff81b5f370 t rs600_startup
+ffffffff81b5fbf0 T rs600_suspend
+ffffffff81b5fd30 T rs600_fini
+ffffffff81b5fe30 T rs600_init
+ffffffff81b61000 T rs690_mc_wait_for_idle
+ffffffff81b61090 T rs690_pm_info
+ffffffff81b61320 T rs690_line_buffer_adjust
+ffffffff81b61450 T rs690_bandwidth_update
+ffffffff81b617f0 t rs690_crtc_bandwidth_compute
+ffffffff81b61be0 t rs690_compute_mode_priority
+ffffffff81b61fd0 T rs690_mc_rreg
+ffffffff81b62090 T rs690_mc_wreg
+ffffffff81b62140 T rs690_resume
+ffffffff81b62250 t rs690_startup
+ffffffff81b62560 T rs690_suspend
+ffffffff81b625c0 T rs690_fini
+ffffffff81b62660 T rs690_init
+ffffffff81b63000 T rs780_dpm_enable
+ffffffff81b63f70 T rs780_dpm_disable
+ffffffff81b64090 T rs780_dpm_set_power_state
+ffffffff81b64500 t rs780_force_voltage
+ffffffff81b646e0 t rs780_enable_voltage_scaling
+ffffffff81b64950 T rs780_dpm_setup_asic
+ffffffff81b64980 T rs780_dpm_display_configuration_changed
+ffffffff81b64b10 T rs780_dpm_init
+ffffffff81b65070 T rs780_dpm_print_power_state
+ffffffff81b65100 T rs780_dpm_fini
+ffffffff81b65190 T rs780_dpm_get_sclk
+ffffffff81b651d0 T rs780_dpm_get_mclk
+ffffffff81b65200 T rs780_dpm_debugfs_print_current_performance_level
+ffffffff81b65250 T rs780_dpm_get_current_sclk
+ffffffff81b65300 T rs780_dpm_get_current_mclk
+ffffffff81b65330 T rs780_dpm_force_performance_level
+ffffffff81b655c0 t rs780_force_fbdiv
+ffffffff81b66000 T rv515_debugfs
+ffffffff81b66050 T rv515_ring_start
+ffffffff81b66b80 T rv515_mc_wait_for_idle
+ffffffff81b66c10 T rv515_vga_render_disable
+ffffffff81b66c70 T rv515_mc_rreg
+ffffffff81b66d30 T rv515_mc_wreg
+ffffffff81b66de0 T rv515_mc_stop
+ffffffff81b67450 T rv515_mc_resume
+ffffffff81b67b20 T rv515_clock_startup
+ffffffff81b67bf0 T rv515_resume
+ffffffff81b67e80 t rv515_startup
+ffffffff81b683b0 T rv515_suspend
+ffffffff81b68410 T rv515_set_safe_registers
+ffffffff81b68450 T rv515_fini
+ffffffff81b684f0 T rv515_init
+ffffffff81b68820 T atom_rv515_force_tv_scaler
+ffffffff81b6c390 T rv515_bandwidth_avivo_update
+ffffffff81b6c540 t rv515_crtc_bandwidth_compute
+ffffffff81b6c890 t rv515_compute_mode_priority
+ffffffff81b6cca0 T rv515_bandwidth_update
+ffffffff81b6d000 T rv6xx_dpm_enable
+ffffffff81b6d920 t rv6xx_calculate_stepping_parameters
+ffffffff81b6daf0 t rv6xx_program_stepping_parameters_except_lowest_entry
+ffffffff81b6e230 t rv6xx_program_stepping_parameters_lowest_entry
+ffffffff81b6e330 T rv6xx_dpm_disable
+ffffffff81b6e7b0 T rv6xx_dpm_set_power_state
+ffffffff81b6f310 T rv6xx_setup_asic
+ffffffff81b6f450 T rv6xx_dpm_display_configuration_changed
+ffffffff81b6f4f0 T rv6xx_dpm_init
+ffffffff81b6fa50 T rv6xx_dpm_print_power_state
+ffffffff81b6fb00 T rv6xx_dpm_debugfs_print_current_performance_level
+ffffffff81b6fb30 T rv6xx_dpm_get_current_sclk
+ffffffff81b6fbb0 T rv6xx_dpm_get_current_mclk
+ffffffff81b6fc30 T rv6xx_dpm_fini
+ffffffff81b6fcc0 T rv6xx_dpm_get_sclk
+ffffffff81b6fd00 T rv6xx_dpm_get_mclk
+ffffffff81b6fd40 T rv6xx_dpm_force_performance_level
+ffffffff81b6fee0 t rv6xx_generate_steps
+ffffffff81b70200 t rv6xx_output_stepping
+ffffffff81b70320 t rv6xx_program_mclk_stepping_entry
+ffffffff81b70600 t rv6xx_program_engine_spread_spectrum
+ffffffff81b70980 t rv6xx_step_sw_voltage
+ffffffff81b71000 T rv730_populate_sclk_value
+ffffffff81b71250 T rv730_populate_mclk_value
+ffffffff81b71490 T rv730_read_clock_registers
+ffffffff81b71650 T rv730_populate_smc_acpi_state
+ffffffff81b71800 T rv730_populate_smc_initial_state
+ffffffff81b719c0 T rv730_program_memory_timing_parameters
+ffffffff81b71c90 T rv730_start_dpm
+ffffffff81b71d70 T rv730_stop_dpm
+ffffffff81b71e60 T rv730_program_dcodt
+ffffffff81b71f70 T rv730_get_odt_values
+ffffffff81b73000 T rv740_get_decoded_reference_divider
+ffffffff81b730a0 T rv740_get_dll_speed
+ffffffff81b731b0 T rv740_populate_sclk_value
+ffffffff81b733b0 T rv740_populate_mclk_value
+ffffffff81b73830 T rv740_read_clock_registers
+ffffffff81b73a10 T rv740_populate_smc_acpi_state
+ffffffff81b73c40 T rv740_enable_mclk_spread_spectrum
+ffffffff81b73cb0 T rv740_get_mclk_frequency_ratio
+ffffffff81b74000 T rv770_set_uvd_clocks
+ffffffff81b74740 T rv770_get_xclk
+ffffffff81b747b0 T rv770_page_flip
+ffffffff81b74aa0 T rv770_page_flip_pending
+ffffffff81b74b20 T rv770_get_temp
+ffffffff81b74b90 T rv770_pm_misc
+ffffffff81b74c40 T r700_cp_stop
+ffffffff81b74ce0 T r700_cp_fini
+ffffffff81b74d80 T rv770_set_clk_bypass_mode
+ffffffff81b74ee0 T r700_vram_gtt_location
+ffffffff81b75070 T rv770_resume
+ffffffff81b75100 t rv770_init_golden_registers
+ffffffff81b75290 t rv770_startup
+ffffffff81b77b20 T rv770_suspend
+ffffffff81b77c00 t rv770_pcie_gart_disable
+ffffffff81b77e40 T rv770_init
+ffffffff81b78300 T rv770_fini
+ffffffff81b79000 T rv770_copy_dma
+ffffffff81b7a000 T rv770_get_ps
+ffffffff81b7a030 T rv770_get_pi
+ffffffff81b7a060 T evergreen_get_pi
+ffffffff81b7a090 T rv770_restore_cgcg
+ffffffff81b7a160 T rv770_stop_dpm
+ffffffff81b7a250 T rv770_dpm_enabled
+ffffffff81b7a2a0 T rv770_enable_thermal_protection
+ffffffff81b7a310 T rv770_enable_acpi_pm
+ffffffff81b7a370 T rv770_get_seq_value
+ffffffff81b7a3a0 T rv770_write_smc_soft_register
+ffffffff81b7a3d0 T rv770_populate_smc_t
+ffffffff81b7a570 T rv770_populate_smc_sp
+ffffffff81b7a5d0 T rv770_map_clkf_to_ibias
+ffffffff81b7a630 T rv770_populate_vddc_value
+ffffffff81b7a6f0 T rv770_populate_mvdd_value
+ffffffff81b7a740 T rv770_calculate_memory_refresh_rate
+ffffffff81b7a7e0 T rv770_enable_backbias
+ffffffff81b7a850 T rv770_setup_bsp
+ffffffff81b7a920 T rv770_program_git
+ffffffff81b7a980 T rv770_program_tp
+ffffffff81b7aa20 T rv770_program_tpp
+ffffffff81b7aa50 T rv770_program_sstp
+ffffffff81b7aa80 T rv770_program_engine_speed_parameters
+ffffffff81b7aae0 T rv770_program_vc
+ffffffff81b7ab10 T rv770_clear_vc
+ffffffff81b7ab40 T rv770_upload_firmware
+ffffffff81b7ab80 T rv770_populate_initial_mvdd_value
+ffffffff81b7abd0 T rv770_get_memory_module_index
+ffffffff81b7ac20 T rv770_enable_voltage_control
+ffffffff81b7ac90 T rv770_halt_smc
+ffffffff81b7acf0 T rv770_resume_smc
+ffffffff81b7ad40 T rv770_set_sw_state
+ffffffff81b7ad80 T rv770_set_boot_state
+ffffffff81b7add0 T rv770_set_uvd_clock_before_set_eng_clock
+ffffffff81b7ae30 T rv770_set_uvd_clock_after_set_eng_clock
+ffffffff81b7aea0 T rv770_restrict_performance_levels_before_switch
+ffffffff81b7af00 T rv770_dpm_force_performance_level
+ffffffff81b7afc0 T r7xx_start_smc
+ffffffff81b7afe0 T r7xx_stop_smc
+ffffffff81b7b000 T rv770_read_voltage_smio_registers
+ffffffff81b7b060 T rv770_reset_smio_status
+ffffffff81b7b190 T rv770_get_memory_type
+ffffffff81b7b1f0 T rv770_get_pcie_gen2_status
+ffffffff81b7b260 T rv770_get_max_vddc
+ffffffff81b7b2c0 T rv770_program_response_times
+ffffffff81b7b400 T rv770_enable_auto_throttle_source
+ffffffff81b7b460 t rv770_set_dpm_event_sources
+ffffffff81b7b570 T rv770_dpm_enable
+ffffffff81b7c870 T rv770_dpm_late_enable
+ffffffff81b7c9d0 T rv770_dpm_disable
+ffffffff81b7cea0 T rv770_dpm_set_power_state
+ffffffff81b7d540 T rv770_dpm_setup_asic
+ffffffff81b7d980 T rv770_dpm_display_configuration_changed
+ffffffff81b7da20 T rv7xx_parse_power_table
+ffffffff81b7df50 T rv770_get_engine_memory_ss
+ffffffff81b7dfe0 T rv770_dpm_init
+ffffffff81b7e210 T rv770_dpm_print_power_state
+ffffffff81b7e330 T rv770_dpm_debugfs_print_current_performance_level
+ffffffff81b7e360 T rv770_dpm_get_current_sclk
+ffffffff81b7e3e0 T rv770_dpm_get_current_mclk
+ffffffff81b7e460 T rv770_dpm_fini
+ffffffff81b7e4f0 T rv770_dpm_get_sclk
+ffffffff81b7e530 T rv770_dpm_get_mclk
+ffffffff81b7e570 T rv770_dpm_vblank_too_short
+ffffffff81b7e5d0 t rv770_convert_power_level_to_smc
+ffffffff81b7f000 T rv770_copy_bytes_to_smc
+ffffffff81b7f290 T rv770_start_smc
+ffffffff81b7f2f0 T rv770_reset_smc
+ffffffff81b7f350 T rv770_stop_smc_clock
+ffffffff81b7f3b0 T rv770_start_smc_clock
+ffffffff81b7f410 T rv770_is_smc_running
+ffffffff81b7f470 T rv770_send_msg_to_smc
+ffffffff81b7f5a0 T rv770_wait_for_smc_inactive
+ffffffff81b7f650 T rv770_load_smc_ucode
+ffffffff81b7f800 T rv770_read_smc_sram_dword
+ffffffff81b7f8d0 T rv770_write_smc_sram_dword
+ffffffff81b80000 T si_get_allowed_info_register
+ffffffff81b800b0 T si_get_xclk
+ffffffff81b80150 T si_get_temp
+ffffffff81b801b0 T si_mc_load_microcode
+ffffffff81b80570 T dce6_bandwidth_update
+ffffffff81b809a0 t dce6_program_watermarks
+ffffffff81b814c0 T si_fence_ring_emit
+ffffffff81b81930 T si_ring_ib_execute
+ffffffff81b82100 T si_gpu_check_soft_reset
+ffffffff81b822f0 T si_asic_reset
+ffffffff81b82810 t si_gpu_pci_config_reset
+ffffffff81b82d30 T si_gfx_is_lockup
+ffffffff81b82d90 T si_vram_gtt_location
+ffffffff81b82e30 T si_pcie_gart_tlb_flush
+ffffffff81b82e90 T si_ib_parse
+ffffffff81b83550 T si_vm_init
+ffffffff81b83590 T si_vm_fini
+ffffffff81b835c0 T si_vm_flush
+ffffffff81b83c70 T si_init_uvd_internal_cg
+ffffffff81b83ce0 T si_get_csb_size
+ffffffff81b83d70 T si_get_csb_buffer
+ffffffff81b83f10 T si_rlc_reset
+ffffffff81b83fc0 T si_irq_set
+ffffffff81b84520 t si_disable_interrupt_state
+ffffffff81b84950 T si_irq_process
+ffffffff81b85a40 t si_irq_ack
+ffffffff81b86260 T si_resume
+ffffffff81b862f0 t si_init_golden_registers
+ffffffff81b864b0 t si_startup
+ffffffff81b8b880 T si_suspend
+ffffffff81b8bbb0 t si_pcie_gart_disable
+ffffffff81b8bd20 T si_init
+ffffffff81b8d1f0 t si_cp_fini
+ffffffff81b8d300 t si_irq_fini
+ffffffff81b8d420 T si_fini
+ffffffff81b8d630 T si_get_gpu_clock_counter
+ffffffff81b8d710 T si_set_uvd_clocks
+ffffffff81b8de70 T si_set_vce_clocks
+ffffffff81b8e410 t si_vce_send_vcepll_ctlreq
+ffffffff81b8e670 t dce6_latency_watermark
+ffffffff81b8e890 t si_rlc_stop
+ffffffff81b8eaa0 t si_vm_reg_valid
+ffffffff81b8ec00 t si_vm_packet3_cp_dma_check
+ffffffff81b8ed60 t si_update_cg
+ffffffff81b8f550 t si_enable_mgcg
+ffffffff81b8fae0 t si_enable_cgcg
+ffffffff81b91000 T si_dma_is_lockup
+ffffffff81b91080 T si_dma_vm_copy_pages
+ffffffff81b91160 T si_dma_vm_write_pages
+ffffffff81b912e0 T si_dma_vm_set_pages
+ffffffff81b91440 T si_dma_vm_flush
+ffffffff81b918d0 T si_copy_dma
+ffffffff81b92000 T si_dpm_force_performance_level
+ffffffff81b921a0 T si_get_ddr3_mclk_frequency_ratio
+ffffffff81b921f0 T si_get_mclk_frequency_ratio
+ffffffff81b92270 T si_trim_voltage_table_to_fit_state_table
+ffffffff81b92390 T si_dpm_setup_asic
+ffffffff81b92620 T si_fan_ctrl_get_fan_speed_percent
+ffffffff81b926e0 T si_fan_ctrl_set_fan_speed_percent
+ffffffff81b927e0 T si_fan_ctrl_set_mode
+ffffffff81b92b20 T si_fan_ctrl_get_mode
+ffffffff81b92b80 T si_dpm_enable
+ffffffff81b980a0 t si_populate_smc_tdp_limits
+ffffffff81b982a0 T si_dpm_late_enable
+ffffffff81b98460 T si_dpm_disable
+ffffffff81b98830 T si_dpm_pre_set_power_state
+ffffffff81b992e0 T si_dpm_set_power_state
+ffffffff81b9a810 T si_dpm_post_set_power_state
+ffffffff81b9a840 T si_dpm_display_configuration_changed
+ffffffff81b9a960 T si_dpm_init
+ffffffff81b9c4d0 T si_dpm_fini
+ffffffff81b9c570 T si_dpm_debugfs_print_current_performance_level
+ffffffff81b9c5b0 T si_dpm_get_current_sclk
+ffffffff81b9c640 T si_dpm_get_current_mclk
+ffffffff81b9c6d0 t si_get_std_voltage_value
+ffffffff81b9c800 t si_populate_memory_timing_parameters
+ffffffff81b9c940 t si_convert_power_level_to_smc
+ffffffff81b9d1f0 t si_calculate_sclk_params
+ffffffff81b9d410 t si_convert_mc_reg_table_to_smc
+ffffffff81b9d560 t si_program_cac_config_registers
+ffffffff81b9d6d0 t si_set_dpm_event_sources
+ffffffff81b9e000 T si_copy_bytes_to_smc
+ffffffff81b9e330 T si_start_smc
+ffffffff81b9e370 T si_reset_smc
+ffffffff81b9e420 T si_program_jump_on_start
+ffffffff81b9e450 T si_stop_smc_clock
+ffffffff81b9e490 T si_start_smc_clock
+ffffffff81b9e4d0 T si_is_smc_running
+ffffffff81b9e530 T si_send_msg_to_smc
+ffffffff81b9e630 T si_wait_for_smc_inactive
+ffffffff81b9e6d0 T si_load_smc_ucode
+ffffffff81b9e8d0 T si_read_smc_sram_dword
+ffffffff81b9e9f0 T si_write_smc_sram_dword
+ffffffff81b9f000 T sumo_get_pi
+ffffffff81b9f030 T sumo_gfx_clockgating_initialize
+ffffffff81b9f140 T sumo_program_vc
+ffffffff81b9f170 T sumo_clear_vc
+ffffffff81b9f1a0 T sumo_program_sstp
+ffffffff81b9f230 T sumo_take_smu_control
+ffffffff81b9f260 T sumo_get_sleep_divider_from_id
+ffffffff81b9f290 T sumo_get_sleep_divider_id_from_clock
+ffffffff81b9f340 T sumo_dpm_enable
+ffffffff81b9fd50 T sumo_dpm_late_enable
+ffffffff81ba0460 T sumo_dpm_disable
+ffffffff81ba0960 T sumo_dpm_pre_set_power_state
+ffffffff81ba0e30 T sumo_dpm_set_power_state
+ffffffff81ba1990 T sumo_dpm_post_set_power_state
+ffffffff81ba1a30 T sumo_dpm_setup_asic
+ffffffff81ba1b80 T sumo_dpm_display_configuration_changed
+ffffffff81ba1bb0 T sumo_convert_vid2_to_vid7
+ffffffff81ba1c10 T sumo_construct_sclk_voltage_mapping_table
+ffffffff81ba1cd0 T sumo_construct_vid_mapping_table
+ffffffff81ba1e50 T sumo_dpm_init
+ffffffff81ba2760 T sumo_dpm_print_power_state
+ffffffff81ba2870 T sumo_dpm_debugfs_print_current_performance_level
+ffffffff81ba28a0 T sumo_dpm_get_current_sclk
+ffffffff81ba2930 T sumo_dpm_get_current_mclk
+ffffffff81ba2960 T sumo_dpm_fini
+ffffffff81ba29f0 T sumo_dpm_get_sclk
+ffffffff81ba2a40 T sumo_dpm_get_mclk
+ffffffff81ba2a70 T sumo_dpm_force_performance_level
+ffffffff81ba2ff0 t sumo_power_level_enable
+ffffffff81ba31f0 t sumo_program_power_level
+ffffffff81ba3710 t sumo_setup_uvd_clocks
+ffffffff81ba4000 T sumo_initialize_m3_arb
+ffffffff81ba42b0 T sumo_smu_notify_alt_vddnb_change
+ffffffff81ba4340 t sumo_send_msg_to_smu
+ffffffff81ba4510 T sumo_smu_pg_init
+ffffffff81ba4530 T sumo_enable_boost_timer
+ffffffff81ba4670 T sumo_set_tdp_limit
+ffffffff81ba46f0 T sumo_boost_state_enable
+ffffffff81ba4730 T sumo_get_running_fw_version
+ffffffff81ba5000 T trinity_dpm_enable_bapm
+ffffffff81ba5070 T trinity_dpm_enable
+ffffffff81ba55d0 T trinity_dpm_late_enable
+ffffffff81ba5c10 T trinity_dpm_disable
+ffffffff81ba6140 T trinity_dpm_force_performance_level
+ffffffff81ba61f0 T trinity_dpm_pre_set_power_state
+ffffffff81ba67f0 T trinity_dpm_set_power_state
+ffffffff81ba6e60 T trinity_dpm_post_set_power_state
+ffffffff81ba6f00 T trinity_dpm_setup_asic
+ffffffff81ba6f60 T trinity_dpm_display_configuration_changed
+ffffffff81ba6ff0 T trinity_dpm_init
+ffffffff81ba7930 T trinity_dpm_print_power_state
+ffffffff81ba7a50 T trinity_dpm_debugfs_print_current_performance_level
+ffffffff81ba7b00 T trinity_dpm_get_current_sclk
+ffffffff81ba7b70 T trinity_dpm_get_current_mclk
+ffffffff81ba7ba0 T trinity_dpm_fini
+ffffffff81ba7c40 T trinity_dpm_get_sclk
+ffffffff81ba7c90 T trinity_dpm_get_mclk
+ffffffff81ba7cc0 t trinity_program_power_level
+ffffffff81ba8000 T trinity_dpm_bapm_enable
+ffffffff81ba81a0 T trinity_dpm_config
+ffffffff81ba82c0 T trinity_dpm_force_state
+ffffffff81ba83d0 T trinity_dpm_n_levels_disabled
+ffffffff81ba84e0 T trinity_uvd_dpm_config
+ffffffff81ba85e0 T trinity_dpm_no_forced_level
+ffffffff81ba86e0 T trinity_dce_enable_voltage_adjustment
+ffffffff81ba8880 T trinity_gfx_dynamic_mgpg_config
+ffffffff81ba8980 T trinity_acquire_mutex
+ffffffff81ba8a30 T trinity_release_mutex
+ffffffff81ba9000 T uvd_v1_0_get_rptr
+ffffffff81ba9030 T uvd_v1_0_get_wptr
+ffffffff81ba9060 T uvd_v1_0_set_wptr
+ffffffff81ba9090 T uvd_v1_0_fence_emit
+ffffffff81ba9480 T uvd_v1_0_resume
+ffffffff81ba9670 T uvd_v1_0_init
+ffffffff81ba9c40 T uvd_v1_0_start
+ffffffff81baa640 T uvd_v1_0_fini
+ffffffff81baa680 T uvd_v1_0_stop
+ffffffff81baa870 T uvd_v1_0_ring_test
+ffffffff81baaa50 T uvd_v1_0_semaphore_emit
+ffffffff81baaa80 T uvd_v1_0_ib_execute
+ffffffff81baac10 T uvd_v1_0_ib_test
+ffffffff81bab000 T uvd_v2_2_fence_emit
+ffffffff81bab470 T uvd_v2_2_semaphore_emit
+ffffffff81bab680 T uvd_v2_2_resume
+ffffffff81bac000 T uvd_v3_1_semaphore_emit
+ffffffff81bad000 T uvd_v4_2_resume
+ffffffff81bae000 T vce_v1_0_get_rptr
+ffffffff81bae080 T vce_v1_0_get_wptr
+ffffffff81bae100 T vce_v1_0_set_wptr
+ffffffff81bae180 T vce_v1_0_enable_mgcg
+ffffffff81bae4d0 T vce_v1_0_load_fw
+ffffffff81bae6a0 T vce_v1_0_bo_size
+ffffffff81bae710 T vce_v1_0_resume
+ffffffff81baf2b0 T vce_v1_0_start
+ffffffff81bafc30 T vce_v1_0_init
+ffffffff81bb0000 T vce_v2_0_enable_mgcg
+ffffffff81bb0080 t vce_v2_0_set_dyn_cg
+ffffffff81bb02e0 T vce_v2_0_bo_size
+ffffffff81bb0350 T vce_v2_0_resume
+ffffffff81bb1000 t pp_early_init
+ffffffff81bb1110 t pp_late_init
+ffffffff81bb1240 t pp_sw_init
+ffffffff81bb1260 t pp_sw_fini
+ffffffff81bb12f0 t pp_hw_init
+ffffffff81bb1350 t pp_hw_fini
+ffffffff81bb1390 t pp_late_fini
+ffffffff81bb13f0 t pp_suspend
+ffffffff81bb1410 t pp_resume
+ffffffff81bb1430 t pp_is_idle
+ffffffff81bb1460 t pp_wait_for_idle
+ffffffff81bb1490 t pp_sw_reset
+ffffffff81bb14c0 t pp_set_clockgating_state
+ffffffff81bb14f0 t pp_set_powergating_state
+ffffffff81bb1520 t pp_dpm_set_fan_control_mode
+ffffffff81bb15b0 t pp_dpm_get_fan_control_mode
+ffffffff81bb1640 t pp_dpm_set_fan_speed_percent
+ffffffff81bb16d0 t pp_dpm_get_fan_speed_percent
+ffffffff81bb1760 t pp_dpm_force_clock_level
+ffffffff81bb1810 t pp_dpm_print_clock_levels
+ffffffff81bb18c0 t pp_dpm_force_performance_level
+ffffffff81bb19e0 t pp_dpm_get_sclk_od
+ffffffff81bb1a70 t pp_dpm_set_sclk_od
+ffffffff81bb1b00 t pp_dpm_get_mclk_od
+ffffffff81bb1b90 t pp_dpm_set_mclk_od
+ffffffff81bb1c20 t pp_dpm_read_sensor
+ffffffff81bb1ce0 t pp_dpm_get_performance_level
+ffffffff81bb1d50 t pp_dpm_get_current_power_state
+ffffffff81bb1e00 t pp_dpm_get_fan_speed_rpm
+ffffffff81bb1e90 t pp_dpm_get_pp_num_states
+ffffffff81bb2010 t pp_dpm_get_pp_table
+ffffffff81bb2090 t pp_dpm_set_pp_table
+ffffffff81bb2200 t pp_dpm_switch_power_profile
+ffffffff81bb2330 t pp_dpm_get_vce_clock_state
+ffffffff81bb2380 t pp_dpm_dispatch_tasks
+ffffffff81bb2410 t pp_dpm_load_fw
+ffffffff81bb2440 t pp_dpm_fw_loading_complete
+ffffffff81bb2470 t pp_set_powergating_by_smu
+ffffffff81bb25d0 t pp_set_clockgating_by_smu
+ffffffff81bb2630 t pp_set_power_limit
+ffffffff81bb26e0 t pp_get_power_limit
+ffffffff81bb2770 t pp_get_power_profile_mode
+ffffffff81bb27f0 t pp_set_power_profile_mode
+ffffffff81bb28a0 t pp_odn_edit_dpm_table
+ffffffff81bb28f0 t pp_dpm_get_sclk
+ffffffff81bb2980 t pp_dpm_get_mclk
+ffffffff81bb2a10 t pp_display_configuration_change
+ffffffff81bb2a80 t pp_get_display_power_level
+ffffffff81bb2b00 t pp_get_current_clocks
+ffffffff81bb2c40 t pp_get_clock_by_type
+ffffffff81bb2cd0 t pp_get_clock_by_type_with_latency
+ffffffff81bb2d60 t pp_get_clock_by_type_with_voltage
+ffffffff81bb2df0 t pp_set_watermarks_for_clocks_ranges
+ffffffff81bb2e70 t pp_display_clock_voltage_request
+ffffffff81bb2ef0 t pp_get_display_mode_validation_clocks
+ffffffff81bb2f90 t pp_notify_smu_enable_pwe
+ffffffff81bb4000 T phm_setup_asic
+ffffffff81bb4050 T phm_power_down_asic
+ffffffff81bb40a0 T phm_set_power_state
+ffffffff81bb4110 T phm_enable_dynamic_state_management
+ffffffff81bb41a0 T phm_disable_dynamic_state_management
+ffffffff81bb4220 T phm_force_dpm_levels
+ffffffff81bb4270 T phm_apply_state_adjust_rules
+ffffffff81bb42c0 T phm_apply_clock_adjust_rules
+ffffffff81bb4310 T phm_powerdown_uvd
+ffffffff81bb4360 T phm_enable_clock_power_gatings
+ffffffff81bb43b0 T phm_disable_clock_power_gatings
+ffffffff81bb4400 T phm_pre_display_configuration_changed
+ffffffff81bb4460 T phm_display_configuration_changed
+ffffffff81bb44c0 T phm_notify_smc_display_config_after_ps_adjustment
+ffffffff81bb4520 T phm_stop_thermal_controller
+ffffffff81bb4570 T phm_register_irq_handlers
+ffffffff81bb45c0 T phm_start_thermal_controller
+ffffffff81bb4670 T phm_check_smc_update_required_for_display_configuration
+ffffffff81bb46c0 T phm_check_states_equal
+ffffffff81bb4710 T phm_store_dal_configuration_data
+ffffffff81bb48a0 T phm_get_dal_power_level
+ffffffff81bb48f0 T phm_set_cpu_power_state
+ffffffff81bb4940 T phm_get_performance_level
+ffffffff81bb4990 T phm_get_clock_info
+ffffffff81bb4af0 T phm_get_current_shallow_sleep_clocks
+ffffffff81bb4b40 T phm_get_clock_by_type
+ffffffff81bb4b90 T phm_get_clock_by_type_with_latency
+ffffffff81bb4be0 T phm_get_clock_by_type_with_voltage
+ffffffff81bb4c30 T phm_set_watermarks_for_clocks_ranges
+ffffffff81bb4c80 T phm_display_clock_voltage_request
+ffffffff81bb4cd0 T phm_get_max_high_clocks
+ffffffff81bb4d20 T phm_disable_smc_firmware_ctf
+ffffffff81bb5000 T hwmgr_early_init
+ffffffff81bb54c0 T hwmgr_sw_init
+ffffffff81bb5530 T hwmgr_sw_fini
+ffffffff81bb5580 T hwmgr_hw_init
+ffffffff81bb5750 T hwmgr_hw_fini
+ffffffff81bb5800 T hwmgr_suspend
+ffffffff81bb5870 T hwmgr_resume
+ffffffff81bb5940 T hwmgr_handle_task
+ffffffff81bb6000 T pp_override_get_default_fuse_value
+ffffffff81bb7000 T psm_init_power_state_table
+ffffffff81bb7240 T psm_fini_power_state_table
+ffffffff81bb7300 T psm_set_boot_states
+ffffffff81bb73d0 T psm_set_performance_states
+ffffffff81bb74a0 T psm_set_user_performance_state
+ffffffff81bb7530 T psm_adjust_power_state_dynamic
+ffffffff81bb8000 T atomctrl_initialize_mc_reg_table
+ffffffff81bb8220 T atomctrl_set_engine_dram_timings_rv770
+ffffffff81bb8280 T atomctrl_get_memory_pll_dividers_si
+ffffffff81bb8370 T atomctrl_get_memory_pll_dividers_vi
+ffffffff81bb83e0 T atomctrl_get_memory_pll_dividers_ai
+ffffffff81bb8490 T atomctrl_get_engine_pll_dividers_kong
+ffffffff81bb8510 T atomctrl_get_engine_pll_dividers_vi
+ffffffff81bb85d0 T atomctrl_get_engine_pll_dividers_ai
+ffffffff81bb86b0 T atomctrl_get_dfs_pll_dividers_vi
+ffffffff81bb8770 T atomctrl_get_reference_clock
+ffffffff81bb87d0 T atomctrl_is_voltage_controlled_by_gpio_v3
+ffffffff81bb8880 T atomctrl_get_voltage_table_v3
+ffffffff81bb89d0 T atomctrl_get_pp_assign_pin
+ffffffff81bb8ac0 T atomctrl_calculate_voltage_evv_on_sclk
+ffffffff81bb90c0 T atomctrl_get_voltage_evv_on_sclk
+ffffffff81bb9140 T atomctrl_get_voltage_evv
+ffffffff81bb91f0 T atomctrl_get_mpll_reference_clock
+ffffffff81bb9260 T atomctrl_get_memory_clock_spread_spectrum
+ffffffff81bb9280 t asic_internal_ss_get_ss_asignment
+ffffffff81bb9390 T atomctrl_get_engine_clock_spread_spectrum
+ffffffff81bb93b0 T atomctrl_read_efuse
+ffffffff81bb9440 T atomctrl_set_ac_timing_ai
+ffffffff81bb94a0 T atomctrl_get_voltage_evv_on_sclk_ai
+ffffffff81bb9510 T atomctrl_get_smc_sclk_range_table
+ffffffff81bb95d0 T atomctrl_get_avfs_information
+ffffffff81bb9750 T atomctrl_get_svi2_info
+ffffffff81bb9840 T atomctrl_get_leakage_id_from_efuse
+ffffffff81bb98a0 T atomctrl_get_leakage_vddc_base_on_leakage
+ffffffff81bb9a40 T atomctrl_get_voltage_range
+ffffffff81bba000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4
+ffffffff81bba0d0 T pp_atomfwctrl_get_voltage_table_v4
+ffffffff81bba280 T pp_atomfwctrl_get_pp_assign_pin
+ffffffff81bba360 T pp_atomfwctrl_enter_self_refresh
+ffffffff81bba390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10
+ffffffff81bba430 T pp_atomfwctrl_get_avfs_information
+ffffffff81bba760 T pp_atomfwctrl_get_gpio_information
+ffffffff81bba800 T pp_atomfwctrl_get_clk_information_by_clkid
+ffffffff81bba880 T pp_atomfwctrl_get_vbios_bootup_values
+ffffffff81bbabb0 T pp_atomfwctrl_get_smc_dpm_information
+ffffffff81bbb000 T encode_pcie_lane_width
+ffffffff81bbb030 T decode_pcie_lane_width
+ffffffff81bbc000 t pp_tables_v1_0_initialize
+ffffffff81bbd360 t pp_tables_v1_0_uninitialize
+ffffffff81bbd500 T get_number_of_powerplay_table_entries_v1_0
+ffffffff81bbd5b0 T get_powerplay_table_entry_v1_0
+ffffffff81bbe000 T pp_tables_get_response_times
+ffffffff81bbe0d0 T pp_tables_get_num_of_entries
+ffffffff81bbe190 T pp_tables_get_entry
+ffffffff81bbe4c0 t init_non_clock_fields
+ffffffff81bbe630 t pp_tables_initialize
+ffffffff81bbfa50 t pp_tables_uninitialize
+ffffffff81bbfc50 t get_number_of_vce_state_table_entries
+ffffffff81bbfd50 t get_vce_state_table_entry
+ffffffff81bc0000 T smu10_init_function_pointers
+ffffffff81bc0040 t smu10_hwmgr_backend_init
+ffffffff81bc0720 t smu10_hwmgr_backend_fini
+ffffffff81bc0850 t smu10_setup_asic_task
+ffffffff81bc08b0 t smu10_get_power_state_size
+ffffffff81bc08e0 t smu10_apply_state_adjust_rules
+ffffffff81bc0910 t smu10_dpm_force_dpm_level
+ffffffff81bc0be0 t smu10_enable_dpm_tasks
+ffffffff81bc0c10 t smu10_disable_dpm_tasks
+ffffffff81bc0c40 t smu10_dpm_patch_boot_state
+ffffffff81bc0c70 t smu10_dpm_get_pp_table_entry
+ffffffff81bc0cc0 t smu10_dpm_get_num_of_pp_table_entries
+ffffffff81bc0d10 t smu10_powergate_vcn
+ffffffff81bc0d70 t smu10_dpm_get_mclk
+ffffffff81bc0dc0 t smu10_dpm_get_sclk
+ffffffff81bc0e10 t smu10_set_power_state_tasks
+ffffffff81bc0e80 t smu10_set_cpu_power_state
+ffffffff81bc0eb0 t smu10_store_cc6_data
+ffffffff81bc0f30 t smu10_get_dal_power_level
+ffffffff81bc0f60 t smu10_get_performance_level
+ffffffff81bc0ff0 t smu10_get_current_shallow_sleep_clocks
+ffffffff81bc1050 t smu10_get_clock_by_type_with_latency
+ffffffff81bc11a0 t smu10_get_clock_by_type_with_voltage
+ffffffff81bc1290 t smu10_set_watermarks_for_clocks_ranges
+ffffffff81bc1300 t smu10_display_clock_voltage_request
+ffffffff81bc13a0 t smu10_get_max_high_clocks
+ffffffff81bc13d0 t smu10_gfx_off_control
+ffffffff81bc1490 t smu10_power_off_asic
+ffffffff81bc14e0 t smu10_force_clock_level
+ffffffff81bc1690 t smu10_print_clock_levels
+ffffffff81bc16e0 t smu10_read_sensor
+ffffffff81bc17a0 t smu10_set_active_display_count
+ffffffff81bc17f0 t smu10_set_deep_sleep_dcefclk
+ffffffff81bc1860 t smu10_powergate_mmhub
+ffffffff81bc1880 t smu10_smus_notify_pwe
+ffffffff81bc18a0 t smu10_dpm_get_pp_table_entry_callback
+ffffffff81bc2000 T smu7_powerdown_uvd
+ffffffff81bc2050 T smu7_disable_clock_power_gating
+ffffffff81bc20e0 T smu7_powergate_uvd
+ffffffff81bc21f0 T smu7_powergate_vce
+ffffffff81bc22d0 T smu7_update_clock_gatings
+ffffffff81bc2670 T smu7_powergate_gfx
+ffffffff81bc3000 T smu7_disable_dpm_tasks
+ffffffff81bc3600 t smu7_avfs_control
+ffffffff81bc36d0 T smu7_reset_asic_tasks
+ffffffff81bc3700 T smu7_get_sleep_divider_id_from_clock
+ffffffff81bc37a0 T smu7_init_function_pointers
+ffffffff81bc3800 t smu7_set_dpm_event_sources
+ffffffff81bc3920 t smu7_copy_and_switch_arb_sets
+ffffffff81bc3b60 t smu7_hwmgr_backend_init
+ffffffff81bc58b0 t smu7_hwmgr_backend_fini
+ffffffff81bc5920 t smu7_setup_asic_task
+ffffffff81bc5c60 t smu7_get_power_state_size
+ffffffff81bc5c90 t smu7_apply_state_adjust_rules
+ffffffff81bc5f40 t smu7_force_dpm_level
+ffffffff81bc63b0 t smu7_enable_dpm_tasks
+ffffffff81bc85e0 t smu7_dpm_patch_boot_state
+ffffffff81bc8720 t smu7_get_pp_table_entry
+ffffffff81bc8b40 t smu7_get_number_of_powerplay_table_entries
+ffffffff81bc8ba0 t smu7_dpm_get_mclk
+ffffffff81bc8c30 t smu7_dpm_get_sclk
+ffffffff81bc8cc0 t smu7_set_power_state_tasks
+ffffffff81bc99f0 t smu7_notify_smc_display_config_after_ps_adjustment
+ffffffff81bc9a40 t smu7_display_configuration_changed_task
+ffffffff81bc9c00 t smu7_set_max_fan_rpm_output
+ffffffff81bc9c30 t smu7_set_max_fan_pwm_output
+ffffffff81bc9c50 t smu7_set_fan_control_mode
+ffffffff81bc9ce0 t smu7_get_fan_control_mode
+ffffffff81bc9d20 t smu7_register_irq_handlers
+ffffffff81bc9dc0 t smu7_check_smc_update_required_for_display_configuration
+ffffffff81bc9e50 t smu7_check_states_equal
+ffffffff81bca000 t smu7_get_clock_by_type
+ffffffff81bca1e0 t smu7_get_max_high_clocks
+ffffffff81bca260 t smu7_force_clock_level
+ffffffff81bca360 t smu7_print_clock_levels
+ffffffff81bca3b0 t smu7_get_sclk_od
+ffffffff81bca410 t smu7_set_sclk_od
+ffffffff81bca4c0 t smu7_get_mclk_od
+ffffffff81bca520 t smu7_set_mclk_od
+ffffffff81bca5d0 t smu7_read_sensor
+ffffffff81bca880 t smu7_notify_cac_buffer_info
+ffffffff81bcaa20 t smu7_get_thermal_temperature_range
+ffffffff81bcaa90 t smu7_get_power_profile_mode
+ffffffff81bcaae0 t smu7_set_power_profile_mode
+ffffffff81bcacf0 t smu7_odn_edit_dpm_table
+ffffffff81bcaea0 t phm_add_voltage
+ffffffff81bcafb0 t smu7_get_profiling_clk
+ffffffff81bcb170 t smu7_check_dpm_table_updated
+ffffffff81bcb2b0 t smu7_odn_initial_default_setting
+ffffffff81bcb3d0 t get_pcie_lane_support
+ffffffff81bcb660 t smu7_get_pp_table_entry_callback_func_v0
+ffffffff81bcb810 t smu7_get_pp_table_entry_callback_func_v1
+ffffffff81bcc000 T smu7_enable_didt_config
+ffffffff81bcc2c0 t smu7_program_pt_config_registers
+ffffffff81bcc4c0 t smu7_enable_didt
+ffffffff81bcc690 T smu7_disable_didt_config
+ffffffff81bcc850 T smu7_enable_smc_cac
+ffffffff81bcc8d0 T smu7_disable_smc_cac
+ffffffff81bcc950 T smu7_set_power_limit
+ffffffff81bcc9a0 T smu7_enable_power_containment
+ffffffff81bccb10 T smu7_disable_power_containment
+ffffffff81bccc30 T smu7_power_control_set_level
+ffffffff81bcd000 T smu7_fan_ctrl_get_fan_speed_info
+ffffffff81bcd080 T smu7_fan_ctrl_get_fan_speed_percent
+ffffffff81bcd140 T smu7_fan_ctrl_get_fan_speed_rpm
+ffffffff81bcd1f0 T smu7_fan_ctrl_set_static_mode
+ffffffff81bcd320 T smu7_fan_ctrl_set_default_mode
+ffffffff81bcd400 T smu7_fan_ctrl_start_smc_fan_control
+ffffffff81bcd500 T smu7_fan_ctrl_stop_smc_fan_control
+ffffffff81bcd520 T smu7_fan_ctrl_set_fan_speed_percent
+ffffffff81bcd700 T smu7_fan_ctrl_reset_fan_speed_to_default
+ffffffff81bcd8e0 T smu7_fan_ctrl_set_fan_speed_rpm
+ffffffff81bcdab0 T smu7_thermal_get_temperature
+ffffffff81bcdb10 T smu7_thermal_disable_alert
+ffffffff81bcdbb0 T smu7_thermal_stop_thermal_controller
+ffffffff81bcdd20 T smu7_start_thermal_controller
+ffffffff81bce0d0 T smu7_thermal_ctrl_uninitialize_thermal_controller
+ffffffff81bcf000 T smu8_dpm_update_uvd_dpm
+ffffffff81bcf100 T smu8_init_function_pointers
+ffffffff81bcf140 t smu8_hwmgr_backend_init
+ffffffff81bcf640 t smu8_hwmgr_backend_fini
+ffffffff81bcf6b0 t smu8_setup_asic_task
+ffffffff81bcfbb0 t smu8_get_power_state_size
+ffffffff81bcfbe0 t smu8_apply_state_adjust_rules
+ffffffff81bcfd20 t smu8_dpm_force_dpm_level
+ffffffff81bd0010 t smu8_enable_dpm_tasks
+ffffffff81bd0140 t smu8_disable_dpm_tasks
+ffffffff81bd0210 t smu8_dpm_patch_boot_state
+ffffffff81bd0270 t smu8_dpm_get_pp_table_entry
+ffffffff81bd02c0 t smu8_dpm_get_num_of_pp_table_entries
+ffffffff81bd0310 t smu8_dpm_powerdown_uvd
+ffffffff81bd0350 t smu8_dpm_powergate_vce
+ffffffff81bd0520 t smu8_dpm_powergate_uvd
+ffffffff81bd0620 t smu8_dpm_get_mclk
+ffffffff81bd0650 t smu8_dpm_get_sclk
+ffffffff81bd06c0 t smu8_set_power_state_tasks
+ffffffff81bd09c0 t smu8_set_cpu_power_state
+ffffffff81bd0a30 t smu8_store_cc6_data
+ffffffff81bd0ac0 t smu8_get_dal_power_level
+ffffffff81bd0b30 t smu8_get_performance_level
+ffffffff81bd0c30 t smu8_get_current_shallow_sleep_clocks
+ffffffff81bd0c90 t smu8_get_clock_by_type
+ffffffff81bd0df0 t smu8_get_max_high_clocks
+ffffffff81bd0eb0 t smu8_power_off_asic
+ffffffff81bd0f20 t smu8_force_clock_level
+ffffffff81bd0f80 t smu8_print_clock_levels
+ffffffff81bd0fd0 t smu8_read_sensor
+ffffffff81bd12d0 t smu8_notify_cac_buffer_info
+ffffffff81bd1380 t smu8_get_thermal_temperature_range
+ffffffff81bd13d0 t smu8_dpm_get_pp_table_entry_callback
+ffffffff81bd2000 T convert_to_vid
+ffffffff81bd2050 T convert_to_vddc
+ffffffff81bd2090 T phm_set_field_to_u32
+ffffffff81bd20f0 T phm_wait_on_register
+ffffffff81bd2200 T phm_wait_on_indirect_register
+ffffffff81bd2340 T phm_wait_for_register_unequal
+ffffffff81bd2450 T phm_wait_for_indirect_register_unequal
+ffffffff81bd2580 T phm_cf_want_uvd_power_gating
+ffffffff81bd25b0 T phm_cf_want_vce_power_gating
+ffffffff81bd25e0 T phm_trim_voltage_table
+ffffffff81bd2710 T phm_get_svi2_mvdd_voltage_table
+ffffffff81bd28a0 T phm_get_svi2_vddci_voltage_table
+ffffffff81bd2a30 T phm_get_svi2_vdd_voltage_table
+ffffffff81bd2ae0 T phm_trim_voltage_table_to_fit_state_table
+ffffffff81bd2be0 T phm_reset_single_dpm_table
+ffffffff81bd2c40 T phm_setup_pcie_table_entry
+ffffffff81bd2c80 T phm_get_dpm_level_enable_mask_value
+ffffffff81bd2d50 T phm_get_voltage_index
+ffffffff81bd2de0 T phm_get_voltage_id
+ffffffff81bd2e60 T phm_find_closest_vddci
+ffffffff81bd2ec0 T phm_find_boot_level
+ffffffff81bd2f30 T phm_get_sclk_for_voltage_evv
+ffffffff81bd2fe0 T phm_initializa_dynamic_state_adjustment_rule_settings
+ffffffff81bd30a0 T phm_get_lowest_enabled_level
+ffffffff81bd30e0 T phm_apply_dal_min_voltage_request
+ffffffff81bd31c0 T phm_get_voltage_evv_on_sclk
+ffffffff81bd3260 T phm_irq_process
+ffffffff81bd3350 T smu9_register_irq_handlers
+ffffffff81bd3400 T smu_atom_get_data_table
+ffffffff81bd3470 T smu_get_voltage_dependency_table_ppt_v1
+ffffffff81bd3550 T smu_set_watermarks_for_clocks_ranges
+ffffffff81bd4000 T cast_phw_vega10_power_state
+ffffffff81bd4060 T cast_const_phw_vega10_power_state
+ffffffff81bd40c0 T vega10_enable_disable_vce_dpm
+ffffffff81bd4150 T vega10_enable_smc_features
+ffffffff81bd4170 T vega10_display_clock_voltage_request
+ffffffff81bd41f0 T vega10_enable_disable_uvd_dpm
+ffffffff81bd4280 T vega10_hwmgr_init
+ffffffff81bd42c0 t vega10_hwmgr_backend_init
+ffffffff81bd50e0 t vega10_hwmgr_backend_fini
+ffffffff81bd5150 t vega10_setup_asic_task
+ffffffff81bd5280 t vega10_get_power_state_size
+ffffffff81bd52b0 t vega10_apply_state_adjust_rules
+ffffffff81bd5600 t vega10_dpm_force_dpm_level
+ffffffff81bd5b30 t vega10_enable_dpm_tasks
+ffffffff81bd82e0 t vega10_disable_dpm_tasks
+ffffffff81bd88d0 t vega10_patch_boot_state
+ffffffff81bd8900 t vega10_get_pp_table_entry
+ffffffff81bd8960 t vega10_power_gate_vce
+ffffffff81bd8a00 t vega10_power_gate_uvd
+ffffffff81bd8aa0 t vega10_dpm_get_mclk
+ffffffff81bd8b30 t vega10_dpm_get_sclk
+ffffffff81bd8bc0 t vega10_set_power_state_tasks
+ffffffff81bd9430 t vega10_notify_smc_display_config_after_ps_adjustment
+ffffffff81bd95d0 t vega10_display_configuration_changed_task
+ffffffff81bd9690 t vega10_set_fan_control_mode
+ffffffff81bd9700 t vega10_get_fan_control_mode
+ffffffff81bd9740 t vega10_check_smc_update_required_for_display_configuration
+ffffffff81bd97a0 t vega10_check_states_equal
+ffffffff81bd9920 t vega10_get_dal_power_level
+ffffffff81bd9960 t vega10_get_clock_by_type_with_latency
+ffffffff81bd9b80 t vega10_get_clock_by_type_with_voltage
+ffffffff81bd9c60 t vega10_set_watermarks_for_clocks_ranges
+ffffffff81bd9cc0 t vega10_power_off_asic
+ffffffff81bd9d30 t vega10_force_clock_level
+ffffffff81bd9e90 t vega10_print_clock_levels
+ffffffff81bd9ee0 t vega10_get_sclk_od
+ffffffff81bd9f40 t vega10_set_sclk_od
+ffffffff81bda030 t vega10_get_mclk_od
+ffffffff81bda090 t vega10_set_mclk_od
+ffffffff81bda140 t vega10_read_sensor
+ffffffff81bda2f0 t vega10_avfs_enable
+ffffffff81bda3b0 t vega10_notify_cac_buffer_info
+ffffffff81bda450 t vega10_get_thermal_temperature_range
+ffffffff81bda4a0 t vega10_get_power_profile_mode
+ffffffff81bda4f0 t vega10_set_power_profile_mode
+ffffffff81bda5d0 t vega10_odn_edit_dpm_table
+ffffffff81bdab30 t vega10_upload_dpm_bootup_level
+ffffffff81bdac00 t vega10_upload_dpm_max_level
+ffffffff81bdacb0 t vega10_trim_voltage_table_to_fit_state_table
+ffffffff81bdadb0 t vega10_odn_initial_default_setting
+ffffffff81bdaf80 t vega10_populate_all_graphic_levels
+ffffffff81bdb180 t vega10_populate_all_memory_levels
+ffffffff81bdb2f0 t vega10_populate_single_gfx_level
+ffffffff81bdb450 t vega10_populate_single_soc_level
+ffffffff81bdb5b0 t vega10_populate_single_memory_level
+ffffffff81bdb730 t vega10_get_pp_table_entry_callback_func
+ffffffff81bdc000 T vega10_enable_didt_config
+ffffffff81bdd6f0 T vega10_disable_didt_config
+ffffffff81bdd980 T vega10_initialize_power_tune_defaults
+ffffffff81bddab0 T vega10_set_power_limit
+ffffffff81bddb00 T vega10_enable_power_containment
+ffffffff81bddc10 T vega10_disable_power_containment
+ffffffff81bddce0 T vega10_power_control_set_level
+ffffffff81bddd40 t vega10_didt_set_mask
+ffffffff81bdf000 T vega10_pp_tables_initialize
+ffffffff81be0850 t vega10_pp_tables_uninitialize
+ffffffff81be0a00 T vega10_get_number_of_powerplay_table_entries
+ffffffff81be0ab0 T vega10_get_powerplay_table_entry
+ffffffff81be1000 T vega10_fan_ctrl_get_fan_speed_info
+ffffffff81be1080 T vega10_fan_ctrl_get_fan_speed_percent
+ffffffff81be1110 T vega10_fan_ctrl_get_fan_speed_rpm
+ffffffff81be11d0 T vega10_fan_ctrl_set_static_mode
+ffffffff81be12e0 T vega10_fan_ctrl_set_default_mode
+ffffffff81be13b0 T vega10_fan_ctrl_start_smc_fan_control
+ffffffff81be1470 T vega10_fan_ctrl_stop_smc_fan_control
+ffffffff81be1530 T vega10_fan_ctrl_set_fan_speed_percent
+ffffffff81be1670 T vega10_fan_ctrl_reset_fan_speed_to_default
+ffffffff81be1730 T vega10_fan_ctrl_set_fan_speed_rpm
+ffffffff81be1870 T vega10_thermal_get_temperature
+ffffffff81be18c0 T vega10_thermal_disable_alert
+ffffffff81be1980 T vega10_thermal_stop_thermal_controller
+ffffffff81be1a60 T vega10_thermal_setup_fan_table
+ffffffff81be1c00 T vega10_thermal_start_smc_fan_control
+ffffffff81be1ca0 T vega10_start_thermal_controller
+ffffffff81be1f40 T vega10_thermal_ctrl_uninitialize_thermal_controller
+ffffffff81be2000 T vega12_enable_disable_vce_dpm
+ffffffff81be2090 T vega12_display_clock_voltage_request
+ffffffff81be2110 T vega12_enable_disable_uvd_dpm
+ffffffff81be21a0 T vega12_hwmgr_init
+ffffffff81be21e0 t vega12_hwmgr_backend_init
+ffffffff81be2a00 t vega12_hwmgr_backend_fini
+ffffffff81be2a50 t vega12_setup_asic_task
+ffffffff81be2a90 t vega12_apply_clocks_adjust_rules
+ffffffff81be2f00 t vega12_dpm_force_dpm_level
+ffffffff81be3350 t vega12_enable_dpm_tasks
+ffffffff81be3bd0 t vega12_disable_dpm_tasks
+ffffffff81be3cc0 t vega12_patch_boot_state
+ffffffff81be3cf0 t vega12_power_gate_vce
+ffffffff81be3d90 t vega12_power_gate_uvd
+ffffffff81be3e30 t vega12_dpm_get_mclk
+ffffffff81be3e80 t vega12_dpm_get_sclk
+ffffffff81be3ed0 t vega12_notify_smc_display_config_after_ps_adjustment
+ffffffff81be4020 t vega12_pre_display_configuration_changed_task
+ffffffff81be4110 t vega12_display_configuration_changed_task
+ffffffff81be41f0 t vega12_set_fan_control_mode
+ffffffff81be4250 t vega12_get_fan_control_mode
+ffffffff81be4290 t vega12_check_smc_update_required_for_display_configuration
+ffffffff81be42f0 t vega12_get_dal_power_level
+ffffffff81be4320 t vega12_get_clock_by_type_with_latency
+ffffffff81be4630 t vega12_get_clock_by_type_with_voltage
+ffffffff81be4660 t vega12_set_watermarks_for_clocks_ranges
+ffffffff81be46e0 t vega12_power_off_asic
+ffffffff81be47e0 t vega12_force_clock_level
+ffffffff81be4940 t vega12_print_clock_levels
+ffffffff81be4990 t vega12_gfx_off_control
+ffffffff81be49f0 t vega12_read_sensor
+ffffffff81be4b30 t vega12_notify_cac_buffer_info
+ffffffff81be4bd0 t vega12_get_thermal_temperature_range
+ffffffff81be4c20 t vega12_upload_dpm_min_level
+ffffffff81be4e30 t vega12_upload_dpm_max_level
+ffffffff81be5010 t vega12_setup_single_dpm_table
+ffffffff81be6000 T vega12_pp_tables_initialize
+ffffffff81be67c0 t vega12_pp_tables_uninitialize
+ffffffff81be7000 T vega12_fan_ctrl_get_fan_speed_info
+ffffffff81be7040 T vega12_fan_ctrl_get_fan_speed_rpm
+ffffffff81be70c0 T vega12_fan_ctrl_start_smc_fan_control
+ffffffff81be70f0 T vega12_fan_ctrl_stop_smc_fan_control
+ffffffff81be7120 T vega12_fan_ctrl_reset_fan_speed_to_default
+ffffffff81be7150 T vega12_thermal_get_temperature
+ffffffff81be71a0 T vega12_thermal_disable_alert
+ffffffff81be71f0 T vega12_thermal_stop_thermal_controller
+ffffffff81be7240 T vega12_thermal_setup_fan_table
+ffffffff81be7260 T vega12_thermal_start_smc_fan_control
+ffffffff81be7290 T vega12_start_thermal_controller
+ffffffff81be8000 T ci_is_smc_ram_running
+ffffffff81be8080 t ci_smu_init
+ffffffff81be80e0 t ci_smu_fini
+ffffffff81be8130 t ci_start_smu
+ffffffff81be8160 t ci_send_msg_to_smc
+ffffffff81be8200 t ci_send_msg_to_smc_with_parameter
+ffffffff81be82b0 t ci_update_smc_table
+ffffffff81be8590 t ci_process_firmware_header
+ffffffff81be8ae0 t ci_update_sclk_threshold
+ffffffff81be8d30 t ci_thermal_setup_fan_table
+ffffffff81be8fa0 t ci_init_smc_table
+ffffffff81beaa00 t ci_populate_all_graphic_levels
+ffffffff81beaee0 t ci_populate_all_memory_levels
+ffffffff81beb790 t ci_initialize_mc_reg_table
+ffffffff81bec3b0 t ci_get_offsetof
+ffffffff81bec400 t ci_get_mac_definition
+ffffffff81bec440 t ci_is_dpm_running
+ffffffff81bec4c0 t ci_update_dpm_settings
+ffffffff81bec890 t ci_copy_bytes_to_smc
+ffffffff81becb70 t ci_program_memory_timing_parameters
+ffffffff81becd50 t ci_populate_smc_voltage_table
+ffffffff81bed000 t fiji_smu_init
+ffffffff81bed090 t fiji_start_smu
+ffffffff81bed610 t fiji_update_smc_table
+ffffffff81bed7c0 t fiji_process_firmware_header
+ffffffff81bed900 t fiji_update_sclk_threshold
+ffffffff81bed9d0 t fiji_thermal_setup_fan_table
+ffffffff81bedc60 t fiji_thermal_avfs_enable
+ffffffff81bedca0 t fiji_init_smc_table
+ffffffff81bef6b0 t fiji_populate_all_graphic_levels
+ffffffff81befc20 t fiji_populate_all_memory_levels
+ffffffff81bf0020 t fiji_initialize_mc_reg_table
+ffffffff81bf01c0 t fiji_get_offsetof
+ffffffff81bf0240 t fiji_get_mac_definition
+ffffffff81bf0290 t fiji_is_dpm_running
+ffffffff81bf02e0 t fiji_is_hw_avfs_present
+ffffffff81bf0350 t fiji_update_dpm_settings
+ffffffff81bf0720 t fiji_program_memory_timing_parameters
+ffffffff81bf0900 t fiji_get_dependency_volt_by_clk
+ffffffff81bf1000 T iceland_thermal_setup_fan_table
+ffffffff81bf1270 t iceland_smu_init
+ffffffff81bf1300 t iceland_start_smu
+ffffffff81bf14b0 t iceland_request_smu_load_specific_fw
+ffffffff81bf14e0 t iceland_process_firmware_header
+ffffffff81bf1640 t iceland_update_sclk_threshold
+ffffffff81bf1890 t iceland_init_smc_table
+ffffffff81bf2b00 t iceland_populate_all_graphic_levels
+ffffffff81bf3090 t iceland_populate_all_memory_levels
+ffffffff81bf3920 t iceland_initialize_mc_reg_table
+ffffffff81bf4540 t iceland_get_offsetof
+ffffffff81bf45c0 t iceland_get_mac_definition
+ffffffff81bf4620 t iceland_is_dpm_running
+ffffffff81bf4670 t iceland_smu_upload_firmware_image
+ffffffff81bf4940 t iceland_program_memory_timing_parameters
+ffffffff81bf4b20 t iceland_populate_smc_voltage_table
+ffffffff81bf5000 T polaris10_thermal_avfs_enable
+ffffffff81bf5080 t polaris10_smu_init
+ffffffff81bf5110 t polaris10_start_smu
+ffffffff81bf56f0 t polaris10_update_smc_table
+ffffffff81bf5960 t polaris10_process_firmware_header
+ffffffff81bf5aa0 t polaris10_update_sclk_threshold
+ffffffff81bf5b90 t polaris10_thermal_setup_fan_table
+ffffffff81bf5e30 t polaris10_init_smc_table
+ffffffff81bf7840 t polaris10_populate_all_graphic_levels
+ffffffff81bf7eb0 t polaris10_populate_all_memory_levels
+ffffffff81bf8180 t polaris10_get_offsetof
+ffffffff81bf8200 t polaris10_get_mac_definition
+ffffffff81bf8250 t polaris10_is_dpm_running
+ffffffff81bf82a0 t polaris10_is_hw_avfs_present
+ffffffff81bf82f0 t polaris10_update_dpm_settings
+ffffffff81bf86c0 t polaris10_program_memory_timing_parameters
+ffffffff81bf8890 t polaris10_get_dependency_volt_by_clk
+ffffffff81bf8a60 t polaris10_calculate_sclk_params
+ffffffff81bf9000 t smu10_smu_init
+ffffffff81bf9120 t smu10_smu_fini
+ffffffff81bf91c0 t smu10_start_smu
+ffffffff81bf92a0 t smu10_read_arg_from_smc
+ffffffff81bf92c0 t smu10_send_msg_to_smc
+ffffffff81bf93c0 t smu10_send_msg_to_smc_with_parameter
+ffffffff81bf94e0 t smu10_smc_table_manager
+ffffffff81bfa000 T smu7_copy_bytes_from_smc
+ffffffff81bfa260 T smu7_read_smc_sram_dword
+ffffffff81bfa360 T smu7_copy_bytes_to_smc
+ffffffff81bfa670 T smu7_program_jump_on_start
+ffffffff81bfa6c0 T smu7_is_smc_ram_running
+ffffffff81bfa740 T smu7_send_msg_to_smc
+ffffffff81bfa800 T smu7_send_msg_to_smc_without_waiting
+ffffffff81bfa850 T smu7_send_msg_to_smc_with_parameter
+ffffffff81bfa940 T smu7_send_msg_to_smc_with_parameter_without_waiting
+ffffffff81bfa9b0 T smu7_send_msg_to_smc_offset
+ffffffff81bfaa40 T smu7_convert_fw_type_to_cgs
+ffffffff81bfab10 T smu7_write_smc_sram_dword
+ffffffff81bfac00 T smu7_request_smu_load_fw
+ffffffff81bfb860 T smu7_check_fw_load_finish
+ffffffff81bfb8d0 T smu7_reload_firmware
+ffffffff81bfb8f0 T smu7_upload_smu_firmware_image
+ffffffff81bfbac0 T smu7_setup_pwr_virus
+ffffffff81bfbe70 T smu7_init
+ffffffff81bfbf70 T smu7_smu_fini
+ffffffff81bfd000 t smu8_smu_init
+ffffffff81bfd2b0 t smu8_smu_fini
+ffffffff81bfd340 t smu8_start_smu
+ffffffff81bfe370 t smu8_check_fw_load_finish
+ffffffff81bfe450 t smu8_get_argument
+ffffffff81bfe4a0 t smu8_send_msg_to_smc
+ffffffff81bfe570 t smu8_send_msg_to_smc_with_parameter
+ffffffff81bfe660 t smu8_download_pptable_settings
+ffffffff81bfe7a0 t smu8_upload_pptable_settings
+ffffffff81bfe8e0 t smu8_is_dpm_running
+ffffffff81bff000 T smu9_is_smc_ram_running
+ffffffff81bff060 T smu9_send_msg_to_smc
+ffffffff81bff190 T smu9_send_msg_to_smc_with_parameter
+ffffffff81bff2e0 T smu9_get_argument
+ffffffff81c00000 T smum_thermal_avfs_enable
+ffffffff81c00040 T smum_thermal_setup_fan_table
+ffffffff81c00080 T smum_update_sclk_threshold
+ffffffff81c000c0 T smum_update_smc_table
+ffffffff81c00100 T smum_get_offsetof
+ffffffff81c00150 T smum_process_firmware_header
+ffffffff81c00190 T smum_get_argument
+ffffffff81c001d0 T smum_get_mac_definition
+ffffffff81c00210 T smum_download_powerplay_table
+ffffffff81c00250 T smum_upload_powerplay_table
+ffffffff81c00290 T smum_send_msg_to_smc
+ffffffff81c002e0 T smum_send_msg_to_smc_with_parameter
+ffffffff81c00330 T smum_init_smc_table
+ffffffff81c00370 T smum_populate_all_graphic_levels
+ffffffff81c003b0 T smum_populate_all_memory_levels
+ffffffff81c003f0 T smum_initialize_mc_reg_table
+ffffffff81c00430 T smum_is_dpm_running
+ffffffff81c00470 T smum_is_hw_avfs_present
+ffffffff81c004b0 T smum_update_dpm_settings
+ffffffff81c004f0 T smum_smc_table_manager
+ffffffff81c01000 T tonga_populate_all_memory_levels
+ffffffff81c017c0 t tonga_smu_init
+ffffffff81c01850 t tonga_start_smu
+ffffffff81c01ba0 t tonga_update_smc_table
+ffffffff81c01d40 t tonga_process_firmware_header
+ffffffff81c01e80 t tonga_update_sclk_threshold
+ffffffff81c020d0 t tonga_thermal_setup_fan_table
+ffffffff81c02340 t tonga_init_smc_table
+ffffffff81c041e0 t tonga_populate_all_graphic_levels
+ffffffff81c04770 t tonga_initialize_mc_reg_table
+ffffffff81c05390 t tonga_get_offsetof
+ffffffff81c05410 t tonga_get_mac_definition
+ffffffff81c05460 t tonga_is_dpm_running
+ffffffff81c054b0 t tonga_update_dpm_settings
+ffffffff81c05880 t tonga_get_dependency_volt_by_clk
+ffffffff81c05a00 t tonga_program_memory_timing_parameters
+ffffffff81c06000 t vega10_smu_init
+ffffffff81c06350 t vega10_smu_fini
+ffffffff81c06430 t vega10_start_smu
+ffffffff81c06550 t vega10_is_dpm_running
+ffffffff81c065a0 t vega10_smc_table_manager
+ffffffff81c07000 T vega12_copy_table_from_smc
+ffffffff81c07140 T vega12_copy_table_to_smc
+ffffffff81c07280 T vega12_enable_smc_features
+ffffffff81c07370 T vega12_get_enabled_smc_features
+ffffffff81c07430 t vega12_smu_init
+ffffffff81c07740 t vega12_smu_fini
+ffffffff81c07820 t vega12_start_smu
+ffffffff81c078c0 t vega12_is_dpm_running
+ffffffff81c08000 T vegam_thermal_avfs_enable
+ffffffff81c08090 t vegam_smu_init
+ffffffff81c08120 t vegam_start_smu
+ffffffff81c084f0 t vegam_update_smc_table
+ffffffff81c08760 t vegam_process_firmware_header
+ffffffff81c088a0 t vegam_update_sclk_threshold
+ffffffff81c08990 t vegam_thermal_setup_fan_table
+ffffffff81c089f0 t vegam_init_smc_table
+ffffffff81c0a350 t vegam_populate_all_graphic_levels
+ffffffff81c0aae0 t vegam_populate_all_memory_levels
+ffffffff81c0ae40 t vegam_get_offsetof
+ffffffff81c0aec0 t vegam_get_mac_definition
+ffffffff81c0af10 t vegam_is_dpm_running
+ffffffff81c0af60 t vegam_is_hw_avfs_present
+ffffffff81c0afb0 t vegam_program_memory_timing_parameters
+ffffffff81c0b1d0 t vegam_get_dependency_volt_by_clk
+ffffffff81c0b3b0 t vegam_calculate_sclk_params
+ffffffff81c0c000 T amdgpu_dm_connector_atomic_set_property
+ffffffff81c0c0a0 T amdgpu_dm_connector_atomic_get_property
+ffffffff81c0c140 T amdgpu_dm_connector_funcs_reset
+ffffffff81c0c1e0 T amdgpu_dm_connector_atomic_duplicate_state
+ffffffff81c0c270 T amdgpu_dm_connector_mode_valid
+ffffffff81c0c440 t create_stream_for_sink
+ffffffff81c0caf0 t dm_encoder_helper_disable
+ffffffff81c0cb20 t dm_encoder_helper_atomic_check
+ffffffff81c0cb50 T dm_drm_plane_destroy_state
+ffffffff81c0cb90 T amdgpu_dm_connector_init_helper
+ffffffff81c0ccd0 T amdgpu_dm_get_encoder_crtc_mask
+ffffffff81c0cd10 T dm_restore_drm_connector_state
+ffffffff81c0ce60 T amdgpu_dm_add_sink_to_freesync_module
+ffffffff81c0d080 T amdgpu_dm_remove_sink_from_freesync_module
+ffffffff81c0d0b0 t dm_early_init
+ffffffff81c0d170 t dm_late_init
+ffffffff81c0d250 t dm_sw_init
+ffffffff81c0d4d0 t dm_sw_fini
+ffffffff81c0d550 t dm_hw_init
+ffffffff81c0e680 t dm_hw_fini
+ffffffff81c0e730 t dm_suspend
+ffffffff81c0e840 t dm_resume
+ffffffff81c0ec10 t dm_is_idle
+ffffffff81c0ec40 t dm_wait_for_idle
+ffffffff81c0ec70 t dm_check_soft_reset
+ffffffff81c0eca0 t dm_soft_reset
+ffffffff81c0ecd0 t dm_set_clockgating_state
+ffffffff81c0ed00 t dm_set_powergating_state
+ffffffff81c0ed30 t dm_bandwidth_update
+ffffffff81c0ed60 t dm_vblank_get_counter
+ffffffff81c0edd0 t dm_crtc_get_scanoutpos
+ffffffff81c0ee90 t amdgpu_notify_freesync
+ffffffff81c0ef50 t hotplug_notify_work_func
+ffffffff81c0ef70 t emulated_link_detect
+ffffffff81c0f060 t amdgpu_dm_update_connector_after_detect
+ffffffff81c0f1e0 t amdgpu_dm_atomic_check
+ffffffff81c0f6d0 t amdgpu_dm_atomic_commit
+ffffffff81c0f7f0 t dm_atomic_state_alloc
+ffffffff81c0f870 t dm_atomic_state_clear
+ffffffff81c0f8b0 t dm_atomic_state_alloc_free
+ffffffff81c0f8e0 t dm_update_planes_state
+ffffffff81c10110 t dm_update_crtcs_state
+ffffffff81c10610 t amdgpu_bo_reserve
+ffffffff81c10850 t amdgpu_bo_unreserve
+ffffffff81c10940 t amdgpu_dm_atomic_commit_tail
+ffffffff81c11cb0 t commit_planes_to_stream
+ffffffff81c12110 t amdgpu_dm_plane_init
+ffffffff81c12220 t dm_drm_plane_reset
+ffffffff81c122d0 t dm_drm_plane_duplicate_state
+ffffffff81c12360 t dm_plane_helper_prepare_fb
+ffffffff81c12530 t dm_plane_helper_cleanup_fb
+ffffffff81c125c0 t dm_plane_atomic_check
+ffffffff81c126e0 t dm_crtc_reset_state
+ffffffff81c127b0 t amdgpu_dm_crtc_destroy
+ffffffff81c127e0 t dm_crtc_duplicate_state
+ffffffff81c128a0 t dm_crtc_destroy_state
+ffffffff81c128e0 t dm_enable_vblank
+ffffffff81c12940 t dm_disable_vblank
+ffffffff81c12970 t dm_crtc_helper_mode_fixup
+ffffffff81c129a0 t dm_crtc_helper_disable
+ffffffff81c129d0 t dm_crtc_helper_atomic_check
+ffffffff81c12a80 t amdgpu_dm_encoder_destroy
+ffffffff81c12ab0 t amdgpu_dm_i2c_xfer
+ffffffff81c12be0 t amdgpu_dm_i2c_func
+ffffffff81c12c10 t amdgpu_dm_connector_detect
+ffffffff81c12c70 t amdgpu_dm_connector_destroy
+ffffffff81c12cf0 t get_modes
+ffffffff81c13020 t best_encoder
+ffffffff81c130a0 t amdgpu_dm_backlight_update_status
+ffffffff81c130f0 t amdgpu_dm_backlight_get_brightness
+ffffffff81c13140 t dm_crtc_high_irq
+ffffffff81c131f0 t dm_pflip_high_irq
+ffffffff81c13370 t handle_hpd_irq
+ffffffff81c13470 t handle_hpd_rx_irq
+ffffffff81c136d0 t fill_stream_properties_from_drm_display_mode
+ffffffff81c14000 T amdgpu_dm_init_color_mod
+ffffffff81c14010 T amdgpu_dm_set_regamma_lut
+ffffffff81c14160 t __drm_lut_to_dc_gamma
+ffffffff81c142d0 T amdgpu_dm_set_ctm
+ffffffff81c14380 T amdgpu_dm_set_degamma_lut
+ffffffff81c15000 T dm_helpers_parse_edid_caps
+ffffffff81c15380 T dm_helpers_dp_update_branch_info
+ffffffff81c153b0 T dm_helpers_dp_mst_write_payload_allocation_table
+ffffffff81c155b0 T dm_helpers_dp_mst_clear_payload_allocation_table
+ffffffff81c155e0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger
+ffffffff81c15650 T dm_helpers_dp_mst_send_payload_allocation
+ffffffff81c156f0 T dm_dtn_log_begin
+ffffffff81c15720 T dm_dtn_log_append_v
+ffffffff81c15750 T dm_dtn_log_end
+ffffffff81c15780 T dm_helpers_dp_mst_start_top_mgr
+ffffffff81c157f0 T dm_helpers_dp_mst_stop_top_mgr
+ffffffff81c15850 T dm_helpers_dp_read_dpcd
+ffffffff81c158d0 T dm_helpers_dp_write_dpcd
+ffffffff81c15950 T dm_helpers_submit_i2c
+ffffffff81c15a70 T dm_helpers_is_dp_sink_present
+ffffffff81c15b00 T dm_helpers_read_local_edid
+ffffffff81c15de0 T dm_set_dcn_clocks
+ffffffff81c16000 T amdgpu_dm_irq_register_interrupt
+ffffffff81c16170 T amdgpu_dm_irq_unregister_interrupt
+ffffffff81c16330 T amdgpu_dm_irq_init
+ffffffff81c16400 t dm_irq_work_func
+ffffffff81c16460 T amdgpu_dm_irq_fini
+ffffffff81c164e0 T amdgpu_dm_irq_suspend
+ffffffff81c165e0 T amdgpu_dm_irq_resume_early
+ffffffff81c16780 T amdgpu_dm_irq_resume_late
+ffffffff81c16920 T amdgpu_dm_set_irq_funcs
+ffffffff81c16990 T amdgpu_dm_hpd_init
+ffffffff81c16a40 T amdgpu_dm_hpd_fini
+ffffffff81c16ae0 t amdgpu_dm_set_crtc_irq_state
+ffffffff81c16b60 t amdgpu_dm_irq_handler
+ffffffff81c16c70 t amdgpu_dm_set_pflip_irq_state
+ffffffff81c16cf0 t amdgpu_dm_set_hpd_irq_state
+ffffffff81c17000 T dm_dp_mst_dc_sink_create
+ffffffff81c170e0 T amdgpu_dm_initialize_dp_connector
+ffffffff81c17180 t dm_dp_aux_transfer
+ffffffff81c172e0 t dm_dp_add_mst_connector
+ffffffff81c174a0 t dm_dp_mst_register_connector
+ffffffff81c174f0 t dm_dp_destroy_mst_connector
+ffffffff81c17590 t dm_dp_mst_hotplug
+ffffffff81c175b0 t dm_dp_mst_detect
+ffffffff81c175d0 t dm_dp_mst_connector_destroy
+ffffffff81c17640 t dm_dp_mst_get_modes
+ffffffff81c17770 t dm_mst_best_encoder
+ffffffff81c177a0 t amdgpu_dm_encoder_destroy
+ffffffff81c18000 T dm_pp_apply_display_requirements
+ffffffff81c18200 T dm_pp_get_clock_levels_by_type
+ffffffff81c18500 T dm_pp_get_clock_levels_by_type_with_latency
+ffffffff81c186e0 T dm_pp_get_clock_levels_by_type_with_voltage
+ffffffff81c188a0 T dm_pp_notify_wm_clock_changes
+ffffffff81c188d0 T dm_pp_apply_power_level_change_request
+ffffffff81c18900 T dm_pp_apply_clock_for_voltage_request
+ffffffff81c189d0 T dm_pp_get_static_clocks
+ffffffff81c18aa0 T pp_rv_set_display_requirement
+ffffffff81c18b50 T pp_rv_set_wm_ranges
+ffffffff81c18c90 T pp_rv_set_pme_wa_enable
+ffffffff81c18ce0 T dm_pp_get_funcs_rv
+ffffffff81c19000 T dm_get_elapse_time_in_ns
+ffffffff81c19030 T dm_perf_trace_timestamp
+ffffffff81c19060 T dm_write_persistent_data
+ffffffff81c19090 T dm_read_persistent_data
+ffffffff81c1a000 T fixed_point_to_int_frac
+ffffffff81c1a200 T convert_float_matrix
+ffffffff81c1b000 T dc_fixpt_from_fraction
+ffffffff81c1b180 T dc_fixpt_mul
+ffffffff81c1b300 T dc_fixpt_sqr
+ffffffff81c1b440 T dc_fixpt_recip
+ffffffff81c1b4a0 T dc_fixpt_sinc
+ffffffff81c1b680 T dc_fixpt_sin
+ffffffff81c1b6b0 T dc_fixpt_cos
+ffffffff81c1b790 T dc_fixpt_exp
+ffffffff81c1b9e0 t fixed31_32_exp_from_taylor_series
+ffffffff81c1bd30 T dc_fixpt_log
+ffffffff81c1bef0 T dc_fixpt_u3d19
+ffffffff81c1bf30 T dc_fixpt_u2d19
+ffffffff81c1bf70 T dc_fixpt_u0d19
+ffffffff81c1bfa0 T dc_fixpt_clamp_u0d14
+ffffffff81c1bff0 T dc_fixpt_clamp_u0d10
+ffffffff81c1c040 T dc_fixpt_s4d19
+ffffffff81c1d000 T dc_conn_log_hex_linux
+ffffffff81c1e000 T dal_vector_construct
+ffffffff81c1e0e0 T dal_vector_presized_costruct
+ffffffff81c1e370 T dal_vector_presized_create
+ffffffff81c1e630 T dal_vector_create
+ffffffff81c1e770 T dal_vector_destruct
+ffffffff81c1e7c0 T dal_vector_destroy
+ffffffff81c1e830 T dal_vector_get_count
+ffffffff81c1e860 T dal_vector_at_index
+ffffffff81c1e8a0 T dal_vector_remove_at_index
+ffffffff81c1e920 T dal_vector_set_at_index
+ffffffff81c1e980 T dal_vector_insert_at
+ffffffff81c1ea80 T dal_vector_reserve
+ffffffff81c1eb20 T dal_vector_append
+ffffffff81c1ec20 T dal_vector_clone
+ffffffff81c1ecd0 T dal_vector_capacity
+ffffffff81c1ed00 T dal_vector_clear
+ffffffff81c1f000 T bios_parser_create
+ffffffff81c1fdc0 T update_slot_layout_info
+ffffffff81c1ff40 T get_bracket_layout_record
+ffffffff81c20000 t bios_parser_get_connectors_number
+ffffffff81c20050 t bios_parser_get_encoder_id
+ffffffff81c200c0 t bios_parser_get_connector_id
+ffffffff81c20150 t bios_parser_get_dst_number
+ffffffff81c20200 t bios_parser_get_src_obj
+ffffffff81c20300 t bios_parser_get_dst_obj
+ffffffff81c20390 t bios_parser_get_i2c_info
+ffffffff81c20490 t bios_parser_get_voltage_ddc_info
+ffffffff81c205f0 t bios_parser_get_thermal_ddc_info
+ffffffff81c20640 t bios_parser_get_hpd_info
+ffffffff81c20710 t bios_parser_get_device_tag
+ffffffff81c20910 t bios_parser_get_firmware_info
+ffffffff81c20f20 t bios_parser_get_spread_spectrum_info
+ffffffff81c21200 t bios_parser_get_ss_entry_number
+ffffffff81c21430 t bios_parser_get_embedded_panel_info
+ffffffff81c219a0 t bios_parser_get_gpio_pin_info
+ffffffff81c21ac0 t bios_parser_get_encoder_cap_info
+ffffffff81c21bb0 t bios_parser_set_scratch_critical_state
+ffffffff81c21bc0 t bios_parser_is_device_id_supported
+ffffffff81c21c90 t bios_parser_encoder_control
+ffffffff81c21cd0 t bios_parser_transmitter_control
+ffffffff81c21d10 t bios_parser_crt_control
+ffffffff81c21e80 t bios_parser_enable_crtc
+ffffffff81c21ec0 t bios_parser_adjust_pixel_clock
+ffffffff81c21f00 t bios_parser_set_pixel_clock
+ffffffff81c21f40 t bios_parser_set_dce_clock
+ffffffff81c21f80 t bios_parser_enable_spread_spectrum_on_ppll
+ffffffff81c21fc0 t bios_parser_program_crtc_timing
+ffffffff81c22000 t bios_parser_crtc_source_select
+ffffffff81c22040 t bios_parser_program_display_engine_pll
+ffffffff81c22080 t bios_parser_enable_disp_power_gating
+ffffffff81c220c0 t bios_parser_post_init
+ffffffff81c22cc0 t bios_parser_destroy
+ffffffff81c22d80 t bios_get_board_layout_info
+ffffffff81c22eb0 t get_bios_object
+ffffffff81c23040 t get_dest_obj_list
+ffffffff81c23120 t get_gpio_i2c_info
+ffffffff81c232b0 t get_ss_info_from_ss_info_table
+ffffffff81c23480 t get_ss_entry_number_from_ss_info_tbl
+ffffffff81c235c0 t add_device_tag_from_ext_display_path
+ffffffff81c24000 T firmware_parser_create
+ffffffff81c24ab0 t bios_parser_get_connectors_number
+ffffffff81c24b80 t bios_parser_get_encoder_id
+ffffffff81c24bd0 t bios_parser_get_connector_id
+ffffffff81c24c20 t bios_parser_get_dst_number
+ffffffff81c24c60 t bios_parser_get_src_obj
+ffffffff81c24dd0 t bios_parser_get_dst_obj
+ffffffff81c24ea0 t bios_parser_get_i2c_info
+ffffffff81c24fa0 t bios_parser_get_voltage_ddc_info
+ffffffff81c25130 t bios_parser_get_thermal_ddc_info
+ffffffff81c25190 t bios_parser_get_hpd_info
+ffffffff81c25260 t bios_parser_get_device_tag
+ffffffff81c253b0 t bios_parser_get_firmware_info
+ffffffff81c25570 t bios_parser_get_spread_spectrum_info
+ffffffff81c257f0 t bios_parser_get_ss_entry_number
+ffffffff81c25820 t bios_parser_get_embedded_panel_info
+ffffffff81c25a10 t bios_parser_get_gpio_pin_info
+ffffffff81c25b30 t bios_parser_get_encoder_cap_info
+ffffffff81c25c30 t bios_parser_is_accelerated_mode
+ffffffff81c25c40 t bios_parser_get_vga_enabled_displays
+ffffffff81c25c50 t bios_parser_set_scratch_critical_state
+ffffffff81c25c60 t bios_parser_is_device_id_supported
+ffffffff81c25cd0 t bios_parser_encoder_control
+ffffffff81c25d10 t bios_parser_transmitter_control
+ffffffff81c25d50 t bios_parser_enable_crtc
+ffffffff81c25d90 t bios_parser_set_pixel_clock
+ffffffff81c25dd0 t bios_parser_set_dce_clock
+ffffffff81c25e10 t bios_parser_get_smu_clock_info
+ffffffff81c25e50 t bios_parser_program_crtc_timing
+ffffffff81c25e90 t bios_parser_crtc_source_select
+ffffffff81c25ed0 t bios_parser_enable_disp_power_gating
+ffffffff81c25f10 t bios_parser_post_init
+ffffffff81c25f40 t firmware_parser_destroy
+ffffffff81c26000 t bios_get_board_layout_info
+ffffffff81c26240 t get_bios_object
+ffffffff81c26380 t get_gpio_i2c_info
+ffffffff81c264a0 t get_firmware_info_v3_2
+ffffffff81c27000 T object_id_from_bios_object_id
+ffffffff81c28000 T bios_get_image
+ffffffff81c28040 T bios_is_accelerated_mode
+ffffffff81c280a0 T bios_set_scratch_acc_mode_change
+ffffffff81c28120 T bios_set_scratch_critical_state
+ffffffff81c281b0 T bios_get_vga_enabled_displays
+ffffffff81c29000 T dal_bios_parser_create
+ffffffff81c29070 T dal_bios_parser_destroy
+ffffffff81c2a000 T dal_bios_parser_init_cmd_tbl
+ffffffff81c2a5a0 t encoder_control_digx_v3
+ffffffff81c2a670 t encoder_control_digx_v4
+ffffffff81c2a740 t encoder_control_digx_v5
+ffffffff81c2a890 t encoder_control_dig1_v1
+ffffffff81c2a910 t encoder_control_dig2_v1
+ffffffff81c2a990 t encoder_control_dig_v1
+ffffffff81c2a9f0 t transmitter_control_v2
+ffffffff81c2abc0 t transmitter_control_v3
+ffffffff81c2ad90 t transmitter_control_v4
+ffffffff81c2af40 t transmitter_control_v1_5
+ffffffff81c2b0c0 t transmitter_control_v1_6
+ffffffff81c2b230 t set_pixel_clock_v3
+ffffffff81c2b3a0 t set_pixel_clock_v5
+ffffffff81c2b500 t set_pixel_clock_v6
+ffffffff81c2b660 t set_pixel_clock_v7
+ffffffff81c2b820 t enable_spread_spectrum_on_ppll_v1
+ffffffff81c2b930 t enable_spread_spectrum_on_ppll_v2
+ffffffff81c2ba50 t enable_spread_spectrum_on_ppll_v3
+ffffffff81c2bb50 t adjust_display_pll_v2
+ffffffff81c2bbd0 t adjust_display_pll_v3
+ffffffff81c2bd30 t dac1_encoder_control_v1
+ffffffff81c2bda0 t dac2_encoder_control_v1
+ffffffff81c2be10 t dac1_output_control_v1
+ffffffff81c2be70 t dac2_output_control_v1
+ffffffff81c2bed0 t set_crtc_using_dtd_timing_v3
+ffffffff81c2c030 t set_crtc_timing_v1
+ffffffff81c2c1c0 t select_crtc_source_v2
+ffffffff81c2c2c0 t select_crtc_source_v3
+ffffffff81c2c3d0 t enable_crtc_v1
+ffffffff81c2c470 t enable_crtc_mem_req_v1
+ffffffff81c2c510 t program_clock_v5
+ffffffff81c2c610 t program_clock_v6
+ffffffff81c2c710 t external_encoder_control_v3
+ffffffff81c2c8b0 t enable_disp_power_gating_v2_1
+ffffffff81c2c970 t set_dce_clock_v2_1
+ffffffff81c2d000 T dal_firmware_parser_init_cmd_tbl
+ffffffff81c2d2a0 t encoder_control_digx_v1_5
+ffffffff81c2d3f0 t transmitter_control_v1_6
+ffffffff81c2d500 t set_pixel_clock_v7
+ffffffff81c2d690 t set_crtc_using_dtd_timing_v3
+ffffffff81c2d7f0 t select_crtc_source_v3
+ffffffff81c2d900 t enable_crtc_v1
+ffffffff81c2d9a0 t external_encoder_control_v3
+ffffffff81c2d9d0 t enable_disp_power_gating_v2_1
+ffffffff81c2da90 t set_dce_clock_v2_1
+ffffffff81c2dbb0 t get_smu_clock_info_v3_1
+ffffffff81c2e000 T dal_bios_parser_init_cmd_tbl_helper
+ffffffff81c2e090 T dal_cmd_table_helper_controller_id_to_atom
+ffffffff81c2e1a0 T dal_cmd_table_helper_transmitter_bp_to_atom
+ffffffff81c2e210 T dal_cmd_table_helper_encoder_mode_bp_to_atom
+ffffffff81c2e2a0 T dal_cmd_table_helper_assign_control_parameter
+ffffffff81c2e360 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src
+ffffffff81c2e440 T dal_cmd_table_helper_encoder_id_to_atom
+ffffffff81c2f000 T dal_bios_parser_init_cmd_tbl_helper2
+ffffffff81c2f0a0 T dal_cmd_table_helper_controller_id_to_atom2
+ffffffff81c2f190 T dal_cmd_table_helper_transmitter_bp_to_atom2
+ffffffff81c2f200 T dal_cmd_table_helper_encoder_mode_bp_to_atom2
+ffffffff81c2f290 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2
+ffffffff81c2f370 T dal_cmd_table_helper_encoder_id_to_atom2
+ffffffff81c30000 T dal_cmd_tbl_helper_dce110_get_table
 ffffffff81c30030 t encoder_action_to_atom
 ffffffff81c300a0 t engine_bp_to_atom
 ffffffff81c30140 t clock_source_id_to_atom
-ffffffff81c30220 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff81c30260 t signal_type_to_atom_dig_mode
-ffffffff81c302c0 t hpd_sel_to_atom
-ffffffff81c30300 t dig_encoder_sel_to_atom
-ffffffff81c30330 t phy_id_to_atom
-ffffffff81c30370 t disp_power_gating_action_to_atom
-ffffffff81c303e0 t dc_clock_type_to_atom
-ffffffff81c30460 t transmitter_color_depth_to_atom
-ffffffff81c31000 T dal_cmd_tbl_helper_dce112_get_table
+ffffffff81c301e0 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff81c30220 t signal_type_to_atom_dig_mode
+ffffffff81c30280 t hpd_sel_to_atom
+ffffffff81c302c0 t dig_encoder_sel_to_atom
+ffffffff81c302f0 t phy_id_to_atom
+ffffffff81c30330 t disp_power_gating_action_to_atom
+ffffffff81c31000 T dal_cmd_tbl_helper_dce112_get_table2
 ffffffff81c31030 t encoder_action_to_atom
 ffffffff81c310a0 t engine_bp_to_atom
 ffffffff81c31140 t clock_source_id_to_atom
@@ -23549,19105 +23546,19118 @@ ffffffff81c31330 t phy_id_to_atom
 ffffffff81c31370 t disp_power_gating_action_to_atom
 ffffffff81c313e0 t dc_clock_type_to_atom
 ffffffff81c31460 t transmitter_color_depth_to_atom
-ffffffff81c32000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff81c32000 T dal_cmd_tbl_helper_dce112_get_table
 ffffffff81c32030 t encoder_action_to_atom
 ffffffff81c320a0 t engine_bp_to_atom
 ffffffff81c32140 t clock_source_id_to_atom
-ffffffff81c32230 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff81c32270 t signal_type_to_atom_dig_mode
-ffffffff81c322d0 t hpd_sel_to_atom
-ffffffff81c32310 t dig_encoder_sel_to_atom
-ffffffff81c32360 t phy_id_to_atom
-ffffffff81c323a0 t disp_power_gating_action_to_atom
-ffffffff81c33000 T bw_int_to_fixed_nonconst
-ffffffff81c33080 T bw_frc_to_fixed
-ffffffff81c33200 T bw_floor2
-ffffffff81c33290 T bw_ceil2
-ffffffff81c33300 T bw_mul
-ffffffff81c34000 T convert_to_custom_float_format
-ffffffff81c35000 T bw_calcs_init
-ffffffff81c36e80 T bw_calcs
-ffffffff81c385f0 t calculate_bandwidth
-ffffffff81c40000 T scaler_settings_calculation
-ffffffff81c40420 T mode_support_and_system_configuration
-ffffffff81c46220 T display_pipe_configuration
-ffffffff81c46af0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation
-ffffffff81c4c000 T dcn_bw_mod
-ffffffff81c4c060 T dcn_bw_min2
-ffffffff81c4c0a0 T dcn_bw_max
-ffffffff81c4c0d0 T dcn_bw_max2
-ffffffff81c4c110 T dcn_bw_floor2
-ffffffff81c4c160 T dcn_bw_ceil2
-ffffffff81c4c1f0 T dcn_bw_max3
-ffffffff81c4c270 T dcn_bw_max5
-ffffffff81c4c380 T dcn_bw_pow
-ffffffff81c4c410 T dcn_bw_log
-ffffffff81c4d000 T dcn_validate_bandwidth
-ffffffff81c4e9b0 T dcn_bw_sync_calcs_and_dml
-ffffffff81c4ec20 t dcn_bw_calc_rq_dlg_ttu
-ffffffff81c4f620 T dcn_find_dcfclk_suits_all
-ffffffff81c4fa90 T dcn_bw_update_from_pplib
-ffffffff81c4fe50 T dcn_bw_notify_pplib_of_wm_ranges
-ffffffff81c51000 T dc_stream_adjust_vmin_vmax
-ffffffff81c510e0 T dc_stream_get_crtc_position
-ffffffff81c51310 T dc_stream_configure_crc
-ffffffff81c51460 T dc_stream_get_crc
-ffffffff81c51540 T dc_stream_set_dither_option
-ffffffff81c516e0 T dc_stream_set_static_screen_events
-ffffffff81c51880 T dc_link_set_drive_settings
-ffffffff81c51910 T dc_link_perform_link_training
-ffffffff81c519a0 T dc_link_set_preferred_link_settings
-ffffffff81c51a30 T dc_link_enable_hpd
-ffffffff81c51a40 T dc_link_disable_hpd
-ffffffff81c51a50 T dc_link_set_test_pattern
-ffffffff81c51a90 T dc_create
-ffffffff81c520e0 T dc_destroy
-ffffffff81c52130 t destruct
-ffffffff81c522f0 T dc_enable_stereo
-ffffffff81c52400 T dc_commit_state
-ffffffff81c530e0 T dc_post_update_surfaces_to_stream
-ffffffff81c531b0 T dc_create_state
-ffffffff81c53200 T dc_retain_state
-ffffffff81c53230 T dc_release_state
-ffffffff81c532a0 T dc_check_update_surfaces_for_stream
-ffffffff81c53a30 T dc_commit_updates_for_stream
-ffffffff81c541d0 T dc_get_current_stream_count
-ffffffff81c54200 T dc_get_stream_at_index
-ffffffff81c54240 T dc_interrupt_to_irq_source
-ffffffff81c54260 T dc_interrupt_set
-ffffffff81c542b0 T dc_interrupt_ack
-ffffffff81c542d0 T dc_set_power_state
-ffffffff81c54380 T dc_resume
-ffffffff81c543f0 T dc_submit_i2c
-ffffffff81c54420 T dc_link_add_remote_sink
-ffffffff81c545b0 T dc_link_remove_remote_sink
-ffffffff81c55000 T pre_surface_trace
-ffffffff81c55030 T update_surface_trace
-ffffffff81c55060 T post_surface_trace
-ffffffff81c55090 T context_timing_trace
-ffffffff81c55160 T context_clock_trace
-ffffffff81c56000 T get_color_space_type
-ffffffff81c56070 T find_color_matrix
-ffffffff81c560f0 T color_space_to_black_color
-ffffffff81c56180 T hwss_wait_for_blank_complete
-ffffffff81c57000 T get_hpd_gpio
-ffffffff81c570d0 T dc_link_detect_sink
-ffffffff81c57200 T dc_link_is_dp_sink_present
-ffffffff81c57440 T dc_link_detect
-ffffffff81c57df0 T link_create
-ffffffff81c587a0 T link_destroy
-ffffffff81c58860 T dc_link_validate_mode_timing
-ffffffff81c589d0 T dc_link_get_backlight_level
-ffffffff81c58a30 T dc_link_set_backlight_level
-ffffffff81c58c00 T dc_link_set_abm_disable
-ffffffff81c58c70 T dc_link_set_psr_enable
-ffffffff81c58ce0 T dc_link_get_status
-ffffffff81c58d10 T core_link_resume
-ffffffff81c58d50 t program_hpd_filter
-ffffffff81c58ee0 T core_link_enable_stream
-ffffffff81c5a520 T core_link_disable_stream
-ffffffff81c5a6e0 T core_link_set_avmute
-ffffffff81c5a730 T dc_link_enable_hpd_filter
-ffffffff81c5a880 t enable_link_dp
-ffffffff81c5aaf0 t update_mst_stream_alloc_table
-ffffffff81c5b000 T dal_ddc_i2c_payloads_add
-ffffffff81c5b0c0 T dal_ddc_aux_payloads_add
-ffffffff81c5b170 T dal_ddc_service_create
-ffffffff81c5b290 T dal_ddc_service_destroy
-ffffffff81c5b320 T dal_ddc_service_get_type
-ffffffff81c5b350 T dal_ddc_service_set_transaction_type
-ffffffff81c5b380 T dal_ddc_service_is_in_aux_transaction_mode
-ffffffff81c5b3b0 T ddc_service_set_dongle_type
-ffffffff81c5b3e0 T get_defer_delay
-ffffffff81c5b470 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor
-ffffffff81c5b7f0 T dal_ddc_service_query_ddc_data
-ffffffff81c5bc50 T dc_link_aux_transfer
-ffffffff81c5bdb0 T dal_ddc_service_set_ddc_pin
-ffffffff81c5bde0 T dal_ddc_service_get_ddc_pin
-ffffffff81c5be10 T dal_ddc_service_write_scdc_data
-ffffffff81c5bee0 T dal_ddc_service_read_scdc_data
-ffffffff81c5c000 T dc_link_dp_set_drive_settings
-ffffffff81c5c100 T dc_link_dp_perform_link_training
-ffffffff81c5d130 T perform_link_training_with_retries
-ffffffff81c5d1f0 T dp_verify_link_cap
-ffffffff81c5d570 T dp_validate_mode_timing
-ffffffff81c5d6a0 T decide_link_settings
-ffffffff81c5d8d0 T dc_link_handle_hpd_rx_irq
-ffffffff81c5e090 T is_mst_supported
-ffffffff81c5e120 T is_dp_active_dongle
-ffffffff81c5e160 T detect_dp_sink_caps
-ffffffff81c5e170 t retrieve_link_cap
-ffffffff81c5e620 T detect_edp_sink_caps
-ffffffff81c5e680 T dc_link_dp_enable_hpd
-ffffffff81c5e6c0 T dc_link_dp_disable_hpd
-ffffffff81c5e710 T dc_link_dp_set_test_pattern
-ffffffff81c5eb10 t set_crtc_test_pattern
-ffffffff81c5ec90 T dp_enable_mst_on_sink
-ffffffff81c5ed10 t get_lane_status_and_drive_settings
-ffffffff81c60000 T core_link_read_dpcd
-ffffffff81c60050 T core_link_write_dpcd
-ffffffff81c600a0 T dp_receiver_power_ctrl
-ffffffff81c60100 T dp_enable_link_phy
-ffffffff81c60240 T edp_receiver_ready_T9
-ffffffff81c60310 T edp_receiver_ready_T7
-ffffffff81c603e0 T dp_disable_link_phy
-ffffffff81c60490 T dp_disable_link_phy_mst
-ffffffff81c60560 T dp_set_hw_training_pattern
-ffffffff81c60650 T dp_set_hw_test_pattern
-ffffffff81c60730 T dp_set_hw_lane_settings
-ffffffff81c60750 T dp_get_panel_mode
-ffffffff81c607e0 T dp_retrain_link_dp_test
-ffffffff81c61000 T resource_parse_asic_id
-ffffffff81c61100 T dc_create_resource_pool
-ffffffff81c612d0 T dc_destroy_resource_pool
-ffffffff81c61340 T resource_construct
-ffffffff81c61660 T resource_unreference_clock_source
-ffffffff81c616e0 T resource_reference_clock_source
-ffffffff81c61760 T resource_get_clock_source_reference
-ffffffff81c617e0 T resource_are_streams_timing_synchronizable
-ffffffff81c61880 T resource_find_used_clk_src_for_sharing
-ffffffff81c61a20 T resource_build_scaling_params
-ffffffff81c636a0 T resource_build_scaling_params_for_context
-ffffffff81c637f0 T find_idle_secondary_pipe
-ffffffff81c63850 T resource_get_head_pipe_for_stream
-ffffffff81c63920 T dc_add_plane_to_context
-ffffffff81c63ed0 T dc_remove_plane_from_context
-ffffffff81c64140 T dc_rem_all_planes_for_stream
-ffffffff81c642f0 T dc_add_all_planes_for_stream
-ffffffff81c64440 T dc_is_stream_unchanged
-ffffffff81c644e0 T dc_is_stream_scaling_unchanged
-ffffffff81c64570 T update_audio_usage
-ffffffff81c645e0 T resource_is_stream_unchanged
-ffffffff81c646e0 T dc_add_stream_to_ctx
-ffffffff81c647b0 T dc_remove_stream_from_ctx
-ffffffff81c64b30 T resource_map_pool_resources
-ffffffff81c65150 T dc_resource_state_copy_construct_current
-ffffffff81c65160 T dc_resource_state_copy_construct
-ffffffff81c65440 T dc_resource_state_construct
-ffffffff81c65480 T dc_validate_global_state
-ffffffff81c657e0 T dc_resource_state_destruct
-ffffffff81c658a0 T dc_resource_find_first_free_pll
-ffffffff81c65920 T resource_build_info_frame
-ffffffff81c65fb0 t set_spd_info_packet
-ffffffff81c66150 T resource_map_clock_resources
-ffffffff81c66390 T pipe_need_reprogram
-ffffffff81c66490 T resource_build_bit_depth_reduction_params
-ffffffff81c66730 T dc_validate_stream
-ffffffff81c668b0 T dc_validate_plane
-ffffffff81c67000 T dc_sink_retain
-ffffffff81c67030 T dc_sink_release
-ffffffff81c670c0 T dc_sink_create
-ffffffff81c68000 T update_stream_signal
-ffffffff81c68080 T dc_stream_retain
-ffffffff81c680b0 T dc_stream_release
-ffffffff81c68150 T dc_create_stream_for_sink
-ffffffff81c68380 T dc_stream_get_status
-ffffffff81c68400 T dc_stream_set_cursor_attributes
-ffffffff81c68580 T dc_stream_set_cursor_position
-ffffffff81c686f0 T dc_stream_get_vblank_counter
-ffffffff81c687b0 T dc_stream_get_scanoutpos
-ffffffff81c68870 T dc_stream_log
-ffffffff81c69000 T enable_surface_flip_reporting
-ffffffff81c69030 T dc_create_plane_state
-ffffffff81c69110 T dc_plane_get_status
-ffffffff81c69250 T dc_plane_state_retain
-ffffffff81c69280 T dc_plane_state_release
-ffffffff81c69330 t kref_put
-ffffffff81c69370 T dc_gamma_retain
-ffffffff81c693a0 T dc_gamma_release
-ffffffff81c69400 t dc_gamma_free
-ffffffff81c69420 T dc_create_gamma
-ffffffff81c69470 T dc_transfer_func_retain
-ffffffff81c694a0 T dc_transfer_func_release
-ffffffff81c694e0 t dc_transfer_func_free
-ffffffff81c69500 T dc_create_transfer_func
-ffffffff81c6a000 T generic_reg_update_ex
-ffffffff81c6a1d0 T generic_reg_get
-ffffffff81c6a230 T generic_reg_get2
-ffffffff81c6a2b0 T generic_reg_get3
-ffffffff81c6a350 T generic_reg_get4
-ffffffff81c6a400 T generic_reg_get5
-ffffffff81c6a4d0 T generic_reg_get6
-ffffffff81c6a5b0 T generic_reg_get7
-ffffffff81c6a6b0 T generic_reg_get8
-ffffffff81c6a7c0 T generic_reg_wait
-ffffffff81c6a980 T generic_write_indirect_reg
-ffffffff81c6a9e0 T generic_read_indirect_reg
-ffffffff81c6aa30 T generic_indirect_reg_update_ex
-ffffffff81c6b000 T dce_abm_create
-ffffffff81c6b0c0 T dce_abm_destroy
-ffffffff81c6b120 t dce_abm_init
-ffffffff81c6b590 t dce_abm_set_level
-ffffffff81c6b6d0 t dce_abm_immediate_disable
-ffffffff81c6b880 t dce_abm_init_backlight
-ffffffff81c6bb30 t dce_abm_set_backlight_level
-ffffffff81c6c010 t dce_abm_get_current_backlight_8_bit
-ffffffff81c6d000 T dce_aud_az_enable
-ffffffff81c6d160 T dce_aud_az_disable
-ffffffff81c6d350 T dce_aud_az_configure
-ffffffff81c6df80 t check_audio_bandwidth
-ffffffff81c6e120 T dce_aud_wall_dto_setup
-ffffffff81c6e410 T dce_aud_hw_init
-ffffffff81c6e630 T dce_aud_destroy
-ffffffff81c6e680 T dce_audio_create
-ffffffff81c6e740 t dce_aud_endpoint_valid
-ffffffff81c6f000 T get_engine_type
-ffffffff81c6f030 T dce110_engine_destroy
-ffffffff81c6f080 T dce110_aux_engine_construct
-ffffffff81c6f0d0 t acquire_engine
-ffffffff81c6f290 t submit_channel_request
-ffffffff81c6f810 t process_channel_reply
-ffffffff81c6f8f0 t read_channel_reply
-ffffffff81c6fad0 t get_channel_status
-ffffffff81c6fbf0 t is_engine_available
-ffffffff81c6fc40 t acquire
-ffffffff81c6fce0 t submit_request
-ffffffff81c6fdc0 t release_engine
-ffffffff81c6fe60 t read_command
-ffffffff81c70220 t write_command
-ffffffff81c71000 T dce110_clk_src_construct
-ffffffff81c712a0 t calc_pll_max_vco_construct
-ffffffff81c714f0 t dce110_clock_source_power_down
-ffffffff81c71590 t dce110_program_pix_clk
-ffffffff81c71f00 t dce110_get_pix_clk_dividers
-ffffffff81c72270 t dce110_get_pix_rate_in_hz
-ffffffff81c72440 t calculate_pixel_clock_pll_dividers
-ffffffff81c72730 t get_ss_info_from_atombios
-ffffffff81c73000 T dce_dccg_create
-ffffffff81c730f0 t dce_dccg_construct
-ffffffff81c733a0 T dce110_dccg_create
-ffffffff81c73490 T dce112_dccg_create
-ffffffff81c73580 T dce120_dccg_create
-ffffffff81c73660 T dcn1_dccg_create
-ffffffff81c738b0 T dce_dccg_destroy
-ffffffff81c73900 t dce_update_clocks
-ffffffff81c739f0 t dce_set_clock
-ffffffff81c73ae0 t dce_get_dp_ref_freq_khz
-ffffffff81c73bf0 t dccg_adjust_dp_ref_freq_for_ss
-ffffffff81c73ce0 t dce_psr_set_clock
-ffffffff81c73e10 t dce112_set_clock
-ffffffff81c73f90 t dce12_update_clocks
-ffffffff81c74070 t dce12_get_dp_ref_freq_khz
-ffffffff81c74090 t dcn1_update_clocks
-ffffffff81c75000 T dce_dmcu_load_iram
-ffffffff81c751b0 T dce_dmcu_create
-ffffffff81c75260 T dcn10_dmcu_create
-ffffffff81c75310 T dce_dmcu_destroy
-ffffffff81c75360 t dce_dmcu_init
-ffffffff81c75390 t dce_dmcu_set_psr_enable
-ffffffff81c75520 t dce_dmcu_setup_psr
-ffffffff81c75980 t dce_get_dmcu_psr_state
-ffffffff81c75ae0 t dce_psr_wait_loop
-ffffffff81c75c60 t dce_get_psr_wait_loop
-ffffffff81c75c90 t dce_is_dmcu_initialized
-ffffffff81c75cf0 t dcn10_dmcu_init
-ffffffff81c761f0 t dcn10_dmcu_load_iram
-ffffffff81c764d0 t dcn10_dmcu_set_psr_enable
-ffffffff81c766d0 t dcn10_dmcu_setup_psr
-ffffffff81c76b80 t dcn10_get_dmcu_psr_state
-ffffffff81c76cf0 t dcn10_psr_wait_loop
-ffffffff81c76e50 t dcn10_get_psr_wait_loop
-ffffffff81c76e80 t dcn10_is_dmcu_initialized
-ffffffff81c76eb0 t dcn10_get_dmcu_state
-ffffffff81c78000 T dce_enable_fe_clock
-ffffffff81c780a0 T dce_pipe_control_lock
-ffffffff81c782b0 T dce_set_blender_mode
-ffffffff81c78440 T dce_clock_gating_power_up
-ffffffff81c78530 T dce_crtc_switch_to_clk_src
-ffffffff81c787c0 T dce_use_lut
-ffffffff81c79000 T dce_ipp_construct
-ffffffff81c79050 T dce_ipp_destroy
-ffffffff81c790a0 t dce_ipp_cursor_set_position
-ffffffff81c79270 t dce_ipp_cursor_set_attributes
-ffffffff81c795b0 t dce_ipp_program_prescale
-ffffffff81c797e0 t dce_ipp_program_input_lut
-ffffffff81c79ce0 t dce_ipp_set_degamma
-ffffffff81c7a000 T dce110_link_encoder_set_dp_phy_pattern_training_pattern
-ffffffff81c7a140 T dce110_psr_program_dp_dphy_fast_training
-ffffffff81c7a240 T dce110_psr_program_secondary_packet
-ffffffff81c7a2d0 T dce110_is_dig_enabled
-ffffffff81c7a320 T dce110_link_encoder_validate_dvi_output
-ffffffff81c7a3c0 T dce110_link_encoder_validate_dp_output
-ffffffff81c7a400 T dce110_link_encoder_construct
-ffffffff81c7a5e0 T dce110_link_encoder_validate_output_with_stream
-ffffffff81c7a770 T dce110_link_encoder_hw_init
-ffffffff81c7a990 T dce110_link_encoder_destroy
-ffffffff81c7a9e0 T dce110_link_encoder_setup
-ffffffff81c7ab70 T dce110_link_encoder_enable_tmds_output
-ffffffff81c7ac50 T dce110_link_encoder_enable_dp_output
-ffffffff81c7ae00 T dce110_link_encoder_enable_dp_mst_output
-ffffffff81c7afa0 T dce110_link_encoder_disable_output
-ffffffff81c7b1d0 T dce110_link_encoder_dp_set_lane_settings
-ffffffff81c7b360 T dce110_link_encoder_dp_set_phy_pattern
-ffffffff81c7bdf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2
-ffffffff81c7c130 T dce110_link_encoder_update_mst_stream_allocation_table
-ffffffff81c7c470 T dce110_link_encoder_connect_dig_be_to_fe
-ffffffff81c7c580 T dce110_link_encoder_enable_hpd
-ffffffff81c7c5a0 T dce110_link_encoder_disable_hpd
-ffffffff81c7d000 T dce_mem_input_construct
-ffffffff81c7d050 T dce112_mem_input_construct
-ffffffff81c7d0a0 T dce120_mem_input_construct
-ffffffff81c7d0f0 t dce_mi_program_display_marks
-ffffffff81c7d370 t dce_mi_allocate_dmif
-ffffffff81c7d5d0 t dce_mi_free_dmif
-ffffffff81c7d750 t dce_mi_program_surface_flip_and_addr
-ffffffff81c7db20 t dce_mi_program_pte_vm
-ffffffff81c7dd60 t dce_mi_program_surface_config
-ffffffff81c7e590 t dce_mi_is_flip_pending
-ffffffff81c7e640 t program_nbp_watermark
-ffffffff81c7e940 t program_stutter_watermark
-ffffffff81c7ea80 t dce112_mi_program_display_marks
-ffffffff81c7eed0 t dce120_mi_program_display_marks
-ffffffff81c7f460 t dce120_program_stutter_watermark
-ffffffff81c80000 T dce110_opp_set_clamping
-ffffffff81c802d0 T dce110_opp_program_bit_depth_reduction
-ffffffff81c80e30 T dce110_opp_program_clamping_and_pixel_encoding
-ffffffff81c81060 T dce110_opp_set_dyn_expansion
-ffffffff81c81200 T dce110_opp_program_fmt
-ffffffff81c813f0 T dce110_opp_construct
-ffffffff81c81440 T dce110_opp_destroy
-ffffffff81c82000 T get_filter_3tap_16p
-ffffffff81c82090 T get_filter_3tap_64p
-ffffffff81c82120 T get_filter_4tap_16p
-ffffffff81c821b0 T get_filter_4tap_64p
-ffffffff81c82240 T get_filter_5tap_64p
-ffffffff81c822d0 T get_filter_6tap_64p
-ffffffff81c82360 T get_filter_7tap_64p
-ffffffff81c823f0 T get_filter_8tap_64p
-ffffffff81c82480 T get_filter_2tap_16p
-ffffffff81c824b0 T get_filter_2tap_64p
-ffffffff81c83000 T dce110_se_audio_mute_control
-ffffffff81c830a0 T dce110_se_dp_audio_setup
-ffffffff81c830b0 t dce110_se_audio_setup
-ffffffff81c83230 T dce110_se_dp_audio_enable
-ffffffff81c835c0 T dce110_se_dp_audio_disable
-ffffffff81c83790 T dce110_se_hdmi_audio_setup
-ffffffff81c83eb0 T dce110_se_hdmi_audio_disable
-ffffffff81c83f50 T dce110_stream_encoder_construct
-ffffffff81c83fa0 t dce110_stream_encoder_dp_set_stream_attribute
-ffffffff81c84850 t dce110_stream_encoder_hdmi_set_stream_attribute
-ffffffff81c84f40 t dce110_stream_encoder_dvi_set_stream_attribute
-ffffffff81c85040 t dce110_stream_encoder_set_mst_bandwidth
-ffffffff81c85220 t dce110_stream_encoder_update_hdmi_info_packets
-ffffffff81c85bf0 t dce110_stream_encoder_stop_hdmi_info_packets
-ffffffff81c85ea0 t dce110_stream_encoder_update_dp_info_packets
-ffffffff81c860b0 t dce110_stream_encoder_stop_dp_info_packets
-ffffffff81c86240 t dce110_stream_encoder_dp_blank
-ffffffff81c863f0 t dce110_stream_encoder_dp_unblank
-ffffffff81c866b0 t setup_stereo_sync
-ffffffff81c867a0 t dce110_stream_encoder_set_avmute
-ffffffff81c86840 t dce110_stream_encoder_set_stream_attribute_helper
-ffffffff81c869d0 t dce110_update_generic_info_packet
-ffffffff81c87000 T dce_transform_get_optimal_number_of_taps
-ffffffff81c87290 T dce110_opp_set_csc_adjustment
-ffffffff81c87350 t program_color_matrix
-ffffffff81c87590 T dce110_opp_set_csc_default
-ffffffff81c877a0 T dce110_opp_program_regamma_pwl
-ffffffff81c88140 T dce110_opp_power_on_regamma_lut
-ffffffff81c88240 T dce110_opp_set_regamma_mode
-ffffffff81c882b0 T dce_transform_construct
-ffffffff81c88320 t dce_transform_reset
-ffffffff81c88360 t dce_transform_set_scaler
-ffffffff81c88f20 t dce_transform_set_pixel_storage_depth
-ffffffff81c89440 t dce_transform_set_gamut_remap
-ffffffff81c897a0 t program_multi_taps_filter
-ffffffff81c8a000 T dce100_enable_display_power_gating
-ffffffff81c8a0b0 T dce100_set_bandwidth
-ffffffff81c8a2a0 t dce100_pplib_apply_display_requirements
-ffffffff81c8a320 T dce100_hw_sequencer_construct
-ffffffff81c8b000 T dce100_link_encoder_create
-ffffffff81c8b0b0 T dce100_opp_create
-ffffffff81c8b140 T dce100_aux_engine_create
-ffffffff81c8b1c0 T dce100_clock_source_create
-ffffffff81c8b2a0 T dce100_clock_source_destroy
-ffffffff81c8b2f0 T dce100_validate_bandwidth
-ffffffff81c8b440 T dce100_validate_global
-ffffffff81c8b4c0 T dce100_add_stream_to_ctx
-ffffffff81c8b550 T dce100_validate_plane
-ffffffff81c8b590 T dce100_create_resource_pool
-ffffffff81c8c130 t destruct
-ffffffff81c8c390 t dce100_destroy_resource_pool
-ffffffff81c8c3f0 t read_dce_straps
-ffffffff81c8c450 t create_audio
-ffffffff81c8c480 t dce100_stream_encoder_create
-ffffffff81c8c520 t dce100_hwseq_create
-ffffffff81c8d000 T dce110_compressor_power_up_fbc
-ffffffff81c8d150 T dce110_compressor_enable_fbc
-ffffffff81c8d330 T dce110_compressor_is_fbc_enabled_in_hw
-ffffffff81c8d3e0 T dce110_compressor_disable_fbc
-ffffffff81c8d630 T dce110_compressor_program_compressed_surface_address_and_pitch
-ffffffff81c8d750 T dce110_compressor_set_fbc_invalidation_triggers
-ffffffff81c8d7e0 T dce110_compressor_create
-ffffffff81c8d880 T dce110_compressor_construct
-ffffffff81c8d900 T dce110_compressor_destroy
-ffffffff81c8d950 T dce110_get_required_compressed_surfacesize
-ffffffff81c8d9b0 T get_max_support_fbc_buffersize
-ffffffff81c8d9e0 T controller_id_to_index
-ffffffff81c8e000 T dce110_update_info_frame
-ffffffff81c8e0c0 T dce110_enable_stream
-ffffffff81c8e230 T hwss_edp_wait_for_hpd_ready
-ffffffff81c8e450 T hwss_edp_power_control
-ffffffff81c8e6f0 T hwss_edp_backlight_control
-ffffffff81c8e860 T dce110_enable_audio_stream
-ffffffff81c8e900 T dce110_disable_audio_stream
-ffffffff81c8ea40 T dce110_disable_stream
-ffffffff81c8eb00 T dce110_unblank_stream
-ffffffff81c8ebd0 T dce110_blank_stream
-ffffffff81c8ec80 T dce110_set_avmute
-ffffffff81c8ecd0 T dce110_enable_accelerated_mode
-ffffffff81c8ef80 t power_down_all_hw_blocks
-ffffffff81c8f1a0 T dce110_set_safe_displaymarks
-ffffffff81c8f2f0 T dce110_apply_ctx_to_hw
-ffffffff81c8fc20 t enable_fbc
-ffffffff81c8fe10 T dce110_power_down
-ffffffff81c8ff00 T dce110_fill_display_configs
-ffffffff81c90140 T dce110_get_min_vblank_time_us
-ffffffff81c901b0 T dce110_set_cursor_position
-ffffffff81c902d0 T dce110_set_cursor_attribute
-ffffffff81c90390 T dce110_hw_sequencer_construct
-ffffffff81c903b0 t enable_display_pipe_clock_gating
-ffffffff81c903e0 t build_audio_output
-ffffffff81c90530 t init_hw
-ffffffff81c90780 t dce110_reset_hw_ctx_wrap
-ffffffff81c90970 t dce110_apply_ctx_for_surface
-ffffffff81c912e0 t program_gamut_remap
-ffffffff81c91430 t program_csc_matrix
-ffffffff81c91530 t update_plane_addr
-ffffffff81c915d0 t dce110_update_pending_status
-ffffffff81c91700 t dce110_set_input_transfer_func
-ffffffff81c918a0 t dce110_set_output_transfer_func
-ffffffff81c92250 t dce110_enable_timing_synchronization
-ffffffff81c92460 t dce110_enable_per_frame_crtc_position_reset
-ffffffff81c92680 t dce110_enable_display_power_gating
-ffffffff81c927f0 t dce110_power_down_fe
-ffffffff81c928b0 t dce110_set_bandwidth
-ffffffff81c92d00 t set_drr
-ffffffff81c92d90 t get_position
-ffffffff81c92e10 t set_static_screen_control
-ffffffff81c92ec0 t dce110_enable_stream_timing
-ffffffff81c93070 t dce110_wait_for_mpcc_disconnect
-ffffffff81c930a0 t ready_shared_resources
-ffffffff81c930d0 t optimize_shared_resources
-ffffffff81c93100 t pplib_apply_display_requirements
-ffffffff81c94000 T dce_mem_input_v_is_surface_pending
-ffffffff81c94090 T dce_mem_input_v_program_surface_flip_and_addr
-ffffffff81c94210 T dce_mem_input_v_program_pte_vm
-ffffffff81c944e0 T dce_mem_input_v_program_surface_config
-ffffffff81c94920 T dce_mem_input_v_program_display_marks
-ffffffff81c94b50 T dce_mem_input_program_chroma_display_marks
-ffffffff81c94d80 T dce110_allocate_mem_input_v
-ffffffff81c94ea0 T dce110_free_mem_input_v
-ffffffff81c94ed0 T dce110_mem_input_v_construct
-ffffffff81c94f00 t program_nbp_watermark
-ffffffff81c96000 T dce110_opp_v_set_csc_default
-ffffffff81c96450 t program_color_matrix_v
-ffffffff81c96600 T dce110_opp_v_set_csc_adjustment
-ffffffff81c97000 T dce110_opp_program_regamma_pwl_v
-ffffffff81c974e0 t power_on_lut
-ffffffff81c97610 T dce110_opp_power_on_regamma_lut_v
-ffffffff81c97670 T dce110_opp_set_regamma_mode_v
-ffffffff81c98000 T dce110_opp_v_construct
-ffffffff81c99000 T dce110_aux_engine_create
-ffffffff81c99080 T dce110_clock_source_create
-ffffffff81c99160 T dce110_clock_source_destroy
-ffffffff81c991f0 T dce110_resource_build_pipe_hw_param
-ffffffff81c99330 T dce110_validate_plane
-ffffffff81c99390 T dce110_validate_global
-ffffffff81c99450 T dce110_resource_cap
-ffffffff81c99490 T dce110_create_resource_pool
-ffffffff81c9a2b0 t destruct
-ffffffff81c9a580 t dce110_destroy_resource_pool
-ffffffff81c9a5e0 t dce110_link_encoder_create
-ffffffff81c9a690 t dce110_validate_bandwidth
-ffffffff81c9a730 t dce110_acquire_underlay
-ffffffff81c9a8e0 t dce110_add_stream_to_ctx
-ffffffff81c9a9a0 t read_dce_straps
-ffffffff81c9aa00 t create_audio
-ffffffff81c9aa30 t dce110_stream_encoder_create
-ffffffff81c9aad0 t dce110_hwseq_create
-ffffffff81c9b000 T dce110_timing_generator_set_early_control
-ffffffff81c9b070 T dce110_timing_generator_enable_crtc
-ffffffff81c9b100 T dce110_timing_generator_program_blank_color
-ffffffff81c9b190 T dce110_timing_generator_disable_crtc
-ffffffff81c9b1e0 T dce110_timing_generator_program_timing_generator
-ffffffff81c9b400 T dce110_timing_generator_set_drr
-ffffffff81c9b540 T dce110_timing_generator_set_static_screen_control
-ffffffff81c9b5b0 T dce110_timing_generator_get_vblank_counter
-ffffffff81c9b600 T dce110_timing_generator_get_position
-ffffffff81c9b690 T dce110_timing_generator_get_crtc_scanoutpos
-ffffffff81c9b770 T dce110_timing_generator_program_blanking
-ffffffff81c9b9b0 T dce110_timing_generator_set_test_pattern
-ffffffff81c9bcd0 T dce110_timing_generator_validate_timing
-ffffffff81c9bd80 T dce110_timing_generator_wait_for_vblank
-ffffffff81c9bed0 T dce110_timing_generator_is_counter_moving
-ffffffff81c9bf40 T dce110_timing_generator_wait_for_vactive
-ffffffff81c9c010 T dce110_timing_generator_setup_global_swap_lock
-ffffffff81c9c180 T dce110_timing_generator_tear_down_global_swap_lock
-ffffffff81c9c200 T dce110_timing_generator_enable_advanced_request
-ffffffff81c9c2a0 T dce110_timing_generator_set_lock_master
-ffffffff81c9c300 T dce110_timing_generator_enable_reset_trigger
-ffffffff81c9c3e0 T dce110_timing_generator_enable_crtc_reset
-ffffffff81c9c5d0 T dce110_timing_generator_disable_reset_trigger
-ffffffff81c9c6c0 T dce110_timing_generator_did_triggered_reset_occur
-ffffffff81c9c740 T dce110_timing_generator_disable_vga
-ffffffff81c9c7b0 T dce110_timing_generator_set_overscan_color_black
-ffffffff81c9c850 T dce110_tg_program_blank_color
-ffffffff81c9c910 T dce110_tg_set_overscan_color
-ffffffff81c9c960 T dce110_tg_program_timing
-ffffffff81c9c980 T dce110_tg_is_blanked
-ffffffff81c9c9e0 T dce110_tg_set_blank
-ffffffff81c9ca50 T dce110_tg_validate_timing
-ffffffff81c9cb00 T dce110_tg_wait_for_state
-ffffffff81c9cc00 T dce110_tg_set_colors
-ffffffff81c9cd50 T dce110_arm_vert_intr
-ffffffff81c9ce10 T dce110_configure_crc
-ffffffff81c9cf80 t dce110_is_tg_enabled
-ffffffff81c9cfd0 T dce110_get_crc
-ffffffff81c9d090 T dce110_timing_generator_construct
-ffffffff81c9e000 T dce110_timing_generator_v_construct
-ffffffff81c9e060 t dce110_timing_generator_v_program_timing
-ffffffff81c9e300 t dce110_timing_generator_v_enable_crtc
-ffffffff81c9e390 t dce110_timing_generator_v_disable_crtc
-ffffffff81c9e400 t dce110_timing_generator_v_is_counter_moving
-ffffffff81c9e480 t dce110_timing_generator_v_get_vblank_counter
-ffffffff81c9e4d0 t dce110_timing_generator_v_set_early_control
-ffffffff81c9e530 t dce110_timing_generator_v_wait_for_state
-ffffffff81c9e6c0 t dce110_timing_generator_v_set_blank
-ffffffff81c9e720 t dce110_timing_generator_v_set_overscan_color_black
-ffffffff81c9e7c0 t dce110_timing_generator_v_program_blank_color
-ffffffff81c9e840 t dce110_timing_generator_v_set_colors
-ffffffff81c9e980 t dce110_timing_generator_v_disable_vga
-ffffffff81c9e9b0 t dce110_timing_generator_v_did_triggered_reset_occur
-ffffffff81c9e9f0 t dce110_timing_generator_v_setup_global_swap_lock
-ffffffff81c9ea10 t dce110_timing_generator_v_enable_reset_trigger
-ffffffff81c9ea30 t dce110_timing_generator_v_disable_reset_trigger
-ffffffff81c9ea50 t dce110_timing_generator_v_tear_down_global_swap_lock
-ffffffff81c9ea70 t dce110_timing_generator_v_enable_advanced_request
-ffffffff81c9f000 T dce110_transform_v_construct
-ffffffff81c9f060 t dce110_xfmv_reset
-ffffffff81c9f0b0 t dce110_xfmv_set_scaler
-ffffffff81c9fa10 t dce110_xfmv_set_pixel_storage_depth
-ffffffff81c9faf0 t dce110_xfmv_set_gamut_remap
-ffffffff81c9fb20 t program_multi_taps_filter
-ffffffff81ca0000 T dce112_compressor_power_up_fbc
-ffffffff81ca0150 T dce112_compressor_enable_fbc
-ffffffff81ca04f0 T dce112_compressor_is_fbc_enabled_in_hw
-ffffffff81ca05a0 T dce112_compressor_enable_lpt
-ffffffff81ca06c0 T dce112_compressor_disable_fbc
-ffffffff81ca09b0 T dce112_compressor_disable_lpt
-ffffffff81ca0b30 T dce112_compressor_is_lpt_enabled_in_hw
-ffffffff81ca0b80 T dce112_compressor_program_compressed_surface_address_and_pitch
-ffffffff81ca0cd0 T dce112_compressor_program_lpt_control
-ffffffff81ca0f40 T dce112_compressor_set_fbc_invalidation_triggers
-ffffffff81ca0fd0 T dce112_compressor_construct
-ffffffff81ca1090 T dce112_compressor_create
-ffffffff81ca1180 T dce112_compressor_destroy
-ffffffff81ca2000 T dce112_hw_sequencer_construct
-ffffffff81ca2040 t dce112_enable_display_power_gating
-ffffffff81ca3000 T dce112_link_encoder_create
-ffffffff81ca30b0 T dce112_opp_create
-ffffffff81ca3140 T dce112_aux_engine_create
-ffffffff81ca31c0 T dce112_clock_source_create
-ffffffff81ca32a0 T dce112_clock_source_destroy
-ffffffff81ca32f0 T dce112_validate_bandwidth
-ffffffff81ca3390 T resource_map_phy_clock_resources
-ffffffff81ca34d0 T dce112_add_stream_to_ctx
-ffffffff81ca3560 T dce112_validate_global
-ffffffff81ca35e0 T dce112_resource_cap
-ffffffff81ca3630 T dce112_create_resource_pool
-ffffffff81ca4860 t destruct
-ffffffff81ca4ac0 t dce112_destroy_resource_pool
-ffffffff81ca4b20 t read_dce_straps
-ffffffff81ca4b80 t create_audio
-ffffffff81ca4bb0 t dce112_stream_encoder_create
-ffffffff81ca4c50 t dce112_hwseq_create
-ffffffff81ca5000 T dce120_hw_sequencer_construct
-ffffffff81ca5050 t dce120_enable_display_power_gating
-ffffffff81ca5080 t dce120_update_dchub
-ffffffff81ca6000 T dce120_opp_create
-ffffffff81ca6090 T dce120_aux_engine_create
-ffffffff81ca6110 T dce120_clock_source_create
-ffffffff81ca61f0 T dce120_clock_source_destroy
-ffffffff81ca6240 T dce120_hw_sequencer_create
-ffffffff81ca6280 T dce120_create_resource_pool
-ffffffff81ca73b0 t destruct
-ffffffff81ca7620 t dce120_destroy_resource_pool
-ffffffff81ca7680 t dce120_link_encoder_create
-ffffffff81ca7730 t read_dce_straps
-ffffffff81ca77b0 t create_audio
-ffffffff81ca77e0 t dce120_stream_encoder_create
-ffffffff81ca7880 t dce120_hwseq_create
-ffffffff81ca8000 T dce120_timing_generator_validate_timing
-ffffffff81ca80b0 T dce120_tg_validate_timing
-ffffffff81ca8160 T dce120_timing_generator_enable_crtc
-ffffffff81ca8260 T dce120_timing_generator_set_early_control
-ffffffff81ca82f0 T dce120_timing_generator_get_vblank_counter
-ffffffff81ca8340 T dce120_timing_generator_get_crtc_position
-ffffffff81ca83d0 T dce120_timing_generator_wait_for_vblank
-ffffffff81ca8490 T dce120_timing_generator_wait_for_vactive
-ffffffff81ca8510 T dce120_timing_generator_setup_global_swap_lock
-ffffffff81ca8670 T dce120_timing_generator_tear_down_global_swap_lock
-ffffffff81ca8740 T dce120_timing_generator_enable_reset_trigger
-ffffffff81ca88a0 T dce120_timing_generator_disable_reset_trigger
-ffffffff81ca89a0 T dce120_timing_generator_did_triggered_reset_occur
-ffffffff81ca89f0 T dce120_timing_generator_disable_vga
-ffffffff81ca8a60 T dce120_timing_generator_program_blanking
-ffffffff81ca8d10 T dce120_timing_generator_program_blank_color
-ffffffff81ca8dc0 T dce120_timing_generator_set_overscan_color_black
-ffffffff81ca8ea0 T dce120_timing_generator_set_drr
-ffffffff81ca91b0 T dce120_timing_generator_get_position
-ffffffff81ca9240 T dce120_timing_generator_get_crtc_scanoutpos
-ffffffff81ca9320 T dce120_timing_generator_enable_advanced_request
-ffffffff81ca93c0 T dce120_tg_program_blank_color
-ffffffff81ca94a0 T dce120_tg_set_overscan_color
-ffffffff81ca9530 T dce120_tg_program_timing
-ffffffff81ca9550 T dce120_tg_is_blanked
-ffffffff81ca95b0 T dce120_tg_set_blank
-ffffffff81ca9670 T dce120_tg_wait_for_state
-ffffffff81ca9780 T dce120_tg_set_colors
-ffffffff81ca98f0 T dce120_timing_generator_set_test_pattern
-ffffffff81ca9e90 T dce120_timing_generator_construct
-ffffffff81ca9f10 t dce120_timing_generator_set_static_screen_control
-ffffffff81ca9fa0 t dce120_arm_vert_intr
-ffffffff81cab000 T dce80_hw_sequencer_construct
-ffffffff81cac000 T dce80_aux_engine_create
-ffffffff81cac080 T dce80_link_encoder_create
-ffffffff81cac130 T dce80_clock_source_create
-ffffffff81cac210 T dce80_clock_source_destroy
-ffffffff81cac260 T dce80_validate_bandwidth
-ffffffff81cac2a0 T dce80_validate_global
-ffffffff81cac320 T dce80_create_resource_pool
-ffffffff81cacec0 T dce81_create_resource_pool
-ffffffff81cada60 T dce83_create_resource_pool
-ffffffff81cae4d0 t destruct
-ffffffff81cae730 t dce80_destroy_resource_pool
-ffffffff81cae790 t read_dce_straps
-ffffffff81cae7f0 t create_audio
-ffffffff81cae820 t dce80_stream_encoder_create
-ffffffff81cae8c0 t dce80_hwseq_create
-ffffffff81caf000 T dce80_timing_generator_construct
-ffffffff81caf090 t program_timing
-ffffffff81caf130 t dce80_timing_generator_enable_advanced_request
-ffffffff81cb0000 T cm_helper_program_color_matrices
-ffffffff81cb00d0 T cm_helper_program_xfer_func
-ffffffff81cb0490 T cm_helper_convert_to_custom_float
-ffffffff81cb0880 T cm_helper_translate_curve_to_hw_format
-ffffffff81cb1060 T cm_helper_translate_curve_to_degamma_hw_format
-ffffffff81cb2000 T dpp_read_state
-ffffffff81cb2210 T dpp_set_gamut_remap_bypass
-ffffffff81cb2280 T dpp_reset
-ffffffff81cb22f0 T dpp1_cnv_setup
-ffffffff81cb28a0 T dpp1_set_cursor_attributes
-ffffffff81cb2a30 T dpp1_set_cursor_position
-ffffffff81cb2af0 T dpp1_cnv_set_optional_cursor_attributes
-ffffffff81cb2c00 T dpp1_dppclk_control
-ffffffff81cb2d80 T dpp1_construct
-ffffffff81cb2df0 t dpp_get_optimal_number_of_taps
-ffffffff81cb2f90 t dpp1_cm_set_regamma_pwl
-ffffffff81cb4000 T dpp1_cm_set_gamut_remap
-ffffffff81cb41a0 T dpp1_cm_set_output_csc_default
-ffffffff81cb4220 t dpp1_cm_program_color_matrix
-ffffffff81cb43d0 T dpp1_cm_set_output_csc_adjustment
-ffffffff81cb43e0 T dpp1_cm_power_on_regamma_lut
-ffffffff81cb4460 T dpp1_cm_program_regamma_lut
-ffffffff81cb4670 T dpp1_cm_configure_regamma_lut
-ffffffff81cb47c0 T dpp1_cm_program_regamma_luta_settings
-ffffffff81cb4950 T dpp1_cm_program_regamma_lutb_settings
-ffffffff81cb4ae0 T dpp1_program_input_csc
-ffffffff81cb4d30 T dpp1_program_bias_and_scale
-ffffffff81cb4ea0 T dpp1_program_degamma_lutb_settings
-ffffffff81cb5040 T dpp1_program_degamma_luta_settings
-ffffffff81cb51e0 T dpp1_power_on_degamma_lut
-ffffffff81cb5260 T dpp1_set_degamma
-ffffffff81cb54c0 T dpp1_degamma_ram_select
-ffffffff81cb5580 T dpp1_program_degamma_lut
-ffffffff81cb5920 T dpp1_set_degamma_pwl
-ffffffff81cb5b60 T dpp1_full_bypass
-ffffffff81cb5cf0 T dpp1_program_input_lut
-ffffffff81cb64b0 T dpp1_set_hdr_multiplier
-ffffffff81cb7000 T dpp1_dscl_calc_lb_num_partitions
-ffffffff81cb71e0 T dpp1_dscl_is_lb_conf_valid
-ffffffff81cb7220 T dpp1_dscl_set_scaler_auto_scale
-ffffffff81cb7710 t dpp1_dscl_find_lb_memory_config
-ffffffff81cb79d0 t dpp1_dscl_set_lb
-ffffffff81cb7be0 t dpp1_dscl_set_scl_filter
-ffffffff81cb8010 T dpp1_dscl_set_scaler_manual_scale
-ffffffff81cb8990 t dpp1_dscl_get_filter_coeffs_64p
-ffffffff81cb8a60 t dpp1_dscl_set_scaler_filter
-ffffffff81cb9000 T hubbub1_wm_read_state
-ffffffff81cb9320 T hubbub1_verify_allow_pstate_change_high
-ffffffff81cb94f0 T hubbub1_wm_change_req_wa
-ffffffff81cb95c0 T hubbub1_program_watermarks
-ffffffff81cb9e10 T hubbub1_update_dchub
-ffffffff81cba150 T hubbub1_toggle_watermark_change_req
-ffffffff81cba210 T hubbub1_soft_reset
-ffffffff81cba2b0 T hubbub1_construct
-ffffffff81cba300 t hubbub1_get_dcc_compression_cap
-ffffffff81cba4f0 t hubbub1_dcc_support_swizzle
-ffffffff81cba5a0 t hubbub1_dcc_support_pixel_format
-ffffffff81cbb000 T hubp1_set_blank
-ffffffff81cbb130 T hubp1_program_tiling
-ffffffff81cbb3f0 T hubp1_program_size
-ffffffff81cbb5b0 T hubp1_program_rotation
-ffffffff81cbb7c0 T hubp1_program_pixel_format
-ffffffff81cbbcb0 T hubp1_program_surface_flip_and_addr
-ffffffff81cbc4f0 T hubp1_dcc_control
-ffffffff81cbc5e0 T hubp1_program_surface_config
-ffffffff81cbc730 T hubp1_program_requestor
-ffffffff81cbcb40 T hubp1_program_deadline
-ffffffff81cbd590 T hubp1_is_flip_pending
-ffffffff81cbd670 T min_set_viewport
-ffffffff81cbd8c0 T hubp1_read_state
-ffffffff81cbe590 T hubp1_get_cursor_pitch
-ffffffff81cbe630 T hubp1_cursor_set_attributes
-ffffffff81cbe990 T hubp1_cursor_set_position
-ffffffff81cbec80 T hubp1_clk_cntl
-ffffffff81cbed30 T hubp1_vtg_sel
-ffffffff81cbedd0 T dcn10_hubp_construct
-ffffffff81cbee30 t hubp1_setup
-ffffffff81cbeef0 t hubp1_set_vm_system_aperture_settings
-ffffffff81cbf120 t hubp1_set_vm_context0_settings
-ffffffff81cbf410 t hubp1_set_hubp_blank_en
-ffffffff81cbf4b0 t hubp1_disconnect
-ffffffff81cbf5b0 t hubp1_disable_control
-ffffffff81cbf650 t hubp1_get_underflow_status
-ffffffff81cc0000 T print_microsec
-ffffffff81cc0060 T dcn10_log_hubbub_state
-ffffffff81cc02e0 T dcn10_log_hw_state
-ffffffff81cc1220 T dcn10_verify_allow_pstate_change_high
-ffffffff81cc1520 T hwss1_plane_atomic_disconnect
-ffffffff81cc1620 T is_rgb_cspace
-ffffffff81cc16a0 T build_prescale_params
-ffffffff81cc1840 T dcn10_program_pipe
-ffffffff81cc2330 T dcn10_hw_sequencer_construct
-ffffffff81cc2350 t hubp_pg_control
-ffffffff81cc2650 t dpp_pg_control
-ffffffff81cc2950 t program_gamut_remap
-ffffffff81cc2aa0 t is_upper_pipe_tree_visible
-ffffffff81cc2b00 t is_lower_pipe_tree_visible
-ffffffff81cc2b60 t dcn10_init_hw
-ffffffff81cc3550 t reset_hw_ctx_wrap
-ffffffff81cc3770 t dcn10_apply_ctx_for_surface
-ffffffff81cc3d00 t program_csc_matrix
-ffffffff81cc3d60 t dcn10_program_output_csc
-ffffffff81cc3dd0 t dcn10_update_plane_addr
-ffffffff81cc3f50 t dcn10_update_dchub
-ffffffff81cc3fc0 t dcn10_update_mpcc
-ffffffff81cc42d0 t dcn10_update_pending_status
-ffffffff81cc43d0 t dcn10_set_input_transfer_func
-ffffffff81cc4510 t dcn10_set_output_transfer_func
-ffffffff81cc45d0 t dcn10_enable_timing_synchronization
-ffffffff81cc4730 t dcn10_enable_per_frame_crtc_position_reset
-ffffffff81cc4890 t dcn10_dummy_display_power_gating
-ffffffff81cc48c0 t dcn10_disable_plane
-ffffffff81cc4bd0 t dcn10_pipe_control_lock
-ffffffff81cc4c70 t dcn10_blank_pixel_data
-ffffffff81cc4d80 t dcn10_set_bandwidth
-ffffffff81cc4e70 t set_drr
-ffffffff81cc4f00 t get_position
-ffffffff81cc4f80 t set_static_screen_control
-ffffffff81cc5020 t dcn10_enable_stream_timing
-ffffffff81cc5300 t dcn10_setup_stereo
-ffffffff81cc5400 t dcn10_wait_for_mpcc_disconnect
-ffffffff81cc5550 t ready_shared_resources
-ffffffff81cc55a0 t optimize_shared_resources
-ffffffff81cc5610 t dcn10_pplib_apply_display_requirements
-ffffffff81cc5710 t dcn10_set_cursor_position
-ffffffff81cc5830 t dcn10_set_cursor_attribute
-ffffffff81cc5880 t dcn10_set_cursor_sdr_white_level
-ffffffff81cc5950 t enable_power_gating_plane
-ffffffff81cc6000 T dcn10_ipp_construct
-ffffffff81cc6050 t dcn10_ipp_destroy
-ffffffff81cc7000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern
-ffffffff81cc7150 T configure_encoder
-ffffffff81cc7220 T dcn10_psr_program_dp_dphy_fast_training
-ffffffff81cc7320 T dcn10_psr_program_secondary_packet
-ffffffff81cc73d0 T dcn10_is_dig_enabled
-ffffffff81cc7430 T dcn10_link_encoder_validate_dvi_output
-ffffffff81cc74d0 T dcn10_link_encoder_validate_dp_output
-ffffffff81cc7510 T dcn10_link_encoder_construct
-ffffffff81cc7700 T dcn10_link_encoder_validate_output_with_stream
-ffffffff81cc7890 T dcn10_link_encoder_hw_init
-ffffffff81cc7b00 T dcn10_aux_initialize
-ffffffff81cc7c00 T dcn10_link_encoder_destroy
-ffffffff81cc7c50 T dcn10_link_encoder_setup
-ffffffff81cc7e40 T dcn10_link_encoder_enable_tmds_output
-ffffffff81cc7f20 T dcn10_link_encoder_enable_dp_output
-ffffffff81cc80d0 T dcn10_link_encoder_enable_dp_mst_output
-ffffffff81cc8280 T dcn10_link_encoder_disable_output
-ffffffff81cc84b0 T dcn10_link_encoder_dp_set_lane_settings
-ffffffff81cc8640 T dcn10_link_encoder_dp_set_phy_pattern
-ffffffff81cc9070 t set_dp_phy_pattern_hbr2_compliance_cp2520_2
-ffffffff81cc93d0 T dcn10_link_encoder_update_mst_stream_allocation_table
-ffffffff81cc9780 T dcn10_link_encoder_connect_dig_be_to_fe
-ffffffff81cc98a0 T dcn10_link_encoder_enable_hpd
-ffffffff81cc9930 T dcn10_link_encoder_disable_hpd
-ffffffff81cc99c0 t program_pattern_symbols
-ffffffff81cca000 T mpc1_set_bg_color
-ffffffff81cca120 T mpc1_update_stereo_mix
-ffffffff81cca290 T mpc1_assert_idle_mpcc
-ffffffff81cca350 T mpc1_get_mpcc
-ffffffff81cca3d0 T mpc1_get_mpcc_for_dpp
-ffffffff81cca420 T mpc1_is_mpcc_idle
-ffffffff81cca500 T mpc1_assert_mpcc_idle_before_connect
-ffffffff81cca610 T mpc1_insert_plane
-ffffffff81ccac30 T mpc1_remove_mpcc
-ffffffff81ccaf10 T mpc1_mpc_init
-ffffffff81ccb0f0 T mpc1_init_mpcc_list_from_hw
-ffffffff81ccb3a0 T mpc1_read_mpcc_state
-ffffffff81ccb530 T dcn10_mpc_construct
-ffffffff81ccb6d0 t mpc1_update_blending
-ffffffff81ccc000 T opp1_program_bit_depth_reduction
-ffffffff81ccc500 T opp1_set_dyn_expansion
-ffffffff81ccc6b0 T opp1_program_fmt
-ffffffff81ccca90 T opp1_program_stereo
-ffffffff81cccc20 T opp1_program_oppbuf
-ffffffff81cccdd0 T opp1_pipe_clock_control
-ffffffff81ccce70 T opp1_destroy
-ffffffff81cccec0 T dcn10_opp_construct
-ffffffff81ccd000 T optc1_program_global_sync
-ffffffff81ccd130 T optc1_program_vline_interrupt
-ffffffff81ccd2d0 T optc1_program_timing
-ffffffff81ccda70 T optc1_set_blank_data_double_buffer
-ffffffff81ccdb00 T optc1_set_blank
-ffffffff81ccdcf0 T optc1_is_blanked
-ffffffff81ccdd70 T optc1_enable_optc_clock
-ffffffff81ccdfe0 T optc1_disable_crtc
-ffffffff81cce120 T optc1_program_blank_color
-ffffffff81cce1d0 T optc1_validate_timing
-ffffffff81cce2c0 T optc1_get_vblank_counter
-ffffffff81cce320 T optc1_lock
-ffffffff81cce410 T optc1_unlock
-ffffffff81cce480 T optc1_get_position
-ffffffff81cce500 T optc1_is_counter_moving
-ffffffff81cce570 T optc1_did_triggered_reset_occur
-ffffffff81cce600 T optc1_disable_reset_trigger
-ffffffff81cce6c0 T optc1_enable_reset_trigger
-ffffffff81cce7e0 T optc1_enable_crtc_reset
-ffffffff81cce940 T optc1_wait_for_state
-ffffffff81ccea00 T optc1_set_early_control
-ffffffff81ccea30 T optc1_set_static_screen_control
-ffffffff81cceac0 T optc1_set_drr
-ffffffff81cced60 T optc1_get_crtc_scanoutpos
-ffffffff81ccee60 T optc1_program_stereo
-ffffffff81ccf140 T optc1_is_stereo_left_eye
-ffffffff81ccf1b0 T optc1_read_otg_state
-ffffffff81ccf420 T optc1_get_otg_active_size
-ffffffff81ccf530 T optc1_clear_optc_underflow
-ffffffff81ccf5d0 T optc1_tg_init
-ffffffff81ccf6c0 T optc1_is_tg_enabled
-ffffffff81ccf720 T optc1_is_optc_underflow_occurred
-ffffffff81ccf790 T optc1_configure_crc
-ffffffff81ccfac0 T optc1_get_crc
-ffffffff81ccfbb0 T dcn10_timing_generator_init
-ffffffff81ccfc20 t optc1_enable_crtc
-ffffffff81ccfd70 t optc1_set_test_pattern
-ffffffff81cd1000 T dcn10_aux_engine_create
-ffffffff81cd1080 T dcn10_link_encoder_create
-ffffffff81cd1130 T dcn10_clock_source_create
-ffffffff81cd1210 T dcn10_clock_source_destroy
-ffffffff81cd1260 T dcn10_add_stream_to_ctx
-ffffffff81cd1400 T dcn10_create_resource_pool
-ffffffff81cd2220 t destruct
-ffffffff81cd2520 t dcn10_destroy_resource_pool
-ffffffff81cd2580 t dcn10_acquire_idle_pipe_for_layer
-ffffffff81cd26a0 t dcn10_validate_plane
-ffffffff81cd26f0 t read_dce_straps
-ffffffff81cd2710 t create_audio
-ffffffff81cd2740 t dcn10_stream_encoder_create
-ffffffff81cd27e0 t dcn10_hwseq_create
-ffffffff81cd2850 t dcn10_get_dcc_compression_cap
-ffffffff81cd3000 T enc1_update_generic_info_packet
-ffffffff81cd3560 T enc1_stream_encoder_dp_set_stream_attribute
-ffffffff81cd3a20 T enc1_stream_encoder_hdmi_set_stream_attribute
-ffffffff81cd4070 t enc1_stream_encoder_set_stream_attribute_helper
-ffffffff81cd4170 T enc1_stream_encoder_dvi_set_stream_attribute
-ffffffff81cd4270 T enc1_stream_encoder_set_mst_bandwidth
-ffffffff81cd4450 T enc1_stream_encoder_update_dp_info_packets
-ffffffff81cd4660 T enc1_stream_encoder_stop_dp_info_packets
-ffffffff81cd4840 T enc1_stream_encoder_dp_blank
-ffffffff81cd49f0 T enc1_stream_encoder_dp_unblank
-ffffffff81cd4cb0 T enc1_stream_encoder_set_avmute
-ffffffff81cd4d50 T enc1_se_audio_mute_control
-ffffffff81cd4df0 T enc1_se_dp_audio_setup
-ffffffff81cd4e00 t enc1_se_audio_setup
-ffffffff81cd4f80 T enc1_se_dp_audio_enable
-ffffffff81cd5310 T enc1_se_dp_audio_disable
-ffffffff81cd54e0 T enc1_se_hdmi_audio_setup
-ffffffff81cd5bc0 T enc1_se_hdmi_audio_disable
-ffffffff81cd5c60 T enc1_setup_stereo_sync
-ffffffff81cd5d50 T dcn10_stream_encoder_construct
-ffffffff81cd5da0 t enc1_stream_encoder_update_hdmi_info_packets
-ffffffff81cd61d0 t enc1_stream_encoder_stop_hdmi_info_packets
-ffffffff81cd7000 T dml_init_instance
-ffffffff81cd8000 T print__rq_params_st
-ffffffff81cd8030 T print__data_rq_sizing_params_st
-ffffffff81cd8060 T print__data_rq_dlg_params_st
-ffffffff81cd8090 T print__data_rq_misc_params_st
-ffffffff81cd80c0 T print__rq_dlg_params_st
-ffffffff81cd80f0 T print__dlg_sys_params_st
-ffffffff81cd8120 T print__data_rq_regs_st
-ffffffff81cd8150 T print__rq_regs_st
-ffffffff81cd8180 T print__dlg_regs_st
-ffffffff81cd81b0 T print__ttu_regs_st
-ffffffff81cd9000 T dml1_extract_rq_regs
-ffffffff81cd91d0 t extract_rq_sizing_regs
-ffffffff81cd9370 T dml1_rq_dlg_get_rq_params
-ffffffff81cd95e0 t get_surf_rq_param
-ffffffff81cda2d0 T dml1_rq_dlg_get_dlg_params
-ffffffff81cdd000 T dml_round
-ffffffff81cde000 T dal_hw_factory_dce110_init
-ffffffff81cde060 t define_hpd_registers
-ffffffff81cde0b0 t define_ddc_registers
-ffffffff81cdf000 T dal_hw_translate_dce110_init
-ffffffff81cdf030 t offset_to_id
-ffffffff81cdf390 t id_to_offset
-ffffffff81ce0000 T dal_hw_factory_dce120_init
-ffffffff81ce0060 t define_hpd_registers
-ffffffff81ce00b0 t define_ddc_registers
-ffffffff81ce1000 T dal_hw_translate_dce120_init
-ffffffff81ce1030 t offset_to_id
-ffffffff81ce13a0 t id_to_offset
-ffffffff81ce2000 T dal_hw_factory_dce80_init
-ffffffff81ce2060 t define_hpd_registers
-ffffffff81ce20b0 t define_ddc_registers
-ffffffff81ce3000 T dal_hw_translate_dce80_init
-ffffffff81ce3030 t offset_to_id
-ffffffff81ce3730 t id_to_offset
-ffffffff81ce4000 T dal_hw_factory_dcn10_init
-ffffffff81ce4060 t define_hpd_registers
-ffffffff81ce40b0 t define_ddc_registers
-ffffffff81ce5000 T dal_hw_translate_dcn10_init
-ffffffff81ce5030 t offset_to_id
-ffffffff81ce5390 t id_to_offset
-ffffffff81ce6000 T dal_hw_factory_diag_fpga_init
-ffffffff81ce7000 T dal_hw_translate_diag_fpga_init
-ffffffff81ce8000 T dal_gpio_open
-ffffffff81ce8080 T dal_gpio_open_ex
-ffffffff81ce8100 T dal_gpio_get_value
-ffffffff81ce8170 T dal_gpio_set_value
-ffffffff81ce81e0 T dal_gpio_get_mode
-ffffffff81ce8210 T dal_gpio_change_mode
-ffffffff81ce8280 T dal_gpio_get_id
-ffffffff81ce82b0 T dal_gpio_get_enum
-ffffffff81ce82e0 T dal_gpio_set_config
-ffffffff81ce8350 T dal_gpio_get_pin_info
-ffffffff81ce83a0 T dal_gpio_get_sync_source
-ffffffff81ce8430 T dal_gpio_get_output_state
-ffffffff81ce8460 T dal_gpio_close
-ffffffff81ce84b0 T dal_gpio_create
-ffffffff81ce8560 T dal_gpio_destroy
-ffffffff81ce9000 T dal_gpio_service_create
-ffffffff81ce9230 T dal_gpio_service_create_irq
-ffffffff81ce9330 T dal_gpio_create_irq
-ffffffff81ce93d0 T dal_gpio_service_destroy
-ffffffff81ce94f0 T dal_gpio_service_open
-ffffffff81ce9810 T dal_gpio_service_close
-ffffffff81ce98d0 T dal_irq_get_source
-ffffffff81ce9940 T dal_irq_get_rx_source
-ffffffff81ce9990 T dal_irq_setup_hpd_filter
-ffffffff81ce99f0 T dal_gpio_destroy_irq
-ffffffff81ce9a80 T dal_gpio_create_ddc
-ffffffff81ce9bf0 T dal_gpio_destroy_ddc
-ffffffff81ce9cb0 T dal_ddc_close
-ffffffff81ce9ce0 T dal_ddc_open
-ffffffff81ce9e30 T dal_ddc_change_mode
-ffffffff81ce9ed0 T dal_ddc_get_line
-ffffffff81ce9ee0 T dal_ddc_set_config
-ffffffff81cea000 T dal_hw_ddc_create
-ffffffff81cea0e0 t destroy
-ffffffff81cea140 t set_config
-ffffffff81ceb000 T dal_hw_factory_init
-ffffffff81ceb0b0 T dal_hw_factory_destroy
-ffffffff81cec000 T dal_hw_gpio_open
-ffffffff81cec0a0 T dal_hw_gpio_config_mode
-ffffffff81cec220 T dal_hw_gpio_get_value
-ffffffff81cec280 T dal_hw_gpio_set_value
-ffffffff81cec360 T dal_hw_gpio_change_mode
-ffffffff81cec370 T dal_hw_gpio_close
-ffffffff81cec4a0 T dal_hw_gpio_construct
-ffffffff81cec4f0 T dal_hw_gpio_destruct
-ffffffff81ced000 T dal_hw_hpd_create
-ffffffff81ced110 t destroy
-ffffffff81ced170 t get_value
-ffffffff81ced1f0 t set_config
-ffffffff81cee000 T dal_hw_translate_init
-ffffffff81cef000 T dal_aux_engine_get_engine_type
-ffffffff81cef030 T dal_aux_engine_acquire
-ffffffff81cef0d0 T dal_aux_engine_submit_request
-ffffffff81cef1b0 t read_command
-ffffffff81cef570 t write_command
-ffffffff81cef930 T dal_aux_engine_construct
-ffffffff81cef970 T dal_aux_engine_destruct
-ffffffff81cf0000 T dal_i2caux_dce100_create
-ffffffff81cf1000 T dal_aux_engine_dce110_create
-ffffffff81cf10e0 t release_engine
-ffffffff81cf1160 t destroy
-ffffffff81cf11c0 t acquire_engine
-ffffffff81cf1380 t submit_channel_request
-ffffffff81cf1910 t process_channel_reply
-ffffffff81cf19f0 t read_channel_reply
-ffffffff81cf1bd0 t get_channel_status
-ffffffff81cf1cf0 t is_engine_available
-ffffffff81cf2000 T dal_i2c_hw_engine_dce110_create
-ffffffff81cf21a0 t release_engine
-ffffffff81cf2370 t destroy
-ffffffff81cf23d0 t get_speed
-ffffffff81cf2450 t set_speed
-ffffffff81cf2590 t setup_engine
-ffffffff81cf2770 t submit_channel_request
-ffffffff81cf2d30 t process_channel_reply
-ffffffff81cf2e30 t get_channel_status
-ffffffff81cf2ec0 t get_hw_buffer_available_size
-ffffffff81cf2ef0 t get_transaction_timeout
-ffffffff81cf3000 T dal_i2c_sw_engine_dce110_create
-ffffffff81cf30f0 t release_engine
-ffffffff81cf3120 t destroy
-ffffffff81cf3180 t acquire_engine
-ffffffff81cf4000 T dal_i2caux_dce110_construct
-ffffffff81cf41d0 T dal_i2caux_dce110_create
-ffffffff81cf4280 t destroy
-ffffffff81cf42e0 t acquire_i2c_hw_engine
-ffffffff81cf4370 t release_engine
-ffffffff81cf5000 T dal_i2caux_dce112_create
-ffffffff81cf6000 T dal_i2caux_dce120_create
-ffffffff81cf7000 T dal_i2c_hw_engine_dce80_create
-ffffffff81cf7170 t release_engine
-ffffffff81cf72c0 t destroy
-ffffffff81cf7320 t get_speed
-ffffffff81cf7380 t set_speed
-ffffffff81cf7410 t setup_engine
-ffffffff81cf7510 t submit_channel_request
-ffffffff81cf7800 t process_channel_reply
-ffffffff81cf78c0 t get_channel_status
-ffffffff81cf7940 t get_hw_buffer_available_size
-ffffffff81cf7970 t get_transaction_timeout
-ffffffff81cf8000 T dal_i2c_sw_engine_dce80_create
-ffffffff81cf80f0 t release_engine
-ffffffff81cf8120 t destroy
-ffffffff81cf8180 t acquire_engine
-ffffffff81cf9000 T dal_i2caux_dce80_create
-ffffffff81cf93c0 t destroy
-ffffffff81cf9420 t acquire_i2c_hw_engine
-ffffffff81cf94d0 t release_engine
-ffffffff81cfa000 T dal_i2caux_dcn10_create
-ffffffff81cfb000 T dal_i2caux_diag_fpga_create
-ffffffff81cfb0a0 t destroy
-ffffffff81cfc000 T dal_i2caux_construct_engine
-ffffffff81cfc030 T dal_i2caux_destruct_engine
-ffffffff81cfd000 T dal_i2c_engine_acquire
-ffffffff81cfd0b0 T dal_i2c_engine_setup_i2c_engine
-ffffffff81cfd0e0 T dal_i2c_engine_submit_channel_request
-ffffffff81cfd110 T dal_i2c_engine_process_channel_reply
-ffffffff81cfd140 T dal_i2c_engine_construct
-ffffffff81cfd180 T dal_i2c_engine_destruct
-ffffffff81cfe000 T dal_i2c_generic_hw_engine_get_engine_type
-ffffffff81cfe030 T dal_i2c_generic_hw_engine_submit_request
-ffffffff81cfe250 T dal_i2c_generic_hw_engine_get_transaction_timeout
-ffffffff81cfe2b0 T dal_i2c_generic_hw_engine_construct
-ffffffff81cfe2c0 T dal_i2c_generic_hw_engine_destruct
-ffffffff81cff000 T dal_i2c_hw_engine_get_engine_type
-ffffffff81cff030 T dal_i2c_hw_engine_submit_request
-ffffffff81cff1c0 T dal_i2c_hw_engine_acquire_engine
-ffffffff81cff240 T dal_i2c_hw_engine_wait_on_operation_result
-ffffffff81cff2d0 T dal_i2c_hw_engine_construct
-ffffffff81cff310 T dal_i2c_hw_engine_destruct
-ffffffff81d00000 T dal_i2c_sw_engine_get_engine_type
-ffffffff81d00030 T dal_i2c_sw_engine_submit_request
-ffffffff81d00170 T dal_i2c_sw_engine_get_speed
-ffffffff81d001a0 T dal_i2c_sw_engine_set_speed
-ffffffff81d00230 T dal_i2caux_i2c_sw_engine_acquire_engine
-ffffffff81d00290 T dal_i2c_sw_engine_submit_channel_request
-ffffffff81d009b0 T dal_i2c_sw_engine_get_channel_status
-ffffffff81d009e0 T dal_i2c_sw_engine_destruct
-ffffffff81d009f0 T dal_i2c_sw_engine_construct
-ffffffff81d00aa0 T dal_i2c_sw_engine_create
-ffffffff81d00bd0 t write_byte
-ffffffff81d00df0 t destroy
-ffffffff81d00e40 t release_engine
-ffffffff81d01000 T dal_i2caux_create
-ffffffff81d010b0 T dal_i2caux_submit_i2c_command
-ffffffff81d012d0 T dal_i2caux_submit_aux_command
-ffffffff81d014c0 T dal_i2caux_configure_aux
-ffffffff81d01540 T dal_i2caux_destroy
-ffffffff81d015c0 T dal_i2caux_get_reference_clock
-ffffffff81d01650 T dal_i2caux_acquire_i2c_sw_engine
-ffffffff81d01710 T dal_i2caux_acquire_aux_engine
-ffffffff81d017c0 T dal_i2caux_release_engine
-ffffffff81d01810 T dal_i2caux_construct
-ffffffff81d01950 T dal_i2caux_destruct
-ffffffff81d02000 T dal_irq_service_dummy_set
-ffffffff81d02050 T dal_irq_service_dummy_ack
-ffffffff81d020a0 T dce110_vblank_set
-ffffffff81d02170 T to_dal_irq_source_dce110
-ffffffff81d022f0 T dal_irq_service_dce110_create
-ffffffff81d02370 t hpd_ack
-ffffffff81d03000 T dal_irq_service_dce120_create
-ffffffff81d03080 t hpd_ack
-ffffffff81d04000 T dal_irq_service_dce80_create
+ffffffff81c32220 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff81c32260 t signal_type_to_atom_dig_mode
+ffffffff81c322c0 t hpd_sel_to_atom
+ffffffff81c32300 t dig_encoder_sel_to_atom
+ffffffff81c32330 t phy_id_to_atom
+ffffffff81c32370 t disp_power_gating_action_to_atom
+ffffffff81c323e0 t dc_clock_type_to_atom
+ffffffff81c32460 t transmitter_color_depth_to_atom
+ffffffff81c33000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff81c33030 t encoder_action_to_atom
+ffffffff81c330a0 t engine_bp_to_atom
+ffffffff81c33140 t clock_source_id_to_atom
+ffffffff81c33230 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff81c33270 t signal_type_to_atom_dig_mode
+ffffffff81c332d0 t hpd_sel_to_atom
+ffffffff81c33310 t dig_encoder_sel_to_atom
+ffffffff81c33360 t phy_id_to_atom
+ffffffff81c333a0 t disp_power_gating_action_to_atom
+ffffffff81c34000 T bw_int_to_fixed_nonconst
+ffffffff81c34080 T bw_frc_to_fixed
+ffffffff81c34200 T bw_floor2
+ffffffff81c34290 T bw_ceil2
+ffffffff81c34300 T bw_mul
+ffffffff81c35000 T convert_to_custom_float_format
+ffffffff81c36000 T bw_calcs_init
+ffffffff81c37e80 T bw_calcs
+ffffffff81c395f0 t calculate_bandwidth
+ffffffff81c41000 T scaler_settings_calculation
+ffffffff81c41420 T mode_support_and_system_configuration
+ffffffff81c47220 T display_pipe_configuration
+ffffffff81c47af0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation
+ffffffff81c4d000 T dcn_bw_mod
+ffffffff81c4d060 T dcn_bw_min2
+ffffffff81c4d0a0 T dcn_bw_max
+ffffffff81c4d0d0 T dcn_bw_max2
+ffffffff81c4d110 T dcn_bw_floor2
+ffffffff81c4d160 T dcn_bw_ceil2
+ffffffff81c4d1f0 T dcn_bw_max3
+ffffffff81c4d270 T dcn_bw_max5
+ffffffff81c4d380 T dcn_bw_pow
+ffffffff81c4d410 T dcn_bw_log
+ffffffff81c4e000 T dcn_validate_bandwidth
+ffffffff81c4f9b0 T dcn_bw_sync_calcs_and_dml
+ffffffff81c4fc20 t dcn_bw_calc_rq_dlg_ttu
+ffffffff81c50620 T dcn_find_dcfclk_suits_all
+ffffffff81c50a90 T dcn_bw_update_from_pplib
+ffffffff81c50e50 T dcn_bw_notify_pplib_of_wm_ranges
+ffffffff81c52000 T dc_stream_adjust_vmin_vmax
+ffffffff81c520e0 T dc_stream_get_crtc_position
+ffffffff81c52310 T dc_stream_configure_crc
+ffffffff81c52460 T dc_stream_get_crc
+ffffffff81c52540 T dc_stream_set_dither_option
+ffffffff81c526e0 T dc_stream_set_static_screen_events
+ffffffff81c52880 T dc_link_set_drive_settings
+ffffffff81c52910 T dc_link_perform_link_training
+ffffffff81c529a0 T dc_link_set_preferred_link_settings
+ffffffff81c52a30 T dc_link_enable_hpd
+ffffffff81c52a40 T dc_link_disable_hpd
+ffffffff81c52a50 T dc_link_set_test_pattern
+ffffffff81c52a90 T dc_create
+ffffffff81c530e0 T dc_destroy
+ffffffff81c53130 t destruct
+ffffffff81c532f0 T dc_enable_stereo
+ffffffff81c53400 T dc_commit_state
+ffffffff81c540e0 T dc_post_update_surfaces_to_stream
+ffffffff81c541b0 T dc_create_state
+ffffffff81c54200 T dc_retain_state
+ffffffff81c54230 T dc_release_state
+ffffffff81c542a0 T dc_check_update_surfaces_for_stream
+ffffffff81c54a30 T dc_commit_updates_for_stream
+ffffffff81c551d0 T dc_get_current_stream_count
+ffffffff81c55200 T dc_get_stream_at_index
+ffffffff81c55240 T dc_interrupt_to_irq_source
+ffffffff81c55260 T dc_interrupt_set
+ffffffff81c552b0 T dc_interrupt_ack
+ffffffff81c552d0 T dc_set_power_state
+ffffffff81c55380 T dc_resume
+ffffffff81c553f0 T dc_submit_i2c
+ffffffff81c55420 T dc_link_add_remote_sink
+ffffffff81c555b0 T dc_link_remove_remote_sink
+ffffffff81c56000 T pre_surface_trace
+ffffffff81c56030 T update_surface_trace
+ffffffff81c56060 T post_surface_trace
+ffffffff81c56090 T context_timing_trace
+ffffffff81c56160 T context_clock_trace
+ffffffff81c57000 T get_color_space_type
+ffffffff81c57070 T find_color_matrix
+ffffffff81c570f0 T color_space_to_black_color
+ffffffff81c57180 T hwss_wait_for_blank_complete
+ffffffff81c58000 T get_hpd_gpio
+ffffffff81c580d0 T dc_link_detect_sink
+ffffffff81c58200 T dc_link_is_dp_sink_present
+ffffffff81c58440 T dc_link_detect
+ffffffff81c58df0 T link_create
+ffffffff81c597a0 T link_destroy
+ffffffff81c59860 T dc_link_validate_mode_timing
+ffffffff81c599d0 T dc_link_get_backlight_level
+ffffffff81c59a30 T dc_link_set_backlight_level
+ffffffff81c59c00 T dc_link_set_abm_disable
+ffffffff81c59c70 T dc_link_set_psr_enable
+ffffffff81c59ce0 T dc_link_get_status
+ffffffff81c59d10 T core_link_resume
+ffffffff81c59d50 t program_hpd_filter
+ffffffff81c59ee0 T core_link_enable_stream
+ffffffff81c5b520 T core_link_disable_stream
+ffffffff81c5b6e0 T core_link_set_avmute
+ffffffff81c5b730 T dc_link_enable_hpd_filter
+ffffffff81c5b880 t enable_link_dp
+ffffffff81c5baf0 t update_mst_stream_alloc_table
+ffffffff81c5c000 T dal_ddc_i2c_payloads_add
+ffffffff81c5c0c0 T dal_ddc_aux_payloads_add
+ffffffff81c5c170 T dal_ddc_service_create
+ffffffff81c5c290 T dal_ddc_service_destroy
+ffffffff81c5c320 T dal_ddc_service_get_type
+ffffffff81c5c350 T dal_ddc_service_set_transaction_type
+ffffffff81c5c380 T dal_ddc_service_is_in_aux_transaction_mode
+ffffffff81c5c3b0 T ddc_service_set_dongle_type
+ffffffff81c5c3e0 T get_defer_delay
+ffffffff81c5c470 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor
+ffffffff81c5c7f0 T dal_ddc_service_query_ddc_data
+ffffffff81c5cc50 T dc_link_aux_transfer
+ffffffff81c5cdb0 T dal_ddc_service_set_ddc_pin
+ffffffff81c5cde0 T dal_ddc_service_get_ddc_pin
+ffffffff81c5ce10 T dal_ddc_service_write_scdc_data
+ffffffff81c5cee0 T dal_ddc_service_read_scdc_data
+ffffffff81c5d000 T dc_link_dp_set_drive_settings
+ffffffff81c5d100 T dc_link_dp_perform_link_training
+ffffffff81c5e130 T perform_link_training_with_retries
+ffffffff81c5e1f0 T dp_verify_link_cap
+ffffffff81c5e570 T dp_validate_mode_timing
+ffffffff81c5e6a0 T decide_link_settings
+ffffffff81c5e8d0 T dc_link_handle_hpd_rx_irq
+ffffffff81c5f090 T is_mst_supported
+ffffffff81c5f120 T is_dp_active_dongle
+ffffffff81c5f160 T detect_dp_sink_caps
+ffffffff81c5f170 t retrieve_link_cap
+ffffffff81c5f620 T detect_edp_sink_caps
+ffffffff81c5f680 T dc_link_dp_enable_hpd
+ffffffff81c5f6c0 T dc_link_dp_disable_hpd
+ffffffff81c5f710 T dc_link_dp_set_test_pattern
+ffffffff81c5fb10 t set_crtc_test_pattern
+ffffffff81c5fc90 T dp_enable_mst_on_sink
+ffffffff81c5fd10 t get_lane_status_and_drive_settings
+ffffffff81c61000 T core_link_read_dpcd
+ffffffff81c61050 T core_link_write_dpcd
+ffffffff81c610a0 T dp_receiver_power_ctrl
+ffffffff81c61100 T dp_enable_link_phy
+ffffffff81c61240 T edp_receiver_ready_T9
+ffffffff81c61310 T edp_receiver_ready_T7
+ffffffff81c613e0 T dp_disable_link_phy
+ffffffff81c61490 T dp_disable_link_phy_mst
+ffffffff81c61560 T dp_set_hw_training_pattern
+ffffffff81c61650 T dp_set_hw_test_pattern
+ffffffff81c61730 T dp_set_hw_lane_settings
+ffffffff81c61750 T dp_get_panel_mode
+ffffffff81c617e0 T dp_retrain_link_dp_test
+ffffffff81c62000 T resource_parse_asic_id
+ffffffff81c62100 T dc_create_resource_pool
+ffffffff81c622d0 T dc_destroy_resource_pool
+ffffffff81c62340 T resource_construct
+ffffffff81c62660 T resource_unreference_clock_source
+ffffffff81c626e0 T resource_reference_clock_source
+ffffffff81c62760 T resource_get_clock_source_reference
+ffffffff81c627e0 T resource_are_streams_timing_synchronizable
+ffffffff81c62880 T resource_find_used_clk_src_for_sharing
+ffffffff81c62a20 T resource_build_scaling_params
+ffffffff81c646a0 T resource_build_scaling_params_for_context
+ffffffff81c647f0 T find_idle_secondary_pipe
+ffffffff81c64850 T resource_get_head_pipe_for_stream
+ffffffff81c64920 T dc_add_plane_to_context
+ffffffff81c64ed0 T dc_remove_plane_from_context
+ffffffff81c65140 T dc_rem_all_planes_for_stream
+ffffffff81c652f0 T dc_add_all_planes_for_stream
+ffffffff81c65440 T dc_is_stream_unchanged
+ffffffff81c654e0 T dc_is_stream_scaling_unchanged
+ffffffff81c65570 T update_audio_usage
+ffffffff81c655e0 T resource_is_stream_unchanged
+ffffffff81c656e0 T dc_add_stream_to_ctx
+ffffffff81c657b0 T dc_remove_stream_from_ctx
+ffffffff81c65b30 T resource_map_pool_resources
+ffffffff81c66150 T dc_resource_state_copy_construct_current
+ffffffff81c66160 T dc_resource_state_copy_construct
+ffffffff81c66440 T dc_resource_state_construct
+ffffffff81c66480 T dc_validate_global_state
+ffffffff81c667e0 T dc_resource_state_destruct
+ffffffff81c668a0 T dc_resource_find_first_free_pll
+ffffffff81c66920 T resource_build_info_frame
+ffffffff81c66fb0 t set_spd_info_packet
+ffffffff81c67150 T resource_map_clock_resources
+ffffffff81c67390 T pipe_need_reprogram
+ffffffff81c67490 T resource_build_bit_depth_reduction_params
+ffffffff81c67730 T dc_validate_stream
+ffffffff81c678b0 T dc_validate_plane
+ffffffff81c68000 T dc_sink_retain
+ffffffff81c68030 T dc_sink_release
+ffffffff81c680c0 T dc_sink_create
+ffffffff81c69000 T update_stream_signal
+ffffffff81c69080 T dc_stream_retain
+ffffffff81c690b0 T dc_stream_release
+ffffffff81c69150 T dc_create_stream_for_sink
+ffffffff81c69380 T dc_stream_get_status
+ffffffff81c69400 T dc_stream_set_cursor_attributes
+ffffffff81c69580 T dc_stream_set_cursor_position
+ffffffff81c696f0 T dc_stream_get_vblank_counter
+ffffffff81c697b0 T dc_stream_get_scanoutpos
+ffffffff81c69870 T dc_stream_log
+ffffffff81c6a000 T enable_surface_flip_reporting
+ffffffff81c6a030 T dc_create_plane_state
+ffffffff81c6a110 T dc_plane_get_status
+ffffffff81c6a250 T dc_plane_state_retain
+ffffffff81c6a280 T dc_plane_state_release
+ffffffff81c6a330 t kref_put
+ffffffff81c6a370 T dc_gamma_retain
+ffffffff81c6a3a0 T dc_gamma_release
+ffffffff81c6a400 t dc_gamma_free
+ffffffff81c6a420 T dc_create_gamma
+ffffffff81c6a470 T dc_transfer_func_retain
+ffffffff81c6a4a0 T dc_transfer_func_release
+ffffffff81c6a4e0 t dc_transfer_func_free
+ffffffff81c6a500 T dc_create_transfer_func
+ffffffff81c6b000 T generic_reg_update_ex
+ffffffff81c6b1d0 T generic_reg_get
+ffffffff81c6b230 T generic_reg_get2
+ffffffff81c6b2b0 T generic_reg_get3
+ffffffff81c6b350 T generic_reg_get4
+ffffffff81c6b400 T generic_reg_get5
+ffffffff81c6b4d0 T generic_reg_get6
+ffffffff81c6b5b0 T generic_reg_get7
+ffffffff81c6b6b0 T generic_reg_get8
+ffffffff81c6b7c0 T generic_reg_wait
+ffffffff81c6b980 T generic_write_indirect_reg
+ffffffff81c6b9e0 T generic_read_indirect_reg
+ffffffff81c6ba30 T generic_indirect_reg_update_ex
+ffffffff81c6c000 T dce_abm_create
+ffffffff81c6c0c0 T dce_abm_destroy
+ffffffff81c6c120 t dce_abm_init
+ffffffff81c6c590 t dce_abm_set_level
+ffffffff81c6c6d0 t dce_abm_immediate_disable
+ffffffff81c6c880 t dce_abm_init_backlight
+ffffffff81c6cb30 t dce_abm_set_backlight_level
+ffffffff81c6d010 t dce_abm_get_current_backlight_8_bit
+ffffffff81c6e000 T dce_aud_az_enable
+ffffffff81c6e160 T dce_aud_az_disable
+ffffffff81c6e350 T dce_aud_az_configure
+ffffffff81c6ef80 t check_audio_bandwidth
+ffffffff81c6f120 T dce_aud_wall_dto_setup
+ffffffff81c6f410 T dce_aud_hw_init
+ffffffff81c6f630 T dce_aud_destroy
+ffffffff81c6f680 T dce_audio_create
+ffffffff81c6f740 t dce_aud_endpoint_valid
+ffffffff81c70000 T get_engine_type
+ffffffff81c70030 T dce110_engine_destroy
+ffffffff81c70080 T dce110_aux_engine_construct
+ffffffff81c700d0 t acquire_engine
+ffffffff81c70290 t submit_channel_request
+ffffffff81c70810 t process_channel_reply
+ffffffff81c708f0 t read_channel_reply
+ffffffff81c70ad0 t get_channel_status
+ffffffff81c70bf0 t is_engine_available
+ffffffff81c70c40 t acquire
+ffffffff81c70ce0 t submit_request
+ffffffff81c70dc0 t release_engine
+ffffffff81c70e60 t read_command
+ffffffff81c71220 t write_command
+ffffffff81c72000 T dce110_clk_src_construct
+ffffffff81c722a0 t calc_pll_max_vco_construct
+ffffffff81c724f0 t dce110_clock_source_power_down
+ffffffff81c72590 t dce110_program_pix_clk
+ffffffff81c72f00 t dce110_get_pix_clk_dividers
+ffffffff81c73270 t dce110_get_pix_rate_in_hz
+ffffffff81c73440 t calculate_pixel_clock_pll_dividers
+ffffffff81c73730 t get_ss_info_from_atombios
+ffffffff81c74000 T dce_dccg_create
+ffffffff81c740f0 t dce_dccg_construct
+ffffffff81c743a0 T dce110_dccg_create
+ffffffff81c74490 T dce112_dccg_create
+ffffffff81c74580 T dce120_dccg_create
+ffffffff81c74660 T dcn1_dccg_create
+ffffffff81c748b0 T dce_dccg_destroy
+ffffffff81c74900 t dce_update_clocks
+ffffffff81c749f0 t dce_set_clock
+ffffffff81c74ae0 t dce_get_dp_ref_freq_khz
+ffffffff81c74bf0 t dccg_adjust_dp_ref_freq_for_ss
+ffffffff81c74ce0 t dce_psr_set_clock
+ffffffff81c74e10 t dce112_set_clock
+ffffffff81c74f90 t dce12_update_clocks
+ffffffff81c75070 t dce12_get_dp_ref_freq_khz
+ffffffff81c75090 t dcn1_update_clocks
+ffffffff81c76000 T dce_dmcu_load_iram
+ffffffff81c761b0 T dce_dmcu_create
+ffffffff81c76260 T dcn10_dmcu_create
+ffffffff81c76310 T dce_dmcu_destroy
+ffffffff81c76360 t dce_dmcu_init
+ffffffff81c76390 t dce_dmcu_set_psr_enable
+ffffffff81c76520 t dce_dmcu_setup_psr
+ffffffff81c76980 t dce_get_dmcu_psr_state
+ffffffff81c76ae0 t dce_psr_wait_loop
+ffffffff81c76c60 t dce_get_psr_wait_loop
+ffffffff81c76c90 t dce_is_dmcu_initialized
+ffffffff81c76cf0 t dcn10_dmcu_init
+ffffffff81c771f0 t dcn10_dmcu_load_iram
+ffffffff81c774d0 t dcn10_dmcu_set_psr_enable
+ffffffff81c776d0 t dcn10_dmcu_setup_psr
+ffffffff81c77b80 t dcn10_get_dmcu_psr_state
+ffffffff81c77cf0 t dcn10_psr_wait_loop
+ffffffff81c77e50 t dcn10_get_psr_wait_loop
+ffffffff81c77e80 t dcn10_is_dmcu_initialized
+ffffffff81c77eb0 t dcn10_get_dmcu_state
+ffffffff81c79000 T dce_enable_fe_clock
+ffffffff81c790a0 T dce_pipe_control_lock
+ffffffff81c792b0 T dce_set_blender_mode
+ffffffff81c79440 T dce_clock_gating_power_up
+ffffffff81c79530 T dce_crtc_switch_to_clk_src
+ffffffff81c797c0 T dce_use_lut
+ffffffff81c7a000 T dce_ipp_construct
+ffffffff81c7a050 T dce_ipp_destroy
+ffffffff81c7a0a0 t dce_ipp_cursor_set_position
+ffffffff81c7a270 t dce_ipp_cursor_set_attributes
+ffffffff81c7a5b0 t dce_ipp_program_prescale
+ffffffff81c7a7e0 t dce_ipp_program_input_lut
+ffffffff81c7ace0 t dce_ipp_set_degamma
+ffffffff81c7b000 T dce110_link_encoder_set_dp_phy_pattern_training_pattern
+ffffffff81c7b140 T dce110_psr_program_dp_dphy_fast_training
+ffffffff81c7b240 T dce110_psr_program_secondary_packet
+ffffffff81c7b2d0 T dce110_is_dig_enabled
+ffffffff81c7b320 T dce110_link_encoder_validate_dvi_output
+ffffffff81c7b3c0 T dce110_link_encoder_validate_dp_output
+ffffffff81c7b400 T dce110_link_encoder_construct
+ffffffff81c7b5e0 T dce110_link_encoder_validate_output_with_stream
+ffffffff81c7b770 T dce110_link_encoder_hw_init
+ffffffff81c7b990 T dce110_link_encoder_destroy
+ffffffff81c7b9e0 T dce110_link_encoder_setup
+ffffffff81c7bb70 T dce110_link_encoder_enable_tmds_output
+ffffffff81c7bc50 T dce110_link_encoder_enable_dp_output
+ffffffff81c7be00 T dce110_link_encoder_enable_dp_mst_output
+ffffffff81c7bfa0 T dce110_link_encoder_disable_output
+ffffffff81c7c1d0 T dce110_link_encoder_dp_set_lane_settings
+ffffffff81c7c360 T dce110_link_encoder_dp_set_phy_pattern
+ffffffff81c7cdf0 t set_dp_phy_pattern_hbr2_compliance_cp2520_2
+ffffffff81c7d130 T dce110_link_encoder_update_mst_stream_allocation_table
+ffffffff81c7d470 T dce110_link_encoder_connect_dig_be_to_fe
+ffffffff81c7d580 T dce110_link_encoder_enable_hpd
+ffffffff81c7d5a0 T dce110_link_encoder_disable_hpd
+ffffffff81c7e000 T dce_mem_input_construct
+ffffffff81c7e050 T dce112_mem_input_construct
+ffffffff81c7e0a0 T dce120_mem_input_construct
+ffffffff81c7e0f0 t dce_mi_program_display_marks
+ffffffff81c7e370 t dce_mi_allocate_dmif
+ffffffff81c7e5d0 t dce_mi_free_dmif
+ffffffff81c7e750 t dce_mi_program_surface_flip_and_addr
+ffffffff81c7eb20 t dce_mi_program_pte_vm
+ffffffff81c7ed60 t dce_mi_program_surface_config
+ffffffff81c7f590 t dce_mi_is_flip_pending
+ffffffff81c7f640 t program_nbp_watermark
+ffffffff81c7f940 t program_stutter_watermark
+ffffffff81c7fa80 t dce112_mi_program_display_marks
+ffffffff81c7fed0 t dce120_mi_program_display_marks
+ffffffff81c80460 t dce120_program_stutter_watermark
+ffffffff81c81000 T dce110_opp_set_clamping
+ffffffff81c812d0 T dce110_opp_program_bit_depth_reduction
+ffffffff81c81e30 T dce110_opp_program_clamping_and_pixel_encoding
+ffffffff81c82060 T dce110_opp_set_dyn_expansion
+ffffffff81c82200 T dce110_opp_program_fmt
+ffffffff81c823f0 T dce110_opp_construct
+ffffffff81c82440 T dce110_opp_destroy
+ffffffff81c83000 T get_filter_3tap_16p
+ffffffff81c83090 T get_filter_3tap_64p
+ffffffff81c83120 T get_filter_4tap_16p
+ffffffff81c831b0 T get_filter_4tap_64p
+ffffffff81c83240 T get_filter_5tap_64p
+ffffffff81c832d0 T get_filter_6tap_64p
+ffffffff81c83360 T get_filter_7tap_64p
+ffffffff81c833f0 T get_filter_8tap_64p
+ffffffff81c83480 T get_filter_2tap_16p
+ffffffff81c834b0 T get_filter_2tap_64p
+ffffffff81c84000 T dce110_se_audio_mute_control
+ffffffff81c840a0 T dce110_se_dp_audio_setup
+ffffffff81c840b0 t dce110_se_audio_setup
+ffffffff81c84230 T dce110_se_dp_audio_enable
+ffffffff81c845c0 T dce110_se_dp_audio_disable
+ffffffff81c84790 T dce110_se_hdmi_audio_setup
+ffffffff81c84eb0 T dce110_se_hdmi_audio_disable
+ffffffff81c84f50 T dce110_stream_encoder_construct
+ffffffff81c84fa0 t dce110_stream_encoder_dp_set_stream_attribute
+ffffffff81c85850 t dce110_stream_encoder_hdmi_set_stream_attribute
+ffffffff81c85f40 t dce110_stream_encoder_dvi_set_stream_attribute
+ffffffff81c86040 t dce110_stream_encoder_set_mst_bandwidth
+ffffffff81c86220 t dce110_stream_encoder_update_hdmi_info_packets
+ffffffff81c86bf0 t dce110_stream_encoder_stop_hdmi_info_packets
+ffffffff81c86ea0 t dce110_stream_encoder_update_dp_info_packets
+ffffffff81c870b0 t dce110_stream_encoder_stop_dp_info_packets
+ffffffff81c87240 t dce110_stream_encoder_dp_blank
+ffffffff81c873f0 t dce110_stream_encoder_dp_unblank
+ffffffff81c876b0 t setup_stereo_sync
+ffffffff81c877a0 t dce110_stream_encoder_set_avmute
+ffffffff81c87840 t dce110_stream_encoder_set_stream_attribute_helper
+ffffffff81c879d0 t dce110_update_generic_info_packet
+ffffffff81c88000 T dce_transform_get_optimal_number_of_taps
+ffffffff81c88290 T dce110_opp_set_csc_adjustment
+ffffffff81c88350 t program_color_matrix
+ffffffff81c88590 T dce110_opp_set_csc_default
+ffffffff81c887a0 T dce110_opp_program_regamma_pwl
+ffffffff81c89140 T dce110_opp_power_on_regamma_lut
+ffffffff81c89240 T dce110_opp_set_regamma_mode
+ffffffff81c892b0 T dce_transform_construct
+ffffffff81c89320 t dce_transform_reset
+ffffffff81c89360 t dce_transform_set_scaler
+ffffffff81c89f20 t dce_transform_set_pixel_storage_depth
+ffffffff81c8a440 t dce_transform_set_gamut_remap
+ffffffff81c8a7a0 t program_multi_taps_filter
+ffffffff81c8b000 T dce100_enable_display_power_gating
+ffffffff81c8b0b0 T dce100_set_bandwidth
+ffffffff81c8b2a0 t dce100_pplib_apply_display_requirements
+ffffffff81c8b320 T dce100_hw_sequencer_construct
+ffffffff81c8c000 T dce100_link_encoder_create
+ffffffff81c8c0b0 T dce100_opp_create
+ffffffff81c8c140 T dce100_aux_engine_create
+ffffffff81c8c1c0 T dce100_clock_source_create
+ffffffff81c8c2a0 T dce100_clock_source_destroy
+ffffffff81c8c2f0 T dce100_validate_bandwidth
+ffffffff81c8c440 T dce100_validate_global
+ffffffff81c8c4c0 T dce100_add_stream_to_ctx
+ffffffff81c8c550 T dce100_validate_plane
+ffffffff81c8c590 T dce100_create_resource_pool
+ffffffff81c8d130 t destruct
+ffffffff81c8d390 t dce100_destroy_resource_pool
+ffffffff81c8d3f0 t read_dce_straps
+ffffffff81c8d450 t create_audio
+ffffffff81c8d480 t dce100_stream_encoder_create
+ffffffff81c8d520 t dce100_hwseq_create
+ffffffff81c8e000 T dce110_compressor_power_up_fbc
+ffffffff81c8e150 T dce110_compressor_enable_fbc
+ffffffff81c8e330 T dce110_compressor_is_fbc_enabled_in_hw
+ffffffff81c8e3e0 T dce110_compressor_disable_fbc
+ffffffff81c8e630 T dce110_compressor_program_compressed_surface_address_and_pitch
+ffffffff81c8e750 T dce110_compressor_set_fbc_invalidation_triggers
+ffffffff81c8e7e0 T dce110_compressor_create
+ffffffff81c8e880 T dce110_compressor_construct
+ffffffff81c8e900 T dce110_compressor_destroy
+ffffffff81c8e950 T dce110_get_required_compressed_surfacesize
+ffffffff81c8e9b0 T get_max_support_fbc_buffersize
+ffffffff81c8e9e0 T controller_id_to_index
+ffffffff81c8f000 T dce110_update_info_frame
+ffffffff81c8f0c0 T dce110_enable_stream
+ffffffff81c8f230 T hwss_edp_wait_for_hpd_ready
+ffffffff81c8f450 T hwss_edp_power_control
+ffffffff81c8f6f0 T hwss_edp_backlight_control
+ffffffff81c8f860 T dce110_enable_audio_stream
+ffffffff81c8f900 T dce110_disable_audio_stream
+ffffffff81c8fa40 T dce110_disable_stream
+ffffffff81c8fb00 T dce110_unblank_stream
+ffffffff81c8fbd0 T dce110_blank_stream
+ffffffff81c8fc80 T dce110_set_avmute
+ffffffff81c8fcd0 T dce110_enable_accelerated_mode
+ffffffff81c8ff80 t power_down_all_hw_blocks
+ffffffff81c901a0 T dce110_set_safe_displaymarks
+ffffffff81c902f0 T dce110_apply_ctx_to_hw
+ffffffff81c90c20 t enable_fbc
+ffffffff81c90e10 T dce110_power_down
+ffffffff81c90f00 T dce110_fill_display_configs
+ffffffff81c91140 T dce110_get_min_vblank_time_us
+ffffffff81c911b0 T dce110_set_cursor_position
+ffffffff81c912d0 T dce110_set_cursor_attribute
+ffffffff81c91390 T dce110_hw_sequencer_construct
+ffffffff81c913b0 t enable_display_pipe_clock_gating
+ffffffff81c913e0 t build_audio_output
+ffffffff81c91530 t init_hw
+ffffffff81c91780 t dce110_reset_hw_ctx_wrap
+ffffffff81c91970 t dce110_apply_ctx_for_surface
+ffffffff81c922e0 t program_gamut_remap
+ffffffff81c92430 t program_csc_matrix
+ffffffff81c92530 t update_plane_addr
+ffffffff81c925d0 t dce110_update_pending_status
+ffffffff81c92700 t dce110_set_input_transfer_func
+ffffffff81c928a0 t dce110_set_output_transfer_func
+ffffffff81c93250 t dce110_enable_timing_synchronization
+ffffffff81c93460 t dce110_enable_per_frame_crtc_position_reset
+ffffffff81c93680 t dce110_enable_display_power_gating
+ffffffff81c937f0 t dce110_power_down_fe
+ffffffff81c938b0 t dce110_set_bandwidth
+ffffffff81c93d00 t set_drr
+ffffffff81c93d90 t get_position
+ffffffff81c93e10 t set_static_screen_control
+ffffffff81c93ec0 t dce110_enable_stream_timing
+ffffffff81c94070 t dce110_wait_for_mpcc_disconnect
+ffffffff81c940a0 t ready_shared_resources
+ffffffff81c940d0 t optimize_shared_resources
+ffffffff81c94100 t pplib_apply_display_requirements
+ffffffff81c95000 T dce_mem_input_v_is_surface_pending
+ffffffff81c95090 T dce_mem_input_v_program_surface_flip_and_addr
+ffffffff81c95210 T dce_mem_input_v_program_pte_vm
+ffffffff81c954e0 T dce_mem_input_v_program_surface_config
+ffffffff81c95920 T dce_mem_input_v_program_display_marks
+ffffffff81c95b50 T dce_mem_input_program_chroma_display_marks
+ffffffff81c95d80 T dce110_allocate_mem_input_v
+ffffffff81c95ea0 T dce110_free_mem_input_v
+ffffffff81c95ed0 T dce110_mem_input_v_construct
+ffffffff81c95f00 t program_nbp_watermark
+ffffffff81c97000 T dce110_opp_v_set_csc_default
+ffffffff81c97450 t program_color_matrix_v
+ffffffff81c97600 T dce110_opp_v_set_csc_adjustment
+ffffffff81c98000 T dce110_opp_program_regamma_pwl_v
+ffffffff81c984e0 t power_on_lut
+ffffffff81c98610 T dce110_opp_power_on_regamma_lut_v
+ffffffff81c98670 T dce110_opp_set_regamma_mode_v
+ffffffff81c99000 T dce110_opp_v_construct
+ffffffff81c9a000 T dce110_aux_engine_create
+ffffffff81c9a080 T dce110_clock_source_create
+ffffffff81c9a160 T dce110_clock_source_destroy
+ffffffff81c9a1f0 T dce110_resource_build_pipe_hw_param
+ffffffff81c9a330 T dce110_validate_plane
+ffffffff81c9a390 T dce110_validate_global
+ffffffff81c9a450 T dce110_resource_cap
+ffffffff81c9a490 T dce110_create_resource_pool
+ffffffff81c9b2b0 t destruct
+ffffffff81c9b580 t dce110_destroy_resource_pool
+ffffffff81c9b5e0 t dce110_link_encoder_create
+ffffffff81c9b690 t dce110_validate_bandwidth
+ffffffff81c9b730 t dce110_acquire_underlay
+ffffffff81c9b8e0 t dce110_add_stream_to_ctx
+ffffffff81c9b9a0 t read_dce_straps
+ffffffff81c9ba00 t create_audio
+ffffffff81c9ba30 t dce110_stream_encoder_create
+ffffffff81c9bad0 t dce110_hwseq_create
+ffffffff81c9c000 T dce110_timing_generator_set_early_control
+ffffffff81c9c070 T dce110_timing_generator_enable_crtc
+ffffffff81c9c100 T dce110_timing_generator_program_blank_color
+ffffffff81c9c190 T dce110_timing_generator_disable_crtc
+ffffffff81c9c1e0 T dce110_timing_generator_program_timing_generator
+ffffffff81c9c400 T dce110_timing_generator_set_drr
+ffffffff81c9c540 T dce110_timing_generator_set_static_screen_control
+ffffffff81c9c5b0 T dce110_timing_generator_get_vblank_counter
+ffffffff81c9c600 T dce110_timing_generator_get_position
+ffffffff81c9c690 T dce110_timing_generator_get_crtc_scanoutpos
+ffffffff81c9c770 T dce110_timing_generator_program_blanking
+ffffffff81c9c9b0 T dce110_timing_generator_set_test_pattern
+ffffffff81c9ccd0 T dce110_timing_generator_validate_timing
+ffffffff81c9cd80 T dce110_timing_generator_wait_for_vblank
+ffffffff81c9ced0 T dce110_timing_generator_is_counter_moving
+ffffffff81c9cf40 T dce110_timing_generator_wait_for_vactive
+ffffffff81c9d010 T dce110_timing_generator_setup_global_swap_lock
+ffffffff81c9d180 T dce110_timing_generator_tear_down_global_swap_lock
+ffffffff81c9d200 T dce110_timing_generator_enable_advanced_request
+ffffffff81c9d2a0 T dce110_timing_generator_set_lock_master
+ffffffff81c9d300 T dce110_timing_generator_enable_reset_trigger
+ffffffff81c9d3e0 T dce110_timing_generator_enable_crtc_reset
+ffffffff81c9d5d0 T dce110_timing_generator_disable_reset_trigger
+ffffffff81c9d6c0 T dce110_timing_generator_did_triggered_reset_occur
+ffffffff81c9d740 T dce110_timing_generator_disable_vga
+ffffffff81c9d7b0 T dce110_timing_generator_set_overscan_color_black
+ffffffff81c9d850 T dce110_tg_program_blank_color
+ffffffff81c9d910 T dce110_tg_set_overscan_color
+ffffffff81c9d960 T dce110_tg_program_timing
+ffffffff81c9d980 T dce110_tg_is_blanked
+ffffffff81c9d9e0 T dce110_tg_set_blank
+ffffffff81c9da50 T dce110_tg_validate_timing
+ffffffff81c9db00 T dce110_tg_wait_for_state
+ffffffff81c9dc00 T dce110_tg_set_colors
+ffffffff81c9dd50 T dce110_arm_vert_intr
+ffffffff81c9de10 T dce110_configure_crc
+ffffffff81c9df80 t dce110_is_tg_enabled
+ffffffff81c9dfd0 T dce110_get_crc
+ffffffff81c9e090 T dce110_timing_generator_construct
+ffffffff81c9f000 T dce110_timing_generator_v_construct
+ffffffff81c9f060 t dce110_timing_generator_v_program_timing
+ffffffff81c9f300 t dce110_timing_generator_v_enable_crtc
+ffffffff81c9f390 t dce110_timing_generator_v_disable_crtc
+ffffffff81c9f400 t dce110_timing_generator_v_is_counter_moving
+ffffffff81c9f480 t dce110_timing_generator_v_get_vblank_counter
+ffffffff81c9f4d0 t dce110_timing_generator_v_set_early_control
+ffffffff81c9f530 t dce110_timing_generator_v_wait_for_state
+ffffffff81c9f6c0 t dce110_timing_generator_v_set_blank
+ffffffff81c9f720 t dce110_timing_generator_v_set_overscan_color_black
+ffffffff81c9f7c0 t dce110_timing_generator_v_program_blank_color
+ffffffff81c9f840 t dce110_timing_generator_v_set_colors
+ffffffff81c9f980 t dce110_timing_generator_v_disable_vga
+ffffffff81c9f9b0 t dce110_timing_generator_v_did_triggered_reset_occur
+ffffffff81c9f9f0 t dce110_timing_generator_v_setup_global_swap_lock
+ffffffff81c9fa10 t dce110_timing_generator_v_enable_reset_trigger
+ffffffff81c9fa30 t dce110_timing_generator_v_disable_reset_trigger
+ffffffff81c9fa50 t dce110_timing_generator_v_tear_down_global_swap_lock
+ffffffff81c9fa70 t dce110_timing_generator_v_enable_advanced_request
+ffffffff81ca0000 T dce110_transform_v_construct
+ffffffff81ca0060 t dce110_xfmv_reset
+ffffffff81ca00b0 t dce110_xfmv_set_scaler
+ffffffff81ca0a10 t dce110_xfmv_set_pixel_storage_depth
+ffffffff81ca0af0 t dce110_xfmv_set_gamut_remap
+ffffffff81ca0b20 t program_multi_taps_filter
+ffffffff81ca1000 T dce112_compressor_power_up_fbc
+ffffffff81ca1150 T dce112_compressor_enable_fbc
+ffffffff81ca14f0 T dce112_compressor_is_fbc_enabled_in_hw
+ffffffff81ca15a0 T dce112_compressor_enable_lpt
+ffffffff81ca16c0 T dce112_compressor_disable_fbc
+ffffffff81ca19b0 T dce112_compressor_disable_lpt
+ffffffff81ca1b30 T dce112_compressor_is_lpt_enabled_in_hw
+ffffffff81ca1b80 T dce112_compressor_program_compressed_surface_address_and_pitch
+ffffffff81ca1cd0 T dce112_compressor_program_lpt_control
+ffffffff81ca1f40 T dce112_compressor_set_fbc_invalidation_triggers
+ffffffff81ca1fd0 T dce112_compressor_construct
+ffffffff81ca2090 T dce112_compressor_create
+ffffffff81ca2180 T dce112_compressor_destroy
+ffffffff81ca3000 T dce112_hw_sequencer_construct
+ffffffff81ca3040 t dce112_enable_display_power_gating
+ffffffff81ca4000 T dce112_link_encoder_create
+ffffffff81ca40b0 T dce112_opp_create
+ffffffff81ca4140 T dce112_aux_engine_create
+ffffffff81ca41c0 T dce112_clock_source_create
+ffffffff81ca42a0 T dce112_clock_source_destroy
+ffffffff81ca42f0 T dce112_validate_bandwidth
+ffffffff81ca4390 T resource_map_phy_clock_resources
+ffffffff81ca44d0 T dce112_add_stream_to_ctx
+ffffffff81ca4560 T dce112_validate_global
+ffffffff81ca45e0 T dce112_resource_cap
+ffffffff81ca4630 T dce112_create_resource_pool
+ffffffff81ca5860 t destruct
+ffffffff81ca5ac0 t dce112_destroy_resource_pool
+ffffffff81ca5b20 t read_dce_straps
+ffffffff81ca5b80 t create_audio
+ffffffff81ca5bb0 t dce112_stream_encoder_create
+ffffffff81ca5c50 t dce112_hwseq_create
+ffffffff81ca6000 T dce120_hw_sequencer_construct
+ffffffff81ca6050 t dce120_enable_display_power_gating
+ffffffff81ca6080 t dce120_update_dchub
+ffffffff81ca7000 T dce120_opp_create
+ffffffff81ca7090 T dce120_aux_engine_create
+ffffffff81ca7110 T dce120_clock_source_create
+ffffffff81ca71f0 T dce120_clock_source_destroy
+ffffffff81ca7240 T dce120_hw_sequencer_create
+ffffffff81ca7280 T dce120_create_resource_pool
+ffffffff81ca83b0 t destruct
+ffffffff81ca8620 t dce120_destroy_resource_pool
+ffffffff81ca8680 t dce120_link_encoder_create
+ffffffff81ca8730 t read_dce_straps
+ffffffff81ca87b0 t create_audio
+ffffffff81ca87e0 t dce120_stream_encoder_create
+ffffffff81ca8880 t dce120_hwseq_create
+ffffffff81ca9000 T dce120_timing_generator_validate_timing
+ffffffff81ca90b0 T dce120_tg_validate_timing
+ffffffff81ca9160 T dce120_timing_generator_enable_crtc
+ffffffff81ca9260 T dce120_timing_generator_set_early_control
+ffffffff81ca92f0 T dce120_timing_generator_get_vblank_counter
+ffffffff81ca9340 T dce120_timing_generator_get_crtc_position
+ffffffff81ca93d0 T dce120_timing_generator_wait_for_vblank
+ffffffff81ca9490 T dce120_timing_generator_wait_for_vactive
+ffffffff81ca9510 T dce120_timing_generator_setup_global_swap_lock
+ffffffff81ca9670 T dce120_timing_generator_tear_down_global_swap_lock
+ffffffff81ca9740 T dce120_timing_generator_enable_reset_trigger
+ffffffff81ca98a0 T dce120_timing_generator_disable_reset_trigger
+ffffffff81ca99a0 T dce120_timing_generator_did_triggered_reset_occur
+ffffffff81ca99f0 T dce120_timing_generator_disable_vga
+ffffffff81ca9a60 T dce120_timing_generator_program_blanking
+ffffffff81ca9d10 T dce120_timing_generator_program_blank_color
+ffffffff81ca9dc0 T dce120_timing_generator_set_overscan_color_black
+ffffffff81ca9ea0 T dce120_timing_generator_set_drr
+ffffffff81caa1b0 T dce120_timing_generator_get_position
+ffffffff81caa240 T dce120_timing_generator_get_crtc_scanoutpos
+ffffffff81caa320 T dce120_timing_generator_enable_advanced_request
+ffffffff81caa3c0 T dce120_tg_program_blank_color
+ffffffff81caa4a0 T dce120_tg_set_overscan_color
+ffffffff81caa530 T dce120_tg_program_timing
+ffffffff81caa550 T dce120_tg_is_blanked
+ffffffff81caa5b0 T dce120_tg_set_blank
+ffffffff81caa670 T dce120_tg_wait_for_state
+ffffffff81caa780 T dce120_tg_set_colors
+ffffffff81caa8f0 T dce120_timing_generator_set_test_pattern
+ffffffff81caae90 T dce120_timing_generator_construct
+ffffffff81caaf10 t dce120_timing_generator_set_static_screen_control
+ffffffff81caafa0 t dce120_arm_vert_intr
+ffffffff81cac000 T dce80_hw_sequencer_construct
+ffffffff81cad000 T dce80_aux_engine_create
+ffffffff81cad080 T dce80_link_encoder_create
+ffffffff81cad130 T dce80_clock_source_create
+ffffffff81cad210 T dce80_clock_source_destroy
+ffffffff81cad260 T dce80_validate_bandwidth
+ffffffff81cad2a0 T dce80_validate_global
+ffffffff81cad320 T dce80_create_resource_pool
+ffffffff81cadec0 T dce81_create_resource_pool
+ffffffff81caea60 T dce83_create_resource_pool
+ffffffff81caf4d0 t destruct
+ffffffff81caf730 t dce80_destroy_resource_pool
+ffffffff81caf790 t read_dce_straps
+ffffffff81caf7f0 t create_audio
+ffffffff81caf820 t dce80_stream_encoder_create
+ffffffff81caf8c0 t dce80_hwseq_create
+ffffffff81cb0000 T dce80_timing_generator_construct
+ffffffff81cb0090 t program_timing
+ffffffff81cb0130 t dce80_timing_generator_enable_advanced_request
+ffffffff81cb1000 T cm_helper_program_color_matrices
+ffffffff81cb10d0 T cm_helper_program_xfer_func
+ffffffff81cb1490 T cm_helper_convert_to_custom_float
+ffffffff81cb1880 T cm_helper_translate_curve_to_hw_format
+ffffffff81cb2060 T cm_helper_translate_curve_to_degamma_hw_format
+ffffffff81cb3000 T dpp_read_state
+ffffffff81cb3210 T dpp_set_gamut_remap_bypass
+ffffffff81cb3280 T dpp_reset
+ffffffff81cb32f0 T dpp1_cnv_setup
+ffffffff81cb38a0 T dpp1_set_cursor_attributes
+ffffffff81cb3a30 T dpp1_set_cursor_position
+ffffffff81cb3af0 T dpp1_cnv_set_optional_cursor_attributes
+ffffffff81cb3c00 T dpp1_dppclk_control
+ffffffff81cb3d80 T dpp1_construct
+ffffffff81cb3df0 t dpp_get_optimal_number_of_taps
+ffffffff81cb3f90 t dpp1_cm_set_regamma_pwl
+ffffffff81cb5000 T dpp1_cm_set_gamut_remap
+ffffffff81cb51a0 T dpp1_cm_set_output_csc_default
+ffffffff81cb5220 t dpp1_cm_program_color_matrix
+ffffffff81cb53d0 T dpp1_cm_set_output_csc_adjustment
+ffffffff81cb53e0 T dpp1_cm_power_on_regamma_lut
+ffffffff81cb5460 T dpp1_cm_program_regamma_lut
+ffffffff81cb5670 T dpp1_cm_configure_regamma_lut
+ffffffff81cb57c0 T dpp1_cm_program_regamma_luta_settings
+ffffffff81cb5950 T dpp1_cm_program_regamma_lutb_settings
+ffffffff81cb5ae0 T dpp1_program_input_csc
+ffffffff81cb5d30 T dpp1_program_bias_and_scale
+ffffffff81cb5ea0 T dpp1_program_degamma_lutb_settings
+ffffffff81cb6040 T dpp1_program_degamma_luta_settings
+ffffffff81cb61e0 T dpp1_power_on_degamma_lut
+ffffffff81cb6260 T dpp1_set_degamma
+ffffffff81cb64c0 T dpp1_degamma_ram_select
+ffffffff81cb6580 T dpp1_program_degamma_lut
+ffffffff81cb6920 T dpp1_set_degamma_pwl
+ffffffff81cb6b60 T dpp1_full_bypass
+ffffffff81cb6cf0 T dpp1_program_input_lut
+ffffffff81cb74b0 T dpp1_set_hdr_multiplier
+ffffffff81cb8000 T dpp1_dscl_calc_lb_num_partitions
+ffffffff81cb81e0 T dpp1_dscl_is_lb_conf_valid
+ffffffff81cb8220 T dpp1_dscl_set_scaler_auto_scale
+ffffffff81cb8710 t dpp1_dscl_find_lb_memory_config
+ffffffff81cb89d0 t dpp1_dscl_set_lb
+ffffffff81cb8be0 t dpp1_dscl_set_scl_filter
+ffffffff81cb9010 T dpp1_dscl_set_scaler_manual_scale
+ffffffff81cb9990 t dpp1_dscl_get_filter_coeffs_64p
+ffffffff81cb9a60 t dpp1_dscl_set_scaler_filter
+ffffffff81cba000 T hubbub1_wm_read_state
+ffffffff81cba320 T hubbub1_verify_allow_pstate_change_high
+ffffffff81cba4f0 T hubbub1_wm_change_req_wa
+ffffffff81cba5c0 T hubbub1_program_watermarks
+ffffffff81cbae10 T hubbub1_update_dchub
+ffffffff81cbb150 T hubbub1_toggle_watermark_change_req
+ffffffff81cbb210 T hubbub1_soft_reset
+ffffffff81cbb2b0 T hubbub1_construct
+ffffffff81cbb300 t hubbub1_get_dcc_compression_cap
+ffffffff81cbb4f0 t hubbub1_dcc_support_swizzle
+ffffffff81cbb5a0 t hubbub1_dcc_support_pixel_format
+ffffffff81cbc000 T hubp1_set_blank
+ffffffff81cbc130 T hubp1_program_tiling
+ffffffff81cbc3f0 T hubp1_program_size
+ffffffff81cbc5b0 T hubp1_program_rotation
+ffffffff81cbc7c0 T hubp1_program_pixel_format
+ffffffff81cbccb0 T hubp1_program_surface_flip_and_addr
+ffffffff81cbd4f0 T hubp1_dcc_control
+ffffffff81cbd5e0 T hubp1_program_surface_config
+ffffffff81cbd730 T hubp1_program_requestor
+ffffffff81cbdb40 T hubp1_program_deadline
+ffffffff81cbe590 T hubp1_is_flip_pending
+ffffffff81cbe670 T min_set_viewport
+ffffffff81cbe8c0 T hubp1_read_state
+ffffffff81cbf590 T hubp1_get_cursor_pitch
+ffffffff81cbf630 T hubp1_cursor_set_attributes
+ffffffff81cbf990 T hubp1_cursor_set_position
+ffffffff81cbfc80 T hubp1_clk_cntl
+ffffffff81cbfd30 T hubp1_vtg_sel
+ffffffff81cbfdd0 T dcn10_hubp_construct
+ffffffff81cbfe30 t hubp1_setup
+ffffffff81cbfef0 t hubp1_set_vm_system_aperture_settings
+ffffffff81cc0120 t hubp1_set_vm_context0_settings
+ffffffff81cc0410 t hubp1_set_hubp_blank_en
+ffffffff81cc04b0 t hubp1_disconnect
+ffffffff81cc05b0 t hubp1_disable_control
+ffffffff81cc0650 t hubp1_get_underflow_status
+ffffffff81cc1000 T print_microsec
+ffffffff81cc1060 T dcn10_log_hubbub_state
+ffffffff81cc12e0 T dcn10_log_hw_state
+ffffffff81cc2220 T dcn10_verify_allow_pstate_change_high
+ffffffff81cc2520 T hwss1_plane_atomic_disconnect
+ffffffff81cc2620 T is_rgb_cspace
+ffffffff81cc26a0 T build_prescale_params
+ffffffff81cc2840 T dcn10_program_pipe
+ffffffff81cc3330 T dcn10_hw_sequencer_construct
+ffffffff81cc3350 t hubp_pg_control
+ffffffff81cc3650 t dpp_pg_control
+ffffffff81cc3950 t program_gamut_remap
+ffffffff81cc3aa0 t is_upper_pipe_tree_visible
+ffffffff81cc3b00 t is_lower_pipe_tree_visible
+ffffffff81cc3b60 t dcn10_init_hw
+ffffffff81cc4550 t reset_hw_ctx_wrap
+ffffffff81cc4770 t dcn10_apply_ctx_for_surface
+ffffffff81cc4d00 t program_csc_matrix
+ffffffff81cc4d60 t dcn10_program_output_csc
+ffffffff81cc4dd0 t dcn10_update_plane_addr
+ffffffff81cc4f50 t dcn10_update_dchub
+ffffffff81cc4fc0 t dcn10_update_mpcc
+ffffffff81cc52d0 t dcn10_update_pending_status
+ffffffff81cc53d0 t dcn10_set_input_transfer_func
+ffffffff81cc5510 t dcn10_set_output_transfer_func
+ffffffff81cc55d0 t dcn10_enable_timing_synchronization
+ffffffff81cc5730 t dcn10_enable_per_frame_crtc_position_reset
+ffffffff81cc5890 t dcn10_dummy_display_power_gating
+ffffffff81cc58c0 t dcn10_disable_plane
+ffffffff81cc5bd0 t dcn10_pipe_control_lock
+ffffffff81cc5c70 t dcn10_blank_pixel_data
+ffffffff81cc5d80 t dcn10_set_bandwidth
+ffffffff81cc5e70 t set_drr
+ffffffff81cc5f00 t get_position
+ffffffff81cc5f80 t set_static_screen_control
+ffffffff81cc6020 t dcn10_enable_stream_timing
+ffffffff81cc6300 t dcn10_setup_stereo
+ffffffff81cc6400 t dcn10_wait_for_mpcc_disconnect
+ffffffff81cc6550 t ready_shared_resources
+ffffffff81cc65a0 t optimize_shared_resources
+ffffffff81cc6610 t dcn10_pplib_apply_display_requirements
+ffffffff81cc6710 t dcn10_set_cursor_position
+ffffffff81cc6830 t dcn10_set_cursor_attribute
+ffffffff81cc6880 t dcn10_set_cursor_sdr_white_level
+ffffffff81cc6950 t enable_power_gating_plane
+ffffffff81cc7000 T dcn10_ipp_construct
+ffffffff81cc7050 t dcn10_ipp_destroy
+ffffffff81cc8000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern
+ffffffff81cc8150 T configure_encoder
+ffffffff81cc8220 T dcn10_psr_program_dp_dphy_fast_training
+ffffffff81cc8320 T dcn10_psr_program_secondary_packet
+ffffffff81cc83d0 T dcn10_is_dig_enabled
+ffffffff81cc8430 T dcn10_link_encoder_validate_dvi_output
+ffffffff81cc84d0 T dcn10_link_encoder_validate_dp_output
+ffffffff81cc8510 T dcn10_link_encoder_construct
+ffffffff81cc8700 T dcn10_link_encoder_validate_output_with_stream
+ffffffff81cc8890 T dcn10_link_encoder_hw_init
+ffffffff81cc8b00 T dcn10_aux_initialize
+ffffffff81cc8c00 T dcn10_link_encoder_destroy
+ffffffff81cc8c50 T dcn10_link_encoder_setup
+ffffffff81cc8e40 T dcn10_link_encoder_enable_tmds_output
+ffffffff81cc8f20 T dcn10_link_encoder_enable_dp_output
+ffffffff81cc90d0 T dcn10_link_encoder_enable_dp_mst_output
+ffffffff81cc9280 T dcn10_link_encoder_disable_output
+ffffffff81cc94b0 T dcn10_link_encoder_dp_set_lane_settings
+ffffffff81cc9640 T dcn10_link_encoder_dp_set_phy_pattern
+ffffffff81cca070 t set_dp_phy_pattern_hbr2_compliance_cp2520_2
+ffffffff81cca3d0 T dcn10_link_encoder_update_mst_stream_allocation_table
+ffffffff81cca780 T dcn10_link_encoder_connect_dig_be_to_fe
+ffffffff81cca8a0 T dcn10_link_encoder_enable_hpd
+ffffffff81cca930 T dcn10_link_encoder_disable_hpd
+ffffffff81cca9c0 t program_pattern_symbols
+ffffffff81ccb000 T mpc1_set_bg_color
+ffffffff81ccb120 T mpc1_update_stereo_mix
+ffffffff81ccb290 T mpc1_assert_idle_mpcc
+ffffffff81ccb350 T mpc1_get_mpcc
+ffffffff81ccb3d0 T mpc1_get_mpcc_for_dpp
+ffffffff81ccb420 T mpc1_is_mpcc_idle
+ffffffff81ccb500 T mpc1_assert_mpcc_idle_before_connect
+ffffffff81ccb610 T mpc1_insert_plane
+ffffffff81ccbc30 T mpc1_remove_mpcc
+ffffffff81ccbf10 T mpc1_mpc_init
+ffffffff81ccc0f0 T mpc1_init_mpcc_list_from_hw
+ffffffff81ccc3a0 T mpc1_read_mpcc_state
+ffffffff81ccc530 T dcn10_mpc_construct
+ffffffff81ccc6d0 t mpc1_update_blending
+ffffffff81ccd000 T opp1_program_bit_depth_reduction
+ffffffff81ccd500 T opp1_set_dyn_expansion
+ffffffff81ccd6b0 T opp1_program_fmt
+ffffffff81ccda90 T opp1_program_stereo
+ffffffff81ccdc20 T opp1_program_oppbuf
+ffffffff81ccddd0 T opp1_pipe_clock_control
+ffffffff81ccde70 T opp1_destroy
+ffffffff81ccdec0 T dcn10_opp_construct
+ffffffff81cce000 T optc1_program_global_sync
+ffffffff81cce130 T optc1_program_vline_interrupt
+ffffffff81cce2d0 T optc1_program_timing
+ffffffff81ccea70 T optc1_set_blank_data_double_buffer
+ffffffff81cceb00 T optc1_set_blank
+ffffffff81ccecf0 T optc1_is_blanked
+ffffffff81cced70 T optc1_enable_optc_clock
+ffffffff81ccefe0 T optc1_disable_crtc
+ffffffff81ccf120 T optc1_program_blank_color
+ffffffff81ccf1d0 T optc1_validate_timing
+ffffffff81ccf2c0 T optc1_get_vblank_counter
+ffffffff81ccf320 T optc1_lock
+ffffffff81ccf410 T optc1_unlock
+ffffffff81ccf480 T optc1_get_position
+ffffffff81ccf500 T optc1_is_counter_moving
+ffffffff81ccf570 T optc1_did_triggered_reset_occur
+ffffffff81ccf600 T optc1_disable_reset_trigger
+ffffffff81ccf6c0 T optc1_enable_reset_trigger
+ffffffff81ccf7e0 T optc1_enable_crtc_reset
+ffffffff81ccf940 T optc1_wait_for_state
+ffffffff81ccfa00 T optc1_set_early_control
+ffffffff81ccfa30 T optc1_set_static_screen_control
+ffffffff81ccfac0 T optc1_set_drr
+ffffffff81ccfd60 T optc1_get_crtc_scanoutpos
+ffffffff81ccfe60 T optc1_program_stereo
+ffffffff81cd0140 T optc1_is_stereo_left_eye
+ffffffff81cd01b0 T optc1_read_otg_state
+ffffffff81cd0420 T optc1_get_otg_active_size
+ffffffff81cd0530 T optc1_clear_optc_underflow
+ffffffff81cd05d0 T optc1_tg_init
+ffffffff81cd06c0 T optc1_is_tg_enabled
+ffffffff81cd0720 T optc1_is_optc_underflow_occurred
+ffffffff81cd0790 T optc1_configure_crc
+ffffffff81cd0ac0 T optc1_get_crc
+ffffffff81cd0bb0 T dcn10_timing_generator_init
+ffffffff81cd0c20 t optc1_enable_crtc
+ffffffff81cd0d70 t optc1_set_test_pattern
+ffffffff81cd2000 T dcn10_aux_engine_create
+ffffffff81cd2080 T dcn10_link_encoder_create
+ffffffff81cd2130 T dcn10_clock_source_create
+ffffffff81cd2210 T dcn10_clock_source_destroy
+ffffffff81cd2260 T dcn10_add_stream_to_ctx
+ffffffff81cd2400 T dcn10_create_resource_pool
+ffffffff81cd3220 t destruct
+ffffffff81cd3520 t dcn10_destroy_resource_pool
+ffffffff81cd3580 t dcn10_acquire_idle_pipe_for_layer
+ffffffff81cd36a0 t dcn10_validate_plane
+ffffffff81cd36f0 t read_dce_straps
+ffffffff81cd3710 t create_audio
+ffffffff81cd3740 t dcn10_stream_encoder_create
+ffffffff81cd37e0 t dcn10_hwseq_create
+ffffffff81cd3850 t dcn10_get_dcc_compression_cap
+ffffffff81cd4000 T enc1_update_generic_info_packet
+ffffffff81cd4560 T enc1_stream_encoder_dp_set_stream_attribute
+ffffffff81cd4a20 T enc1_stream_encoder_hdmi_set_stream_attribute
+ffffffff81cd5070 t enc1_stream_encoder_set_stream_attribute_helper
+ffffffff81cd5170 T enc1_stream_encoder_dvi_set_stream_attribute
+ffffffff81cd5270 T enc1_stream_encoder_set_mst_bandwidth
+ffffffff81cd5450 T enc1_stream_encoder_update_dp_info_packets
+ffffffff81cd5660 T enc1_stream_encoder_stop_dp_info_packets
+ffffffff81cd5840 T enc1_stream_encoder_dp_blank
+ffffffff81cd59f0 T enc1_stream_encoder_dp_unblank
+ffffffff81cd5cb0 T enc1_stream_encoder_set_avmute
+ffffffff81cd5d50 T enc1_se_audio_mute_control
+ffffffff81cd5df0 T enc1_se_dp_audio_setup
+ffffffff81cd5e00 t enc1_se_audio_setup
+ffffffff81cd5f80 T enc1_se_dp_audio_enable
+ffffffff81cd6310 T enc1_se_dp_audio_disable
+ffffffff81cd64e0 T enc1_se_hdmi_audio_setup
+ffffffff81cd6bc0 T enc1_se_hdmi_audio_disable
+ffffffff81cd6c60 T enc1_setup_stereo_sync
+ffffffff81cd6d50 T dcn10_stream_encoder_construct
+ffffffff81cd6da0 t enc1_stream_encoder_update_hdmi_info_packets
+ffffffff81cd71d0 t enc1_stream_encoder_stop_hdmi_info_packets
+ffffffff81cd8000 T dml_init_instance
+ffffffff81cd9000 T print__rq_params_st
+ffffffff81cd9030 T print__data_rq_sizing_params_st
+ffffffff81cd9060 T print__data_rq_dlg_params_st
+ffffffff81cd9090 T print__data_rq_misc_params_st
+ffffffff81cd90c0 T print__rq_dlg_params_st
+ffffffff81cd90f0 T print__dlg_sys_params_st
+ffffffff81cd9120 T print__data_rq_regs_st
+ffffffff81cd9150 T print__rq_regs_st
+ffffffff81cd9180 T print__dlg_regs_st
+ffffffff81cd91b0 T print__ttu_regs_st
+ffffffff81cda000 T dml1_extract_rq_regs
+ffffffff81cda1d0 t extract_rq_sizing_regs
+ffffffff81cda370 T dml1_rq_dlg_get_rq_params
+ffffffff81cda5e0 t get_surf_rq_param
+ffffffff81cdb2d0 T dml1_rq_dlg_get_dlg_params
+ffffffff81cde000 T dml_round
+ffffffff81cdf000 T dal_hw_factory_dce110_init
+ffffffff81cdf060 t define_hpd_registers
+ffffffff81cdf0b0 t define_ddc_registers
+ffffffff81ce0000 T dal_hw_translate_dce110_init
+ffffffff81ce0030 t offset_to_id
+ffffffff81ce0390 t id_to_offset
+ffffffff81ce1000 T dal_hw_factory_dce120_init
+ffffffff81ce1060 t define_hpd_registers
+ffffffff81ce10b0 t define_ddc_registers
+ffffffff81ce2000 T dal_hw_translate_dce120_init
+ffffffff81ce2030 t offset_to_id
+ffffffff81ce23a0 t id_to_offset
+ffffffff81ce3000 T dal_hw_factory_dce80_init
+ffffffff81ce3060 t define_hpd_registers
+ffffffff81ce30b0 t define_ddc_registers
+ffffffff81ce4000 T dal_hw_translate_dce80_init
+ffffffff81ce4030 t offset_to_id
+ffffffff81ce4730 t id_to_offset
+ffffffff81ce5000 T dal_hw_factory_dcn10_init
+ffffffff81ce5060 t define_hpd_registers
+ffffffff81ce50b0 t define_ddc_registers
+ffffffff81ce6000 T dal_hw_translate_dcn10_init
+ffffffff81ce6030 t offset_to_id
+ffffffff81ce6390 t id_to_offset
+ffffffff81ce7000 T dal_hw_factory_diag_fpga_init
+ffffffff81ce8000 T dal_hw_translate_diag_fpga_init
+ffffffff81ce9000 T dal_gpio_open
+ffffffff81ce9080 T dal_gpio_open_ex
+ffffffff81ce9100 T dal_gpio_get_value
+ffffffff81ce9170 T dal_gpio_set_value
+ffffffff81ce91e0 T dal_gpio_get_mode
+ffffffff81ce9210 T dal_gpio_change_mode
+ffffffff81ce9280 T dal_gpio_get_id
+ffffffff81ce92b0 T dal_gpio_get_enum
+ffffffff81ce92e0 T dal_gpio_set_config
+ffffffff81ce9350 T dal_gpio_get_pin_info
+ffffffff81ce93a0 T dal_gpio_get_sync_source
+ffffffff81ce9430 T dal_gpio_get_output_state
+ffffffff81ce9460 T dal_gpio_close
+ffffffff81ce94b0 T dal_gpio_create
+ffffffff81ce9560 T dal_gpio_destroy
+ffffffff81cea000 T dal_gpio_service_create
+ffffffff81cea230 T dal_gpio_service_create_irq
+ffffffff81cea330 T dal_gpio_create_irq
+ffffffff81cea3d0 T dal_gpio_service_destroy
+ffffffff81cea4f0 T dal_gpio_service_open
+ffffffff81cea810 T dal_gpio_service_close
+ffffffff81cea8d0 T dal_irq_get_source
+ffffffff81cea940 T dal_irq_get_rx_source
+ffffffff81cea990 T dal_irq_setup_hpd_filter
+ffffffff81cea9f0 T dal_gpio_destroy_irq
+ffffffff81ceaa80 T dal_gpio_create_ddc
+ffffffff81ceabf0 T dal_gpio_destroy_ddc
+ffffffff81ceacb0 T dal_ddc_close
+ffffffff81ceace0 T dal_ddc_open
+ffffffff81ceae30 T dal_ddc_change_mode
+ffffffff81ceaed0 T dal_ddc_get_line
+ffffffff81ceaee0 T dal_ddc_set_config
+ffffffff81ceb000 T dal_hw_ddc_create
+ffffffff81ceb0e0 t destroy
+ffffffff81ceb140 t set_config
+ffffffff81cec000 T dal_hw_factory_init
+ffffffff81cec0b0 T dal_hw_factory_destroy
+ffffffff81ced000 T dal_hw_gpio_open
+ffffffff81ced0a0 T dal_hw_gpio_config_mode
+ffffffff81ced220 T dal_hw_gpio_get_value
+ffffffff81ced280 T dal_hw_gpio_set_value
+ffffffff81ced360 T dal_hw_gpio_change_mode
+ffffffff81ced370 T dal_hw_gpio_close
+ffffffff81ced4a0 T dal_hw_gpio_construct
+ffffffff81ced4f0 T dal_hw_gpio_destruct
+ffffffff81cee000 T dal_hw_hpd_create
+ffffffff81cee110 t destroy
+ffffffff81cee170 t get_value
+ffffffff81cee1f0 t set_config
+ffffffff81cef000 T dal_hw_translate_init
+ffffffff81cf0000 T dal_aux_engine_get_engine_type
+ffffffff81cf0030 T dal_aux_engine_acquire
+ffffffff81cf00d0 T dal_aux_engine_submit_request
+ffffffff81cf01b0 t read_command
+ffffffff81cf0570 t write_command
+ffffffff81cf0930 T dal_aux_engine_construct
+ffffffff81cf0970 T dal_aux_engine_destruct
+ffffffff81cf1000 T dal_i2caux_dce100_create
+ffffffff81cf2000 T dal_aux_engine_dce110_create
+ffffffff81cf20e0 t release_engine
+ffffffff81cf2160 t destroy
+ffffffff81cf21c0 t acquire_engine
+ffffffff81cf2380 t submit_channel_request
+ffffffff81cf2910 t process_channel_reply
+ffffffff81cf29f0 t read_channel_reply
+ffffffff81cf2bd0 t get_channel_status
+ffffffff81cf2cf0 t is_engine_available
+ffffffff81cf3000 T dal_i2c_hw_engine_dce110_create
+ffffffff81cf31a0 t release_engine
+ffffffff81cf3370 t destroy
+ffffffff81cf33d0 t get_speed
+ffffffff81cf3450 t set_speed
+ffffffff81cf3590 t setup_engine
+ffffffff81cf3770 t submit_channel_request
+ffffffff81cf3d30 t process_channel_reply
+ffffffff81cf3e30 t get_channel_status
+ffffffff81cf3ec0 t get_hw_buffer_available_size
+ffffffff81cf3ef0 t get_transaction_timeout
+ffffffff81cf4000 T dal_i2c_sw_engine_dce110_create
+ffffffff81cf40f0 t release_engine
+ffffffff81cf4120 t destroy
+ffffffff81cf4180 t acquire_engine
+ffffffff81cf5000 T dal_i2caux_dce110_construct
+ffffffff81cf51d0 T dal_i2caux_dce110_create
+ffffffff81cf5280 t destroy
+ffffffff81cf52e0 t acquire_i2c_hw_engine
+ffffffff81cf5370 t release_engine
+ffffffff81cf6000 T dal_i2caux_dce112_create
+ffffffff81cf7000 T dal_i2caux_dce120_create
+ffffffff81cf8000 T dal_i2c_hw_engine_dce80_create
+ffffffff81cf8170 t release_engine
+ffffffff81cf82c0 t destroy
+ffffffff81cf8320 t get_speed
+ffffffff81cf8380 t set_speed
+ffffffff81cf8410 t setup_engine
+ffffffff81cf8510 t submit_channel_request
+ffffffff81cf8800 t process_channel_reply
+ffffffff81cf88c0 t get_channel_status
+ffffffff81cf8940 t get_hw_buffer_available_size
+ffffffff81cf8970 t get_transaction_timeout
+ffffffff81cf9000 T dal_i2c_sw_engine_dce80_create
+ffffffff81cf90f0 t release_engine
+ffffffff81cf9120 t destroy
+ffffffff81cf9180 t acquire_engine
+ffffffff81cfa000 T dal_i2caux_dce80_create
+ffffffff81cfa3c0 t destroy
+ffffffff81cfa420 t acquire_i2c_hw_engine
+ffffffff81cfa4d0 t release_engine
+ffffffff81cfb000 T dal_i2caux_dcn10_create
+ffffffff81cfc000 T dal_i2caux_diag_fpga_create
+ffffffff81cfc0a0 t destroy
+ffffffff81cfd000 T dal_i2caux_construct_engine
+ffffffff81cfd030 T dal_i2caux_destruct_engine
+ffffffff81cfe000 T dal_i2c_engine_acquire
+ffffffff81cfe0b0 T dal_i2c_engine_setup_i2c_engine
+ffffffff81cfe0e0 T dal_i2c_engine_submit_channel_request
+ffffffff81cfe110 T dal_i2c_engine_process_channel_reply
+ffffffff81cfe140 T dal_i2c_engine_construct
+ffffffff81cfe180 T dal_i2c_engine_destruct
+ffffffff81cff000 T dal_i2c_generic_hw_engine_get_engine_type
+ffffffff81cff030 T dal_i2c_generic_hw_engine_submit_request
+ffffffff81cff250 T dal_i2c_generic_hw_engine_get_transaction_timeout
+ffffffff81cff2b0 T dal_i2c_generic_hw_engine_construct
+ffffffff81cff2c0 T dal_i2c_generic_hw_engine_destruct
+ffffffff81d00000 T dal_i2c_hw_engine_get_engine_type
+ffffffff81d00030 T dal_i2c_hw_engine_submit_request
+ffffffff81d001c0 T dal_i2c_hw_engine_acquire_engine
+ffffffff81d00240 T dal_i2c_hw_engine_wait_on_operation_result
+ffffffff81d002d0 T dal_i2c_hw_engine_construct
+ffffffff81d00310 T dal_i2c_hw_engine_destruct
+ffffffff81d01000 T dal_i2c_sw_engine_get_engine_type
+ffffffff81d01030 T dal_i2c_sw_engine_submit_request
+ffffffff81d01170 T dal_i2c_sw_engine_get_speed
+ffffffff81d011a0 T dal_i2c_sw_engine_set_speed
+ffffffff81d01230 T dal_i2caux_i2c_sw_engine_acquire_engine
+ffffffff81d01290 T dal_i2c_sw_engine_submit_channel_request
+ffffffff81d019b0 T dal_i2c_sw_engine_get_channel_status
+ffffffff81d019e0 T dal_i2c_sw_engine_destruct
+ffffffff81d019f0 T dal_i2c_sw_engine_construct
+ffffffff81d01aa0 T dal_i2c_sw_engine_create
+ffffffff81d01bd0 t write_byte
+ffffffff81d01df0 t destroy
+ffffffff81d01e40 t release_engine
+ffffffff81d02000 T dal_i2caux_create
+ffffffff81d020b0 T dal_i2caux_submit_i2c_command
+ffffffff81d022d0 T dal_i2caux_submit_aux_command
+ffffffff81d024c0 T dal_i2caux_configure_aux
+ffffffff81d02540 T dal_i2caux_destroy
+ffffffff81d025c0 T dal_i2caux_get_reference_clock
+ffffffff81d02650 T dal_i2caux_acquire_i2c_sw_engine
+ffffffff81d02710 T dal_i2caux_acquire_aux_engine
+ffffffff81d027c0 T dal_i2caux_release_engine
+ffffffff81d02810 T dal_i2caux_construct
+ffffffff81d02950 T dal_i2caux_destruct
+ffffffff81d03000 T dal_irq_service_dummy_set
+ffffffff81d03050 T dal_irq_service_dummy_ack
+ffffffff81d030a0 T dce110_vblank_set
+ffffffff81d03170 T to_dal_irq_source_dce110
+ffffffff81d032f0 T dal_irq_service_dce110_create
+ffffffff81d03370 t hpd_ack
+ffffffff81d04000 T dal_irq_service_dce120_create
 ffffffff81d04080 t hpd_ack
-ffffffff81d05000 T to_dal_irq_source_dcn10
-ffffffff81d050f0 T dal_irq_service_dcn10_create
-ffffffff81d05170 t hpd_ack
-ffffffff81d06000 T dal_irq_service_construct
-ffffffff81d06070 T dal_irq_service_destroy
-ffffffff81d060f0 T find_irq_source_info
-ffffffff81d06130 T dal_irq_service_set_generic
-ffffffff81d061b0 T dal_irq_service_set
-ffffffff81d06320 T dal_irq_service_ack
-ffffffff81d06410 T dal_irq_service_ack_generic
-ffffffff81d06480 T dal_irq_service_to_irq_source
-ffffffff81d07000 T virtual_link_encoder_construct
-ffffffff81d07060 t virtual_link_encoder_validate_output_with_stream
-ffffffff81d07090 t virtual_link_encoder_hw_init
-ffffffff81d070c0 t virtual_link_encoder_setup
-ffffffff81d070f0 t virtual_link_encoder_enable_tmds_output
-ffffffff81d07120 t virtual_link_encoder_enable_dp_output
-ffffffff81d07150 t virtual_link_encoder_enable_dp_mst_output
-ffffffff81d07180 t virtual_link_encoder_disable_output
-ffffffff81d071b0 t virtual_link_encoder_dp_set_lane_settings
-ffffffff81d071e0 t virtual_link_encoder_dp_set_phy_pattern
-ffffffff81d07210 t virtual_link_encoder_update_mst_stream_allocation_table
-ffffffff81d07240 t virtual_link_encoder_connect_dig_be_to_fe
-ffffffff81d07270 t virtual_link_encoder_destroy
-ffffffff81d08000 T virtual_stream_encoder_construct
-ffffffff81d08050 T virtual_stream_encoder_create
-ffffffff81d08100 t virtual_stream_encoder_dp_set_stream_attribute
-ffffffff81d08130 t virtual_stream_encoder_hdmi_set_stream_attribute
-ffffffff81d08160 t virtual_stream_encoder_dvi_set_stream_attribute
-ffffffff81d08190 t virtual_stream_encoder_set_mst_bandwidth
-ffffffff81d081c0 t virtual_stream_encoder_update_hdmi_info_packets
-ffffffff81d081f0 t virtual_stream_encoder_stop_hdmi_info_packets
-ffffffff81d08220 t virtual_stream_encoder_update_dp_info_packets
-ffffffff81d08250 t virtual_stream_encoder_stop_dp_info_packets
-ffffffff81d08280 t virtual_stream_encoder_dp_blank
-ffffffff81d082b0 t virtual_stream_encoder_dp_unblank
-ffffffff81d082e0 t virtual_audio_mute_control
-ffffffff81d08310 t virtual_stream_encoder_set_avmute
-ffffffff81d09000 T setup_x_points_distribution
-ffffffff81d09160 T precompute_pq
-ffffffff81d09370 t compute_pq
-ffffffff81d09540 T precompute_de_pq
-ffffffff81d09830 T mod_color_calculate_regamma_params
-ffffffff81d09b70 t build_evenly_distributed_points
-ffffffff81d09cd0 t scale_gamma
-ffffffff81d09e60 t scale_gamma_dx
-ffffffff81d0a4c0 t build_pq
-ffffffff81d0a5f0 t map_regamma_hw_to_x_user
-ffffffff81d0ad10 t apply_lut_1d
-ffffffff81d0b010 T calculate_user_regamma_coeff
-ffffffff81d0b2d0 t translate_from_linear_space_ex
-ffffffff81d0b500 T calculate_user_regamma_ramp
-ffffffff81d0bcf0 T mod_color_calculate_degamma_params
-ffffffff81d0c010 t build_degamma
-ffffffff81d0c370 T mod_color_calculate_curve
-ffffffff81d0c9d0 T mod_color_calculate_degamma_curve
-ffffffff81d0cfe0 t build_coefficients
-ffffffff81d0d150 t calculate_mapped_value
-ffffffff81d0e000 T mod_freesync_create
-ffffffff81d0e220 T mod_freesync_destroy
-ffffffff81d0e2c0 T mod_freesync_add_stream
-ffffffff81d0e5b0 T mod_freesync_remove_stream
-ffffffff81d0e6e0 T mod_freesync_handle_v_update
-ffffffff81d0eba0 t set_freesync_on_streams
-ffffffff81d0f210 T mod_freesync_update_state
-ffffffff81d0f460 T mod_freesync_get_state
-ffffffff81d0f580 T mod_freesync_set_user_enable
-ffffffff81d0f720 T mod_freesync_get_user_enable
-ffffffff81d0f7f0 T mod_freesync_get_static_ramp_active
-ffffffff81d0f8b0 T mod_freesync_override_min_max
-ffffffff81d0fa70 t calc_freesync_range
-ffffffff81d0fd20 t update_stream
-ffffffff81d0fec0 T mod_freesync_get_min_max
-ffffffff81d0ffa0 T mod_freesync_get_vmin_vmax
-ffffffff81d10080 T mod_freesync_get_v_position
-ffffffff81d10170 T mod_freesync_notify_mode_change
-ffffffff81d10320 T mod_freesync_pre_update_plane_addresses
-ffffffff81d10720 T mod_freesync_get_settings
-ffffffff81d11000 T amdgpu_acpi_is_pcie_performance_request_supported
-ffffffff81d11040 T amdgpu_acpi_pcie_notify_device_ready
-ffffffff81d11130 T amdgpu_acpi_pcie_performance_request
-ffffffff81d115d0 T amdgpu_acpi_init
-ffffffff81d11c20 t amdgpu_acpi_event
-ffffffff81d11ec0 T amdgpu_acpi_fini
-ffffffff81d12000 T amdgpu_afmt_acr
-ffffffff81d13000 T amdgpu_amdkfd_init
-ffffffff81d13040 T amdgpu_amdkfd_fini
-ffffffff81d13080 T amdgpu_amdkfd_device_probe
-ffffffff81d130f0 T amdgpu_amdkfd_gfx_8_0_get_functions
-ffffffff81d13120 T amdgpu_amdkfd_gfx_9_0_get_functions
-ffffffff81d13150 T amdgpu_amdkfd_device_init
-ffffffff81d13360 T amdgpu_amdkfd_device_fini
-ffffffff81d133c0 T amdgpu_amdkfd_interrupt
-ffffffff81d13400 T amdgpu_amdkfd_suspend
-ffffffff81d13440 T amdgpu_amdkfd_resume
-ffffffff81d13490 T amdgpu_amdkfd_pre_reset
-ffffffff81d134e0 T amdgpu_amdkfd_post_reset
-ffffffff81d13530 T amdgpu_amdkfd_gpu_reset
-ffffffff81d13540 T alloc_gtt_mem
-ffffffff81d137d0 t amdgpu_bo_reserve
-ffffffff81d13970 t amdgpu_bo_unreserve
-ffffffff81d13a60 T free_gtt_mem
-ffffffff81d13ad0 T get_local_mem_info
-ffffffff81d13af0 T get_gpu_clock_counter
-ffffffff81d13b30 T get_max_engine_clock_in_mhz
-ffffffff81d13bb0 T get_cu_info
-ffffffff81d13cc0 T amdgpu_amdkfd_get_vram_usage
-ffffffff81d13ce0 T amdgpu_amdkfd_submit_ib
-ffffffff81d13e80 T amdgpu_amdkfd_set_compute_idle
-ffffffff81d13ee0 T amdgpu_amdkfd_is_kfd_vmid
-ffffffff81d13f20 T amdkfd_fence_check_mm
-ffffffff81d13f50 T amdgpu_amdkfd_unreserve_system_memory_limit
-ffffffff81d13f80 T amdgpu_amdkfd_gpuvm_destroy_cb
-ffffffff81d13fb0 T to_amdgpu_amdkfd_fence
-ffffffff81d13fe0 T amdgpu_amdkfd_evict_userptr
-ffffffff81d14010 T amdgpu_amdkfd_gfx_7_get_functions
-ffffffff81d15000 T amdgpu_atombios_lookup_i2c_gpio
-ffffffff81d15240 T amdgpu_atombios_i2c_init
-ffffffff81d154e0 T amdgpu_atombios_lookup_gpio
-ffffffff81d155f0 T amdgpu_atombios_has_dce_engine_info
-ffffffff81d15670 T amdgpu_atombios_get_connector_info_from_object_table
-ffffffff81d15f30 T amdgpu_atombios_get_clock_info
-ffffffff81d16230 T amdgpu_atombios_get_gfx_info
-ffffffff81d162f0 T amdgpu_atombios_get_vram_width
-ffffffff81d16370 T amdgpu_atombios_get_asic_ss_info
-ffffffff81d16700 T amdgpu_atombios_get_clock_dividers
-ffffffff81d16920 T amdgpu_atombios_get_memory_pll_dividers
-ffffffff81d16a60 T amdgpu_atombios_set_engine_dram_timings
-ffffffff81d16ad0 T amdgpu_atombios_get_default_voltages
-ffffffff81d16b90 T amdgpu_atombios_get_max_vddc
-ffffffff81d16c60 T amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx
-ffffffff81d16c80 T amdgpu_atombios_get_leakage_id_from_vbios
-ffffffff81d16d40 T amdgpu_atombios_get_leakage_vddc_based_on_leakage_params
-ffffffff81d16f30 T amdgpu_atombios_get_voltage_evv
-ffffffff81d16ff0 T amdgpu_atombios_get_svi2_info
-ffffffff81d170d0 T amdgpu_atombios_is_voltage_gpio
-ffffffff81d171b0 T amdgpu_atombios_get_voltage_table
-ffffffff81d17300 T amdgpu_atombios_init_mc_reg_table
-ffffffff81d17570 T amdgpu_atombios_has_gpu_virtualization_table
-ffffffff81d175c0 T amdgpu_atombios_scratch_regs_lock
-ffffffff81d17620 T amdgpu_atombios_scratch_regs_engine_hung
-ffffffff81d17680 T amdgpu_atombios_scratch_need_asic_init
-ffffffff81d176d0 T amdgpu_atombios_copy_swap
-ffffffff81d176e0 T amdgpu_atombios_fini
-ffffffff81d17780 T amdgpu_atombios_init
-ffffffff81d17a20 t cail_reg_read
-ffffffff81d17a40 t cail_reg_write
-ffffffff81d17a60 t cail_ioreg_read
-ffffffff81d17a80 t cail_ioreg_write
-ffffffff81d17aa0 t cail_mc_read
-ffffffff81d17ad0 t cail_mc_write
-ffffffff81d17b00 t cail_pll_read
-ffffffff81d17b30 t cail_pll_write
-ffffffff81d18000 T amdgpu_atomfirmware_gpu_supports_virtualization
-ffffffff81d18070 T amdgpu_atomfirmware_scratch_regs_init
-ffffffff81d180e0 T amdgpu_atomfirmware_allocate_fb_scratch
-ffffffff81d181e0 T amdgpu_atomfirmware_get_vram_width
-ffffffff81d18260 T amdgpu_atomfirmware_get_vram_type
-ffffffff81d18330 T amdgpu_atomfirmware_get_clock_info
-ffffffff81d184e0 T amdgpu_atomfirmware_get_gfx_info
-ffffffff81d19000 T amdgpu_benchmark
-ffffffff81d19940 t amdgpu_benchmark_move
-ffffffff81d19c60 t amdgpu_bo_reserve
-ffffffff81d19ea0 t amdgpu_bo_unreserve
-ffffffff81d1a000 T amdgpu_read_bios
-ffffffff81d1a240 T amdgpu_get_bios
-ffffffff81d1a730 t igp_read_bios_from_vram
-ffffffff81d1b000 T amdgpu_bo_list_create
-ffffffff81d1b220 T amdgpu_bo_list_get
-ffffffff81d1b280 T amdgpu_bo_list_get_list
-ffffffff81d1b400 T amdgpu_bo_list_put
-ffffffff81d1b4a0 T amdgpu_bo_create_list_entry_array
-ffffffff81d1b5f0 T amdgpu_bo_list_ioctl
-ffffffff81d1c000 T amdgpu_cgs_create_device
-ffffffff81d1c080 T amdgpu_cgs_destroy_device
-ffffffff81d1c0a0 t amdgpu_cgs_read_register
-ffffffff81d1c0c0 t amdgpu_cgs_write_register
-ffffffff81d1c0e0 t amdgpu_cgs_read_ind_register
-ffffffff81d1c1c0 t amdgpu_cgs_write_ind_register
-ffffffff81d1c280 t amdgpu_cgs_get_firmware_info
-ffffffff81d1d000 T amdgpu_connector_hotplug
-ffffffff81d1d0f0 T amdgpu_connector_get_monitor_bpc
-ffffffff81d1d390 T amdgpu_connector_edid
-ffffffff81d1d440 T amdgpu_connector_encoder_get_dp_bridge_encoder_id
-ffffffff81d1d520 T amdgpu_connector_is_dp12_capable
-ffffffff81d1d610 T amdgpu_connector_add
-ffffffff81d1e140 t amdgpu_connector_dp_detect
-ffffffff81d1e380 t amdgpu_connector_dvi_force
-ffffffff81d1e3c0 t amdgpu_connector_set_property
-ffffffff81d1e7f0 t amdgpu_connector_unregister
-ffffffff81d1e850 t amdgpu_connector_destroy
-ffffffff81d1e8c0 t amdgpu_connector_best_single_encoder
-ffffffff81d1e970 t amdgpu_connector_update_scratch_regs
-ffffffff81d1eac0 t amdgpu_connector_find_encoder
-ffffffff81d1eb90 t amdgpu_connector_dp_get_modes
-ffffffff81d1ef50 t amdgpu_connector_dp_mode_valid
-ffffffff81d1f0c0 t amdgpu_connector_dvi_encoder
-ffffffff81d1f280 t amdgpu_connector_get_edid
-ffffffff81d1f3c0 t amdgpu_connector_add_common_modes
-ffffffff81d1f4b0 t amdgpu_connector_set_lcd_property
-ffffffff81d1f560 t amdgpu_connector_vga_detect
-ffffffff81d1f6d0 t amdgpu_connector_vga_get_modes
-ffffffff81d1f740 t amdgpu_connector_vga_mode_valid
-ffffffff81d1f7a0 t amdgpu_connector_dvi_detect
-ffffffff81d1fb80 t amdgpu_connector_dvi_mode_valid
-ffffffff81d1fcc0 t amdgpu_connector_lvds_detect
-ffffffff81d1fd60 t amdgpu_connector_lvds_get_modes
-ffffffff81d1ffb0 t amdgpu_connector_lvds_mode_valid
-ffffffff81d21000 T amdgpu_cs_report_moved_bytes
-ffffffff81d21070 T amdgpu_cs_ioctl
-ffffffff81d22fa0 T amdgpu_cs_wait_ioctl
-ffffffff81d23150 T amdgpu_cs_fence_to_handle_ioctl
-ffffffff81d23390 t amdgpu_cs_get_fence
-ffffffff81d23440 T amdgpu_cs_wait_fences_ioctl
-ffffffff81d23820 T amdgpu_cs_find_mapping
-ffffffff81d23920 t amdgpu_cs_validate
-ffffffff81d23bc0 t amdgpu_cs_bo_validate
-ffffffff81d24000 T amdgpu_ctx_ioctl
-ffffffff81d246f0 T amdgpu_ctx_get
-ffffffff81d24770 T amdgpu_ctx_put
-ffffffff81d24910 t kref_put
-ffffffff81d24960 T amdgpu_ctx_add_fence
-ffffffff81d24b50 T amdgpu_ctx_get_fence
-ffffffff81d24c40 T amdgpu_ctx_priority_override
-ffffffff81d24d00 T amdgpu_ctx_wait_prev_fence
-ffffffff81d24db0 T amdgpu_ctx_mgr_init
-ffffffff81d24df0 T amdgpu_ctx_mgr_entity_flush
-ffffffff81d24f20 T amdgpu_ctx_mgr_entity_fini
-ffffffff81d25050 T amdgpu_ctx_mgr_fini
-ffffffff81d25110 t amdgpu_ctx_fini
-ffffffff81d25250 t dma_fence_release
-ffffffff81d26000 T amdgpu_debugfs_add_files
-ffffffff81d260c0 T amdgpu_debugfs_init
-ffffffff81d260f0 T amdgpu_debugfs_regs_init
-ffffffff81d26120 T amdgpu_debugfs_regs_cleanup
-ffffffff81d27000 T amdgpu_device_is_px
-ffffffff81d27040 T amdgpu_mm_rreg
-ffffffff81d27150 T amdgpu_mm_rreg8
-ffffffff81d271a0 T amdgpu_mm_wreg8
-ffffffff81d271f0 T amdgpu_mm_wreg
-ffffffff81d27350 T amdgpu_io_rreg
-ffffffff81d273c0 T amdgpu_io_wreg
-ffffffff81d274a0 T amdgpu_mm_rdoorbell
-ffffffff81d27500 T amdgpu_mm_wdoorbell
-ffffffff81d27540 T amdgpu_mm_rdoorbell64
-ffffffff81d275a0 T amdgpu_mm_wdoorbell64
-ffffffff81d275e0 T amdgpu_device_program_register_sequence
-ffffffff81d27780 T amdgpu_device_pci_config_reset
-ffffffff81d277b0 T amdgpu_device_wb_get
-ffffffff81d27860 T amdgpu_device_wb_free
-ffffffff81d278a0 T amdgpu_device_vram_location
-ffffffff81d27900 T amdgpu_device_gart_location
-ffffffff81d27a20 T amdgpu_device_resize_fb_bar
-ffffffff81d27a90 T amdgpu_device_need_post
-ffffffff81d27ba0 T amdgpu_device_ip_set_clockgating_state
-ffffffff81d27c90 T amdgpu_device_ip_set_powergating_state
-ffffffff81d27d80 T amdgpu_device_ip_get_clockgating_state
-ffffffff81d27e20 T amdgpu_device_ip_wait_for_idle
-ffffffff81d27ec0 T amdgpu_device_ip_is_idle
-ffffffff81d27f50 T amdgpu_device_ip_get_ip_block
-ffffffff81d27fd0 T amdgpu_device_ip_block_version_cmp
-ffffffff81d28070 T amdgpu_device_ip_block_add
-ffffffff81d280d0 T amdgpu_device_ip_suspend
-ffffffff81d28110 t amdgpu_device_ip_suspend_phase1
-ffffffff81d28260 t amdgpu_device_ip_suspend_phase2
-ffffffff81d284a0 T amdgpu_device_asic_has_dc_support
-ffffffff81d28500 T amdgpu_device_has_dc_support
-ffffffff81d28570 T amdgpu_device_init
-ffffffff81d29c20 t amdgpu_invalid_rreg
-ffffffff81d29c50 t amdgpu_invalid_wreg
-ffffffff81d29c80 t amdgpu_block_invalid_rreg
-ffffffff81d29cc0 t amdgpu_block_invalid_wreg
-ffffffff81d29d00 t amdgpu_device_ip_late_init_func_handler
-ffffffff81d29d60 t amdgpu_device_ip_late_init
-ffffffff81d2a030 T amdgpu_device_fini
-ffffffff81d2a550 T amdgpu_device_suspend
-ffffffff81d2a7b0 t amdgpu_bo_reserve
-ffffffff81d2a950 t amdgpu_bo_unreserve
-ffffffff81d2aa40 T amdgpu_device_resume
-ffffffff81d2adc0 T amdgpu_device_gpu_recover
-ffffffff81d2b860 t __delayed_work_tick
-ffffffff81d2b880 t amdgpu_device_handle_vram_lost
-ffffffff81d2c000 T amdgpu_display_crtc_page_flip_target
-ffffffff81d2c440 t amdgpu_display_flip_work_func
-ffffffff81d2c660 t amdgpu_display_unpin_work_func
-ffffffff81d2c700 t amdgpu_bo_reserve
-ffffffff81d2c940 T amdgpu_display_supported_domains
-ffffffff81d2c9a0 t amdgpu_bo_unreserve
-ffffffff81d2ca90 T amdgpu_display_crtc_set_config
-ffffffff81d2cb50 T amdgpu_display_print_display_setup
-ffffffff81d2cbd0 T amdgpu_display_ddc_probe
-ffffffff81d2cc90 T amdgpu_display_framebuffer_init
-ffffffff81d2cd00 T amdgpu_display_user_framebuffer_create
-ffffffff81d2ce50 T amdgpu_display_modeset_create_props
-ffffffff81d2d020 T amdgpu_display_update_priority
-ffffffff81d2d060 T amdgpu_display_crtc_scaling_mode_fixup
-ffffffff81d2d320 T amdgpu_display_get_crtc_scanoutpos
-ffffffff81d2d4f0 T amdgpu_display_crtc_idx_to_irq_type
-ffffffff81d2d530 t __delayed_work_tick
-ffffffff81d2d550 t amdgpu_display_flip_handle_fence
-ffffffff81d2d720 t amdgpu_display_flip_callback
-ffffffff81d2e000 T amdgpu_dpm_print_class_info
-ffffffff81d2e2c0 T amdgpu_dpm_print_cap_info
-ffffffff81d2e340 T amdgpu_dpm_print_ps_status
-ffffffff81d2e3d0 T amdgpu_dpm_get_active_displays
-ffffffff81d2e470 T amdgpu_dpm_get_vblank_time
-ffffffff81d2e530 T amdgpu_dpm_get_vrefresh
-ffffffff81d2e5c0 T amdgpu_calculate_u_and_p
-ffffffff81d2e630 T amdgpu_calculate_at
-ffffffff81d2e6e0 T amdgpu_is_uvd_state
-ffffffff81d2e710 T amdgpu_is_internal_thermal_sensor
-ffffffff81d2e750 T amdgpu_get_platform_caps
-ffffffff81d2e7f0 T amdgpu_parse_extended_power_table
-ffffffff81d2f870 T amdgpu_free_extended_power_table
-ffffffff81d2f980 T amdgpu_add_thermal_controller
-ffffffff81d2fba0 T amdgpu_get_pcie_gen_support
-ffffffff81d2fbf0 T amdgpu_get_pcie_lane_support
-ffffffff81d2fc50 T amdgpu_encode_pci_lane_width
-ffffffff81d2fc90 T amdgpu_get_vce_clock_state
-ffffffff81d30000 t amdgpu_get_crtc_scanout_position
-ffffffff81d31000 T amdgpu_link_encoder_connector
-ffffffff81d310d0 T amdgpu_encoder_set_active_device
-ffffffff81d31130 T amdgpu_get_connector_for_encoder
-ffffffff81d311b0 T amdgpu_get_connector_for_encoder_init
-ffffffff81d31230 T amdgpu_get_external_encoder
-ffffffff81d312b0 T amdgpu_encoder_get_dp_bridge_encoder_id
-ffffffff81d31340 T amdgpu_panel_mode_fixup
-ffffffff81d314c0 T amdgpu_dig_monitor_is_duallink
-ffffffff81d32000 T amdgpu_align_pitch
-ffffffff81d32050 T amdgpu_fbdev_init
-ffffffff81d32190 T amdgpu_burner_cb
-ffffffff81d321b0 T amdgpu_fbdev_fini
-ffffffff81d322b0 T amdgpu_fbdev_set_suspend
-ffffffff81d322f0 T amdgpu_fbdev_total_size
-ffffffff81d32340 T amdgpu_fbdev_robj_is_fb
-ffffffff81d32390 T amdgpu_burner
-ffffffff81d32410 t amdgpufb_create
-ffffffff81d32770 t amdgpu_bo_reserve
-ffffffff81d329b0 t amdgpu_bo_unreserve
-ffffffff81d33000 T amdgpu_fence_slab_init
-ffffffff81d33060 T amdgpu_fence_slab_fini
-ffffffff81d33080 T amdgpu_fence_emit
-ffffffff81d33240 T amdgpu_fence_emit_polling
-ffffffff81d332b0 T amdgpu_fence_process
-ffffffff81d334a0 T amdgpu_fence_wait_empty
-ffffffff81d33560 T amdgpu_fence_wait_polling
-ffffffff81d33600 T amdgpu_fence_count_emitted
-ffffffff81d33640 T amdgpu_fence_driver_start_ring
-ffffffff81d33720 T amdgpu_fence_driver_init_ring
-ffffffff81d33890 t amdgpu_fence_fallback
-ffffffff81d338a0 T amdgpu_fence_driver_init
-ffffffff81d338d0 T amdgpu_debugfs_fence_init
-ffffffff81d33900 T amdgpu_fence_driver_fini
-ffffffff81d33a40 T amdgpu_fence_driver_force_completion
-ffffffff81d33a60 T amdgpu_fence_driver_suspend
-ffffffff81d33b00 T amdgpu_fence_driver_resume
-ffffffff81d33b80 t amdgpu_fence_get_driver_name
-ffffffff81d33bb0 t amdgpu_fence_get_timeline_name
-ffffffff81d33bf0 t amdgpu_fence_enable_signaling
-ffffffff81d33c70 t amdgpu_fence_release
-ffffffff81d34000 T amdgpu_gart_table_vram_alloc
-ffffffff81d340a0 T amdgpu_gart_table_vram_pin
-ffffffff81d34170 t amdgpu_bo_reserve
-ffffffff81d343b0 t amdgpu_bo_unreserve
-ffffffff81d344a0 T amdgpu_gart_table_vram_unpin
-ffffffff81d34520 T amdgpu_gart_table_vram_free
-ffffffff81d34560 T amdgpu_gart_unbind
-ffffffff81d34640 T amdgpu_gart_map
-ffffffff81d34700 T amdgpu_gart_bind
-ffffffff81d34820 T amdgpu_gart_init
-ffffffff81d34880 T amdgpu_gart_fini
-ffffffff81d35000 T amdgpu_gem_object_free
-ffffffff81d35050 T amdgpu_gem_object_create
-ffffffff81d35170 T amdgpu_gem_force_release
-ffffffff81d35190 T amdgpu_gem_object_open
-ffffffff81d35240 t amdgpu_bo_reserve
-ffffffff81d353f0 t amdgpu_bo_unreserve
-ffffffff81d354e0 T amdgpu_gem_object_close
-ffffffff81d356e0 T amdgpu_gem_create_ioctl
-ffffffff81d35940 T amdgpu_gem_userptr_ioctl
-ffffffff81d35990 T amdgpu_mode_dumb_mmap
-ffffffff81d35a20 T amdgpu_gem_mmap_ioctl
-ffffffff81d35ac0 T amdgpu_gem_timeout
-ffffffff81d35bb0 T amdgpu_gem_wait_idle_ioctl
-ffffffff81d35c70 T amdgpu_gem_metadata_ioctl
-ffffffff81d35da0 T amdgpu_gem_va_ioctl
-ffffffff81d36120 T amdgpu_gem_op_ioctl
-ffffffff81d362a0 T amdgpu_mode_dumb_create
-ffffffff81d36440 T amdgpu_debugfs_gem_init
-ffffffff81d37000 T amdgpu_gfx_scratch_get
-ffffffff81d37080 T amdgpu_gfx_scratch_free
-ffffffff81d370c0 T amdgpu_gfx_parse_disable_cu
-ffffffff81d370e0 T amdgpu_gfx_compute_queue_acquire
-ffffffff81d373a0 T amdgpu_gfx_kiq_init_ring
-ffffffff81d375c0 T amdgpu_gfx_kiq_free_ring
-ffffffff81d375f0 T amdgpu_gfx_kiq_fini
-ffffffff81d37610 T amdgpu_gfx_kiq_init
-ffffffff81d37950 T amdgpu_gfx_compute_mqd_sw_init
-ffffffff81d37b90 T amdgpu_gfx_compute_mqd_sw_fini
-ffffffff81d38000 T amdgpu_gtt_mgr_has_gart_addr
-ffffffff81d38040 T amdgpu_gtt_mgr_usage
-ffffffff81d38080 T amdgpu_gtt_mgr_recover
-ffffffff81d38120 t amdgpu_gtt_mgr_init
-ffffffff81d381d0 t amdgpu_gtt_mgr_fini
-ffffffff81d38250 t amdgpu_gtt_mgr_new
-ffffffff81d38420 t amdgpu_gtt_mgr_del
-ffffffff81d384c0 t amdgpu_gtt_mgr_debug
-ffffffff81d39000 T amdgpu_bb_set_bits
-ffffffff81d390c0 T amdgpu_bb_set_dir
-ffffffff81d390f0 T amdgpu_bb_read_bits
-ffffffff81d39180 T amdgpu_acquire_bus
-ffffffff81d39360 T amdgpu_release_bus
-ffffffff81d39420 T amdgpu_send_start
-ffffffff81d39440 T amdgpu_send_stop
-ffffffff81d39460 T amdgpu_initiate_xfer
-ffffffff81d39480 T amdgpu_read_byte
-ffffffff81d394a0 T amdgpu_write_byte
-ffffffff81d394c0 T amdgpu_i2c_create
-ffffffff81d39670 T amdgpu_i2c_destroy
-ffffffff81d396f0 T amdgpu_i2c_init
-ffffffff81d39700 T amdgpu_i2c_fini
-ffffffff81d397a0 T amdgpu_i2c_add
-ffffffff81d39950 T amdgpu_i2c_lookup
-ffffffff81d39b10 T amdgpu_i2c_router_select_ddc_port
-ffffffff81d39c90 T amdgpu_i2c_router_select_cd_port
-ffffffff81d3a000 T amdgpu_ib_get
-ffffffff81d3a0e0 T amdgpu_ib_free
-ffffffff81d3a0f0 T amdgpu_ib_schedule
-ffffffff81d3a6a0 T amdgpu_ib_pool_init
-ffffffff81d3a710 T amdgpu_ib_pool_fini
-ffffffff81d3a760 T amdgpu_ib_ring_tests
-ffffffff81d3b000 T amdgpu_pasid_alloc
-ffffffff81d3b090 T amdgpu_pasid_free
-ffffffff81d3b0b0 T amdgpu_pasid_free_delayed
-ffffffff81d3b3d0 t amdgpu_pasid_free_cb
-ffffffff81d3b450 T amdgpu_vmid_had_gpu_reset
-ffffffff81d3b490 T amdgpu_vmid_grab
-ffffffff81d3c090 T amdgpu_vmid_alloc_reserved
-ffffffff81d3c190 T amdgpu_vmid_free_reserved
-ffffffff81d3c230 T amdgpu_vmid_reset
-ffffffff81d3c2b0 T amdgpu_vmid_reset_all
-ffffffff81d3c3d0 T amdgpu_vmid_mgr_init
-ffffffff81d3c5e0 T amdgpu_vmid_mgr_fini
-ffffffff81d3d000 T amdgpu_ih_ring_init
-ffffffff81d3d220 T amdgpu_ih_ring_fini
-ffffffff81d3d2c0 T amdgpu_ih_process
-ffffffff81d3d450 T amdgpu_ih_add_fault
-ffffffff81d3d590 T amdgpu_ih_clear_fault
-ffffffff81d3e000 T amdgpu_irq_disable_all
-ffffffff81d3e110 T amdgpu_irq_handler
-ffffffff81d3e150 T amdgpu_msi_ok
-ffffffff81d3e180 T amdgpu_irq_init
-ffffffff81d3e2c0 t amdgpu_hotplug_work_func
-ffffffff81d3e330 t amdgpu_irq_reset_work_func
-ffffffff81d3e370 T amdgpu_irq_fini
-ffffffff81d3e4c0 T amdgpu_irq_add_id
-ffffffff81d3e5c0 T amdgpu_irq_dispatch
-ffffffff81d3e660 T amdgpu_irq_update
-ffffffff81d3e710 T amdgpu_irq_enabled
-ffffffff81d3e770 T amdgpu_irq_gpu_reset_resume_helper
-ffffffff81d3e8a0 T amdgpu_irq_get
-ffffffff81d3e9a0 T amdgpu_irq_put
-ffffffff81d3ea90 T amdgpu_irq_add_domain
-ffffffff81d3eae0 T amdgpu_irq_remove_domain
-ffffffff81d3eb00 T amdgpu_irq_create_mapping
-ffffffff81d3f000 T amdgpu_job_alloc
-ffffffff81d3f100 T amdgpu_job_alloc_with_ib
-ffffffff81d3f240 T amdgpu_job_free_resources
-ffffffff81d3f300 T amdgpu_job_free
-ffffffff81d3f400 T amdgpu_job_submit
-ffffffff81d3f530 T amdgpu_job_submit_direct
-ffffffff81d3f5c0 t amdgpu_job_dependency
-ffffffff81d3f6f0 t amdgpu_job_run
-ffffffff81d3f8b0 t amdgpu_job_timedout
-ffffffff81d3f900 t amdgpu_job_free_cb
-ffffffff81d40000 T amdgpu_probe
-ffffffff81d40070 T amdgpu_attach
-ffffffff81d40760 T amdgpu_detach
-ffffffff81d40830 T amdgpu_activate
-ffffffff81d408e0 T amdgpu_driver_lastclose_kms
-ffffffff81d408f0 T amdgpu_driver_open_kms
-ffffffff81d40aa0 T amdgpu_driver_postclose_kms
-ffffffff81d40e80 T amdgpu_get_vblank_counter_kms
-ffffffff81d41010 T amdgpu_enable_vblank_kms
-ffffffff81d41050 T amdgpu_disable_vblank_kms
-ffffffff81d41090 t amdgpu_info_ioctl
-ffffffff81d42b60 T amdgpu_debugfs_firmware_init
-ffffffff81d42b90 T amdgpu_attachhook
-ffffffff81d42e70 T amdgpu_forcedetach
-ffffffff81d42f20 T amdgpu_wsioctl
-ffffffff81d43030 T amdgpu_wsmmap
-ffffffff81d43060 T amdgpu_alloc_screen
-ffffffff81d43090 T amdgpu_free_screen
-ffffffff81d430a0 T amdgpu_show_screen
-ffffffff81d43170 T amdgpu_enter_ddb
-ffffffff81d431d0 T amdgpu_doswitch
-ffffffff81d44000 T amdgpu_bo_is_amdgpu_bo
-ffffffff81d44030 t amdgpu_bo_destroy
-ffffffff81d441c0 T amdgpu_bo_placement_from_domain
-ffffffff81d443b0 T amdgpu_bo_create_reserved
-ffffffff81d446c0 T amdgpu_bo_create
-ffffffff81d44a30 t amdgpu_bo_reserve
-ffffffff81d44c70 T amdgpu_bo_pin
-ffffffff81d44c80 T amdgpu_bo_gpu_offset
-ffffffff81d44e60 T amdgpu_bo_kmap
-ffffffff81d44f10 T amdgpu_bo_unpin
-ffffffff81d450a0 t amdgpu_bo_unreserve
-ffffffff81d45190 T amdgpu_bo_unref
-ffffffff81d451e0 T amdgpu_bo_create_kernel
-ffffffff81d45240 T amdgpu_bo_free_kernel
-ffffffff81d45300 T amdgpu_bo_kunmap
-ffffffff81d45340 t amdgpu_bo_do_create
-ffffffff81d457c0 T amdgpu_bo_backup_to_shadow
-ffffffff81d458a0 T amdgpu_bo_fence
-ffffffff81d458c0 T amdgpu_bo_validate
-ffffffff81d45970 T amdgpu_bo_restore_from_shadow
-ffffffff81d45a50 T amdgpu_bo_kptr
-ffffffff81d45a80 T amdgpu_bo_ref
-ffffffff81d45ac0 T amdgpu_bo_pin_restricted
-ffffffff81d45e00 T amdgpu_bo_get_preferred_pin_domain
-ffffffff81d45e40 T amdgpu_bo_evict_vram
-ffffffff81d45e60 T amdgpu_bo_init
-ffffffff81d45ee0 T amdgpu_bo_late_init
-ffffffff81d45f20 T amdgpu_bo_fini
-ffffffff81d45f60 T amdgpu_bo_set_tiling_flags
-ffffffff81d45fb0 T amdgpu_bo_get_tiling_flags
-ffffffff81d45ff0 T amdgpu_bo_set_metadata
-ffffffff81d46100 T amdgpu_bo_get_metadata
-ffffffff81d461a0 T amdgpu_bo_move_notify
-ffffffff81d46240 T amdgpu_bo_fault_reserve_notify
-ffffffff81d47000 T amdgpu_pll_compute
-ffffffff81d47500 T amdgpu_pll_get_use_mask
-ffffffff81d47570 T amdgpu_pll_get_shared_dp_ppll
-ffffffff81d47620 T amdgpu_pll_get_shared_nondp_ppll
-ffffffff81d48000 T amdgpu_pm_acpi_event_handler
-ffffffff81d48080 T amdgpu_dpm_thermal_work_handler
-ffffffff81d48170 T amdgpu_pm_compute_clocks
-ffffffff81d48750 T amdgpu_dpm_enable_uvd
-ffffffff81d48800 T amdgpu_dpm_enable_vce
-ffffffff81d48920 T amdgpu_pm_print_power_states
-ffffffff81d489d0 T amdgpu_pm_sysfs_init
-ffffffff81d48a00 T amdgpu_pm_sysfs_fini
-ffffffff81d49000 T amdgpu_gem_prime_res_obj
-ffffffff81d49030 T amdgpu_gem_prime_export
-ffffffff81d490b0 T amdgpu_gem_prime_import
-ffffffff81d4a000 T psp_wait_for
-ffffffff81d4a0c0 T psp_gpu_reset
-ffffffff81d4a110 t psp_early_init
-ffffffff81d4a190 t psp_sw_init
-ffffffff81d4a200 t psp_sw_fini
-ffffffff81d4a2c0 t psp_hw_init
-ffffffff81d4a590 t psp_hw_fini
-ffffffff81d4a6a0 t psp_suspend
-ffffffff81d4a720 t psp_resume
-ffffffff81d4a7d0 t psp_set_clockgating_state
-ffffffff81d4a800 t psp_set_powergating_state
-ffffffff81d4a830 t psp_check_fw_loading_status
-ffffffff81d4a8b0 t psp_hw_start
-ffffffff81d4ab70 t psp_np_fw_load
-ffffffff81d4b000 T amdgpu_queue_mgr_init
-ffffffff81d4b0c0 T amdgpu_queue_mgr_fini
-ffffffff81d4b0f0 T amdgpu_queue_mgr_map
-ffffffff81d4b5c0 t amdgpu_lru_map
-ffffffff81d4c000 T amdgpu_ring_alloc
-ffffffff81d4c0e0 T amdgpu_ring_insert_nop
-ffffffff81d4c190 T amdgpu_ring_generic_pad_ib
-ffffffff81d4c1f0 T amdgpu_ring_commit
-ffffffff81d4c310 T amdgpu_ring_lru_touch
-ffffffff81d4c3a0 T amdgpu_ring_undo
-ffffffff81d4c3f0 T amdgpu_ring_priority_put
-ffffffff81d4c4d0 T amdgpu_ring_priority_get
-ffffffff81d4c580 T amdgpu_ring_init
-ffffffff81d4c9c0 T amdgpu_ring_fini
-ffffffff81d4cae0 T amdgpu_ring_lru_get
-ffffffff81d4cc90 T amdgpu_ring_emit_reg_write_reg_wait_helper
-ffffffff81d4d000 T amdgpu_sa_bo_manager_init
-ffffffff81d4d180 T amdgpu_sa_bo_manager_fini
-ffffffff81d4d510 T amdgpu_sa_bo_new
-ffffffff81d4de80 T amdgpu_sa_bo_free
-ffffffff81d4f000 T amdgpu_to_sched_priority
-ffffffff81d4f090 T amdgpu_sched_ioctl
-ffffffff81d50000 T amdgpu_sync_create
-ffffffff81d500b0 T amdgpu_sync_fence
-ffffffff81d502d0 T amdgpu_sync_resv
-ffffffff81d50450 T amdgpu_sync_peek_fence
-ffffffff81d50750 T amdgpu_sync_get_fence
-ffffffff81d50940 T amdgpu_sync_clone
-ffffffff81d50ba0 T amdgpu_sync_wait
-ffffffff81d50d00 T amdgpu_sync_free
-ffffffff81d50e60 T amdgpu_sync_init
-ffffffff81d50ec0 T amdgpu_sync_fini
-ffffffff81d51000 T amdgpu_test_moves
-ffffffff81d51890 t amdgpu_bo_reserve
-ffffffff81d51a40 t amdgpu_bo_unreserve
-ffffffff81d52000 T amdgpu_ttm_copy_mem_to_mem
-ffffffff81d52640 t amdgpu_map_buffer
-ffffffff81d52900 T amdgpu_copy_buffer
-ffffffff81d52bd0 T amdgpu_ttm_tt_get_user_pages
-ffffffff81d52c20 T amdgpu_ttm_tt_set_user_pages
-ffffffff81d52c40 T amdgpu_ttm_tt_mark_user_pages
-ffffffff81d52c60 T amdgpu_ttm_gart_bind
-ffffffff81d52d50 T amdgpu_ttm_alloc_gart
-ffffffff81d52f70 T amdgpu_ttm_tt_pte_flags
-ffffffff81d53000 T amdgpu_ttm_recover_gart
-ffffffff81d530b0 T amdgpu_ttm_tt_set_userptr
-ffffffff81d53130 T amdgpu_ttm_tt_get_usermm
-ffffffff81d53190 T amdgpu_ttm_tt_affect_userptr
-ffffffff81d531e0 T amdgpu_ttm_tt_userptr_invalidated
-ffffffff81d53220 T amdgpu_ttm_tt_userptr_needs_pages
-ffffffff81d53270 T amdgpu_ttm_tt_is_readonly
-ffffffff81d532b0 T amdgpu_ttm_init
-ffffffff81d53a60 T amdgpu_ttm_set_buffer_funcs_status
-ffffffff81d53b90 T amdgpu_ttm_late_init
-ffffffff81d53bb0 T amdgpu_ttm_fini
-ffffffff81d53cc0 T amdgpu_mmap
-ffffffff81d53d10 T amdgpu_fill_buffer
-ffffffff81d54040 t amdgpu_ttm_mem_global_init
-ffffffff81d54050 t amdgpu_ttm_mem_global_release
-ffffffff81d54060 t amdgpu_ttm_tt_create
-ffffffff81d54110 t amdgpu_ttm_tt_populate
-ffffffff81d541b0 t amdgpu_ttm_tt_unpopulate
-ffffffff81d54240 t amdgpu_invalidate_caches
-ffffffff81d54270 t amdgpu_init_mem_type
-ffffffff81d54370 t amdgpu_ttm_bo_eviction_valuable
-ffffffff81d54400 t amdgpu_evict_flags
-ffffffff81d545c0 t amdgpu_bo_move
-ffffffff81d54910 t amdgpu_verify_access
-ffffffff81d549b0 t amdgpu_ttm_io_mem_reserve
-ffffffff81d54a80 t amdgpu_ttm_io_mem_free
-ffffffff81d54ab0 t amdgpu_ttm_io_mem_pfn
-ffffffff81d54b20 t amdgpu_ttm_access_memory
-ffffffff81d54de0 t amdgpu_ttm_backend_bind
-ffffffff81d54f50 t amdgpu_ttm_backend_unbind
-ffffffff81d55000 t amdgpu_ttm_backend_destroy
-ffffffff81d55030 t amdgpu_move_blit
-ffffffff81d55170 t amdgpu_bo_unreserve
-ffffffff81d56000 T amdgpu_ucode_print_mc_hdr
-ffffffff81d56050 T amdgpu_ucode_print_smc_hdr
-ffffffff81d560a0 T amdgpu_ucode_print_gfx_hdr
-ffffffff81d560f0 T amdgpu_ucode_print_rlc_hdr
-ffffffff81d56140 T amdgpu_ucode_print_sdma_hdr
-ffffffff81d56190 T amdgpu_ucode_print_gpu_info_hdr
-ffffffff81d561e0 T amdgpu_ucode_validate
-ffffffff81d56220 T amdgpu_ucode_hdr_version
-ffffffff81d56260 T amdgpu_ucode_get_load_type
-ffffffff81d562e0 T amdgpu_ucode_init_bo
-ffffffff81d566a0 T amdgpu_ucode_fini_bo
-ffffffff81d57000 T amdgpu_uvd_sw_init
-ffffffff81d57430 t amdgpu_uvd_idle_work_handler
-ffffffff81d575f0 T amdgpu_uvd_sw_fini
-ffffffff81d57700 T amdgpu_uvd_entity_init
-ffffffff81d57770 T amdgpu_uvd_suspend
-ffffffff81d578e0 T amdgpu_uvd_resume
-ffffffff81d57a30 T amdgpu_uvd_free_handles
-ffffffff81d57c50 T amdgpu_uvd_get_destroy_msg
-ffffffff81d57d70 T amdgpu_uvd_ring_parse_cs
-ffffffff81d57ea0 t amdgpu_uvd_cs_packets
-ffffffff81d58090 t amdgpu_uvd_cs_pass1
-ffffffff81d581f0 t amdgpu_uvd_cs_pass2
-ffffffff81d58940 T amdgpu_uvd_get_create_msg
-ffffffff81d58a90 t amdgpu_uvd_send_msg
-ffffffff81d58e80 T amdgpu_uvd_ring_begin_use
-ffffffff81d58f50 T amdgpu_uvd_ring_end_use
-ffffffff81d58fc0 T amdgpu_uvd_ring_test_ib
-ffffffff81d591e0 T amdgpu_uvd_used_handles
-ffffffff81d592b0 t __delayed_work_tick
-ffffffff81d592d0 t amdgpu_bo_unreserve
-ffffffff81d5a000 T amdgpu_vce_sw_init
-ffffffff81d5a3c0 t amdgpu_vce_idle_work_handler
-ffffffff81d5a4c0 T amdgpu_vce_sw_fini
-ffffffff81d5a5a0 T amdgpu_vce_entity_init
-ffffffff81d5a610 T amdgpu_vce_suspend
-ffffffff81d5a750 T amdgpu_vce_resume
-ffffffff81d5aa00 t amdgpu_bo_unreserve
-ffffffff81d5aaf0 T amdgpu_vce_ring_begin_use
-ffffffff81d5abf0 T amdgpu_vce_ring_end_use
-ffffffff81d5ac60 T amdgpu_vce_free_handles
-ffffffff81d5ad10 T amdgpu_vce_get_destroy_msg
-ffffffff81d5afb0 T amdgpu_vce_get_create_msg
-ffffffff81d5b340 T amdgpu_vce_ring_parse_cs
-ffffffff81d5bc50 t amdgpu_vce_validate_bo
-ffffffff81d5bdf0 t amdgpu_vce_validate_handle
-ffffffff81d5c0f0 t amdgpu_vce_cs_reloc
-ffffffff81d5c280 T amdgpu_vce_ring_parse_cs_vm
-ffffffff81d5c740 T amdgpu_vce_ring_emit_ib
-ffffffff81d5c8f0 T amdgpu_vce_ring_emit_fence
-ffffffff81d5cb90 T amdgpu_vce_ring_test_ring
-ffffffff81d5ccf0 T amdgpu_vce_ring_test_ib
-ffffffff81d5ce50 t __delayed_work_tick
-ffffffff81d5d000 T amdgpu_vcn_sw_init
-ffffffff81d5d280 t amdgpu_vcn_idle_work_handler
-ffffffff81d5d380 T amdgpu_vcn_sw_fini
-ffffffff81d5d470 T amdgpu_vcn_suspend
-ffffffff81d5d530 T amdgpu_vcn_resume
-ffffffff81d5d620 T amdgpu_vcn_ring_begin_use
-ffffffff81d5d6c0 T amdgpu_vcn_ring_end_use
-ffffffff81d5d710 T amdgpu_vcn_dec_ring_test_ring
-ffffffff81d5d920 T amdgpu_vcn_dec_ring_test_ib
-ffffffff81d5dc30 T amdgpu_vcn_enc_ring_test_ring
-ffffffff81d5dda0 T amdgpu_vcn_enc_ring_test_ib
-ffffffff81d5e330 T amdgpu_vcn_jpeg_ring_test_ring
-ffffffff81d5e540 T amdgpu_vcn_jpeg_ring_test_ib
-ffffffff81d5e850 t __delayed_work_tick
-ffffffff81d5e870 t amdgpu_vcn_dec_send_msg
-ffffffff81d5eaf0 t amdgpu_bo_unreserve
-ffffffff81d5f000 T amdgpu_vf_error_put
-ffffffff81d5f0c0 T amdgpu_vf_error_trans_all
-ffffffff81d60000 T amdgpu_csa_vaddr
-ffffffff81d60060 T amdgpu_virt_mmio_blocked
-ffffffff81d600a0 T amdgpu_allocate_static_csa
-ffffffff81d60120 T amdgpu_free_static_csa
-ffffffff81d60140 T amdgpu_map_static_csa
-ffffffff81d60320 T amdgpu_virt_init_setting
-ffffffff81d60360 T amdgpu_virt_kiq_rreg
-ffffffff81d60540 T amdgpu_virt_kiq_wreg
-ffffffff81d60720 T amdgpu_virt_request_full_gpu
-ffffffff81d60780 T amdgpu_virt_release_full_gpu
-ffffffff81d607e0 T amdgpu_virt_reset_gpu
-ffffffff81d60840 T amdgpu_virt_wait_reset
-ffffffff81d60890 T amdgpu_virt_alloc_mm_table
-ffffffff81d60940 T amdgpu_virt_free_mm_table
-ffffffff81d609b0 T amdgpu_virt_fw_reserve_get_checksum
-ffffffff81d60ac0 T amdgpu_virt_init_data_exchange
-ffffffff81d61000 T amdgpu_vm_get_pd_bo
-ffffffff81d61060 T amdgpu_vm_validate_pt_bos
-ffffffff81d61280 T amdgpu_vm_ready
-ffffffff81d612b0 T amdgpu_vm_alloc_pts
-ffffffff81d613b0 t amdgpu_vm_alloc_levels
-ffffffff81d61af0 T amdgpu_vm_check_compute_bug
-ffffffff81d61bb0 T amdgpu_vm_need_pipeline_sync
-ffffffff81d61cc0 T amdgpu_vm_flush
-ffffffff81d62310 T amdgpu_vm_bo_find
-ffffffff81d62370 T amdgpu_vm_update_directories
-ffffffff81d62830 t amdgpu_vm_cpu_set_ptes
-ffffffff81d62900 t amdgpu_vm_do_set_ptes
-ffffffff81d629a0 t amdgpu_vm_invalidate_level
-ffffffff81d62b60 T amdgpu_vm_get_entry
-ffffffff81d62cc0 T amdgpu_vm_bo_update
-ffffffff81d63240 T amdgpu_vm_clear_freed
-ffffffff81d63460 t amdgpu_vm_bo_update_mapping
-ffffffff81d639d0 T amdgpu_vm_handle_moved
-ffffffff81d63c40 T amdgpu_vm_bo_add
-ffffffff81d63cd0 t amdgpu_vm_bo_base_init
-ffffffff81d63df0 T amdgpu_vm_bo_map
-ffffffff81d63fb0 t amdgpu_vm_bo_insert_map
-ffffffff81d64180 T amdgpu_vm_bo_replace_map
-ffffffff81d642d0 T amdgpu_vm_bo_clear_mappings
-ffffffff81d647e0 T amdgpu_vm_bo_unmap
-ffffffff81d64900 T amdgpu_vm_bo_lookup_mapping
-ffffffff81d64970 T amdgpu_vm_bo_trace_cs
-ffffffff81d649a0 T amdgpu_vm_bo_rmv
-ffffffff81d64b40 T amdgpu_vm_bo_invalidate
-ffffffff81d64d10 T amdgpu_vm_adjust_size
-ffffffff81d64fa0 T amdgpu_vm_init
-ffffffff81d65420 t amdgpu_bo_reserve
-ffffffff81d655c0 t amdgpu_vm_clear_bo
-ffffffff81d65940 t amdgpu_bo_unreserve
-ffffffff81d65a30 T amdgpu_vm_make_compute
-ffffffff81d65bf0 T amdgpu_vm_fini
-ffffffff81d66100 t amdgpu_vm_free_levels
-ffffffff81d662c0 T amdgpu_vm_pasid_fault_credit
-ffffffff81d66350 T amdgpu_vm_manager_init
-ffffffff81d664c0 T amdgpu_vm_manager_fini
-ffffffff81d66520 T amdgpu_vm_ioctl
-ffffffff81d66590 T amdgpu_vm_get_task_info
-ffffffff81d66620 T amdgpu_vm_set_task_info
-ffffffff81d666a0 t amdgpu_vm_frag_ptes
-ffffffff81d66880 t amdgpu_vm_do_copy_ptes
-ffffffff81d668e0 t amdgpu_vm_update_ptes
-ffffffff81d66d40 t amdgpu_vm_add_prt_cb
-ffffffff81d66fd0 t amdgpu_vm_prt_cb
-ffffffff81d68000 T amdgpu_vram_mgr_bo_visible_size
-ffffffff81d68120 T amdgpu_vram_mgr_usage
-ffffffff81d68150 T amdgpu_vram_mgr_vis_usage
-ffffffff81d68180 t amdgpu_vram_mgr_init
-ffffffff81d68210 t amdgpu_vram_mgr_fini
-ffffffff81d68290 t amdgpu_vram_mgr_new
-ffffffff81d685e0 t amdgpu_vram_mgr_del
-ffffffff81d68700 t amdgpu_vram_mgr_debug
-ffffffff81d69000 T amdgpu_atom_execute_table
-ffffffff81d690a0 t amdgpu_atom_execute_table_locked
-ffffffff81d69420 T amdgpu_atom_parse
-ffffffff81d69680 T amdgpu_atom_destroy
-ffffffff81d696c0 T amdgpu_atom_asic_init
-ffffffff81d69830 T amdgpu_atom_parse_data_header
-ffffffff81d698e0 T amdgpu_atom_parse_cmd_header
-ffffffff81d69970 t atom_op_move
-ffffffff81d69b50 t atom_op_and
-ffffffff81d69d20 t atom_op_or
-ffffffff81d69ef0 t atom_op_shift_left
-ffffffff81d6a110 t atom_op_shift_right
-ffffffff81d6a330 t atom_op_mul
-ffffffff81d6a490 t atom_op_div
-ffffffff81d6a610 t atom_op_add
-ffffffff81d6a7e0 t atom_op_sub
-ffffffff81d6a9c0 t atom_op_setport
-ffffffff81d6ab30 t atom_op_setregblock
-ffffffff81d6abf0 t atom_op_setfbbase
-ffffffff81d6acc0 t atom_op_compare
-ffffffff81d6aed0 t atom_op_switch
-ffffffff81d6b120 t atom_op_jump
-ffffffff81d6b3c0 t atom_op_test
-ffffffff81d6b590 t atom_op_delay
-ffffffff81d6b680 t atom_op_calltable
-ffffffff81d6b7d0 t atom_op_repeat
-ffffffff81d6b800 t atom_op_clear
-ffffffff81d6b910 t atom_op_nop
-ffffffff81d6b940 t atom_op_eot
-ffffffff81d6b970 t atom_op_mask
-ffffffff81d6bc40 t atom_op_postcard
-ffffffff81d6bce0 t atom_op_beep
-ffffffff81d6bd00 t atom_op_savereg
-ffffffff81d6bd30 t atom_op_restorereg
-ffffffff81d6bd60 t atom_op_setdatablock
-ffffffff81d6bea0 t atom_op_xor
-ffffffff81d6c070 t atom_op_shl
-ffffffff81d6c280 t atom_op_shr
-ffffffff81d6c490 t atom_op_debug
-ffffffff81d6c530 t atom_op_processds
-ffffffff81d6c5f0 t atom_op_mul32
-ffffffff81d6c760 t atom_op_div32
-ffffffff81d6c8f0 t atom_put_dst
-ffffffff81d6cdf0 t atom_get_src_int
-ffffffff81d6d590 t atom_iio_execute
-ffffffff81d6e000 T amdgpu_atombios_crtc_overscan_setup
-ffffffff81d6e170 T amdgpu_atombios_crtc_scaler_setup
-ffffffff81d6e1f0 T amdgpu_atombios_crtc_lock
-ffffffff81d6e250 T amdgpu_atombios_crtc_enable
-ffffffff81d6e2b0 T amdgpu_atombios_crtc_blank
-ffffffff81d6e310 T amdgpu_atombios_crtc_powergate
-ffffffff81d6e380 T amdgpu_atombios_crtc_powergate_init
-ffffffff81d6e3e0 T amdgpu_atombios_crtc_set_dtd_timing
-ffffffff81d6e520 T amdgpu_atombios_crtc_set_disp_eng_pll
-ffffffff81d6e620 T amdgpu_atombios_crtc_set_dce_clock
-ffffffff81d6e700 T amdgpu_atombios_crtc_program_pll
-ffffffff81d6ea40 T amdgpu_atombios_crtc_prepare_pll
-ffffffff81d6ef30 T amdgpu_atombios_crtc_set_pll
-ffffffff81d70000 T amdgpu_atombios_dp_aux_init
-ffffffff81d700a0 t amdgpu_atombios_dp_aux_transfer
-ffffffff81d70360 T amdgpu_atombios_dp_get_sinktype
-ffffffff81d703d0 T amdgpu_atombios_dp_get_dpcd
-ffffffff81d704a0 T amdgpu_atombios_dp_get_panel_mode
-ffffffff81d70590 T amdgpu_atombios_dp_set_link_config
-ffffffff81d70610 t amdgpu_atombios_dp_get_dp_link_config
-ffffffff81d707a0 T amdgpu_atombios_dp_mode_valid_helper
-ffffffff81d70820 T amdgpu_atombios_dp_needs_link_train
-ffffffff81d70890 T amdgpu_atombios_dp_set_rx_power_state
-ffffffff81d70910 T amdgpu_atombios_dp_link_train
-ffffffff81d71000 T amdgpu_atombios_encoder_get_backlight_level_from_reg
-ffffffff81d71040 T amdgpu_atombios_encoder_set_backlight_level_to_reg
-ffffffff81d71090 T amdgpu_atombios_encoder_get_backlight_level
-ffffffff81d710f0 T amdgpu_atombios_encoder_set_backlight_level
-ffffffff81d71200 T amdgpu_atombios_encoder_setup_dig_transmitter
-ffffffff81d71c30 T amdgpu_atombios_encoder_init_backlight
-ffffffff81d71dd0 t amdgpu_atombios_encoder_get_backlight_brightness
-ffffffff81d71e30 T amdgpu_atombios_encoder_fini_backlight
-ffffffff81d71eb0 T amdgpu_atombios_encoder_is_digital
-ffffffff81d71ef0 T amdgpu_atombios_encoder_mode_fixup
-ffffffff81d71fe0 T amdgpu_atombios_encoder_get_encoder_mode
-ffffffff81d72220 T amdgpu_atombios_encoder_setup_dig_encoder
-ffffffff81d726e0 T amdgpu_atombios_encoder_set_edp_panel_power
-ffffffff81d727f0 T amdgpu_atombios_encoder_dpms
-ffffffff81d72920 t amdgpu_atombios_encoder_setup_dig
-ffffffff81d72c80 t amdgpu_atombios_encoder_setup_dvo
-ffffffff81d72e40 T amdgpu_atombios_encoder_set_crtc_source
-ffffffff81d73200 T amdgpu_atombios_encoder_init_dig
-ffffffff81d732b0 t amdgpu_atombios_encoder_setup_external_encoder
-ffffffff81d73500 T amdgpu_atombios_encoder_dac_detect
-ffffffff81d73690 T amdgpu_atombios_encoder_dig_detect
-ffffffff81d73770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc
-ffffffff81d737c0 T amdgpu_atombios_encoder_set_bios_scratch_regs
-ffffffff81d73af0 T amdgpu_atombios_encoder_get_lcd_info
-ffffffff81d73e60 T amdgpu_atombios_encoder_get_dig_info
-ffffffff81d73ed0 t amdgpu_atombios_encoder_update_backlight_status
-ffffffff81d74000 T amdgpu_atombios_i2c_xfer
-ffffffff81d74360 T amdgpu_atombios_i2c_func
-ffffffff81d74390 T amdgpu_atombios_i2c_channel_trans
-ffffffff81d75000 t cz_ih_early_init
-ffffffff81d75050 t cz_ih_sw_init
-ffffffff81d750a0 t cz_ih_sw_fini
-ffffffff81d750f0 t cz_ih_hw_init
-ffffffff81d75330 t cz_ih_hw_fini
-ffffffff81d75400 t cz_ih_suspend
-ffffffff81d754d0 t cz_ih_resume
-ffffffff81d75510 t cz_ih_is_idle
-ffffffff81d75550 t cz_ih_wait_for_idle
-ffffffff81d755e0 t cz_ih_soft_reset
-ffffffff81d756c0 t cz_ih_set_clockgating_state
-ffffffff81d756f0 t cz_ih_set_powergating_state
-ffffffff81d75720 t cz_ih_get_wptr
-ffffffff81d75810 t cz_ih_prescreen_iv
-ffffffff81d75890 t cz_ih_decode_iv
-ffffffff81d75910 t cz_ih_set_rptr
-ffffffff81d76000 T dce_v10_0_disable_dce
-ffffffff81d76170 t dce_v10_0_early_init
-ffffffff81d76240 t dce_v10_0_sw_init
-ffffffff81d766c0 t dce_v10_0_sw_fini
-ffffffff81d767e0 t dce_v10_0_hw_init
-ffffffff81d76b50 t dce_v10_0_hw_fini
-ffffffff81d76cb0 t dce_v10_0_suspend
-ffffffff81d76d00 t dce_v10_0_resume
-ffffffff81d76d80 t dce_v10_0_is_idle
-ffffffff81d76db0 t dce_v10_0_wait_for_idle
-ffffffff81d76de0 t dce_v10_0_check_soft_reset
-ffffffff81d76df0 t dce_v10_0_soft_reset
-ffffffff81d76ed0 t dce_v10_0_set_clockgating_state
-ffffffff81d76f00 t dce_v10_0_set_powergating_state
-ffffffff81d76f30 t dce_v10_0_audio_endpt_rreg
-ffffffff81d76fc0 t dce_v10_0_audio_endpt_wreg
-ffffffff81d77030 t dce_v10_0_bandwidth_update
-ffffffff81d77740 t dce_v10_0_vblank_get_counter
-ffffffff81d77790 t dce_v10_0_hpd_sense
-ffffffff81d777f0 t dce_v10_0_hpd_set_polarity
-ffffffff81d778d0 t dce_v10_0_hpd_get_gpio_reg
-ffffffff81d77900 t dce_v10_0_page_flip
-ffffffff81d779c0 t dce_v10_0_crtc_get_scanoutpos
-ffffffff81d77a60 t dce_v10_0_encoder_add
-ffffffff81d77cb0 t dce_v10_0_latency_watermark
-ffffffff81d77ec0 t dce_v10_0_encoder_destroy
-ffffffff81d77f10 t dce_v10_0_encoder_prepare
-ffffffff81d78100 t dce_v10_0_encoder_commit
-ffffffff81d78130 t dce_v10_0_encoder_mode_set
-ffffffff81d78fa0 t dce_v10_0_encoder_disable
-ffffffff81d79070 t dce_v10_0_ext_dpms
-ffffffff81d790a0 t dce_v10_0_ext_prepare
-ffffffff81d790d0 t dce_v10_0_ext_commit
-ffffffff81d79100 t dce_v10_0_ext_mode_set
-ffffffff81d79130 t dce_v10_0_ext_disable
-ffffffff81d79160 t dce_v10_0_set_crtc_irq_state
-ffffffff81d795e0 t dce_v10_0_crtc_irq
-ffffffff81d79730 t dce_v10_0_set_pageflip_irq_state
-ffffffff81d797e0 t dce_v10_0_pageflip_irq
-ffffffff81d79920 t dce_v10_0_set_hpd_irq_state
-ffffffff81d799d0 t dce_v10_0_hpd_irq
-ffffffff81d79a90 t dce_v10_0_crtc_cursor_set2
-ffffffff81d79e00 t dce_v10_0_crtc_cursor_move
-ffffffff81d79ee0 t dce_v10_0_crtc_gamma_set
-ffffffff81d79f20 t dce_v10_0_crtc_destroy
-ffffffff81d79f50 t amdgpu_bo_reserve
-ffffffff81d7a190 t amdgpu_bo_unreserve
-ffffffff81d7a280 t dce_v10_0_cursor_move_locked
-ffffffff81d7a390 t dce_v10_0_crtc_load_lut
-ffffffff81d7a730 t dce_v10_0_crtc_dpms
-ffffffff81d7a930 t dce_v10_0_crtc_prepare
-ffffffff81d7a970 t dce_v10_0_crtc_commit
-ffffffff81d7a9a0 t dce_v10_0_crtc_mode_fixup
-ffffffff81d7ab70 t dce_v10_0_crtc_mode_set
-ffffffff81d7ad70 t dce_v10_0_crtc_set_base
-ffffffff81d7ad90 t dce_v10_0_crtc_set_base_atomic
-ffffffff81d7adb0 t dce_v10_0_crtc_disable
-ffffffff81d7af70 t dce_v10_0_crtc_do_set_base
-ffffffff81d7b5c0 t dce_v10_0_is_display_hung
-ffffffff81d7c000 T dce_v11_0_disable_dce
-ffffffff81d7c160 t dce_v11_0_early_init
-ffffffff81d7c2a0 t dce_v11_0_sw_init
-ffffffff81d7c7b0 t dce_v11_0_sw_fini
-ffffffff81d7c8d0 t dce_v11_0_hw_init
-ffffffff81d7cca0 t dce_v11_0_hw_fini
-ffffffff81d7ce00 t dce_v11_0_suspend
-ffffffff81d7ce50 t dce_v11_0_resume
-ffffffff81d7ced0 t dce_v11_0_is_idle
-ffffffff81d7cf00 t dce_v11_0_wait_for_idle
-ffffffff81d7cf30 t dce_v11_0_soft_reset
-ffffffff81d7d120 t dce_v11_0_set_clockgating_state
-ffffffff81d7d150 t dce_v11_0_set_powergating_state
-ffffffff81d7d180 t dce_v11_0_audio_endpt_rreg
-ffffffff81d7d210 t dce_v11_0_audio_endpt_wreg
-ffffffff81d7d280 t dce_v11_0_bandwidth_update
-ffffffff81d7d990 t dce_v11_0_vblank_get_counter
-ffffffff81d7d9e0 t dce_v11_0_hpd_sense
-ffffffff81d7da40 t dce_v11_0_hpd_set_polarity
-ffffffff81d7db20 t dce_v11_0_hpd_get_gpio_reg
-ffffffff81d7db50 t dce_v11_0_page_flip
-ffffffff81d7dc10 t dce_v11_0_crtc_get_scanoutpos
-ffffffff81d7dcb0 t dce_v11_0_encoder_add
-ffffffff81d7df00 t dce_v11_0_latency_watermark
-ffffffff81d7e110 t dce_v11_0_encoder_destroy
-ffffffff81d7e160 t dce_v11_0_encoder_prepare
-ffffffff81d7e350 t dce_v11_0_encoder_commit
-ffffffff81d7e380 t dce_v11_0_encoder_mode_set
-ffffffff81d7f1f0 t dce_v11_0_encoder_disable
-ffffffff81d7f2c0 t dce_v11_0_ext_dpms
-ffffffff81d7f2f0 t dce_v11_0_ext_prepare
-ffffffff81d7f320 t dce_v11_0_ext_commit
-ffffffff81d7f350 t dce_v11_0_ext_mode_set
-ffffffff81d7f380 t dce_v11_0_ext_disable
-ffffffff81d7f3b0 t dce_v11_0_set_crtc_irq_state
-ffffffff81d7f830 t dce_v11_0_crtc_irq
-ffffffff81d7f990 t dce_v11_0_set_pageflip_irq_state
-ffffffff81d7fa40 t dce_v11_0_pageflip_irq
-ffffffff81d7fb80 t dce_v11_0_set_hpd_irq_state
-ffffffff81d7fc30 t dce_v11_0_hpd_irq
-ffffffff81d7fcf0 t dce_v11_0_crtc_cursor_set2
-ffffffff81d80060 t dce_v11_0_crtc_cursor_move
-ffffffff81d80140 t dce_v11_0_crtc_gamma_set
-ffffffff81d80180 t dce_v11_0_crtc_destroy
-ffffffff81d801b0 t amdgpu_bo_reserve
-ffffffff81d803f0 t amdgpu_bo_unreserve
-ffffffff81d804e0 t dce_v11_0_cursor_move_locked
-ffffffff81d805f0 t dce_v11_0_crtc_load_lut
-ffffffff81d80960 t dce_v11_0_crtc_dpms
-ffffffff81d80b60 t dce_v11_0_crtc_prepare
-ffffffff81d80ba0 t dce_v11_0_crtc_commit
-ffffffff81d80bd0 t dce_v11_0_crtc_mode_fixup
-ffffffff81d80e40 t dce_v11_0_crtc_mode_set
-ffffffff81d810c0 t dce_v11_0_crtc_set_base
-ffffffff81d810e0 t dce_v11_0_crtc_set_base_atomic
-ffffffff81d81100 t dce_v11_0_crtc_disable
-ffffffff81d812e0 t dce_v11_0_crtc_do_set_base
-ffffffff81d82000 t dce_virtual_early_init
-ffffffff81d82060 t dce_virtual_sw_init
-ffffffff81d82300 t dce_virtual_sw_fini
-ffffffff81d823a0 t dce_virtual_hw_init
-ffffffff81d82420 t dce_virtual_hw_fini
-ffffffff81d824c0 t dce_virtual_suspend
-ffffffff81d82560 t dce_virtual_resume
-ffffffff81d825e0 t dce_virtual_is_idle
-ffffffff81d82610 t dce_virtual_wait_for_idle
-ffffffff81d82640 t dce_virtual_soft_reset
-ffffffff81d82670 t dce_virtual_set_clockgating_state
-ffffffff81d826a0 t dce_virtual_set_powergating_state
-ffffffff81d826d0 t dce_virtual_bandwidth_update
-ffffffff81d82700 t dce_virtual_vblank_get_counter
-ffffffff81d82730 t dce_virtual_hpd_sense
-ffffffff81d82760 t dce_virtual_hpd_set_polarity
-ffffffff81d82790 t dce_virtual_hpd_get_gpio_reg
-ffffffff81d827c0 t dce_virtual_page_flip
-ffffffff81d827f0 t dce_virtual_crtc_get_scanoutpos
-ffffffff81d82830 t dce_virtual_set_crtc_irq_state
-ffffffff81d82900 t dce_virtual_vblank_timer_handle
-ffffffff81d82a00 t dce_virtual_crtc_gamma_set
-ffffffff81d82a30 t dce_virtual_crtc_destroy
-ffffffff81d82a60 t dce_virtual_crtc_dpms
-ffffffff81d82b10 t dce_virtual_crtc_prepare
-ffffffff81d82b60 t dce_virtual_crtc_commit
-ffffffff81d82bf0 t dce_virtual_crtc_mode_fixup
-ffffffff81d82c20 t dce_virtual_crtc_mode_set
-ffffffff81d82c70 t dce_virtual_crtc_set_base
-ffffffff81d82ca0 t dce_virtual_crtc_set_base_atomic
-ffffffff81d82cd0 t dce_virtual_crtc_disable
-ffffffff81d82fc0 t dce_virtual_encoder_destroy
-ffffffff81d82ff0 t dce_virtual_encoder_dpms
-ffffffff81d83020 t dce_virtual_encoder_mode_fixup
-ffffffff81d83050 t dce_virtual_encoder_prepare
-ffffffff81d83080 t dce_virtual_encoder_commit
-ffffffff81d830b0 t dce_virtual_encoder_mode_set
-ffffffff81d830e0 t dce_virtual_encoder_disable
-ffffffff81d83110 t dce_virtual_dpms
-ffffffff81d83140 t dce_virtual_force
-ffffffff81d83170 t dce_virtual_set_property
-ffffffff81d831a0 t dce_virtual_destroy
-ffffffff81d831d0 t dce_virtual_get_modes
-ffffffff81d83260 t dce_virtual_mode_valid
-ffffffff81d83290 t dce_virtual_encoder
-ffffffff81d84000 t df_v1_7_init
-ffffffff81d84030 t df_v1_7_enable_broadcast_mode
-ffffffff81d84090 t df_v1_7_get_fb_channel_number
-ffffffff81d840e0 t df_v1_7_get_hbm_channel_number
-ffffffff81d84130 t df_v1_7_update_medium_grain_clock_gating
-ffffffff81d841f0 t df_v1_7_get_clockgating_state
-ffffffff81d84240 t df_v1_7_enable_ecc_force_par_wr_rmw
-ffffffff81d85000 t df_v3_6_init
-ffffffff81d85030 t df_v3_6_enable_broadcast_mode
-ffffffff81d85090 t df_v3_6_get_fb_channel_number
-ffffffff81d850e0 t df_v3_6_get_hbm_channel_number
-ffffffff81d85130 t df_v3_6_update_medium_grain_clock_gating
-ffffffff81d851f0 t df_v3_6_get_clockgating_state
-ffffffff81d86000 T emu_soc_asic_init
-ffffffff81d87000 T gfx_v8_0_mqd_commit
-ffffffff81d87200 t gfx_v8_0_early_init
-ffffffff81d873d0 t gfx_v8_0_late_init
-ffffffff81d87b20 t gfx_v8_0_sw_init
-ffffffff81d89710 t gfx_v8_0_sw_fini
-ffffffff81d89a00 t gfx_v8_0_hw_init
-ffffffff81d8c440 t gfx_v8_0_hw_fini
-ffffffff81d8cc30 t gfx_v8_0_suspend
-ffffffff81d8cc70 t gfx_v8_0_resume
-ffffffff81d8ccb0 t gfx_v8_0_is_idle
-ffffffff81d8ccf0 t gfx_v8_0_wait_for_idle
-ffffffff81d8cd80 t gfx_v8_0_check_soft_reset
-ffffffff81d8ce70 t gfx_v8_0_pre_soft_reset
-ffffffff81d8d1d0 t gfx_v8_0_soft_reset
-ffffffff81d8d3a0 t gfx_v8_0_post_soft_reset
-ffffffff81d8d520 t gfx_v8_0_set_clockgating_state
-ffffffff81d8d850 t gfx_v8_0_set_powergating_state
-ffffffff81d8dcb0 t gfx_v8_0_get_clockgating_state
-ffffffff81d8dd90 t gfx_v8_0_get_gpu_clock_counter
-ffffffff81d8de20 t gfx_v8_0_select_se_sh
-ffffffff81d8dea0 t gfx_v8_0_read_wave_data
-ffffffff81d8e300 t gfx_v8_0_read_wave_sgprs
-ffffffff81d8e3b0 t gfx_v8_0_select_me_pipe_q
-ffffffff81d8e3d0 t gfx_v8_0_ring_get_rptr
-ffffffff81d8e410 t gfx_v8_0_ring_get_wptr_compute
-ffffffff81d8e450 t gfx_v8_0_ring_set_wptr_compute
-ffffffff81d8e490 t gfx_v8_0_ring_emit_ib_compute
-ffffffff81d8e660 t gfx_v8_0_ring_emit_fence_kiq
-ffffffff81d8ea90 t gfx_v8_0_ring_test_ring
-ffffffff81d8ed10 t gfx_v8_0_ring_test_ib
-ffffffff81d8efa0 t gfx_v8_0_ring_emit_rreg
-ffffffff81d8f230 t gfx_v8_0_ring_emit_wreg
-ffffffff81d8f460 t gfx_v8_0_ring_get_wptr_gfx
-ffffffff81d8f4c0 t gfx_v8_0_ring_set_wptr_gfx
-ffffffff81d8f530 t gfx_v8_0_ring_emit_ib_gfx
-ffffffff81d8fa60 t gfx_v8_0_ring_emit_fence_gfx
-ffffffff81d8ff60 t gfx_v8_0_ring_emit_pipeline_sync
-ffffffff81d90250 t gfx_v8_0_ring_emit_vm_flush
-ffffffff81d90600 t gfx_v8_0_ring_emit_hdp_flush
-ffffffff81d90920 t gfx_v8_0_ring_emit_gds_switch
-ffffffff81d91130 t gfx_v8_0_ring_emit_init_cond_exec
-ffffffff81d91360 t gfx_v8_0_ring_emit_patch_cond_exec
-ffffffff81d91410 t gfx_v8_ring_emit_sb
-ffffffff81d914f0 t gfx_v8_ring_emit_cntxcntl
-ffffffff81d91a80 t gfx_v8_0_ring_emit_fence_compute
-ffffffff81d91d80 t gfx_v8_0_ring_set_priority_compute
-ffffffff81d92310 t gfx_v8_0_set_eop_interrupt_state
-ffffffff81d924f0 t gfx_v8_0_eop_irq
-ffffffff81d925f0 t gfx_v8_0_set_priv_reg_fault_state
-ffffffff81d92670 t gfx_v8_0_priv_reg_irq
-ffffffff81d926d0 t gfx_v8_0_set_priv_inst_fault_state
-ffffffff81d92750 t gfx_v8_0_priv_inst_irq
-ffffffff81d927b0 t gfx_v8_0_kiq_set_interrupt_state
-ffffffff81d92890 t gfx_v8_0_kiq_irq
-ffffffff81d928d0 t gfx_v8_0_set_cp_ecc_int_state
-ffffffff81d92b80 t gfx_v8_0_cp_ecc_error_irq
-ffffffff81d92bc0 t gfx_v8_0_set_sq_int_state
-ffffffff81d92c40 t gfx_v8_0_sq_irq
-ffffffff81d92ca0 t gfx_v8_0_parse_sq_irq
-ffffffff81d92de0 t iceland_enter_rlc_safe_mode
-ffffffff81d92f00 t iceland_exit_rlc_safe_mode
-ffffffff81d92fd0 t gfx_v8_0_sq_irq_work_func
-ffffffff81d92ff0 t amdgpu_bo_unreserve
-ffffffff81d930e0 t gfx_v8_0_wait_for_rlc_serdes
-ffffffff81d932f0 t gfx_v8_0_init_save_restore_list
-ffffffff81d93700 t gfx_v8_0_cp_gfx_resume
-ffffffff81d94250 t gfx_v8_0_kiq_resume
-ffffffff81d95140 t amdgpu_bo_reserve
-ffffffff81d952f0 t gfx_v8_0_mqd_init
-ffffffff81d95710 t gfx_v8_0_deactivate_hqd
-ffffffff81d957d0 t gfx_v8_0_update_medium_grain_clock_gating
-ffffffff81d95b40 t gfx_v8_0_update_coarse_grain_clock_gating
-ffffffff81d96000 T gfx_v9_0_rlc_stop
-ffffffff81d962d0 t gfx_v9_0_select_se_sh
-ffffffff81d96350 t gfx_v9_0_early_init
-ffffffff81d96500 t gfx_v9_0_late_init
-ffffffff81d96560 t gfx_v9_0_sw_init
-ffffffff81d980e0 t gfx_v9_0_sw_fini
-ffffffff81d98490 t gfx_v9_0_hw_init
-ffffffff81d9bcc0 t gfx_v9_0_hw_fini
-ffffffff81d9c810 t gfx_v9_0_suspend
-ffffffff81d9c850 t gfx_v9_0_resume
-ffffffff81d9c890 t gfx_v9_0_is_idle
-ffffffff81d9c8e0 t gfx_v9_0_wait_for_idle
-ffffffff81d9c970 t gfx_v9_0_soft_reset
-ffffffff81d9cce0 t gfx_v9_0_set_clockgating_state
-ffffffff81d9d0c0 t gfx_v9_0_set_powergating_state
-ffffffff81d9d540 t gfx_v9_0_get_clockgating_state
-ffffffff81d9d650 t gfx_v9_0_ring_get_rptr_compute
-ffffffff81d9d690 t gfx_v9_0_ring_get_wptr_compute
-ffffffff81d9d700 t gfx_v9_0_ring_set_wptr_compute
-ffffffff81d9d760 t gfx_v9_0_ring_emit_ib_compute
-ffffffff81d9d960 t gfx_v9_0_ring_emit_fence_kiq
-ffffffff81d9dd90 t gfx_v9_0_ring_test_ring
-ffffffff81d9e010 t gfx_v9_0_ring_test_ib
-ffffffff81d9e2a0 t gfx_v9_0_ring_emit_rreg
-ffffffff81d9e530 t gfx_v9_0_ring_emit_wreg
-ffffffff81d9e760 t gfx_v9_0_ring_emit_reg_wait
-ffffffff81d9e7b0 t gfx_v9_0_ring_emit_reg_write_reg_wait
-ffffffff81d9e840 t gfx_v9_0_wait_reg_mem
-ffffffff81d9eb70 t gfx_v9_0_ring_get_rptr_gfx
-ffffffff81d9ebb0 t gfx_v9_0_ring_get_wptr_gfx
-ffffffff81d9ec40 t gfx_v9_0_ring_set_wptr_gfx
-ffffffff81d9ecd0 t gfx_v9_0_ring_emit_ib_gfx
-ffffffff81d9f1e0 t gfx_v9_0_ring_emit_fence
-ffffffff81d9f5a0 t gfx_v9_0_ring_emit_pipeline_sync
-ffffffff81d9f600 t gfx_v9_0_ring_emit_vm_flush
-ffffffff81d9f710 t gfx_v9_0_ring_emit_hdp_flush
-ffffffff81d9f7e0 t gfx_v9_0_ring_emit_gds_switch
-ffffffff81d9f8e0 t gfx_v9_0_ring_emit_init_cond_exec
-ffffffff81d9fb10 t gfx_v9_0_ring_emit_patch_cond_exec
-ffffffff81d9fbc0 t gfx_v9_ring_emit_sb
-ffffffff81d9fca0 t gfx_v9_ring_emit_cntxcntl
-ffffffff81da0160 t gfx_v9_0_ring_emit_tmz
-ffffffff81da0260 t gfx_v9_0_write_data_to_reg
-ffffffff81da0470 t gfx_v9_0_ring_set_priority_compute
-ffffffff81da0a60 t gfx_v9_0_set_eop_interrupt_state
-ffffffff81da0ba0 t gfx_v9_0_eop_irq
-ffffffff81da0ca0 t gfx_v9_0_set_priv_reg_fault_state
-ffffffff81da0d30 t gfx_v9_0_priv_reg_irq
-ffffffff81da0d90 t gfx_v9_0_set_priv_inst_fault_state
-ffffffff81da0e20 t gfx_v9_0_priv_inst_irq
-ffffffff81da0e80 t gfx_v9_0_kiq_set_interrupt_state
-ffffffff81da0fb0 t gfx_v9_0_kiq_irq
-ffffffff81da0ff0 t gfx_v9_0_enter_rlc_safe_mode
-ffffffff81da10e0 t gfx_v9_0_exit_rlc_safe_mode
-ffffffff81da1160 t amdgpu_bo_unreserve
-ffffffff81da1250 t gfx_v9_0_get_gpu_clock_counter
-ffffffff81da1300 t gfx_v9_0_read_wave_data
-ffffffff81da1790 t gfx_v9_0_read_wave_vgprs
-ffffffff81da1860 t gfx_v9_0_read_wave_sgprs
-ffffffff81da1920 t gfx_v9_0_select_me_pipe_q
-ffffffff81da1940 t gfx_v9_0_ngg_create_buf
-ffffffff81da1a50 t amdgpu_bo_reserve
-ffffffff81da1c90 t gfx_v9_0_kiq_init_register
-ffffffff81da2130 t gfx_v9_0_mqd_init
-ffffffff81da2460 t gfx_v9_0_update_medium_grain_clock_gating
-ffffffff81da3000 T gfxhub_v1_0_get_mc_fb_offset
-ffffffff81da3050 T gfxhub_v1_0_gart_enable
-ffffffff81da36d0 T gfxhub_v1_0_gart_disable
-ffffffff81da37a0 T gfxhub_v1_0_set_fault_enable_default
-ffffffff81da3870 T gfxhub_v1_0_init
-ffffffff81da4000 t gmc_v7_0_early_init
-ffffffff81da4090 t gmc_v7_0_late_init
-ffffffff81da40f0 t gmc_v7_0_sw_init
-ffffffff81da4610 t gmc_v7_0_sw_fini
-ffffffff81da46c0 t gmc_v7_0_hw_init
-ffffffff81da4f90 t gmc_v7_0_hw_fini
-ffffffff81da5060 t gmc_v7_0_suspend
-ffffffff81da50a0 t gmc_v7_0_resume
-ffffffff81da50f0 t gmc_v7_0_is_idle
-ffffffff81da5130 t gmc_v7_0_wait_for_idle
-ffffffff81da51c0 t gmc_v7_0_soft_reset
-ffffffff81da5430 t gmc_v7_0_set_clockgating_state
-ffffffff81da56b0 t gmc_v7_0_set_powergating_state
-ffffffff81da56e0 t gmc_v7_0_flush_gpu_tlb
-ffffffff81da5700 t gmc_v7_0_emit_flush_gpu_tlb
-ffffffff81da5790 t gmc_v7_0_emit_pasid_mapping
-ffffffff81da57b0 t gmc_v7_0_set_pte_pde
-ffffffff81da57f0 t gmc_v7_0_set_prt
-ffffffff81da59f0 t gmc_v7_0_get_vm_pte_flags
-ffffffff81da5a30 t gmc_v7_0_get_vm_pde
-ffffffff81da5a90 t gmc_v7_0_vm_fault_interrupt_state
-ffffffff81da5b70 t gmc_v7_0_process_interrupt
-ffffffff81da6000 t gmc_v8_0_early_init
-ffffffff81da6090 t gmc_v8_0_late_init
-ffffffff81da60f0 t gmc_v8_0_sw_init
-ffffffff81da6760 t gmc_v8_0_sw_fini
-ffffffff81da6810 t gmc_v8_0_hw_init
-ffffffff81da73f0 t gmc_v8_0_hw_fini
-ffffffff81da74c0 t gmc_v8_0_suspend
-ffffffff81da7500 t gmc_v8_0_resume
-ffffffff81da7550 t gmc_v8_0_is_idle
-ffffffff81da7590 t gmc_v8_0_wait_for_idle
-ffffffff81da7620 t gmc_v8_0_check_soft_reset
-ffffffff81da76a0 t gmc_v8_0_pre_soft_reset
-ffffffff81da7810 t gmc_v8_0_soft_reset
-ffffffff81da78e0 t gmc_v8_0_post_soft_reset
-ffffffff81da7960 t gmc_v8_0_set_clockgating_state
-ffffffff81da7ff0 t gmc_v8_0_set_powergating_state
-ffffffff81da8020 t gmc_v8_0_get_clockgating_state
-ffffffff81da8090 t gmc_v8_0_flush_gpu_tlb
-ffffffff81da80b0 t gmc_v8_0_emit_flush_gpu_tlb
-ffffffff81da8140 t gmc_v8_0_emit_pasid_mapping
-ffffffff81da8160 t gmc_v8_0_set_pte_pde
-ffffffff81da81a0 t gmc_v8_0_set_prt
-ffffffff81da83a0 t gmc_v8_0_get_vm_pte_flags
-ffffffff81da83f0 t gmc_v8_0_get_vm_pde
-ffffffff81da8450 t gmc_v8_0_vm_fault_interrupt_state
-ffffffff81da8530 t gmc_v8_0_process_interrupt
-ffffffff81da9000 t gmc_v9_0_early_init
-ffffffff81da90a0 t gmc_v9_0_late_init
-ffffffff81da9250 t gmc_v9_0_sw_init
-ffffffff81da9590 t gmc_v9_0_sw_fini
-ffffffff81da9600 t gmc_v9_0_hw_init
-ffffffff81da98a0 t gmc_v9_0_hw_fini
-ffffffff81da9900 t gmc_v9_0_suspend
-ffffffff81da9990 t gmc_v9_0_resume
-ffffffff81da9a00 t gmc_v9_0_is_idle
-ffffffff81da9a30 t gmc_v9_0_wait_for_idle
-ffffffff81da9a60 t gmc_v9_0_soft_reset
-ffffffff81da9a90 t gmc_v9_0_set_clockgating_state
-ffffffff81da9aa0 t gmc_v9_0_set_powergating_state
-ffffffff81da9ad0 t gmc_v9_0_get_clockgating_state
-ffffffff81da9ae0 t gmc_v9_0_flush_gpu_tlb
-ffffffff81da9d50 t gmc_v9_0_emit_flush_gpu_tlb
-ffffffff81da9e80 t gmc_v9_0_emit_pasid_mapping
-ffffffff81da9ec0 t gmc_v9_0_set_pte_pde
-ffffffff81da9f00 t gmc_v9_0_get_vm_pte_flags
-ffffffff81da9f90 t gmc_v9_0_get_vm_pde
-ffffffff81daa080 t gmc_v9_0_vm_fault_interrupt_state
-ffffffff81daa1e0 t gmc_v9_0_process_interrupt
-ffffffff81dab000 t iceland_ih_early_init
-ffffffff81dab050 t iceland_ih_sw_init
-ffffffff81dab0a0 t iceland_ih_sw_fini
-ffffffff81dab0f0 t iceland_ih_hw_init
-ffffffff81dab330 t iceland_ih_hw_fini
-ffffffff81dab400 t iceland_ih_suspend
-ffffffff81dab4d0 t iceland_ih_resume
-ffffffff81dab510 t iceland_ih_is_idle
-ffffffff81dab550 t iceland_ih_wait_for_idle
-ffffffff81dab5e0 t iceland_ih_soft_reset
-ffffffff81dab6c0 t iceland_ih_set_clockgating_state
-ffffffff81dab6f0 t iceland_ih_set_powergating_state
-ffffffff81dab720 t iceland_ih_get_wptr
-ffffffff81dab810 t iceland_ih_prescreen_iv
-ffffffff81dab890 t iceland_ih_decode_iv
-ffffffff81dab910 t iceland_ih_set_rptr
-ffffffff81dac000 T mmhub_v1_0_get_fb_location
-ffffffff81dac050 T mmhub_v1_0_initialize_power_gating
-ffffffff81dac320 T mmhub_v1_0_update_power_gating
-ffffffff81dac490 T mmhub_v1_0_gart_enable
-ffffffff81dacb20 T mmhub_v1_0_gart_disable
-ffffffff81dacc00 T mmhub_v1_0_set_fault_enable_default
-ffffffff81daccd0 T mmhub_v1_0_init
-ffffffff81dacd60 T mmhub_v1_0_set_clockgating
-ffffffff81dad0a0 T mmhub_v1_0_get_clockgating
-ffffffff81dae000 T xgpu_ai_mailbox_set_irq_funcs
-ffffffff81dae050 T xgpu_ai_mailbox_add_irq_id
-ffffffff81dae0e0 T xgpu_ai_mailbox_get_irq
-ffffffff81dae190 t xgpu_ai_mailbox_flr_work
-ffffffff81dae340 T xgpu_ai_mailbox_put_irq
-ffffffff81dae380 t xgpu_ai_request_full_gpu_access
-ffffffff81dae3a0 t xgpu_ai_release_full_gpu_access
-ffffffff81dae3c0 t xgpu_ai_request_reset
-ffffffff81dae3e0 t xgpu_ai_mailbox_trans_msg
-ffffffff81dae610 t xgpu_ai_set_mailbox_ack_irq
-ffffffff81dae6a0 t xgpu_ai_mailbox_ack_irq
-ffffffff81dae6d0 t xgpu_ai_set_mailbox_rcv_irq
-ffffffff81dae760 t xgpu_ai_mailbox_rcv_irq
-ffffffff81dae7d0 t xgpu_ai_send_access_requests
-ffffffff81daf000 T xgpu_vi_init_golden_registers
-ffffffff81daf0c0 T xgpu_vi_mailbox_set_irq_funcs
-ffffffff81daf110 T xgpu_vi_mailbox_add_irq_id
-ffffffff81daf1a0 T xgpu_vi_mailbox_get_irq
-ffffffff81daf250 t xgpu_vi_mailbox_flr_work
-ffffffff81daf330 T xgpu_vi_mailbox_put_irq
-ffffffff81daf370 t xgpu_vi_request_full_gpu_access
-ffffffff81daf390 t xgpu_vi_release_full_gpu_access
-ffffffff81daf3b0 t xgpu_vi_request_reset
-ffffffff81daf3d0 t xgpu_vi_wait_reset_cmpl
-ffffffff81daf4c0 t xgpu_vi_set_mailbox_ack_irq
-ffffffff81daf530 t xgpu_vi_mailbox_ack_irq
-ffffffff81daf560 t xgpu_vi_set_mailbox_rcv_irq
-ffffffff81daf5e0 t xgpu_vi_mailbox_rcv_irq
-ffffffff81daf640 t xgpu_vi_mailbox_rcv_msg
-ffffffff81daf760 t xgpu_vi_send_access_requests
-ffffffff81db0000 t nbio_v6_1_get_hdp_flush_req_offset
-ffffffff81db0040 t nbio_v6_1_get_hdp_flush_done_offset
-ffffffff81db0080 t nbio_v6_1_get_pcie_index_offset
-ffffffff81db00b0 t nbio_v6_1_get_pcie_data_offset
-ffffffff81db00e0 t nbio_v6_1_get_rev_id
-ffffffff81db0130 t nbio_v6_1_mc_access_enable
-ffffffff81db0160 t nbio_v6_1_hdp_flush
-ffffffff81db01c0 t nbio_v6_1_get_memsize
-ffffffff81db01f0 t nbio_v6_1_sdma_doorbell_range
-ffffffff81db0270 t nbio_v6_1_enable_doorbell_aperture
-ffffffff81db02c0 t nbio_v6_1_enable_doorbell_selfring_aperture
-ffffffff81db0340 t nbio_v6_1_ih_doorbell_range
-ffffffff81db03c0 t nbio_v6_1_update_medium_grain_clock_gating
-ffffffff81db0470 t nbio_v6_1_update_medium_grain_light_sleep
-ffffffff81db0520 t nbio_v6_1_get_clockgating_state
-ffffffff81db05a0 t nbio_v6_1_ih_control
-ffffffff81db0620 t nbio_v6_1_init_registers
-ffffffff81db06a0 t nbio_v6_1_detect_hw_virt
-ffffffff81db1000 t nbio_v7_0_get_hdp_flush_req_offset
-ffffffff81db1040 t nbio_v7_0_get_hdp_flush_done_offset
-ffffffff81db1080 t nbio_v7_0_get_pcie_index_offset
-ffffffff81db10b0 t nbio_v7_0_get_pcie_data_offset
-ffffffff81db10e0 t nbio_v7_0_get_rev_id
-ffffffff81db1150 t nbio_v7_0_mc_access_enable
-ffffffff81db1180 t nbio_v7_0_hdp_flush
-ffffffff81db11e0 t nbio_v7_0_get_memsize
-ffffffff81db1210 t nbio_v7_0_sdma_doorbell_range
-ffffffff81db12a0 t nbio_v7_0_enable_doorbell_aperture
-ffffffff81db12f0 t nbio_v7_0_enable_doorbell_selfring_aperture
-ffffffff81db1320 t nbio_v7_0_ih_doorbell_range
-ffffffff81db13a0 t nbio_v7_0_update_medium_grain_clock_gating
-ffffffff81db1580 t nbio_v7_0_update_medium_grain_light_sleep
-ffffffff81db1630 t nbio_v7_0_get_clockgating_state
-ffffffff81db16b0 t nbio_v7_0_ih_control
-ffffffff81db1730 t nbio_v7_0_init_registers
-ffffffff81db1760 t nbio_v7_0_detect_hw_virt
-ffffffff81db2000 T psp_v10_0_set_psp_funcs
-ffffffff81db2030 t psp_v10_0_init_microcode
-ffffffff81db2210 t psp_v10_0_prep_cmd_buf
-ffffffff81db2460 t psp_v10_0_ring_init
-ffffffff81db24e0 t psp_v10_0_ring_create
-ffffffff81db2700 t psp_v10_0_ring_stop
-ffffffff81db28d0 t psp_v10_0_ring_destroy
-ffffffff81db2940 t psp_v10_0_cmd_submit
-ffffffff81db2ab0 t psp_v10_0_compare_sram_data
-ffffffff81db2c30 t psp_v10_0_mode1_reset
-ffffffff81db3000 T psp_v3_1_set_psp_funcs
-ffffffff81db3030 t psp_v3_1_init_microcode
-ffffffff81db3320 t psp_v3_1_bootloader_load_sysdrv
-ffffffff81db35a0 t psp_v3_1_bootloader_load_sos
-ffffffff81db3890 t psp_v3_1_prep_cmd_buf
-ffffffff81db3a20 t psp_v3_1_ring_init
-ffffffff81db3aa0 t psp_v3_1_ring_create
-ffffffff81db3cc0 t psp_v3_1_ring_stop
-ffffffff81db3e90 t psp_v3_1_ring_destroy
-ffffffff81db3f00 t psp_v3_1_cmd_submit
-ffffffff81db4070 t psp_v3_1_compare_sram_data
-ffffffff81db4200 t psp_v3_1_smu_reload_quirk
-ffffffff81db4260 t psp_v3_1_mode1_reset
-ffffffff81db5000 t sdma_v2_4_early_init
-ffffffff81db5100 t sdma_v2_4_sw_init
-ffffffff81db5470 t sdma_v2_4_sw_fini
-ffffffff81db5550 t sdma_v2_4_hw_init
-ffffffff81db5a50 t sdma_v2_4_hw_fini
-ffffffff81db5a90 t sdma_v2_4_suspend
-ffffffff81db5ad0 t sdma_v2_4_resume
-ffffffff81db5ae0 t sdma_v2_4_is_idle
-ffffffff81db5b20 t sdma_v2_4_wait_for_idle
-ffffffff81db5bb0 t sdma_v2_4_soft_reset
-ffffffff81db5cf0 t sdma_v2_4_set_clockgating_state
-ffffffff81db5d20 t sdma_v2_4_set_powergating_state
-ffffffff81db5d50 t sdma_v2_4_ring_get_rptr
-ffffffff81db5d90 t sdma_v2_4_ring_get_wptr
-ffffffff81db5de0 t sdma_v2_4_ring_set_wptr
-ffffffff81db5e10 t sdma_v2_4_ring_emit_ib
-ffffffff81db60a0 t sdma_v2_4_ring_emit_fence
-ffffffff81db64a0 t sdma_v2_4_ring_emit_pipeline_sync
-ffffffff81db6720 t sdma_v2_4_ring_emit_vm_flush
-ffffffff81db69a0 t sdma_v2_4_ring_emit_hdp_flush
-ffffffff81db6c20 t sdma_v2_4_ring_test_ring
-ffffffff81db6f90 t sdma_v2_4_ring_test_ib
-ffffffff81db7230 t sdma_v2_4_ring_insert_nop
-ffffffff81db73b0 t sdma_v2_4_ring_pad_ib
-ffffffff81db7540 t sdma_v2_4_ring_emit_wreg
-ffffffff81db7690 t sdma_v2_4_emit_copy_buffer
-ffffffff81db7740 t sdma_v2_4_emit_fill_buffer
-ffffffff81db77d0 t sdma_v2_4_vm_copy_pte
-ffffffff81db7880 t sdma_v2_4_vm_write_pte
-ffffffff81db7950 t sdma_v2_4_vm_set_pte_pde
-ffffffff81db7a40 t sdma_v2_4_set_trap_irq_state
-ffffffff81db7b00 t sdma_v2_4_process_trap_irq
-ffffffff81db7b60 t sdma_v2_4_process_illegal_inst_irq
-ffffffff81db7bc0 t sdma_v2_4_enable
-ffffffff81db8000 t sdma_v3_0_early_init
-ffffffff81db8120 t sdma_v3_0_sw_init
-ffffffff81db84c0 t sdma_v3_0_sw_fini
-ffffffff81db85a0 t sdma_v3_0_hw_init
-ffffffff81db8820 t sdma_v3_0_hw_fini
-ffffffff81db8860 t sdma_v3_0_suspend
-ffffffff81db88a0 t sdma_v3_0_resume
-ffffffff81db88b0 t sdma_v3_0_is_idle
-ffffffff81db88f0 t sdma_v3_0_wait_for_idle
-ffffffff81db8980 t sdma_v3_0_check_soft_reset
-ffffffff81db89d0 t sdma_v3_0_pre_soft_reset
-ffffffff81db8a20 t sdma_v3_0_soft_reset
-ffffffff81db8af0 t sdma_v3_0_post_soft_reset
-ffffffff81db8b30 t sdma_v3_0_set_clockgating_state
-ffffffff81db8d90 t sdma_v3_0_set_powergating_state
-ffffffff81db8dc0 t sdma_v3_0_get_clockgating_state
-ffffffff81db8e40 t sdma_v3_0_ring_get_rptr
-ffffffff81db8e80 t sdma_v3_0_ring_get_wptr
-ffffffff81db8f00 t sdma_v3_0_ring_set_wptr
-ffffffff81db8fc0 t sdma_v3_0_ring_emit_ib
-ffffffff81db9250 t sdma_v3_0_ring_emit_fence
-ffffffff81db9650 t sdma_v3_0_ring_emit_pipeline_sync
-ffffffff81db98d0 t sdma_v3_0_ring_emit_vm_flush
-ffffffff81db9b50 t sdma_v3_0_ring_emit_hdp_flush
-ffffffff81db9dd0 t sdma_v3_0_ring_test_ring
-ffffffff81dba140 t sdma_v3_0_ring_test_ib
-ffffffff81dba3e0 t sdma_v3_0_ring_insert_nop
-ffffffff81dba560 t sdma_v3_0_ring_pad_ib
-ffffffff81dba6f0 t sdma_v3_0_ring_emit_wreg
-ffffffff81dba840 t sdma_v3_0_emit_copy_buffer
-ffffffff81dba8f0 t sdma_v3_0_emit_fill_buffer
-ffffffff81dba980 t sdma_v3_0_vm_copy_pte
-ffffffff81dbaa30 t sdma_v3_0_vm_write_pte
-ffffffff81dbab00 t sdma_v3_0_vm_set_pte_pde
-ffffffff81dbabf0 t sdma_v3_0_set_trap_irq_state
-ffffffff81dbacb0 t sdma_v3_0_process_trap_irq
-ffffffff81dbad10 t sdma_v3_0_process_illegal_inst_irq
-ffffffff81dbad70 t sdma_v3_0_ctx_switch_enable
-ffffffff81dbaf20 t sdma_v3_0_enable
-ffffffff81dbb0c0 t sdma_v3_0_gfx_resume
-ffffffff81dbc000 t sdma_v4_0_early_init
-ffffffff81dbc120 t sdma_v4_0_sw_init
-ffffffff81dbc500 t sdma_v4_0_sw_fini
-ffffffff81dbc5e0 t sdma_v4_0_hw_init
-ffffffff81dbc9d0 t sdma_v4_0_hw_fini
-ffffffff81dbca20 t sdma_v4_0_suspend
-ffffffff81dbca70 t sdma_v4_0_resume
-ffffffff81dbca80 t sdma_v4_0_is_idle
-ffffffff81dbcb20 t sdma_v4_0_wait_for_idle
-ffffffff81dbcbe0 t sdma_v4_0_soft_reset
-ffffffff81dbcc10 t sdma_v4_0_set_clockgating_state
-ffffffff81dbcec0 t sdma_v4_0_set_powergating_state
-ffffffff81dbcf10 t sdma_v4_0_get_clockgating_state
-ffffffff81dbcfa0 t sdma_v4_0_ring_get_rptr
-ffffffff81dbcfe0 t sdma_v4_0_ring_get_wptr
-ffffffff81dbd0b0 t sdma_v4_0_ring_set_wptr
-ffffffff81dbd180 t sdma_v4_0_ring_emit_ib
-ffffffff81dbd410 t sdma_v4_0_ring_emit_fence
-ffffffff81dbd860 t sdma_v4_0_ring_emit_pipeline_sync
-ffffffff81dbd8b0 t sdma_v4_0_ring_emit_vm_flush
-ffffffff81dbd8d0 t sdma_v4_0_ring_emit_hdp_flush
-ffffffff81dbd970 t sdma_v4_0_ring_test_ring
-ffffffff81dbdce0 t sdma_v4_0_ring_test_ib
-ffffffff81dbdf80 t sdma_v4_0_ring_insert_nop
-ffffffff81dbe100 t sdma_v4_0_ring_pad_ib
-ffffffff81dbe290 t sdma_v4_0_ring_emit_wreg
-ffffffff81dbe3e0 t sdma_v4_0_ring_emit_reg_wait
-ffffffff81dbe430 t sdma_v4_0_wait_reg_mem
-ffffffff81dbe760 t sdma_v4_0_emit_copy_buffer
-ffffffff81dbe810 t sdma_v4_0_emit_fill_buffer
-ffffffff81dbe8a0 t sdma_v4_0_vm_copy_pte
-ffffffff81dbe960 t sdma_v4_0_vm_write_pte
-ffffffff81dbea30 t sdma_v4_0_vm_set_pte_pde
-ffffffff81dbeb30 t sdma_v4_0_set_trap_irq_state
-ffffffff81dbebc0 t sdma_v4_0_process_trap_irq
-ffffffff81dbec20 t sdma_v4_0_process_illegal_inst_irq
-ffffffff81dbec80 t sdma_v4_0_ctx_switch_enable
-ffffffff81dbee20 t sdma_v4_0_enable
-ffffffff81dbefd0 t sdma_v4_0_gfx_resume
-ffffffff81dbf590 t sdma_v4_1_update_power_gating
-ffffffff81dc0000 T soc15_grbm_select
-ffffffff81dc0050 T soc15_program_register_sequence
-ffffffff81dc0150 T soc15_set_ip_blocks
-ffffffff81dc0410 t soc15_common_early_init
-ffffffff81dc0610 t soc15_common_late_init
-ffffffff81dc0650 t soc15_common_sw_init
-ffffffff81dc0690 t soc15_common_sw_fini
-ffffffff81dc06c0 t soc15_common_hw_init
-ffffffff81dc0740 t soc15_common_hw_fini
-ffffffff81dc07b0 t soc15_common_suspend
-ffffffff81dc0820 t soc15_common_resume
-ffffffff81dc08a0 t soc15_common_is_idle
-ffffffff81dc08d0 t soc15_common_wait_for_idle
-ffffffff81dc0900 t soc15_common_soft_reset
-ffffffff81dc0930 t soc15_common_set_clockgating_state
-ffffffff81dc0dc0 t soc15_common_set_powergating_state
-ffffffff81dc0df0 t soc15_common_get_clockgating_state
-ffffffff81dc0ed0 t soc15_pcie_rreg
-ffffffff81dc0f80 t soc15_pcie_wreg
-ffffffff81dc1030 t soc15_uvd_ctx_rreg
-ffffffff81dc10d0 t soc15_uvd_ctx_wreg
-ffffffff81dc1150 t soc15_didt_rreg
-ffffffff81dc11f0 t soc15_didt_wreg
-ffffffff81dc1270 t soc15_gc_cac_rreg
-ffffffff81dc1300 t soc15_gc_cac_wreg
-ffffffff81dc1380 t soc15_se_cac_rreg
-ffffffff81dc1410 t soc15_se_cac_wreg
-ffffffff81dc1490 t soc15_read_disabled_bios
-ffffffff81dc14c0 t soc15_read_bios_from_rom
-ffffffff81dc1580 t soc15_read_register
-ffffffff81dc1660 t soc15_vga_set_state
-ffffffff81dc1690 t soc15_asic_reset
-ffffffff81dc1730 t soc15_get_xclk
-ffffffff81dc1770 t soc15_set_uvd_clocks
-ffffffff81dc17a0 t soc15_set_vce_clocks
-ffffffff81dc17d0 t soc15_get_config_memsize
-ffffffff81dc17f0 t soc15_flush_hdp
-ffffffff81dc1810 t soc15_invalidate_hdp
-ffffffff81dc1870 t soc15_need_full_reset
-ffffffff81dc2000 t tonga_ih_early_init
-ffffffff81dc2050 t tonga_ih_sw_init
-ffffffff81dc20b0 t tonga_ih_sw_fini
-ffffffff81dc2100 t tonga_ih_hw_init
-ffffffff81dc2340 t tonga_ih_hw_fini
-ffffffff81dc23e0 t tonga_ih_suspend
-ffffffff81dc2480 t tonga_ih_resume
-ffffffff81dc24c0 t tonga_ih_is_idle
-ffffffff81dc2500 t tonga_ih_wait_for_idle
-ffffffff81dc2590 t tonga_ih_check_soft_reset
-ffffffff81dc25e0 t tonga_ih_pre_soft_reset
-ffffffff81dc2690 t tonga_ih_soft_reset
-ffffffff81dc2760 t tonga_ih_post_soft_reset
-ffffffff81dc27a0 t tonga_ih_set_clockgating_state
-ffffffff81dc27d0 t tonga_ih_set_powergating_state
-ffffffff81dc2800 t tonga_ih_get_wptr
-ffffffff81dc2900 t tonga_ih_prescreen_iv
-ffffffff81dc2980 t tonga_ih_decode_iv
-ffffffff81dc2a00 t tonga_ih_set_rptr
-ffffffff81dc3000 t uvd_v5_0_early_init
-ffffffff81dc3050 t uvd_v5_0_sw_init
-ffffffff81dc3120 t uvd_v5_0_sw_fini
-ffffffff81dc3170 t uvd_v5_0_hw_init
-ffffffff81dc36a0 t uvd_v5_0_hw_fini
-ffffffff81dc36f0 t uvd_v5_0_suspend
-ffffffff81dc3740 t uvd_v5_0_resume
-ffffffff81dc3790 t uvd_v5_0_is_idle
-ffffffff81dc37d0 t uvd_v5_0_wait_for_idle
-ffffffff81dc3850 t uvd_v5_0_soft_reset
-ffffffff81dc3900 t uvd_v5_0_set_clockgating_state
-ffffffff81dc3aa0 t uvd_v5_0_set_powergating_state
-ffffffff81dc3ae0 t uvd_v5_0_get_clockgating_state
-ffffffff81dc3b50 t uvd_v5_0_ring_get_rptr
-ffffffff81dc3b90 t uvd_v5_0_ring_get_wptr
-ffffffff81dc3bd0 t uvd_v5_0_ring_set_wptr
-ffffffff81dc3bf0 t uvd_v5_0_ring_emit_ib
-ffffffff81dc3e60 t uvd_v5_0_ring_emit_fence
-ffffffff81dc4410 t uvd_v5_0_ring_test_ring
-ffffffff81dc45f0 t uvd_v5_0_ring_insert_nop
-ffffffff81dc4740 t uvd_v5_0_set_interrupt_state
-ffffffff81dc4770 t uvd_v5_0_process_interrupt
-ffffffff81dc47b0 t uvd_v5_0_stop
-ffffffff81dc48d0 t uvd_v5_0_start
-ffffffff81dc6000 t uvd_v6_0_early_init
-ffffffff81dc6130 t uvd_v6_0_sw_init
-ffffffff81dc6370 t uvd_v6_0_sw_fini
-ffffffff81dc6420 t uvd_v6_0_hw_init
-ffffffff81dc69e0 t uvd_v6_0_hw_fini
-ffffffff81dc6a30 t uvd_v6_0_suspend
-ffffffff81dc6a70 t uvd_v6_0_resume
-ffffffff81dc6ac0 t uvd_v6_0_is_idle
-ffffffff81dc6b00 t uvd_v6_0_wait_for_idle
-ffffffff81dc6b80 t uvd_v6_0_check_soft_reset
-ffffffff81dc6bf0 t uvd_v6_0_pre_soft_reset
-ffffffff81dc6c30 t uvd_v6_0_soft_reset
-ffffffff81dc6d00 t uvd_v6_0_post_soft_reset
-ffffffff81dc6da0 t uvd_v6_0_set_clockgating_state
-ffffffff81dc6f30 t uvd_v6_0_set_powergating_state
-ffffffff81dc6fa0 t uvd_v6_0_get_clockgating_state
-ffffffff81dc7020 t uvd_v6_0_ring_get_rptr
-ffffffff81dc7060 t uvd_v6_0_ring_get_wptr
-ffffffff81dc70a0 t uvd_v6_0_ring_set_wptr
-ffffffff81dc70c0 t uvd_v6_0_ring_emit_ib
-ffffffff81dc73f0 t uvd_v6_0_ring_emit_fence
-ffffffff81dc79a0 t uvd_v6_0_ring_emit_pipeline_sync
-ffffffff81dc7d90 t uvd_v6_0_ring_emit_vm_flush
-ffffffff81dc80f0 t uvd_v6_0_ring_emit_hdp_flush
-ffffffff81dc8120 t uvd_v6_0_ring_test_ring
-ffffffff81dc8300 t uvd_v6_0_ring_insert_nop
-ffffffff81dc8450 t uvd_v6_0_ring_emit_wreg
-ffffffff81dc86d0 t uvd_v6_0_enc_ring_get_rptr
-ffffffff81dc8730 t uvd_v6_0_enc_ring_get_wptr
-ffffffff81dc8790 t uvd_v6_0_enc_ring_set_wptr
-ffffffff81dc87d0 t uvd_v6_0_enc_ring_emit_ib
-ffffffff81dc89e0 t uvd_v6_0_enc_ring_emit_fence
-ffffffff81dc8c20 t uvd_v6_0_enc_ring_emit_pipeline_sync
-ffffffff81dc8dd0 t uvd_v6_0_enc_ring_emit_vm_flush
-ffffffff81dc8fe0 t uvd_v6_0_enc_ring_test_ring
-ffffffff81dc9150 t uvd_v6_0_enc_ring_test_ib
-ffffffff81dc96e0 t uvd_v6_0_enc_ring_insert_end
-ffffffff81dc9770 t uvd_v6_0_set_interrupt_state
-ffffffff81dc97a0 t uvd_v6_0_process_interrupt
-ffffffff81dc9860 t uvd_v6_0_stop
-ffffffff81dc9980 t uvd_v6_0_start
-ffffffff81dcb000 T uvd_v7_0_enc_get_destroy_msg
-ffffffff81dcb2b0 t uvd_v7_0_early_init
-ffffffff81dcb5a0 t uvd_v7_0_sw_init
-ffffffff81dcb8d0 t uvd_v7_0_sw_fini
-ffffffff81dcb9c0 t uvd_v7_0_hw_init
-ffffffff81dcd650 t uvd_v7_0_hw_fini
-ffffffff81dcd8d0 t uvd_v7_0_suspend
-ffffffff81dcd8f0 t uvd_v7_0_resume
-ffffffff81dcd940 t uvd_v7_0_set_clockgating_state
-ffffffff81dcd970 t uvd_v7_0_ring_get_rptr
-ffffffff81dcd9c0 t uvd_v7_0_ring_get_wptr
-ffffffff81dcda10 t uvd_v7_0_ring_set_wptr
-ffffffff81dcda40 t uvd_v7_0_ring_patch_cs_in_place
-ffffffff81dcdaf0 t uvd_v7_0_ring_emit_ib
-ffffffff81dcde80 t uvd_v7_0_ring_emit_fence
-ffffffff81dce4d0 t uvd_v7_0_ring_emit_vm_flush
-ffffffff81dce540 t uvd_v7_0_ring_emit_hdp_flush
-ffffffff81dce570 t uvd_v7_0_ring_test_ring
-ffffffff81dce7a0 t uvd_v7_0_ring_insert_nop
-ffffffff81dce920 t uvd_v7_0_ring_emit_wreg
-ffffffff81dcebf0 t uvd_v7_0_ring_emit_reg_wait
-ffffffff81dcef90 t uvd_v7_0_enc_ring_get_rptr
-ffffffff81dcf010 t uvd_v7_0_enc_ring_get_wptr
-ffffffff81dcf0b0 t uvd_v7_0_enc_ring_set_wptr
-ffffffff81dcf140 t uvd_v7_0_enc_ring_emit_ib
-ffffffff81dcf350 t uvd_v7_0_enc_ring_emit_fence
-ffffffff81dcf590 t uvd_v7_0_enc_ring_emit_vm_flush
-ffffffff81dcf600 t uvd_v7_0_enc_ring_test_ring
-ffffffff81dcf780 t uvd_v7_0_enc_ring_test_ib
-ffffffff81dcfb00 t uvd_v7_0_enc_ring_insert_end
-ffffffff81dcfb90 t uvd_v7_0_enc_ring_emit_wreg
-ffffffff81dcfce0 t uvd_v7_0_enc_ring_emit_reg_wait
-ffffffff81dcfea0 t uvd_v7_0_set_interrupt_state
-ffffffff81dcfed0 t uvd_v7_0_process_interrupt
-ffffffff81dd0000 t vce_v3_0_early_init
-ffffffff81dd0190 t vce_v3_0_sw_init
-ffffffff81dd02c0 t vce_v3_0_sw_fini
-ffffffff81dd0310 t vce_v3_0_hw_init
-ffffffff81dd0420 t vce_v3_0_hw_fini
-ffffffff81dd04e0 t vce_v3_0_suspend
-ffffffff81dd05b0 t vce_v3_0_resume
-ffffffff81dd0600 t vce_v3_0_is_idle
-ffffffff81dd0660 t vce_v3_0_wait_for_idle
-ffffffff81dd0710 t vce_v3_0_check_soft_reset
-ffffffff81dd0800 t vce_v3_0_pre_soft_reset
-ffffffff81dd0940 t vce_v3_0_soft_reset
-ffffffff81dd0a10 t vce_v3_0_post_soft_reset
-ffffffff81dd0ac0 t vce_v3_0_set_clockgating_state
-ffffffff81dd0dd0 t vce_v3_0_set_powergating_state
-ffffffff81dd1670 t vce_v3_0_get_clockgating_state
-ffffffff81dd1720 t vce_v3_0_ring_get_rptr
-ffffffff81dd1810 t vce_v3_0_ring_get_wptr
-ffffffff81dd1900 t vce_v3_0_ring_set_wptr
-ffffffff81dd19e0 t vce_v3_0_ring_emit_ib
-ffffffff81dd1bf0 t vce_v3_0_emit_pipeline_sync
-ffffffff81dd1da0 t vce_v3_0_emit_vm_flush
-ffffffff81dd2010 t vce_v3_0_set_interrupt_state
-ffffffff81dd2080 t vce_v3_0_process_interrupt
-ffffffff81dd2120 t vce_v3_0_stop
-ffffffff81dd3000 t vce_v4_0_early_init
-ffffffff81dd3080 t vce_v4_0_sw_init
-ffffffff81dd3290 t vce_v4_0_sw_fini
-ffffffff81dd3310 t vce_v4_0_hw_init
-ffffffff81dd44b0 t vce_v4_0_hw_fini
-ffffffff81dd45f0 t vce_v4_0_suspend
-ffffffff81dd4670 t vce_v4_0_resume
-ffffffff81dd4700 t vce_v4_0_set_clockgating_state
-ffffffff81dd4730 t vce_v4_0_ring_get_rptr
-ffffffff81dd47a0 t vce_v4_0_ring_get_wptr
-ffffffff81dd4830 t vce_v4_0_ring_set_wptr
-ffffffff81dd48c0 t vce_v4_0_ring_emit_ib
-ffffffff81dd4ad0 t vce_v4_0_ring_emit_fence
-ffffffff81dd4d10 t vce_v4_0_emit_vm_flush
-ffffffff81dd4d80 t vce_v4_0_ring_insert_end
-ffffffff81dd4e10 t vce_v4_0_emit_wreg
-ffffffff81dd4f60 t vce_v4_0_emit_reg_wait
-ffffffff81dd5120 t vce_v4_0_set_interrupt_state
-ffffffff81dd51b0 t vce_v4_0_process_interrupt
-ffffffff81dd6000 t vcn_v1_0_early_init
-ffffffff81dd6090 t vcn_v1_0_sw_init
-ffffffff81dd62b0 t vcn_v1_0_sw_fini
-ffffffff81dd6300 t vcn_v1_0_hw_init
-ffffffff81dd6410 t vcn_v1_0_hw_fini
-ffffffff81dd6470 t vcn_v1_0_suspend
-ffffffff81dd64c0 t vcn_v1_0_resume
-ffffffff81dd65d0 t vcn_v1_0_is_idle
-ffffffff81dd6620 t vcn_v1_0_wait_for_idle
-ffffffff81dd66d0 t vcn_v1_0_set_clockgating_state
-ffffffff81dd6740 t vcn_v1_0_set_powergating_state
-ffffffff81dd7f30 t vcn_v1_0_dec_ring_get_rptr
-ffffffff81dd7f80 t vcn_v1_0_dec_ring_get_wptr
-ffffffff81dd7fd0 t vcn_v1_0_dec_ring_set_wptr
-ffffffff81dd8000 t vcn_v1_0_dec_ring_emit_ib
-ffffffff81dd8380 t vcn_v1_0_dec_ring_emit_fence
-ffffffff81dd89a0 t vcn_v1_0_dec_ring_emit_vm_flush
-ffffffff81dd8a10 t vcn_v1_0_dec_ring_insert_nop
-ffffffff81dd8b80 t vcn_v1_0_dec_ring_insert_start
-ffffffff81dd8d50 t vcn_v1_0_dec_ring_insert_end
-ffffffff81dd8e60 t vcn_v1_0_dec_ring_emit_wreg
-ffffffff81dd9110 t vcn_v1_0_dec_ring_emit_reg_wait
-ffffffff81dd9490 t vcn_v1_0_enc_ring_get_rptr
-ffffffff81dd9500 t vcn_v1_0_enc_ring_get_wptr
-ffffffff81dd9570 t vcn_v1_0_enc_ring_set_wptr
-ffffffff81dd95b0 t vcn_v1_0_enc_ring_emit_ib
-ffffffff81dd97c0 t vcn_v1_0_enc_ring_emit_fence
-ffffffff81dd9a00 t vcn_v1_0_enc_ring_emit_vm_flush
-ffffffff81dd9a70 t vcn_v1_0_enc_ring_insert_end
-ffffffff81dd9b00 t vcn_v1_0_enc_ring_emit_wreg
-ffffffff81dd9c50 t vcn_v1_0_enc_ring_emit_reg_wait
-ffffffff81dd9e10 t vcn_v1_0_jpeg_ring_get_rptr
-ffffffff81dd9e60 t vcn_v1_0_jpeg_ring_get_wptr
-ffffffff81dd9eb0 t vcn_v1_0_jpeg_ring_set_wptr
-ffffffff81dd9ee0 t vcn_v1_0_jpeg_ring_emit_ib
-ffffffff81dda7d0 t vcn_v1_0_jpeg_ring_emit_fence
-ffffffff81ddb0a0 t vcn_v1_0_jpeg_ring_emit_vm_flush
-ffffffff81ddb110 t vcn_v1_0_jpeg_ring_nop
-ffffffff81ddb260 t vcn_v1_0_jpeg_ring_insert_start
-ffffffff81ddb420 t vcn_v1_0_jpeg_ring_insert_end
-ffffffff81ddb5e0 t vcn_v1_0_jpeg_ring_emit_wreg
-ffffffff81ddb850 t vcn_v1_0_jpeg_ring_emit_reg_wait
-ffffffff81ddbc70 t vcn_v1_0_set_interrupt_state
-ffffffff81ddbca0 t vcn_v1_0_process_interrupt
-ffffffff81ddbd30 t vcn_v1_0_enable_clock_gating
-ffffffff81ddbeb0 t vcn_v1_0_disable_clock_gating
-ffffffff81ddd000 t vega10_ih_early_init
-ffffffff81ddd040 t vega10_ih_sw_init
-ffffffff81ddd160 t vega10_ih_sw_fini
-ffffffff81ddd1c0 t vega10_ih_hw_init
-ffffffff81ddd580 t vega10_ih_hw_fini
-ffffffff81ddd650 t vega10_ih_suspend
-ffffffff81ddd720 t vega10_ih_resume
-ffffffff81ddd760 t vega10_ih_is_idle
-ffffffff81ddd790 t vega10_ih_wait_for_idle
-ffffffff81ddd7c0 t vega10_ih_soft_reset
-ffffffff81ddd7f0 t vega10_ih_set_clockgating_state
-ffffffff81ddd820 t vega10_ih_set_powergating_state
-ffffffff81ddd850 t vega10_ih_get_wptr
-ffffffff81ddd960 t vega10_ih_prescreen_iv
-ffffffff81dddac0 t vega10_ih_decode_iv
-ffffffff81dddb90 t vega10_ih_set_rptr
-ffffffff81dde000 T vega10_reg_base_init
-ffffffff81ddf000 T vega20_reg_base_init
-ffffffff81de0000 T vi_srbm_select
-ffffffff81de0040 T vi_set_ip_blocks
-ffffffff81de05a0 t vi_common_early_init
-ffffffff81de0820 t vi_common_late_init
-ffffffff81de0860 t vi_common_sw_init
-ffffffff81de08a0 t vi_common_sw_fini
-ffffffff81de08d0 t vi_common_hw_init
-ffffffff81de09e0 t vi_common_hw_fini
-ffffffff81de0a60 t vi_common_suspend
-ffffffff81de0ae0 t vi_common_resume
-ffffffff81de0b20 t vi_common_is_idle
-ffffffff81de0b50 t vi_common_wait_for_idle
-ffffffff81de0b80 t vi_common_soft_reset
-ffffffff81de0bb0 t vi_common_set_clockgating_state
-ffffffff81de11e0 t vi_common_set_powergating_state
-ffffffff81de1210 t vi_common_get_clockgating_state
-ffffffff81de12d0 t cz_smc_rreg
-ffffffff81de1350 t cz_smc_wreg
-ffffffff81de13b0 t vi_smc_rreg
-ffffffff81de1430 t vi_smc_wreg
-ffffffff81de1490 t vi_pcie_rreg
-ffffffff81de1520 t vi_pcie_wreg
-ffffffff81de15a0 t vi_uvd_ctx_rreg
-ffffffff81de1620 t vi_uvd_ctx_wreg
-ffffffff81de1690 t vi_didt_rreg
-ffffffff81de1710 t vi_didt_wreg
-ffffffff81de1770 t vi_gc_cac_rreg
-ffffffff81de17f0 t vi_gc_cac_wreg
-ffffffff81de1850 t vi_read_disabled_bios
-ffffffff81de1a20 t vi_read_bios_from_rom
-ffffffff81de1b20 t vi_read_register
-ffffffff81de1da0 t vi_vga_set_state
-ffffffff81de1dd0 t vi_asic_reset
-ffffffff81de1ea0 t vi_get_xclk
-ffffffff81de1f30 t vi_set_uvd_clocks
-ffffffff81de1fd0 t vi_set_vce_clocks
-ffffffff81de2290 t vi_get_config_memsize
-ffffffff81de22b0 t vi_flush_hdp
-ffffffff81de2320 t vi_invalidate_hdp
-ffffffff81de2390 t vi_need_full_reset
-ffffffff81de23d0 t vi_set_uvd_clock
-ffffffff81de3000 T pci_mcfg_init
-ffffffff81de3050 T pci_lookup_segment
-ffffffff81de30b0 T pci_attach_hook
-ffffffff81de31d0 T pci_make_tag
-ffffffff81de3240 T pci_conf_read
-ffffffff81de3390 T pci_bus_maxdevs
-ffffffff81de33c0 T pci_decompose_tag
-ffffffff81de3420 T pci_conf_size
-ffffffff81de3470 T pci_mcfg_map_bus
-ffffffff81de34f0 T pci_conf_write
-ffffffff81de3630 T pci_msix_table_map
-ffffffff81de3750 T pci_msix_table_unmap
-ffffffff81de37f0 T msi_hwmask
-ffffffff81de3820 T msi_hwunmask
-ffffffff81de3850 T msi_addroute
-ffffffff81de3950 T msi_delroute
-ffffffff81de39c0 T pci_intr_map_msi
-ffffffff81de3a40 T msix_hwmask
-ffffffff81de3a70 T msix_hwunmask
-ffffffff81de3aa0 T msix_addroute
-ffffffff81de3ca0 T msix_delroute
-ffffffff81de3e00 T pci_intr_map_msix
-ffffffff81de3ed0 T pci_intr_map
-ffffffff81de4110 T pci_intr_string
-ffffffff81de41f0 T pci_intr_establish
-ffffffff81de4340 T pci_intr_disestablish
-ffffffff81de4350 T pci_init_extents
-ffffffff81de4540 T pci_dev_postattach
-ffffffff81de4550 T pci_min_powerstate
-ffffffff81de4560 T pci_set_powerstate_md
-ffffffff81de5000 T pciide_machdep_compat_intr_establish
-ffffffff81de5060 T pciide_machdep_compat_intr_disestablish
-ffffffff81de6000 T vga_post_init
-ffffffff81de62e0 t vm86_emu_inb
-ffffffff81de6320 t vm86_emu_inw
-ffffffff81de6360 t vm86_emu_inl
-ffffffff81de63a0 t vm86_emu_outb
-ffffffff81de63e0 t vm86_emu_outw
-ffffffff81de6420 t vm86_emu_outl
-ffffffff81de6460 T vga_post_call
-ffffffff81de64d0 T vga_post_free
-ffffffff81de6530 T ddb_vgapost
-ffffffff81de7000 T pchbmatch
-ffffffff81de7040 T pchbattach
-ffffffff81de74b0 T pchbactivate
-ffffffff81de7520 T pchb_amd64ht_attach
-ffffffff81de7660 T pchb_rnd
-ffffffff81de76e0 T pchb_print
-ffffffff81de8000 T amas_match
-ffffffff81de8050 T amas_attach
-ffffffff81de80b0 T amas_intl_nodes
-ffffffff81de8130 T amas_get_pagerange
-ffffffff81de9000 T agp_flush_cache
-ffffffff81de9030 T agp_flush_cache_range
-ffffffff81de9040 T agp_init_map
-ffffffff81de9100 T agp_destroy_map
-ffffffff81de9140 T agp_map_subregion
-ffffffff81de9170 T agp_unmap_subregion
-ffffffff81de91a0 T agp_map_atomic
-ffffffff81de91d0 T agp_unmap_atomic
-ffffffff81dea000 T cardslotmatch
-ffffffff81dea050 T cardslotattach
-ffffffff81dea2b0 T cardslot_event
-ffffffff81dea300 T cardslot_cb_print
-ffffffff81dea350 T cardslot_16_print
-ffffffff81dea3a0 T cardslot_16_submatch
-ffffffff81dea3e0 T cardslot_event_throw
-ffffffff81dea480 T cardslot_process_event
-ffffffff81deb000 T cardbusmatch
-ffffffff81deb050 T cardbusattach
-ffffffff81deb130 T cardbus_read_tuples
-ffffffff81deb4e0 T parse_tuple
-ffffffff81deb7b0 T cardbus_attach_card
-ffffffff81debf60 T enable_function
-ffffffff81debff0 T decode_tuples
-ffffffff81dec0c0 T cardbusprint
-ffffffff81dec1b0 T cardbussubmatch
-ffffffff81dec210 T disable_function
-ffffffff81dec270 T cardbus_detach_card
-ffffffff81dec360 T cardbus_intr_establish
-ffffffff81dec390 T cardbus_intr_disestablish
-ffffffff81dec3b0 T cardbus_function_enable
-ffffffff81dec480 T cardbus_function_disable
-ffffffff81dec4e0 T cardbus_matchbyid
-ffffffff81dec550 T decode_tuple
-ffffffff81ded000 T cardbus_mapreg_map
-ffffffff81ded1b0 T cardbus_mapreg_unmap
-ffffffff81dee000 T cardbus_read_exrom
-ffffffff81def000 T rbus_space_alloc
-ffffffff81def060 T rbus_space_alloc_subregion
-ffffffff81def240 T rbus_space_free
-ffffffff81def2d0 T rbus_new_body
-ffffffff81def360 T rbus_new_root_delegate
-ffffffff81def430 T rbus_new_root_share
-ffffffff81df0000 T com_cardbus_match
-ffffffff81df0070 T com_cardbus_attach
-ffffffff81df0230 T com_cardbus_detach
-ffffffff81df02c0 T com_cardbus_find_csdev
-ffffffff81df0450 T com_cardbus_gofigure
-ffffffff81df08e0 T com_cardbus_enable
-ffffffff81df09b0 T com_cardbus_disable
-ffffffff81df0a00 T com_cardbus_setup
-ffffffff81df1000 T xl_cardbus_match
-ffffffff81df10c0 T xl_cardbus_attach
-ffffffff81df1450 T xl_cardbus_detach
-ffffffff81df1500 T xl_cardbus_lookup
-ffffffff81df15c0 T xl_cardbus_intr_ack
-ffffffff81df2000 T dc_cardbus_match
-ffffffff81df2020 T dc_cardbus_attach
-ffffffff81df23c0 T dc_cardbus_detach
-ffffffff81df2450 T dc_cardbus_setup
-ffffffff81df3000 T fxp_cardbus_match
-ffffffff81df3020 T fxp_cardbus_attach
-ffffffff81df3240 T fxp_cardbus_detach
-ffffffff81df32d0 T fxp_cardbus_setup
-ffffffff81df4000 t rl_cardbus_match
-ffffffff81df4020 t rl_cardbus_attach
-ffffffff81df41d0 t rl_cardbus_detach
-ffffffff81df4290 T rl_cardbus_setup
-ffffffff81df5000 T re_cardbus_probe
-ffffffff81df5020 T re_cardbus_attach
-ffffffff81df5230 T re_cardbus_detach
-ffffffff81df5310 T re_cardbus_setup
-ffffffff81df6000 T ath_cardbus_match
-ffffffff81df6050 T ath_cardbus_attach
-ffffffff81df6180 T ath_cardbus_detach
-ffffffff81df6250 T ath_cardbus_enable
-ffffffff81df6320 T ath_cardbus_disable
-ffffffff81df6370 T ath_cardbus_power
-ffffffff81df63a0 T ath_cardbus_setup
-ffffffff81df7000 T athn_cardbus_match
-ffffffff81df7020 T athn_cardbus_attach
-ffffffff81df7170 T athn_cardbus_detach
-ffffffff81df7210 T athn_cardbus_enable
-ffffffff81df72e0 T athn_cardbus_disable
-ffffffff81df7330 T athn_cardbus_power
-ffffffff81df7360 T athn_cardbus_read
-ffffffff81df7380 T athn_cardbus_write
-ffffffff81df73b0 T athn_cardbus_write_barrier
-ffffffff81df73e0 T athn_cardbus_setup
-ffffffff81df8000 T atw_cardbus_match
-ffffffff81df8020 T atw_cardbus_attach
-ffffffff81df8230 T atw_cardbus_detach
-ffffffff81df82f0 T atw_cardbus_enable
-ffffffff81df83c0 T atw_cardbus_disable
-ffffffff81df8410 T atw_cardbus_power
-ffffffff81df8440 T atw_cardbus_setup
-ffffffff81df9000 T rtw_cardbus_match
-ffffffff81df9020 T rtw_cardbus_attach
-ffffffff81df9270 T rtw_cardbus_detach
-ffffffff81df9390 T rtw_cardbus_intr_ack
-ffffffff81df93b0 T rtw_cardbus_funcregen
-ffffffff81df9410 T rtw_cardbus_enable
-ffffffff81df9570 T rtw_cardbus_disable
-ffffffff81df9660 T rtw_cardbus_power
-ffffffff81df9690 T rtw_cardbus_setup
-ffffffff81dfa000 T ral_cardbus_match
-ffffffff81dfa020 T ral_cardbus_attach
-ffffffff81dfa230 T ral_cardbus_detach
-ffffffff81dfa2e0 T ral_cardbus_activate
-ffffffff81dfa360 T ral_cardbus_enable
-ffffffff81dfa4c0 T ral_cardbus_disable
-ffffffff81dfa510 T ral_cardbus_setup
-ffffffff81dfa5b0 T ral_cardbus_wakeup
-ffffffff81dfb000 T acx_cardbus_match
-ffffffff81dfb020 T acx_cardbus_attach
-ffffffff81dfb260 T acx_cardbus_detach
-ffffffff81dfb380 T acx_cardbus_enable
-ffffffff81dfb450 T acx_cardbus_disable
-ffffffff81dfb4a0 T acx_cardbus_power
-ffffffff81dfb4d0 T acx_cardbus_setup
-ffffffff81dfc000 T pgt_cardbus_match
-ffffffff81dfc020 T pgt_cardbus_attach
-ffffffff81dfc220 T pgt_cardbus_detach
-ffffffff81dfc2c0 T pgt_cardbus_enable
-ffffffff81dfc410 T pgt_cardbus_disable
-ffffffff81dfc460 T pgt_cardbus_power
-ffffffff81dfc4b0 T pgt_cardbus_setup
-ffffffff81dfd000 T ehci_cardbus_match
-ffffffff81dfd040 T ehci_cardbus_attach
-ffffffff81dfd2e0 T ehci_cardbus_detach
-ffffffff81dfe000 T ohci_cardbus_match
-ffffffff81dfe040 T ohci_cardbus_attach
-ffffffff81dfe2e0 T ohci_cardbus_detach
-ffffffff81dff000 T uhci_cardbus_match
-ffffffff81dff040 T uhci_cardbus_attach
-ffffffff81dff350 T uhci_cardbus_detach
-ffffffff81e00000 T malo_cardbus_match
-ffffffff81e00020 T malo_cardbus_attach
-ffffffff81e00270 T malo_cardbus_detach
-ffffffff81e00340 T malo_cardbus_enable
-ffffffff81e004b0 T malo_cardbus_disable
-ffffffff81e00500 T malo_cardbus_setup
-ffffffff81e01000 T bwi_cardbus_match
-ffffffff81e01020 T bwi_cardbus_attach
-ffffffff81e01290 T bwi_cardbus_detach
-ffffffff81e01330 T bwi_cardbus_enable
-ffffffff81e01480 T bwi_cardbus_disable
-ffffffff81e014d0 T bwi_cardbus_setup
-ffffffff81e01570 T bwi_cardbus_conf_read
-ffffffff81e01590 T bwi_cardbus_conf_write
-ffffffff81e02000 T rbus_pccbb_parent_mem
-ffffffff81e02050 T rbus_pccbb_parent_io
-ffffffff81e020c0 T pccbb_attach_hook
-ffffffff81e03000 T pcmcia_match
-ffffffff81e03050 T pcmcia_attach
-ffffffff81e030d0 T pcmcia_activate
-ffffffff81e03190 T pcmcia_ccr_read
-ffffffff81e031e0 T pcmcia_ccr_write
-ffffffff81e03240 T pcmcia_card_attach
-ffffffff81e03430 T pcmcia_print
-ffffffff81e036c0 T pcmcia_submatch
-ffffffff81e03710 T pcmcia_card_detach
-ffffffff81e037c0 T pcmcia_card_deactivate
-ffffffff81e03830 T pcmcia_card_gettype
-ffffffff81e03890 T pcmcia_function_init
-ffffffff81e038e0 T pcmcia_function_enable
-ffffffff81e03d10 T pcmcia_function_disable
-ffffffff81e03e30 T pcmcia_io_map
-ffffffff81e04070 T pcmcia_intr_establish
-ffffffff81e042c0 T pcmcia_card_intr
-ffffffff81e043d0 T pcmcia_intr_disestablish
-ffffffff81e045f0 T pcmcia_intr_string
-ffffffff81e05000 T pcmcia_cis_read_1
-ffffffff81e050e0 T pcmcia_read_cis
-ffffffff81e051d0 T pcmcia_scan_cis
-ffffffff81e06cc0 T pcmcia_parse_cis_tuple
-ffffffff81e07f50 T pcmcia_print_cis
-ffffffff81e09000 T pcmcia_check_cis_quirks
-ffffffff81e0a000 T ep_pcmcia_match
-ffffffff81e0a130 T ep_pcmcia_attach
-ffffffff81e0a5a0 T ep_pcmcia_detach
-ffffffff81e0a630 T ep_pcmcia_activate
-ffffffff81e0a700 T ep_pcmcia_lookup
-ffffffff81e0a820 T ep_pcmcia_enable1
-ffffffff81e0a8c0 T ep_pcmcia_get_enaddr
-ffffffff81e0b000 T ne_pcmcia_match
-ffffffff81e0b120 T ne_pcmcia_attach
-ffffffff81e0b700 T ne_pcmcia_detach
-ffffffff81e0b7b0 T ne_pcmcia_activate
-ffffffff81e0b8a0 T ne_pcmcia_get_enaddr
-ffffffff81e0ba80 T ne_pcmcia_dl10019_get_enaddr
-ffffffff81e0bcd0 T ne_pcmcia_ax88190_set_iobase
-ffffffff81e0c000 T aic_pcmcia_match
-ffffffff81e0c0b0 T aic_pcmcia_attach
-ffffffff81e0c2c0 T aic_pcmcia_detach
-ffffffff81e0d000 T com_pcmcia_match
-ffffffff81e0d230 T com_pcmcia_attach
-ffffffff81e0d530 T com_pcmcia_detach
-ffffffff81e0d5c0 T com_pcmcia_activate
-ffffffff81e0d670 T com_pcmcia_enable1
-ffffffff81e0d710 T com_pcmcia_enable
-ffffffff81e0d810 T com_pcmcia_disable
-ffffffff81e0d850 T com_pcmcia_disable1
-ffffffff81e0e000 t wdc_pcmcia_match
-ffffffff81e0e0d0 t wdc_pcmcia_attach
-ffffffff81e0e550 T wdc_pcmcia_detach
-ffffffff81e0e650 T wdc_pcmcia_activate
-ffffffff81e0e770 T wdc_pcmcia_disk_device_interface_callback
-ffffffff81e0e810 T wdc_pcmcia_disk_device_interface
-ffffffff81e0e870 T wdc_pcmcia_lookup
-ffffffff81e0f000 T sm_pcmcia_match
-ffffffff81e0f110 T sm_pcmcia_attach
-ffffffff81e0f330 T sm_pcmcia_detach
-ffffffff81e0f3d0 T sm_pcmcia_activate
-ffffffff81e0f450 T sm_pcmcia_funce_enaddr
-ffffffff81e0f470 T sm_pcmcia_ascii_enaddr
-ffffffff81e0f570 T sm_pcmcia_lannid_ciscallback
-ffffffff81e0f680 T sm_pcmcia_enable
-ffffffff81e0f720 T sm_pcmcia_disable
-ffffffff81e10000 T xe_pcmcia_match
-ffffffff81e10050 T xe_pcmcia_attach
-ffffffff81e107a0 T xe_pcmcia_detach
-ffffffff81e10860 T xe_pcmcia_activate
-ffffffff81e10b50 T xe_pcmcia_interpret_manfid
-ffffffff81e10c00 T xe_pcmcia_funce_enaddr
-ffffffff81e10c20 T xe_ioctl
-ffffffff81e10f80 T xe_start
-ffffffff81e11230 T xe_watchdog
-ffffffff81e11270 T xe_intr
-ffffffff81e11640 T xe_full_reset
-ffffffff81e11c20 T xe_mdi_read
-ffffffff81e125b0 T xe_mdi_write
-ffffffff81e12ed0 T xe_statchg
-ffffffff81e12f00 T xe_mediachange
-ffffffff81e12f80 T xe_mediastatus
-ffffffff81e12fe0 T xe_init
-ffffffff81e13030 T xe_stop
-ffffffff81e13160 T xe_reset
-ffffffff81e132d0 T xe_pcmcia_lan_nid_ciscallback
-ffffffff81e13420 T xe_pcmcia_manfid_ciscallback
-ffffffff81e13540 T xe_get
-ffffffff81e13820 T xe_set_address
-ffffffff81e13ad0 T xe_cycle_power
-ffffffff81e14000 T wi_pcmcia_match
-ffffffff81e14130 T wi_pcmcia_attach
-ffffffff81e143e0 T wi_pcmcia_detach
-ffffffff81e144a0 T wi_pcmcia_activate
-ffffffff81e14590 T wi_pcmcia_wakeup
-ffffffff81e15000 T malo_pcmcia_match
-ffffffff81e15050 T malo_pcmcia_attach
-ffffffff81e15230 T malo_pcmcia_detach
-ffffffff81e152b0 T malo_pcmcia_activate
-ffffffff81e15510 T cmalo_intr
-ffffffff81e15780 T cmalo_attach
-ffffffff81e15c90 T cmalo_detach
-ffffffff81e15d70 T cmalo_stop
-ffffffff81e15eb0 T malo_pcmcia_wakeup
-ffffffff81e15f50 T cmalo_init
-ffffffff81e162e0 T cmalo_intr_mask
-ffffffff81e16370 T cmalo_fw_alloc
-ffffffff81e16450 T cmalo_fw_load_helper
-ffffffff81e166b0 T cmalo_fw_load_main
-ffffffff81e16b10 T cmalo_cmd_get_hwspec
-ffffffff81e16c60 T cmalo_ioctl
-ffffffff81e17090 T cmalo_start
-ffffffff81e17130 T cmalo_watchdog
-ffffffff81e17160 T cmalo_newstate
-ffffffff81e173f0 T cmalo_media_change
-ffffffff81e17450 T cmalo_cmd_set_scan
-ffffffff81e17580 T cmalo_fw_free
-ffffffff81e17600 T cmalo_cmd_set_macctrl
-ffffffff81e17760 T cmalo_cmd_set_txpower
-ffffffff81e178b0 T cmalo_cmd_set_antenna
-ffffffff81e17a10 T cmalo_cmd_set_radio
-ffffffff81e17b60 T cmalo_cmd_set_channel
-ffffffff81e17cb0 T cmalo_cmd_set_rate
-ffffffff81e17e30 T cmalo_cmd_set_snmp
-ffffffff81e17fb0 T cmalo_cmd_set_macaddr
-ffffffff81e18110 T cmalo_wep
-ffffffff81e181c0 T cmalo_cmd_set_reset
-ffffffff81e182c0 T cmalo_select_network
-ffffffff81e183c0 T cmalo_cmd_set_auth
-ffffffff81e18480 T cmalo_cmd_set_assoc
-ffffffff81e187e0 T cmalo_reflect_network
-ffffffff81e188e0 T cmalo_tx_done
-ffffffff81e189a0 T cmalo_rx
-ffffffff81e18b90 T cmalo_cmd_response
-ffffffff81e18db0 T cmalo_event
-ffffffff81e18e20 T cmalo_tx
-ffffffff81e19000 T cmalo_cmd_set_wep
-ffffffff81e19250 T cmalo_rate2bitmap
-ffffffff81e19290 T cmalo_hexdump
-ffffffff81e192c0 T cmalo_cmd_request
-ffffffff81e19420 T cmalo_cmd_rsp_hwspec
-ffffffff81e19490 T cmalo_cmd_rsp_scan
-ffffffff81e196b0 T cmalo_parse_elements
-ffffffff81e197b0 T cmalo_cmd_rsp_assoc
-ffffffff81e197f0 T cmalo_cmd_set_80211d
-ffffffff81e198e0 T cmalo_cmd_set_bgscan_config
-ffffffff81e19a40 T cmalo_cmd_set_bgscan_query
-ffffffff81e1a000 T an_pcmcia_match
-ffffffff81e1a060 T an_pcmcia_attach
-ffffffff81e1a240 T an_pcmcia_detach
-ffffffff81e1a2d0 T an_pcmcia_activate
-ffffffff81e1b000 T pcibmatch
-ffffffff81e1b0c0 T pcibattach
-ffffffff81e1b100 T pcib_callback
-ffffffff81e1b170 T pcib_print
-ffffffff81e1c000 T amdpcib_match
-ffffffff81e1c050 T amdpcib_attach
-ffffffff81e1c180 T amdpcib_get_timecount
-ffffffff81e1d000 T tcpcib_match
-ffffffff81e1d050 T tcpcib_attach
-ffffffff81e1d300 T tcpcib_activate
-ffffffff81e1d5f0 T tcpcib_wdt_init
-ffffffff81e1d720 T tcpcib_wdt_start
-ffffffff81e1d750 T tcpcib_wdt_stop
-ffffffff81e1d7d0 T tcpcib_hpet_get_timecount
-ffffffff81e1d800 T tcpcib_wdt_cb
-ffffffff81e1e000 T aapic_match
-ffffffff81e1e030 T aapic_attach
-ffffffff81e1f000 T hme_config
-ffffffff81e1f5a0 T hme_stop
-ffffffff81e1f7c0 T hme_start
-ffffffff81e1fab0 T hme_ioctl
-ffffffff81e1fc60 T hme_watchdog
-ffffffff81e1fcc0 t hme_mii_readreg
-ffffffff81e1fe50 t hme_mii_writereg
-ffffffff81e1ffe0 t hme_mii_statchg
-ffffffff81e20060 T hme_mediachange
-ffffffff81e20170 T hme_mediastatus
-ffffffff81e201e0 T hme_mifinit
-ffffffff81e202b0 T hme_tick
-ffffffff81e203e0 T hme_unconfig
-ffffffff81e204d0 T hme_fill_rx_ring
-ffffffff81e20670 T hme_reset
-ffffffff81e206a0 T hme_init
-ffffffff81e20c20 T hme_meminit
-ffffffff81e20da0 T hme_iff
-ffffffff81e20f60 T hme_tint
-ffffffff81e210b0 T hme_rint
-ffffffff81e21270 T hme_eint
-ffffffff81e21310 T hme_intr
-ffffffff81e21410 T hme_newbuf
-ffffffff81e22000 T hmematch_pci
-ffffffff81e22030 T hmeattach_pci
-ffffffff81e222e0 T hmedetach_pci
-ffffffff81e22350 T hme_pci_enaddr
-ffffffff81e23000 T isamatch
-ffffffff81e23050 T isaattach
-ffffffff81e23180 T isascan
-ffffffff81e235a0 T isaprint
-ffffffff81e23740 T isa_intr_typename
-ffffffff81e24000 T isadmamatch
-ffffffff81e24040 T isadmaattach
-ffffffff81e24230 T isa_dmacascade
-ffffffff81e24320 T isa_dmamap_create
-ffffffff81e24400 T isa_dmamap_destroy
-ffffffff81e24480 T isa_dmastart
-ffffffff81e248e0 T isa_dmaabort
-ffffffff81e249e0 T isa_dmacount
-ffffffff81e24ba0 T isa_dmafinished
-ffffffff81e24c50 T isa_dmadone
-ffffffff81e24e00 T isa_dmamem_alloc
-ffffffff81e24ed0 T isa_dmamem_free
-ffffffff81e24f50 T isa_dmamem_map
-ffffffff81e24fd0 T isa_dmamem_unmap
-ffffffff81e25020 T isa_dmamem_mmap
-ffffffff81e250c0 T isa_drq_isfree
-ffffffff81e25110 T isa_malloc
-ffffffff81e252c0 T isa_free
-ffffffff81e253e0 T isa_mappage
-ffffffff81e26000 T fdcprobe
-ffffffff81e26290 T fdcattach
-ffffffff81e263d0 T out_fdc
-ffffffff81e264b0 T fdcintr
-ffffffff81e264c0 T fdc_create_kthread
-ffffffff81e26530 T fdcattach_deferred
-ffffffff81e26600 T fdcpseudointr
-ffffffff81e26630 T fddprint
-ffffffff81e26680 T fdcresult
-ffffffff81e26770 T fdcstart
-ffffffff81e267a0 T fdcstatus
-ffffffff81e27000 T fdprobe
-ffffffff81e27190 T fdattach
-ffffffff81e272c0 T fdactivate
-ffffffff81e27360 T fdgetdisklabel
-ffffffff81e27470 T fdstrategy
-ffffffff81e27660 T fd_motor_on
-ffffffff81e276c0 T fd_motor_off
-ffffffff81e27790 T fdtimeout
-ffffffff81e27810 T fd_nvtotype
-ffffffff81e27880 T fdstart
-ffffffff81e27930 T fdfinish
-ffffffff81e27a80 T fdread
-ffffffff81e27ab0 T fdwrite
-ffffffff81e27ae0 T fd_set_motor
-ffffffff81e27ba0 T fdintr
-ffffffff81e288a0 T fdopen
-ffffffff81e28af0 T fdclose
-ffffffff81e28b80 T fdsize
-ffffffff81e28bb0 T fddump
-ffffffff81e28be0 T fdretry
-ffffffff81e28d80 T fdioctl
-ffffffff81e29240 T fdformat
-ffffffff81e2a000 T com_isa_probe
-ffffffff81e2a0c0 T com_isa_attach
-ffffffff81e2b000 T pckbc_isa_match
-ffffffff81e2b1e0 T pckbc_isa_attach
-ffffffff81e2b390 T pckbc_isa_activate
-ffffffff81e2c000 T vga_isa_match
-ffffffff81e2c0f0 T vga_isa_attach
-ffffffff81e2c130 T vga_isa_cnattach
-ffffffff81e2d000 T wdc_isa_probe
-ffffffff81e2d130 T wdc_isa_attach
-ffffffff81e2d350 t wdc_isa_dma_init
-ffffffff81e2d3c0 t wdc_isa_dma_start
-ffffffff81e2d3f0 t wdc_isa_dma_finish
-ffffffff81e2e000 T mpu_open
-ffffffff81e2e090 T mpu_close
-ffffffff81e2e0b0 T mpu_output
-ffffffff81e2e1c0 T mpu_getinfo
-ffffffff81e2e1f0 T mpu_find
-ffffffff81e2e260 T mpu_reset
-ffffffff81e2e390 T mpu_readinput
-ffffffff81e2e420 T mpu_intr
-ffffffff81e2f000 T mpu_isa_match
-ffffffff81e2f060 T mpu_isa_attach
-ffffffff81e2f0f0 T mpu_test
-ffffffff81e30000 T pcppi_match
-ffffffff81e301d0 T pcppi_attach
-ffffffff81e302e0 t pcppi_bell_stop
-ffffffff81e30370 T pcppi_kbd_bell
-ffffffff81e303b0 T pcppi_bell
-ffffffff81e31000 T spkrprobe
-ffffffff81e31030 T spkrattach
-ffffffff81e31080 T spkropen
-ffffffff81e31170 T spkrwrite
-ffffffff81e31920 T spkrclose
-ffffffff81e319a0 T spkrioctl
-ffffffff81e31b60 t rest
-ffffffff81e31bb0 t playtone
-ffffffff81e32000 T lpt_isa_probe
-ffffffff81e32430 T lpt_isa_attach
-ffffffff81e33000 T wbsio_probe
-ffffffff81e33160 T wbsio_attach
-ffffffff81e334d0 T wbsio_print
-ffffffff81e34000 T schsio_probe
-ffffffff81e34110 T schsio_attach
-ffffffff81e342e0 T schsio_activate
-ffffffff81e34320 T schsio_config_read
-ffffffff81e34360 T schsio_config_write
-ffffffff81e343b0 T schsio_wdt_init
-ffffffff81e344c0 T schsio_hwm_init
-ffffffff81e347e0 T schsio_hwm_update
-ffffffff81e34d80 T schsio_hwm_read
-ffffffff81e34dc0 T schsio_wdt_cb
-ffffffff81e35000 T lm_isa_match
-ffffffff81e351b0 T lm_isa_attach
-ffffffff81e35380 T lm_wbsio_match
-ffffffff81e35540 T lm_isa_writereg
-ffffffff81e355a0 T lm_isa_readreg
-ffffffff81e355f0 T lm_isa_remove_alias
-ffffffff81e36000 T it_match
-ffffffff81e362d0 T it_enter
-ffffffff81e36350 T it_readreg
-ffffffff81e36390 T it_writereg
-ffffffff81e363e0 T it_exit
-ffffffff81e36420 T it_attach
-ffffffff81e36a80 T it_wdog_cb
-ffffffff81e36d00 T it_ec_refresh
-ffffffff81e37350 T it_ec_writereg
-ffffffff81e373a0 T it_ec_readreg
-ffffffff81e373f0 T it_activate
-ffffffff81e38000 T uguru_refresh_temp
-ffffffff81e380d0 T uguru_refresh_volt
-ffffffff81e38170 T uguru_refresh_fan
-ffffffff81e38240 T uguru_match
-ffffffff81e383d0 T uguru_attach
-ffffffff81e389f0 T uguru_read_multi
-ffffffff81e38ae0 T uguru_ac5_read
-ffffffff81e38d50 T uguru_read_sensor
-ffffffff81e39040 T uguru_ac5_read_sensor
-ffffffff81e390d0 T uguru_refresh
-ffffffff81e39150 T uguru_write_multi
-ffffffff81e3a000 T aps_match
-ffffffff81e3a100 T aps_attach
-ffffffff81e3a380 T aps_activate
-ffffffff81e3a420 T aps_do_io
-ffffffff81e3a600 T aps_init
-ffffffff81e3a750 T aps_refresh
-ffffffff81e3a770 T aps_read_data
-ffffffff81e3a840 T aps_refresh_sensor_data
-ffffffff81e3b000 T asmc_match
-ffffffff81e3b190 T asmc_attach
-ffffffff81e3b4a0 T asmc_activate
-ffffffff81e3b530 T asmc_try
-ffffffff81e3b9b0 T asmc_get_backlight
-ffffffff81e3ba30 T asmc_set_backlight
-ffffffff81e3bac0 T asmc_backlight
-ffffffff81e3bb50 T asmc_init
-ffffffff81e3bd40 T asmc_update
-ffffffff81e3bef0 T asmc_detach
-ffffffff81e3c0a0 t asmc_temp
-ffffffff81e3c230 t asmc_fan
-ffffffff81e3c400 t asmc_light
-ffffffff81e3d000 T _isa_bus_dmamap_create
-ffffffff81e3d140 T _isa_bus_dmamap_destroy
-ffffffff81e3d200 T _isa_bus_dmamap_load
-ffffffff81e3d490 T _isa_bus_dmamap_load_mbuf
-ffffffff81e3d4b0 T _isa_bus_dmamap_load_uio
-ffffffff81e3d4d0 T _isa_bus_dmamap_load_raw
-ffffffff81e3d4f0 T _isa_bus_dmamap_unload
-ffffffff81e3d5b0 T _isa_bus_dmamap_sync
-ffffffff81e3d6b0 T _isa_bus_dmamem_alloc
-ffffffff81e3d750 T isa_strayintr
-ffffffff81e3d7c0 T fakeintr
-ffffffff81e3d7f0 T isa_intr_alloc
-ffffffff81e3d8f0 T isa_intr_check
-ffffffff81e3d960 T isa_intr_establish
-ffffffff81e3da20 T isa_intr_disestablish
-ffffffff81e3da30 T isa_attach_hook
-ffffffff81e3da80 T _isa_dma_alloc_bouncebuf
-ffffffff81e3db70 T _isa_dma_free_bouncebuf
-ffffffff81e3dc20 T _isa_dma_check_buffer
-ffffffff81e3e000 T wsdisplay_emul_match
-ffffffff81e3e070 T wsdisplay_emul_attach
-ffffffff81e3e140 T wsdisplay_emul_detach
-ffffffff81e3e150 T wsdisplay_activate
-ffffffff81e3e1d0 T wsdisplay_getc_dummy
-ffffffff81e3e200 T wsdisplay_cnputc
-ffffffff81e3e280 T wsdisplay_pollc
-ffffffff81e3e310 T wsscreen_attach
-ffffffff81e3e490 T wsscreen_detach
-ffffffff81e3e530 T wsdisplay_screentype_pick
-ffffffff81e3e5f0 T wsdisplay_addscreen_print
-ffffffff81e3e670 T wsdisplay_addscreen
-ffffffff81e3e860 T allocate_copybuffer
-ffffffff81e3e990 T wsdisplay_getscreen
-ffffffff81e3ea40 T wsdisplay_closescreen
-ffffffff81e3eba0 T wsdisplayopen
-ffffffff81e3ed70 T wsdisplay_delscreen
-ffffffff81e3ef90 T wsdisplay_update_rawkbd
-ffffffff81e3f080 T wsdisplay_common_attach
-ffffffff81e3f3e0 T wsdisplay_common_detach
-ffffffff81e3f600 T wsdisplay_switchtoconsole
-ffffffff81e3f670 T wsemuldisplaydevprint
-ffffffff81e3f6c0 T wsemuldisplaydevsubmatch
-ffffffff81e3f710 T wsdisplay_burner
-ffffffff81e3f7d0 T wsdisplay_burn
-ffffffff81e3f840 T wsdisplay_cnattach
-ffffffff81e3f9b0 T wsdisplaystart
-ffffffff81e3fca0 T wsdisplayparam
-ffffffff81e3fce0 T wsdisplayclose
-ffffffff81e3fe60 T wsdisplay_kbdholdscr
-ffffffff81e3feb0 T wsdisplay_internal_ioctl
-ffffffff81e40570 T wsdisplayread
-ffffffff81e405f0 T wsdisplaywrite
-ffffffff81e40670 T wsdisplaytty
-ffffffff81e406e0 T wsdisplayioctl
-ffffffff81e40870 T wsdisplay_cfg_ioctl
-ffffffff81e40c00 T wsdisplay_param
-ffffffff81e40c20 T wsdisplay_burner_setup
-ffffffff81e40d60 T wsdisplay_switch
-ffffffff81e40fe0 T wsmoused
-ffffffff81e410f0 T wsdisplaymmap
-ffffffff81e41170 T wsdisplaypoll
-ffffffff81e411e0 T wsdisplaykqfilter
-ffffffff81e41240 T mouse_remove
-ffffffff81e412e0 T wsdisplaystop
-ffffffff81e41350 T wsdisplay_emulbell
-ffffffff81e413f0 T wsdisplay_emulinput
-ffffffff81e41480 T wsdisplay_kbdinput
-ffffffff81e41560 T wsdisplay_rawkbdinput
-ffffffff81e415f0 T wsdisplay_switch3
-ffffffff81e417a0 T wsdisplay_switch1
-ffffffff81e418f0 T wsdisplay_switch2
-ffffffff81e41a90 T wsdisplay_reset
-ffffffff81e41af0 T wsscreen_attach_sync
-ffffffff81e41b60 T wsscreen_detach_sync
-ffffffff81e41ba0 T wsscreen_lookup_sync
-ffffffff81e41be0 T wsdisplay_maxscreenidx
-ffffffff81e41c10 T wsdisplay_screenstate
-ffffffff81e41c60 T wsdisplay_getactivescreen
-ffffffff81e41ca0 T wsscreen_switchwait
-ffffffff81e41dd0 T wsdisplay_kbdholdscreen
-ffffffff81e41e40 T wsdisplay_set_console_kbd
-ffffffff81e41ea0 T wsdisplay_set_cons_kbd
-ffffffff81e41ee0 T wsdisplay_unset_cons_kbd
-ffffffff81e41f30 T wsdisplay_enter_ddb
-ffffffff81e41fc0 T wsdisplay_suspend
-ffffffff81e42030 T wsdisplay_suspend_device
-ffffffff81e42270 T wsdisplay_resume
-ffffffff81e42340 T wsdisplay_resume_device
-ffffffff81e423d0 T wsscrollback
-ffffffff81e42450 T motion_event
-ffffffff81e42500 T button_event
-ffffffff81e42690 T ctrl_event
-ffffffff81e42890 T mouse_moverel
-ffffffff81e429b0 T mouse_zaxis
-ffffffff81e42a40 T mouse_copy_end
-ffffffff81e42aa0 T mouse_copy_selection
-ffffffff81e42bf0 T mouse_copy_start
-ffffffff81e42d50 T mouse_copy_word
-ffffffff81e43080 T mouse_copy_line
-ffffffff81e431c0 T mouse_paste
-ffffffff81e43260 T mouse_copy_extend_after
-ffffffff81e43350 T mouse_copy_extend
-ffffffff81e433c0 T inverse_char
-ffffffff81e434c0 T inverse_region
-ffffffff81e43530 T skip_spc_right
-ffffffff81e43610 T skip_spc_left
-ffffffff81e436d0 T skip_char_right
-ffffffff81e437d0 T skip_char_left
-ffffffff81e438d0 T class_cmp
-ffffffff81e439a0 T remove_selection
-ffffffff81e43a30 T mouse_copy_extend_char
-ffffffff81e43d80 T mouse_copy_extend_word
-ffffffff81e44330 T mouse_copy_extend_line
-ffffffff81e445f0 T mouse_hide
-ffffffff81e45000 T usl_sync_init
-ffffffff81e45140 T usl_attachtimeout
-ffffffff81e451b0 T usl_detachtimeout
-ffffffff81e45220 T usl_sync_done
-ffffffff81e452a0 T usl_sync_check
-ffffffff81e45360 T usl_sync_get
-ffffffff81e453b0 T usl_detachproc
-ffffffff81e45440 T usl_detachack
-ffffffff81e454c0 T usl_attachproc
-ffffffff81e45550 T usl_attachack
-ffffffff81e455d0 T wsdisplay_usl_ioctl1
-ffffffff81e45780 T wsdisplay_usl_ioctl2
-ffffffff81e46000 T filt_wseventdetach
-ffffffff81e46060 T filt_wseventread
-ffffffff81e460b0 T wsevent_init
-ffffffff81e46150 T wsevent_fini
-ffffffff81e461b0 T wsevent_read
-ffffffff81e46340 T wsevent_poll
-ffffffff81e463c0 T wsevent_kqfilter
-ffffffff81e47000 T wskbd_match
-ffffffff81e47050 T wskbd_attach
-ffffffff81e47410 T wskbd_detach
-ffffffff81e47660 T wskbd_activate
-ffffffff81e47690 T wskbd_mux_open
-ffffffff81e47760 T wskbd_mux_close
-ffffffff81e477f0 T wskbd_do_ioctl
-ffffffff81e47850 T wskbd_displayioctl
-ffffffff81e48010 T wskbd_set_display
-ffffffff81e48140 T wskbd_update_layout
-ffffffff81e48180 T wskbddevprint
-ffffffff81e481d0 T wskbd_repeat
-ffffffff81e48270 T wskbd_cnattach
-ffffffff81e48360 T wskbd_cngetc
-ffffffff81e48480 T wskbd_cnpollc
-ffffffff81e484e0 T wskbd_cnbell
-ffffffff81e48530 T wskbd_cndetach
-ffffffff81e485d0 T wskbd_deliver_event
-ffffffff81e486f0 T wskbdopen
-ffffffff81e48840 T wskbd_input
-ffffffff81e489a0 T wskbd_translate
-ffffffff81e492b0 T wskbd_rawinput
-ffffffff81e492f0 T wskbd_enable
-ffffffff81e49380 T wskbd_do_open
-ffffffff81e49440 T wskbdclose
-ffffffff81e49550 T wskbdread
-ffffffff81e49610 T wskbdioctl
-ffffffff81e49690 T wskbd_do_ioctl_sc
-ffffffff81e49770 T wskbdpoll
-ffffffff81e497d0 T wskbdkqfilter
-ffffffff81e49830 T wskbd_pickfree
-ffffffff81e498a0 T wskbd_set_console_display
-ffffffff81e49900 T wskbd_add_mux
-ffffffff81e49980 T update_leds
-ffffffff81e49a30 T update_modifier
-ffffffff81e49b20 T change_displayparam
-ffffffff81e49bd0 T internal_command
-ffffffff81e4a0c0 T wskbd_debugger
-ffffffff81e4b000 T wskbd_compose_value
-ffffffff81e4b180 T ksym_upcase
-ffffffff81e4b200 T fillmapentry
-ffffffff81e4b390 T wskbd_get_mapentry
-ffffffff81e4b590 T wskbd_init_keymap
-ffffffff81e4b660 T wskbd_load_keymap
-ffffffff81e4c000 T wsmouse_match
-ffffffff81e4c030 T wsmouse_attach
-ffffffff81e4c0c0 T wsmouse_detach
-ffffffff81e4c270 T wsmouse_activate
-ffffffff81e4c2a0 T wsmouse_mux_open
-ffffffff81e4c450 T wsmouse_mux_close
-ffffffff81e4c4a0 T wsmousedoioctl
-ffffffff81e4c500 T wsmousedevprint
-ffffffff81e4c550 T wsmouseopen
-ffffffff81e4c7b0 T wsmouse_input_cleanup
-ffffffff81e4c830 T wsmousedoopen
-ffffffff81e4c9e0 T wsmouseclose
-ffffffff81e4cac0 T wsmouse_input_reset
-ffffffff81e4cc00 T wsmouseread
-ffffffff81e4ccc0 T wsmouseioctl
-ffffffff81e4cd40 T wsmouse_do_ioctl
-ffffffff81e4cef0 T wsmouse_param_ioctl
-ffffffff81e4d030 T wsmouse_set_params
-ffffffff81e4d340 T wsmouse_get_params
-ffffffff81e4d5a0 T wsmousepoll
-ffffffff81e4d600 T wsmousekqfilter
-ffffffff81e4d660 T wsmouse_add_mux
-ffffffff81e4d6e0 T wsmouse_buttons
-ffffffff81e4d730 T wsmouse_motion
-ffffffff81e4d790 T wsmouse_position
-ffffffff81e4d890 T wsmouse_touch
-ffffffff81e4d930 T wsmouse_mtstate
-ffffffff81e4db40 T wsmouse_set
-ffffffff81e4de10 T wsmouse_touch_update
-ffffffff81e4deb0 T wsmouse_mt_update
-ffffffff81e4def0 T wsmouse_hysteresis
-ffffffff81e4df40 T wsmouse_ptr_ctrl
-ffffffff81e4e090 T wsmouse_mt_convert
-ffffffff81e4e1d0 T wsmouse_evq_put
-ffffffff81e4e260 T wsmouse_btn_sync
-ffffffff81e4e360 T wsmouse_motion_sync
-ffffffff81e4e950 T wsmouse_touch_sync
-ffffffff81e4eb30 T wsmouse_log_input
-ffffffff81e4ecf0 T wsmouse_log_events
-ffffffff81e4ee30 T wsmouse_input_sync
-ffffffff81e4f410 T wsmouse_id_to_slot
-ffffffff81e4f4f0 T wsmouse_matching
-ffffffff81e4fa10 T wsmouse_mtframe
-ffffffff81e4fe00 T wsmouse_mt_init
-ffffffff81e4ff70 T wsmouse_set_mode
-ffffffff81e4ffc0 T wsmouse_get_hw
-ffffffff81e4fff0 T wsmouse_configure
-ffffffff81e51000 T wstpad_set_direction
-ffffffff81e51180 T wstpad_is_stable
-ffffffff81e51290 T wstpad_scroll_coords
-ffffffff81e51420 T wstpad_scroll
-ffffffff81e515c0 T wstpad_f2scroll
-ffffffff81e51910 T wstpad_edgescroll
-ffffffff81e51a10 T wstpad_get_sbtn
-ffffffff81e51ba0 T wstpad_softbuttons
-ffffffff81e51c30 T wstpad_is_tap
-ffffffff81e51d10 T wstpad_tap_touch
-ffffffff81e51e20 T wstpad_tap
-ffffffff81e52430 T wstpad_tap_timeout
-ffffffff81e525a0 T wstpad_click
-ffffffff81e52640 T wstpad_cmds
-ffffffff81e52870 T wstpad_mt_inputs
-ffffffff81e52be0 T wstpad_mt_masks
-ffffffff81e530d0 T wstpad_touch_inputs
-ffffffff81e532c0 T wstpad_process_input
-ffffffff81e53580 T wstpad_track_interval
-ffffffff81e537e0 T wstpad_init_deceleration
-ffffffff81e538a0 T wstpad_decelerate
-ffffffff81e539d0 T wstpad_filter
-ffffffff81e53d10 T wstpad_compat_convert
-ffffffff81e53db0 T wstpad_init
-ffffffff81e53f20 T wstpad_configure
-ffffffff81e544c0 T wstpad_reset
-ffffffff81e54530 T wstpad_set_param
-ffffffff81e547a0 T wstpad_get_param
-ffffffff81e55000 T wsmux_mux_open
-ffffffff81e55120 T wsmux_mux_close
-ffffffff81e551e0 T wsmux_do_ioctl
-ffffffff81e55810 T wsmux_do_displayioctl
-ffffffff81e55930 T wsmux_evsrc_set_display
-ffffffff81e55980 T wsmuxattach
-ffffffff81e559b0 T wsmux_getmux
-ffffffff81e55c10 T wsmux_create
-ffffffff81e55ce0 T wsmuxopen
-ffffffff81e55e50 T wsmux_detach_sc
-ffffffff81e55f60 T wsmux_do_open
-ffffffff81e56060 T wsmuxclose
-ffffffff81e56160 T wsmux_do_close
-ffffffff81e56200 T wsmuxread
-ffffffff81e56270 T wsmuxioctl
-ffffffff81e562a0 T wsmux_add_mux
-ffffffff81e56390 T wsmux_detach_sc_locked
-ffffffff81e56480 T wsmuxpoll
-ffffffff81e564f0 T wsmuxkqfilter
-ffffffff81e56550 T wsmux_depth
-ffffffff81e565f0 T wsmux_attach_sc
-ffffffff81e567a0 T wsmux_set_display
-ffffffff81e568e0 T wsmux_get_layout
-ffffffff81e56910 T wsmux_set_layout
-ffffffff81e57000 T wsemul_pick
-ffffffff81e57060 T wsemul_getname
-ffffffff81e58000 T wsemul_getchar
-ffffffff81e581b0 T wsemul_local_translate
-ffffffff81e58480 T wsemul_utf8_translate
-ffffffff81e59000 T wsemul_vt100_cnattach
-ffffffff81e59200 T wsemul_vt100_attach
-ffffffff81e594b0 T wsemul_vt100_output
-ffffffff81e597a0 T wsemul_vt100_detach
-ffffffff81e59900 T wsemul_vt100_resetop
-ffffffff81e59a90 T wsemul_vt100_output_esc
-ffffffff81e5a0c0 T wsemul_vt100_output_csi
-ffffffff81e5a1e0 T wsemul_vt100_output_scs94
-ffffffff81e5a290 T wsemul_vt100_output_scs94_percent
-ffffffff81e5a2e0 T wsemul_vt100_output_scs96
-ffffffff81e5a430 T wsemul_vt100_output_scs96_percent
-ffffffff81e5a480 T wsemul_vt100_output_esc_hash
-ffffffff81e5a820 T wsemul_vt100_output_esc_spc
-ffffffff81e5a850 T wsemul_vt100_output_string
-ffffffff81e5a8b0 T wsemul_vt100_output_string_esc
-ffffffff81e5a900 T wsemul_vt100_output_dcs
-ffffffff81e5a9a0 T wsemul_vt100_output_dcs_dollar
-ffffffff81e5a9f0 T wsemul_vt100_output_esc_percent
-ffffffff81e5aa50 T wsemul_vt100_init
-ffffffff81e5aab0 T wsemul_vt100_reset
-ffffffff81e5abc0 T wsemul_vt100_nextline
-ffffffff81e5ac50 T wsemul_vt100_output_normal
-ffffffff81e5aeb0 T wsemul_vt100_output_c0c1
-ffffffff81e5b130 T wsemul_vt100_jump_scroll
-ffffffff81e5c000 T wsemul_vt100_scrollup
-ffffffff81e5c160 T wsemul_vt100_scrolldown
-ffffffff81e5c2b0 T wsemul_vt100_ed
-ffffffff81e5c530 T wsemul_vt100_el
-ffffffff81e5c630 T wsemul_vt100_handle_csi
-ffffffff81e5d4b0 T vt100_ansimode
-ffffffff81e5d520 T vt100_decmode
-ffffffff81e5d650 T vt100_selectattribute
-ffffffff81e5d790 T wsemul_vt100_handle_dcs
-ffffffff81e5e000 T vt100_initchartables
-ffffffff81e5e200 T vt100_setnrc
-ffffffff81e5f000 T wsemul_vt100_translate
-ffffffff81e60000 T pckbdprobe
-ffffffff81e60120 T pckbdattach
-ffffffff81e60300 T pckbdactivate
-ffffffff81e60380 T pckbd_enable
-ffffffff81e604d0 T pckbd_set_leds
-ffffffff81e60550 T pckbd_ioctl
-ffffffff81e60690 T pckbd_cngetc
-ffffffff81e60850 T pckbd_cnpollc
-ffffffff81e608e0 T pckbd_cnbell
-ffffffff81e60930 T pckbd_set_xtscancode
-ffffffff81e60aa0 T pckbd_init
-ffffffff81e60b00 T pckbd_input
-ffffffff81e60d80 T pckbd_scancode_translate
-ffffffff81e60e30 T pckbd_bell
-ffffffff81e60e80 T pckbd_hookup_bell
-ffffffff81e60ec0 T pckbd_cnattach
-ffffffff81e61000 T pmsprobe
-ffffffff81e610a0 T pmsattach
-ffffffff81e61270 T pmsactivate
-ffffffff81e612d0 T pms_enable
-ffffffff81e61340 T pms_ioctl
-ffffffff81e61390 T pms_disable
-ffffffff81e613d0 T pms_sec_enable
-ffffffff81e61440 T pms_sec_ioctl
-ffffffff81e61480 T pms_sec_disable
-ffffffff81e614c0 T pms_ioctl_mouse
-ffffffff81e615e0 T pms_sync_mouse
-ffffffff81e61640 T pms_proc_mouse
-ffffffff81e616e0 T pms_enable_synaptics
-ffffffff81e61b20 T pms_ioctl_synaptics
-ffffffff81e61bf0 T pms_sync_synaptics
-ffffffff81e61c50 T pms_proc_synaptics
-ffffffff81e61fb0 T pms_disable_synaptics
-ffffffff81e62090 T pms_enable_alps
-ffffffff81e62b90 T pms_ioctl_alps
-ffffffff81e62c40 T pms_sync_alps
-ffffffff81e62ce0 T pms_proc_alps
-ffffffff81e62f30 T pms_enable_elantech_v1
-ffffffff81e63130 T pms_ioctl_elantech
-ffffffff81e631f0 T pms_sync_elantech_v1
-ffffffff81e632d0 T pms_proc_elantech_v1
-ffffffff81e633e0 T pms_enable_elantech_v2
-ffffffff81e63580 T pms_sync_elantech_v2
-ffffffff81e63680 T pms_proc_elantech_v2
-ffffffff81e63800 T pms_enable_elantech_v3
-ffffffff81e639a0 T pms_sync_elantech_v3
-ffffffff81e63a20 T pms_proc_elantech_v3
-ffffffff81e63c00 T pms_enable_elantech_v4
-ffffffff81e63e00 T pms_sync_elantech_v4
-ffffffff81e63ed0 T pms_proc_elantech_v4
-ffffffff81e64200 T pms_enable_intelli
-ffffffff81e643f0 T pms_cmd
-ffffffff81e64460 T pms_spec_cmd
-ffffffff81e646d0 T pms_set_scaling
-ffffffff81e64760 T pms_set_resolution
-ffffffff81e647f0 T pms_get_devid
-ffffffff81e64880 T pms_get_status
-ffffffff81e64910 T pms_set_rate
-ffffffff81e649a0 T pms_reset
-ffffffff81e64a30 T pms_dev_enable
-ffffffff81e64ae0 T pms_dev_disable
-ffffffff81e64b90 T pms_protocol_lookup
-ffffffff81e64ca0 T pms_reset_detect
-ffffffff81e64d20 T pms_reset_timo
-ffffffff81e64d70 T pms_reset_task
-ffffffff81e64e30 T pms_change_state
-ffffffff81e651b0 T pmsinput
-ffffffff81e65350 T synaptics_set_mode
-ffffffff81e65430 T synaptics_query
-ffffffff81e65520 T synaptics_get_hwinfo
-ffffffff81e65d90 T synaptics_sec_proc
-ffffffff81e65e50 T synaptics_knock
-ffffffff81e660b0 T alps_sec_proc
-ffffffff81e661d0 T alps_get_hwinfo
-ffffffff81e66660 T elantech_set_absolute_mode_v1
-ffffffff81e668c0 T elantech_set_absolute_mode_v2
-ffffffff81e67100 T elantech_ps2_cmd
-ffffffff81e67190 T elantech_set_absolute_mode_v3
-ffffffff81e676e0 T elantech_set_absolute_mode_v4
-ffffffff81e67ab0 T elantech_get_hwinfo_v1
-ffffffff81e67ca0 T elantech_get_hwinfo_v2
-ffffffff81e68060 T elantech_get_hwinfo_v3
-ffffffff81e68270 T elantech_get_hwinfo_v4
-ffffffff81e68530 T elantech_knock
-ffffffff81e69000 T wscnprobe
-ffffffff81e69090 T wscninit
-ffffffff81e69140 T wscn_video_init
-ffffffff81e691b0 T wscn_input_init
-ffffffff81e69210 T wscnputc
-ffffffff81e69220 T wscngetc
-ffffffff81e69230 T wscnpollc
-ffffffff81e6a000 T skgpio_match
-ffffffff81e6a100 T skgpio_attach
-ffffffff81e6a350 T skgpio_gpio_read
-ffffffff81e6a3a0 T skgpio_gpio_write
-ffffffff81e6a410 T skgpio_gpio_ctl
-ffffffff81e6a4a0 T skgpio_led_read
-ffffffff81e6a4f0 T skgpio_led_write
-ffffffff81e6a520 T skgpio_led_ctl
-ffffffff81e6b000 T pctrattach
-ffffffff81e6b080 T pctropen
-ffffffff81e6b0c0 T pctrclose
-ffffffff81e6b0f0 T pctrioctl
-ffffffff81e6b3d0 T pctr_reload
-ffffffff81e6b530 T pctr_resume
-ffffffff81e6c000 T nvramattach
-ffffffff81e6c0a0 T nvram_csum_valid
-ffffffff81e6c130 T nvramopen
-ffffffff81e6c180 T nvramclose
-ffffffff81e6c1b0 T nvramread
-ffffffff81e6c2f0 T nvram_get_byte
-ffffffff81e6d000 T hid_start_parse
-ffffffff81e6d070 T hid_end_parse
-ffffffff81e6d0b0 T hid_get_item
-ffffffff81e6dca0 T hid_report_size
-ffffffff81e6de10 T hid_locate
-ffffffff81e6df80 T hid_get_data_sub
-ffffffff81e6e0a0 T hid_get_data
-ffffffff81e6e1c0 T hid_get_udata
-ffffffff81e6e2e0 T hid_is_collection
-ffffffff81e6f000 T hidkbd_attach
-ffffffff81e6f100 T hidkbd_parse_desc
-ffffffff81e6f480 T hidkbd_delayed_decode
-ffffffff81e6f4a0 T hidkbd_attach_wskbd
-ffffffff81e6f520 T hidkbd_detach
-ffffffff81e6f5c0 T hidkbd_input
-ffffffff81e6f6a0 T hidkbd_decode
-ffffffff81e6fa00 T hidkbd_enable
-ffffffff81e6fa40 T hidkbd_set_leds
-ffffffff81e6fb20 T hidkbd_ioctl
-ffffffff81e6fbc0 T hidkbd_bell
-ffffffff81e6fc10 T hidkbd_cngetc
-ffffffff81e6fca0 T hidkbd_hookup_bell
-ffffffff81e70000 T hidms_setup
-ffffffff81e70520 T hidms_attach
-ffffffff81e70660 T hidms_detach
-ffffffff81e706a0 T hidms_input
-ffffffff81e70960 T hidms_enable
-ffffffff81e709a0 T hidms_ioctl
-ffffffff81e70b80 T hidms_disable
-ffffffff81e71000 T hidmt_get_resolution
-ffffffff81e710f0 T hidmt_setup
-ffffffff81e71690 T hidmt_set_input_mode
-ffffffff81e71720 T hidmt_configure
-ffffffff81e717c0 T hidmt_attach
-ffffffff81e718d0 T hidmt_detach
-ffffffff81e71910 T hidmt_input
-ffffffff81e71de0 T hidmt_enable
-ffffffff81e71e20 T hidmt_ioctl
-ffffffff81e71ef0 T hidmt_disable
-ffffffff81e72000 T usb_match
-ffffffff81e72030 T usb_attach
-ffffffff81e72350 T usb_detach
-ffffffff81e72400 T usb_activate
-ffffffff81e72510 T usb_create_task_threads
-ffffffff81e725b0 T usb_explore
-ffffffff81e72750 T usb_attach_roothub
-ffffffff81e727f0 T usb_needs_explore
-ffffffff81e72840 T usb_detach_roothub
-ffffffff81e72920 T usb_wait_task
-ffffffff81e729b0 T usb_abort_task_thread
-ffffffff81e72ab0 T usb_task_thread
-ffffffff81e72c00 T usb_add_task
-ffffffff81e72d30 T usb_rem_task
-ffffffff81e72e20 T usb_rem_wait_task
-ffffffff81e72ec0 T usbctlprint
-ffffffff81e72f10 T usbopen
-ffffffff81e72f80 T usbclose
-ffffffff81e72fb0 T usb_fill_udc_task
-ffffffff81e73040 T usb_fill_udf_task
-ffffffff81e730b0 T usbioctl
-ffffffff81e73650 T usb_needs_reattach
-ffffffff81e736a0 T usb_schedsoftintr
-ffffffff81e73730 T usb_tap
-ffffffff81e74000 T usbd_is_dying
-ffffffff81e74040 T usbd_deactivate
-ffffffff81e74070 T usbd_ref_incr
-ffffffff81e740a0 T usbd_ref_decr
-ffffffff81e740e0 T usbd_ref_wait
-ffffffff81e74150 T usbd_get_devcnt
-ffffffff81e74180 T usbd_claim_iface
-ffffffff81e741c0 T usbd_iface_claimed
-ffffffff81e74200 T usbd_open_pipe
-ffffffff81e74310 T usbd_open_pipe_ival
-ffffffff81e74410 T usbd_open_pipe_intr
-ffffffff81e74660 T usbd_alloc_xfer
-ffffffff81e746d0 T usbd_setup_xfer
-ffffffff81e74740 T usbd_transfer
-ffffffff81e749d0 T usbd_free_xfer
-ffffffff81e74a50 T usbd_close_pipe
-ffffffff81e74bb0 T usbd_abort_pipe
-ffffffff81e74c20 T usb_transfer_complete
-ffffffff81e74eb0 T usbd_dopoll
-ffffffff81e74ed0 T usbd_alloc_buffer
-ffffffff81e74f60 T usbd_free_buffer
-ffffffff81e74fa0 T usbd_setup_default_xfer
-ffffffff81e75020 T usbd_setup_isoc_xfer
-ffffffff81e75150 T usbd_get_xfer_status
-ffffffff81e751b0 T usbd_get_config_descriptor
-ffffffff81e75200 T usbd_get_interface_descriptor
-ffffffff81e75250 T usbd_get_device_descriptor
-ffffffff81e75280 T usbd_interface2endpoint_descriptor
-ffffffff81e752c0 T usbd_clear_endpoint_stall
-ffffffff81e75350 T usbd_clear_endpoint_toggle
-ffffffff81e75390 T usbd_do_request
-ffffffff81e753b0 T usbd_clear_endpoint_stall_async
-ffffffff81e75470 T usbd_request_async
-ffffffff81e75580 T usbd_device2interface_handle
-ffffffff81e755d0 T usbd_set_interface
-ffffffff81e756b0 T usbd_get_no_alts
-ffffffff81e75720 T usbd_get_interface_altindex
-ffffffff81e75750 T usbd_start_next
-ffffffff81e75820 T usb_insert_transfer
-ffffffff81e758d0 T usbd_do_request_flags
-ffffffff81e75b50 T usbd_request_async_cb
-ffffffff81e75bd0 T usbd_get_quirks
-ffffffff81e75c20 T usbd_set_polling
-ffffffff81e75c80 T usbd_get_endpoint_descriptor
-ffffffff81e75ce0 T usbd_ratecheck
-ffffffff81e75d00 T usbd_match_device
-ffffffff81e75d60 T usbd_desc_iter_init
-ffffffff81e75dd0 T usbd_desc_iter_next
-ffffffff81e75e60 T usbd_str
-ffffffff81e76000 T usbd_get_desc
-ffffffff81e76070 T usbd_get_device_status
-ffffffff81e760c0 T usbd_get_hub_status
-ffffffff81e76110 T usbd_get_hub_descriptor
-ffffffff81e76180 T usbd_get_hub_ss_descriptor
-ffffffff81e761f0 T usbd_get_port_status
-ffffffff81e76240 T usbd_clear_hub_feature
-ffffffff81e76290 T usbd_set_hub_feature
-ffffffff81e762e0 T usbd_set_hub_depth
-ffffffff81e76330 T usbd_clear_port_feature
-ffffffff81e76380 T usbd_set_port_feature
-ffffffff81e763d0 T usbd_set_idle
-ffffffff81e76420 T usbd_get_report_descriptor
-ffffffff81e76470 T usbd_get_hid_descriptor
-ffffffff81e764e0 T usbd_get_config
-ffffffff81e76530 T usb_detach_wait
-ffffffff81e765b0 T usb_detach_wakeup
-ffffffff81e77000 T usb_block_allocmem
-ffffffff81e77250 T usb_block_freemem
-ffffffff81e772b0 T usb_allocmem
-ffffffff81e77500 T usb_freemem
-ffffffff81e775c0 T usb_syncmem
-ffffffff81e78000 T usbd_errstr
-ffffffff81e78070 T usbd_get_string_desc
-ffffffff81e78140 T usbd_get_string
-ffffffff81e78350 T usbd_get_device_string
-ffffffff81e78450 T usbd_cache_devinfo
-ffffffff81e787b0 T usbd_printBCD
-ffffffff81e78830 T usbd_devinfo
-ffffffff81e789d0 T usb_delay_ms
-ffffffff81e78a30 T usbd_delay_ms
-ffffffff81e78af0 T usbd_port_disown_to_1_1
-ffffffff81e78c00 T usbd_reset_port
-ffffffff81e78d90 T usbd_find_idesc
-ffffffff81e78e40 T usbd_find_edesc
-ffffffff81e78f50 T usbd_fill_iface_data
-ffffffff81e791b0 T usbd_parse_idesc
-ffffffff81e792d0 T usbd_free_iface_data
-ffffffff81e79330 T usbd_set_config
-ffffffff81e79380 T usbd_set_config_no
-ffffffff81e79440 T usbd_set_config_index
-ffffffff81e79910 T usbd_setup_pipe
-ffffffff81e79a00 T usbd_set_address
-ffffffff81e79ac0 T usbd_getnewaddr
-ffffffff81e79b50 T usbd_probe_and_attach
-ffffffff81e7a0c0 T usbd_print
-ffffffff81e7a1e0 T usbd_new_device
-ffffffff81e7aaf0 T usb_free_device
-ffffffff81e7ac70 T usbd_reload_device_desc
-ffffffff81e7ace0 T usbd_fill_deviceinfo
-ffffffff81e7b050 T usbd_get_cdesc
-ffffffff81e7b170 T usbd_detach
-ffffffff81e7c000 T usbd_find_quirk
-ffffffff81e7d000 T uhub_match
-ffffffff81e7d060 T uhub_attach
-ffffffff81e7d500 T uhub_detach
-ffffffff81e7d630 T uhub_explore
-ffffffff81e7d8e0 T uhub_intr
-ffffffff81e7da60 T uhub_port_connect
-ffffffff81e7e000 T uaudio_match
-ffffffff81e7e060 T uaudio_attach
-ffffffff81e7e1a0 T uaudio_detach
-ffffffff81e7e350 T uaudio_open
-ffffffff81e7e450 T uaudio_close
-ffffffff81e7e480 T uaudio_set_params
-ffffffff81e7ea00 T uaudio_halt_output
-ffffffff81e7ea50 T uaudio_halt_input
-ffffffff81e7eaa0 T uaudio_set_port
-ffffffff81e7ed80 T uaudio_get_port
-ffffffff81e7f0c0 T uaudio_query_devinfo
-ffffffff81e7f340 T uaudio_get_props
-ffffffff81e7f370 T uaudio_trigger_output
-ffffffff81e7f3f0 T uaudio_trigger_input
-ffffffff81e7f470 T uaudio_copy_output
-ffffffff81e7f4c0 T uaudio_underrun
-ffffffff81e7f4e0 T uaudio_set_blksz
-ffffffff81e7f590 T uaudio_sign_expand
-ffffffff81e7f5d0 T uaudio_req
-ffffffff81e7f650 T uaudio_getnum
-ffffffff81e7f790 T uaudio_getdesc
-ffffffff81e7f810 T uaudio_unit_byid
-ffffffff81e7f860 T uaudio_tname
-ffffffff81e7f9b0 T uaudio_clkname
-ffffffff81e7f9e0 T uaudio_mkname
-ffffffff81e7fb00 T uaudio_feature_fixup
-ffffffff81e7fd30 T uaudio_ranges_init
-ffffffff81e7fd60 T uaudio_ranges_add
-ffffffff81e7fe20 T uaudio_ranges_clear
-ffffffff81e7fe90 T uaudio_ranges_decode
-ffffffff81e7ff20 T uaudio_ranges_encode
-ffffffff81e7ffa0 T uaudio_ranges_getrates
-ffffffff81e80060 T uaudio_rates_indexof
-ffffffff81e800e0 T uaudio_req_ranges
-ffffffff81e80710 T uaudio_alt_getrates
-ffffffff81e807f0 T uaudio_clock_id
-ffffffff81e80870 T uaudio_getrates
-ffffffff81e80950 T uaudio_feature_addent
-ffffffff81e80b10 T uaudio_process_srcs
-ffffffff81e80c00 T uaudio_process_unit
-ffffffff81e81a60 T uaudio_process_nch
-ffffffff81e81b10 T uaudio_unit_getdesc
-ffffffff81e81be0 T uaudio_setname_dsts
-ffffffff81e81c90 T uaudio_setname_srcs
-ffffffff81e81d40 T uaudio_setname_middle
-ffffffff81e81e00 T uaudio_mixer_nchan
-ffffffff81e81eb0 T uaudio_mixer_byindex
-ffffffff81e81fc0 T uaudio_process_header
-ffffffff81e82080 T uaudio_process_ac_ep
-ffffffff81e82150 T uaudio_process_ac
-ffffffff81e82880 T uaudio_process_as_ep
-ffffffff81e829e0 T uaudio_process_as_general
-ffffffff81e82b00 T uaudio_process_as_format
-ffffffff81e83090 T uaudio_process_as
-ffffffff81e834e0 T uaudio_fixup_params
-ffffffff81e83680 T uaudio_process_conf
-ffffffff81e83830 T uaudio_xfer_alloc
-ffffffff81e838e0 T uaudio_xfer_free
-ffffffff81e83950 T uaudio_stream_close
-ffffffff81e83af0 T uaudio_stream_open
-ffffffff81e84260 T uaudio_adjspf
-ffffffff81e84340 T uaudio_pdata_copy
-ffffffff81e844e0 T uaudio_pdata_calcsizes
-ffffffff81e845e0 T uaudio_pdata_xfer
-ffffffff81e846d0 T uaudio_pdata_intr
-ffffffff81e84940 T uaudio_psync_xfer
-ffffffff81e84a60 T uaudio_psync_intr
-ffffffff81e84b60 T uaudio_rdata_xfer
-ffffffff81e84d50 T uaudio_rdata_intr
-ffffffff81e85100 T uaudio_trigger
-ffffffff81e85310 T uaudio_print
-ffffffff81e86000 T uvideo_match
-ffffffff81e860b0 T uvideo_attach
-ffffffff81e862e0 T uvideo_detach
-ffffffff81e863e0 T uvideo_open
-ffffffff81e86480 T uvideo_close
-ffffffff81e865c0 T uvideo_querycap
-ffffffff81e866c0 T uvideo_enum_fmt
-ffffffff81e86810 T uvideo_enum_fsizes
-ffffffff81e868a0 T uvideo_enum_fivals
-ffffffff81e869f0 T uvideo_s_fmt
-ffffffff81e86bb0 T uvideo_g_fmt
-ffffffff81e86c20 T uvideo_s_parm
-ffffffff81e86c90 T uvideo_g_parm
-ffffffff81e86ce0 T uvideo_enum_input
-ffffffff81e86d40 T uvideo_s_input
-ffffffff81e86d70 T uvideo_g_input
-ffffffff81e86da0 T uvideo_reqbufs
-ffffffff81e86f10 T uvideo_querybuf
-ffffffff81e86f70 T uvideo_qbuf
-ffffffff81e86fd0 T uvideo_dqbuf
-ffffffff81e870b0 T uvideo_streamon
-ffffffff81e87160 T uvideo_streamoff
-ffffffff81e871a0 T uvideo_try_fmt
-ffffffff81e872d0 T uvideo_queryctrl
-ffffffff81e87710 T uvideo_g_ctrl
-ffffffff81e87940 T uvideo_s_ctrl
-ffffffff81e87b60 T uvideo_mappage
-ffffffff81e87bb0 T uvideo_get_bufsize
-ffffffff81e87be0 T uvideo_start_read
-ffffffff81e87ca0 T uvideo_ucode_loader_ricoh
-ffffffff81e87ed0 T uvideo_ucode_loader_apple_isight
-ffffffff81e88120 T uvideo_enable
-ffffffff81e88180 T uvideo_disable
-ffffffff81e881c0 T uvideo_vs_close
-ffffffff81e88250 T uvideo_vs_free_bulk
-ffffffff81e882e0 T uvideo_vs_free_isoc
-ffffffff81e88410 T uvideo_vs_free_frame
-ffffffff81e884e0 T uvideo_attach_hook
-ffffffff81e88620 T uvideo_vs_decode_stream_header_isight
-ffffffff81e88790 T uvideo_vs_decode_stream_header
-ffffffff81e88910 T uvideo_vc_parse_desc
-ffffffff81e88af0 T uvideo_vs_parse_desc
-ffffffff81e88ce0 T uvideo_vs_negotiation
-ffffffff81e89100 T uvideo_desc_len
-ffffffff81e89160 T uvideo_vc_parse_desc_header
-ffffffff81e89200 T uvideo_vc_parse_desc_pu
-ffffffff81e89270 T uvideo_vc_get_ctrl
-ffffffff81e892f0 T uvideo_vc_set_ctrl
-ffffffff81e89370 T uvideo_find_ctrl
-ffffffff81e89460 T uvideo_has_ctrl
-ffffffff81e894b0 T uvideo_vs_parse_desc_input_header
-ffffffff81e89520 T uvideo_vs_parse_desc_format
-ffffffff81e896f0 T uvideo_vs_parse_desc_frame
-ffffffff81e897e0 T uvideo_vs_parse_desc_alt
-ffffffff81e899b0 T uvideo_vs_parse_desc_format_mjpeg
-ffffffff81e89a90 T uvideo_vs_parse_desc_format_uncompressed
-ffffffff81e89c30 T uvideo_vs_parse_desc_frame_sub
-ffffffff81e89d60 T uvideo_vs_set_alt
-ffffffff81e89f30 T uvideo_find_res
-ffffffff81e89ff0 T uvideo_vs_set_probe
-ffffffff81e8a090 T uvideo_vs_get_probe
-ffffffff81e8a140 T uvideo_vs_set_commit
-ffffffff81e8a1e0 T uvideo_vs_alloc_frame
-ffffffff81e8a2b0 T uvideo_vs_alloc_isoc
-ffffffff81e8a430 T uvideo_vs_alloc_bulk
-ffffffff81e8a4f0 T uvideo_vs_open
-ffffffff81e8a670 T uvideo_vs_init
-ffffffff81e8a7f0 T uvideo_vs_start_bulk
-ffffffff81e8a870 T uvideo_vs_start_bulk_thread
-ffffffff81e8a920 T uvideo_vs_start_isoc
-ffffffff81e8ab10 T uvideo_vs_start_isoc_ixfer
-ffffffff81e8abd0 T uvideo_vs_cb
-ffffffff81e8ad00 T uvideo_mmap_queue
-ffffffff81e8ae50 T uvideo_read
-ffffffff81e8aea0 T uvideo_usb_control
-ffffffff81e8b000 T utvfu_set_regs
-ffffffff81e8b0b0 T utvfu_max_frame_size
-ffffffff81e8b0f0 T utvfu_configure_for_norm
-ffffffff81e8b190 T utvfu_select_input
-ffffffff81e8b350 T utvfu_select_norm
-ffffffff81e8b4c0 T utvfu_setup_capture
-ffffffff81e8b590 T utvfu_chunk_to_vbuf
-ffffffff81e8b660 T utvfu_image_chunk
-ffffffff81e8b820 T utvfu_mmap_queue
-ffffffff81e8b960 T utvfu_read
-ffffffff81e8b9a0 T utvfu_start_capture
-ffffffff81e8bab0 T utvfu_audio_stop
-ffffffff81e8bbb0 T utvfu_audio_start
-ffffffff81e8bd70 T utvfu_querycap
-ffffffff81e8be60 T utvfu_enum_input
-ffffffff81e8bef0 T utvfu_enum_fmt_vid_cap
-ffffffff81e8bf50 T utvfu_enum_fsizes
-ffffffff81e8bfb0 T utvfu_g_fmt
-ffffffff81e8c020 T utvfu_s_fmt
-ffffffff81e8c060 T utvfu_g_std
-ffffffff81e8c0a0 T utvfu_s_std
-ffffffff81e8c0e0 T utvfu_g_input
-ffffffff81e8c110 T utvfu_s_input
-ffffffff81e8c120 T utvfu_audio_decode
-ffffffff81e8c2b0 T utvfu_audio_start_chip
-ffffffff81e8c360 T utvfu_audio_stop_chip
-ffffffff81e8c410 T utvfu_match
-ffffffff81e8c560 T utvfu_attach
-ffffffff81e8c690 T utvfu_detach
-ffffffff81e8c770 T utvfu_open
-ffffffff81e8c800 T utvfu_close
-ffffffff81e8c840 T utvfu_s_parm
-ffffffff81e8c870 T utvfu_g_parm
-ffffffff81e8c8f0 T utvfu_reqbufs
-ffffffff81e8ca60 T utvfu_querybuf
-ffffffff81e8cac0 T utvfu_qbuf
-ffffffff81e8cb30 T utvfu_dqbuf
-ffffffff81e8cc20 T utvfu_streamon
-ffffffff81e8cd90 T utvfu_streamoff
-ffffffff81e8ce00 T utvfu_queryctrl
-ffffffff81e8ce30 T utvfu_mappage
-ffffffff81e8ce80 T utvfu_get_bufsize
-ffffffff81e8cec0 T utvfu_start_read
-ffffffff81e8d040 T utvfu_audio_open
-ffffffff81e8d120 T utvfu_audio_close
-ffffffff81e8d190 T utvfu_audio_set_params
-ffffffff81e8d220 T utvfu_audio_halt_out
-ffffffff81e8d250 T utvfu_audio_halt_in
-ffffffff81e8d300 T utvfu_audio_mixer_set_port
-ffffffff81e8d360 T utvfu_audio_mixer_get_port
-ffffffff81e8d3c0 T utvfu_audio_query_devinfo
-ffffffff81e8d470 T utvfu_audio_get_props
-ffffffff81e8d4a0 T utvfu_audio_trigger_output
-ffffffff81e8d4d0 T utvfu_audio_trigger_input
-ffffffff81e8d5b0 T utvfu_parse_desc
-ffffffff81e8d6e0 T utvfu_as_free
-ffffffff81e8d760 T utvfu_vs_free
-ffffffff81e8d8b0 T utvfu_vs_init
-ffffffff81e8d9b0 T utvfu_as_open
-ffffffff81e8daa0 T utvfu_vs_open
-ffffffff81e8db90 T utvfu_as_close
-ffffffff81e8dc00 T utvfu_vs_close
-ffffffff81e8dc60 T utvfu_as_start_bulk
-ffffffff81e8dd00 T utvfu_as_bulk_thread
-ffffffff81e8ddd0 T utvfu_vs_start_isoc
-ffffffff81e8df30 T utvfu_vs_start_isoc_ixfer
-ffffffff81e8dff0 T utvfu_vs_cb
-ffffffff81e8e160 T utvfu_find_queued
-ffffffff81e8e1d0 T utvfu_audio_clear_client
-ffffffff81e8e240 T utvfu_as_free_bulk
-ffffffff81e8e290 T utvfu_vs_free_isoc
-ffffffff81e8e300 T utvfu_vs_free_frame
-ffffffff81e8e3d0 T utvfu_as_init
-ffffffff81e8e480 T utvfu_as_alloc_bulk
-ffffffff81e8e520 T utvfu_vs_alloc_isoc
-ffffffff81e8e5d0 T utvfu_vs_alloc_frame
-ffffffff81e8f000 T udl_match
-ffffffff81e8f070 T udl_attach
-ffffffff81e8f370 T udl_detach
-ffffffff81e8f470 T udl_activate
-ffffffff81e8f4a0 T udl_ioctl
-ffffffff81e8f710 T udl_mmap
-ffffffff81e8f840 T udl_alloc_screen
-ffffffff81e8fa60 T udl_free_screen
-ffffffff81e8fac0 T udl_show_screen
-ffffffff81e8faf0 T udl_load_font
-ffffffff81e8fb10 T udl_list_font
-ffffffff81e8fb20 T udl_burner
-ffffffff81e8fc00 T udl_select_chip
-ffffffff81e8fe50 T udl_cmd_alloc_xfer
-ffffffff81e8ff10 T udl_cmd_alloc_buf
-ffffffff81e8ffa0 T udl_cmd_set_xfer_type
-ffffffff81e8ffd0 T udl_init_chip
-ffffffff81e90220 T udl_select_mode
-ffffffff81e90500 T udl_init_resolution
-ffffffff81e908a0 T udl_attach_hook
-ffffffff81e90a20 T udl_load_huffman
-ffffffff81e90ab0 T udl_fb_buf_write
-ffffffff81e90c30 T udl_fb_block_write
-ffffffff81e90d10 T udl_fb_line_write
-ffffffff81e90da0 T udl_fb_off_write
-ffffffff81e90f50 T udl_fb_block_copy
-ffffffff81e91050 T udl_fb_line_copy
-ffffffff81e910f0 T udl_fb_off_copy
-ffffffff81e91250 T udl_fb_buf_write_comp
-ffffffff81e914f0 T udl_fb_block_write_comp
-ffffffff81e915d0 T udl_fb_line_write_comp
-ffffffff81e91660 T udl_fb_off_write_comp
-ffffffff81e91940 T udl_fb_block_copy_comp
-ffffffff81e91a40 T udl_fb_line_copy_comp
-ffffffff81e91ae0 T udl_fb_off_copy_comp
-ffffffff81e91e30 T udl_cmd_free_buf
-ffffffff81e91e90 T udl_cmd_free_xfer
-ffffffff81e91fa0 T udl_free_huffman
-ffffffff81e92000 T udl_fbmem_free
-ffffffff81e92060 T udl_clear_screen
-ffffffff81e92130 T udl_damage
-ffffffff81e922f0 T udl_fbmem_alloc
-ffffffff81e923b0 T udl_copycols
-ffffffff81e92500 T udl_copyrows
-ffffffff81e92650 T udl_erasecols
-ffffffff81e92780 T udl_eraserows
-ffffffff81e928b0 T udl_putchar
-ffffffff81e92a00 T udl_do_cursor
-ffffffff81e92b90 T udl_cmd_write_reg_1
-ffffffff81e92c20 T udl_cmd_send_async
-ffffffff81e92e30 T udl_cmd_save_offset
-ffffffff81e92e70 T udl_cmd_restore_offset
-ffffffff81e92eb0 T udl_draw_char
-ffffffff81e93030 T udl_draw_image
-ffffffff81e93190 T udl_ctrl_msg
-ffffffff81e93240 T udl_poll
-ffffffff81e93320 T udl_read_1
-ffffffff81e933f0 T udl_write_1
-ffffffff81e934b0 T udl_read_edid
-ffffffff81e93630 T udl_lookup_mode
-ffffffff81e936d0 T udl_set_enc_key
-ffffffff81e937a0 T udl_set_decomp_table
-ffffffff81e938b0 T udl_cmd_insert_int_1
-ffffffff81e938f0 T udl_cmd_insert_int_4
-ffffffff81e93950 T udl_cmd_insert_buf
-ffffffff81e939b0 T udl_cmd_send
-ffffffff81e93ad0 T udl_cmd_insert_int_2
-ffffffff81e93b30 T udl_cmd_insert_int_3
-ffffffff81e93b90 T udl_cmd_insert_buf_comp
-ffffffff81e93e50 T udl_cmd_insert_head_comp
-ffffffff81e93fc0 T udl_cmd_insert_check
-ffffffff81e94020 T udl_cmd_write_reg_3
-ffffffff81e94190 T udl_cmd_send_async_cb
-ffffffff81e94250 T udl_init_fb_offsets
-ffffffff81e95000 t umidi_open
-ffffffff81e95100 t umidi_close
-ffffffff81e95180 t umidi_output
-ffffffff81e95550 t umidi_flush
-ffffffff81e95640 t umidi_getinfo
-ffffffff81e95690 T umidi_match
-ffffffff81e95710 T umidi_attach
-ffffffff81e968e0 T umidi_detach
-ffffffff81e96b70 T umidi_activate
-ffffffff81e96c30 t free_all_endpoints
-ffffffff81e96d10 t unbind_all_jacks
-ffffffff81e96e20 t out_intr
-ffffffff81e96f20 t in_intr
-ffffffff81e98000 T umidi_search_quirk
-ffffffff81e980b0 T umidi_print_quirk
-ffffffff81e98170 T umidi_get_quirk_data_from_type
-ffffffff81e99000 T ucom_match
-ffffffff81e99030 T ucom_attach
-ffffffff81e99130 T ucom_detach
-ffffffff81e99350 T ucom_lock
-ffffffff81e99370 T ucom_unlock
-ffffffff81e99390 T ucomstart
-ffffffff81e99550 T ucomparam
-ffffffff81e996b0 T ucomopen
-ffffffff81e99770 T ucom_shutdown
-ffffffff81e99830 T ucom_dtr
-ffffffff81e99880 T ucom_rts
-ffffffff81e998d0 T ucom_do_open
-ffffffff81e99f40 T ucom_cleanup
-ffffffff81e9a0c0 T ucom_status_change
-ffffffff81e9a1b0 T ucomstartread
-ffffffff81e9a230 T ucom_hwiflow
-ffffffff81e9a260 T ucomclose
-ffffffff81e9a300 T ucom_do_close
-ffffffff81e9a3f0 T ucomread
-ffffffff81e9a4a0 T ucomwrite
-ffffffff81e9a550 T ucomtty
-ffffffff81e9a5a0 T ucomioctl
-ffffffff81e9a650 T ucom_do_ioctl
-ffffffff81e9a950 T ucom_break
-ffffffff81e9a9a0 T tiocm_to_ucom
-ffffffff81e9aac0 T ucom_to_tiocm
-ffffffff81e9ab20 T ucomwritecb
-ffffffff81e9ac40 T ucomstop
-ffffffff81e9ac70 T ucomreadcb
-ffffffff81e9ae40 T ucomprint
-ffffffff81e9aea0 T ucomsubmatch
-ffffffff81e9b000 T ugen_match
-ffffffff81e9b030 T ugen_attach
-ffffffff81e9b110 T ugen_detach
-ffffffff81e9b470 T ugen_set_config
-ffffffff81e9b6a0 T ugenopen
-ffffffff81e9bc00 T ugenintr
-ffffffff81e9bc90 T ugen_isoc_rintr
-ffffffff81e9bf80 T ugenclose
-ffffffff81e9c030 T ugen_do_close
-ffffffff81e9c2c0 T ugen_do_read
-ffffffff81e9c760 T ugenread
-ffffffff81e9c7e0 T ugen_do_write
-ffffffff81e9ca90 T ugenwrite
-ffffffff81e9cb10 T ugen_set_interface
-ffffffff81e9cca0 T ugen_get_alt_index
-ffffffff81e9ccf0 T ugen_do_ioctl
-ffffffff81e9d4d0 T ugenioctl
-ffffffff81e9d560 T ugenpoll
-ffffffff81e9d6b0 T filt_ugenrdetach
-ffffffff81e9d720 T filt_ugenread_intr
-ffffffff81e9d760 T filt_ugenread_isoc
-ffffffff81e9d7c0 T ugenkqfilter
-ffffffff81e9e000 T uhidev_match
-ffffffff81e9e090 T uhidev_attach
-ffffffff81e9e6a0 T uhidev_detach
-ffffffff81e9e7e0 T uhidev_activate
-ffffffff81e9e880 T uhidev_use_rdesc
-ffffffff81e9e9a0 T uhidev_maxrepid
-ffffffff81e9ea50 T uhidevsubmatch
-ffffffff81e9eaa0 T uhidevprint
-ffffffff81e9eb00 T uhidev_set_report
-ffffffff81e9ec70 T uhidev_intr
-ffffffff81e9ed70 T uhidev_get_report_desc
-ffffffff81e9edb0 T uhidev_open
-ffffffff81e9efc0 T uhidev_close
-ffffffff81e9f0d0 T uhidev_report_type_conv
-ffffffff81e9f110 T uhidev_set_report_async_cb
-ffffffff81e9f140 T uhidev_set_report_async
-ffffffff81e9f2b0 T uhidev_get_report
-ffffffff81e9f3a0 T uhidev_get_report_async_cb
-ffffffff81e9f450 T uhidev_get_report_async
-ffffffff81e9f580 T uhidev_write
-ffffffff81e9f620 T uhidev_ioctl
-ffffffff81ea0000 T uhid_match
-ffffffff81ea0030 T uhid_attach
-ffffffff81ea0110 T uhid_detach
-ffffffff81ea01f0 T uhid_lookup
-ffffffff81ea0280 T uhidopen
-ffffffff81ea0290 T uhid_intr
-ffffffff81ea02f0 T uhid_do_open
-ffffffff81ea03f0 T uhidclose
-ffffffff81ea04c0 T uhid_do_read
-ffffffff81ea0620 T uhidread
-ffffffff81ea06f0 T uhid_do_write
-ffffffff81ea07b0 T uhidwrite
-ffffffff81ea0910 T uhid_do_ioctl
-ffffffff81ea09d0 T uhidioctl
-ffffffff81ea0b30 T uhidpoll
-ffffffff81ea0c50 T filt_uhidrdetach
-ffffffff81ea0cc0 T filt_uhidread
-ffffffff81ea0d00 T uhidkqfilter
-ffffffff81ea1000 T fido_match
-ffffffff81ea1080 T fidoopen
-ffffffff81ea1090 T fidoioctl
-ffffffff81ea2000 T ukbd_cngetc
-ffffffff81ea2070 T ukbd_cnpollc
-ffffffff81ea20c0 T ukbd_cnbell
-ffffffff81ea20e0 T ukbd_debugger
-ffffffff81ea2100 T ukbd_enable
-ffffffff81ea21a0 T ukbd_set_leds
-ffffffff81ea2220 T ukbd_ioctl
-ffffffff81ea2340 T ukbd_match
-ffffffff81ea23b0 T ukbd_attach
-ffffffff81ea2770 T ukbd_detach
-ffffffff81ea27d0 T ukbd_intr
-ffffffff81ea2840 T ukbd_apple_iso_munge
-ffffffff81ea2a60 T ukbd_apple_iso_mba_munge
-ffffffff81ea2c80 T ukbd_apple_mba_munge
-ffffffff81ea2de0 T ukbd_apple_munge
-ffffffff81ea2f40 T ukbd_db_enter
-ffffffff81ea2f50 T ukbd_cnattach
-ffffffff81ea2fd0 T ukbd_translate
-ffffffff81ea3020 T ukbd_apple_translate
-ffffffff81ea4000 T ums_enable
-ffffffff81ea4060 T ums_ioctl
-ffffffff81ea40f0 T ums_disable
-ffffffff81ea4120 T ums_match
-ffffffff81ea41f0 T ums_attach
-ffffffff81ea4390 T ums_detach
-ffffffff81ea43a0 T ums_intr
-ffffffff81ea5000 T umt_enable
-ffffffff81ea5070 T umt_ioctl
-ffffffff81ea5100 T umt_disable
-ffffffff81ea5130 T umt_match
-ffffffff81ea51a0 T umt_attach
-ffffffff81ea52a0 T umt_detach
-ffffffff81ea52b0 T umt_find_winptp_reports
-ffffffff81ea54d0 T umt_intr
-ffffffff81ea5510 T umt_hidev_get_report
-ffffffff81ea5560 T umt_hidev_set_report
-ffffffff81ea6000 T uts_enable
-ffffffff81ea60f0 T uts_ioctl
-ffffffff81ea62b0 T uts_disable
-ffffffff81ea6340 T uts_match
-ffffffff81ea63d0 T uts_attach
-ffffffff81ea6590 T uts_detach
-ffffffff81ea6610 T uts_activate
-ffffffff81ea6680 T uts_intr
-ffffffff81ea6790 T uts_get_pos
-ffffffff81ea7000 T ubcmtp_enable
-ffffffff81ea70b0 T ubcmtp_ioctl
-ffffffff81ea7190 T ubcmtp_disable
-ffffffff81ea72a0 T ubcmtp_match
-ffffffff81ea7350 T ubcmtp_attach
-ffffffff81ea75e0 T ubcmtp_detach
-ffffffff81ea7620 T ubcmtp_activate
-ffffffff81ea7690 T ubcmtp_configure
-ffffffff81ea7720 T ubcmtp_raw_mode
-ffffffff81ea7890 T ubcmtp_setup_pipes
-ffffffff81ea7ac0 T ubcmtp_bt_intr
-ffffffff81ea7b90 T ubcmtp_tp_intr
-ffffffff81ea8000 T ucycom_set
-ffffffff81ea8090 T ucycom_param
-ffffffff81ea81f0 T ucycom_open
-ffffffff81ea82d0 T ucycom_close
-ffffffff81ea8390 T ucycom_read
-ffffffff81ea8410 T ucycom_write
-ffffffff81ea84c0 T ucycom_match
-ffffffff81ea8530 T ucycom_attach
-ffffffff81ea86e0 T ucycom_detach
-ffffffff81ea8740 T ucycom_intr
-ffffffff81ea8840 T ucycom_get_status
-ffffffff81ea9000 T uslhcom_get_status
-ffffffff81ea9060 T uslhcom_set
-ffffffff81ea90e0 T uslhcom_param
-ffffffff81ea91c0 T uslhcom_open
-ffffffff81ea9260 T uslhcom_close
-ffffffff81ea9300 T uslhcom_read
-ffffffff81ea9340 T uslhcom_write
-ffffffff81ea93a0 T uslhcom_match
-ffffffff81ea9410 T uslhcom_attach
-ffffffff81ea9670 T uslhcom_detach
-ffffffff81ea96d0 T uslhcom_intr
-ffffffff81ea9770 T uslhcom_uart_endis
-ffffffff81ea97d0 T uslhcom_get_version
-ffffffff81ea9830 T uslhcom_clear_fifo
-ffffffff81ea9890 T uslhcom_get_uart_status
-ffffffff81ea98f0 T uslhcom_set_break
-ffffffff81ea9950 T uslhcom_set_config
-ffffffff81ea99b0 T uslhcom_set_baud_rate
-ffffffff81ea99f0 T uslhcom_create_config
-ffffffff81ea9a80 T uslhcom_setup
-ffffffff81eaa000 T ulpt_ucode_loader_hp
-ffffffff81eaa1f0 T ulpt_match
-ffffffff81eaa260 T ulpt_attach
-ffffffff81eaa540 T ulpt_detach
-ffffffff81eaa630 T ulpt_load_firmware
-ffffffff81eaa6c0 T ulptopen
-ffffffff81eaa9f0 T ulpt_status
-ffffffff81eaaa50 T ulpt_reset
-ffffffff81eaaad0 t ulpt_input
-ffffffff81eaab00 T ulpt_statusmsg
-ffffffff81eaabb0 T ulptclose
-ffffffff81eaac70 T ulpt_do_write
-ffffffff81eaae40 T ulptwrite
-ffffffff81eab000 T umass_match
-ffffffff81eab0a0 T umass_attach
-ffffffff81eab5c0 T umass_detach
-ffffffff81eab6c0 T umass_bbb_transfer
-ffffffff81eab950 T umass_bbb_reset
-ffffffff81eab9f0 T umass_bbb_state
-ffffffff81eabf50 T umass_cbi_transfer
-ffffffff81eac1d0 T umass_cbi_reset
-ffffffff81eac290 T umass_cbi_state
-ffffffff81eac8c0 T umass_disco
-ffffffff81eaca40 T umass_bbb_get_max_lun
-ffffffff81eacac0 T umass_polled_transfer
-ffffffff81eacbc0 T umass_setup_transfer
-ffffffff81eacd50 T umass_setup_ctrl_transfer
-ffffffff81eaced0 T umass_adjust_transfer
-ffffffff81eacf80 T umass_clear_endpoint_stall
-ffffffff81ead020 T umass_cbi_adsc
-ffffffff81eae000 T umass_init_insystem
-ffffffff81eae020 T umass_init_shuttle
-ffffffff81eae080 T umass_fixup_sony
-ffffffff81eae0f0 T umass_fixup_yedata
-ffffffff81eae140 T umass_lookup
-ffffffff81eaf000 T umass_scsi_cmd
-ffffffff81eaf1a0 T umass_scsi_probe
-ffffffff81eaf270 T umass_scsi_attach
-ffffffff81eaf390 T umass_io_get
-ffffffff81eaf3f0 T umass_io_put
-ffffffff81eaf420 T umass_scsi_detach
-ffffffff81eaf4a0 T umass_scsi_cb
-ffffffff81eaf6c0 T umass_scsi_sense_cb
-ffffffff81eb0000 T uthum_match
-ffffffff81eb0070 T uthum_attach
-ffffffff81eb0270 T uthum_detach
-ffffffff81eb0370 T uthum_intr
-ffffffff81eb03a0 T uthum_check_device_info
-ffffffff81eb0680 T uthum_setup_sensors
-ffffffff81eb0890 T uthum_print_sensorinfo
-ffffffff81eb09f0 T uthum_refresh
-ffffffff81eb0ac0 T uthum_reset_device
-ffffffff81eb0b40 T uthum_issue_cmd
-ffffffff81eb0d80 T uthum_read_data
-ffffffff81eb0ef0 T uthum_ntc_tuning
-ffffffff81eb1180 T uthum_ntc_getdata
-ffffffff81eb1200 T uthum_refresh_temper
-ffffffff81eb12e0 T uthum_refresh_temperntc
-ffffffff81eb15a0 T uthum_refresh_temperhum
-ffffffff81eb16c0 T uthum_sht1x_temp
-ffffffff81eb16f0 T uthum_sht1x_rh
-ffffffff81eb1770 T uthum_ds75_temp
-ffffffff81eb17b0 T uthum_ntc_temp
-ffffffff81eb2000 T ugold_match
-ffffffff81eb20b0 T ugold_attach
-ffffffff81eb22d0 T ugold_detach
-ffffffff81eb2380 T ugold_ds75_intr
-ffffffff81eb25b0 T ugold_si700x_intr
-ffffffff81eb2900 T ugold_refresh
-ffffffff81eb2a40 T ugold_issue_cmd
-ffffffff81eb3000 T utrh_match
-ffffffff81eb3070 T utrh_attach
-ffffffff81eb3260 T utrh_detach
-ffffffff81eb3350 T utrh_intr
-ffffffff81eb3390 T utrh_refresh
-ffffffff81eb3570 T utrh_sht1x_temp
-ffffffff81eb35a0 T utrh_sht1x_rh
-ffffffff81eb4000 T uoak_check_device_ready
-ffffffff81eb4080 T uoak_set_cmd
-ffffffff81eb4180 T uoak_get_cmd
-ffffffff81eb42f0 T uoak_get_device_name
-ffffffff81eb43b0 T uoak_get_report_mode
-ffffffff81eb4460 T uoak_get_report_rate
-ffffffff81eb4520 T uoak_get_sample_rate
-ffffffff81eb45e0 T uoak_set_sample_rate
-ffffffff81eb4670 T uoak_led_status
-ffffffff81eb4710 T uoak_led_ctrl
-ffffffff81eb4770 T uoak_get_devinfo
-ffffffff81eb4790 T uoak_get_setting
-ffffffff81eb49a0 T uoak_print_devinfo
-ffffffff81eb49c0 T uoak_print_setting
-ffffffff81eb4a60 T uoak_sensor_attach
-ffffffff81eb4b70 T uoak_sensor_detach
-ffffffff81eb4be0 T uoak_sensor_update
-ffffffff81eb4c80 T uoak_sensor_refresh
-ffffffff81eb5000 T uoakrh_match
-ffffffff81eb5070 T uoakrh_attach
-ffffffff81eb5300 T uoakrh_detach
-ffffffff81eb53c0 T uoakrh_dev_print
-ffffffff81eb5430 T uoakrh_dev_setting
-ffffffff81eb54d0 T uoakrh_intr
-ffffffff81eb55a0 T uoakrh_refresh
-ffffffff81eb5650 T uoakrh_get_sensor_setting
-ffffffff81eb6000 T uoaklux_match
-ffffffff81eb6070 T uoaklux_attach
-ffffffff81eb6280 T uoaklux_detach
-ffffffff81eb6330 T uoaklux_dev_print
-ffffffff81eb63c0 T uoaklux_dev_setting
-ffffffff81eb6460 T uoaklux_intr
-ffffffff81eb64d0 T uoaklux_refresh
-ffffffff81eb6550 T uoaklux_get_sensor_setting
-ffffffff81eb7000 T uoakv_match
-ffffffff81eb7070 T uoakv_attach
-ffffffff81eb7310 T uoakv_detach
-ffffffff81eb7430 T uoakv_dev_print
-ffffffff81eb7620 T uoakv_dev_setting
-ffffffff81eb7780 T uoakv_intr
-ffffffff81eb78f0 T uoakv_refresh
-ffffffff81eb7a00 T uoakv_get_channel_setting
-ffffffff81eb7ad0 T uoakv_get_sensor_setting
-ffffffff81eb8000 T uonerng_match
-ffffffff81eb8050 T uonerng_attach
-ffffffff81eb83c0 T uonerng_detach
-ffffffff81eb8460 T uonerng_task
-ffffffff81eb85b0 T uonerng_enable
-ffffffff81eb8720 T uonerng_timeout
-ffffffff81eb8740 T uonerng_cleanup
-ffffffff81eb87c0 T uonerng_rts
-ffffffff81eb8840 T uonerng_set_line_state
-ffffffff81eb9000 T urng_match
-ffffffff81eb9070 T urng_attach
-ffffffff81eb9270 T urng_detach
-ffffffff81eb9300 T urng_task
-ffffffff81eb9420 T urng_timeout
-ffffffff81eba000 T udcf_match
-ffffffff81eba070 T udcf_attach
-ffffffff81eba3d0 T udcf_detach
-ffffffff81eba510 T udcf_nc_signal
-ffffffff81eba580 T udcf_ft232r_signal
-ffffffff81eba600 T udcf_probe
-ffffffff81eba780 T udcf_bv_probe
-ffffffff81eba800 T udcf_mg_probe
-ffffffff81ebabb0 T udcf_sl_probe
-ffffffff81ebac30 T udcf_intr
-ffffffff81ebac50 T udcf_bv_intr
-ffffffff81ebac70 T udcf_mg_intr
-ffffffff81ebac90 T udcf_sl_intr
-ffffffff81ebacb0 T udcf_it_intr
-ffffffff81ebad30 T udcf_nc_init_hw
-ffffffff81ebae00 T udcf_ft232r_init_hw
-ffffffff81ebb000 T umbg_match
-ffffffff81ebb060 T umbg_attach
-ffffffff81ebb3a0 T umbg_detach
-ffffffff81ebb4b0 T umbg_task
-ffffffff81ebb660 T umbg_intr
-ffffffff81ebb680 T umbg_it_intr
-ffffffff81ebb700 T umbg_read
-ffffffff81ebc000 T uvisor_close
-ffffffff81ebc090 T uvisor_match
-ffffffff81ebc100 T uvisor_attach
-ffffffff81ebc4c0 T uvisor_detach
-ffffffff81ebc560 T uvisor_init
-ffffffff81ebd000 T udsbr_get_info
-ffffffff81ebd0d0 T udsbr_set_info
-ffffffff81ebd140 T udsbr_match
-ffffffff81ebd190 T udsbr_attach
-ffffffff81ebd1e0 T udsbr_detach
-ffffffff81ebd220 T udsbr_activate
-ffffffff81ebd260 T udsbr_req
-ffffffff81ebd300 T udsbr_start
-ffffffff81ebd3c0 T udsbr_stop
-ffffffff81ebd480 T udsbr_setfreq
-ffffffff81ebd570 T udsbr_status
-ffffffff81ebe000 T utwitch_match
-ffffffff81ebe070 T utwitch_attach
-ffffffff81ebe2a0 T utwitch_detach
-ffffffff81ebe360 T utwitch_intr
-ffffffff81ebe410 T utwitch_refresh
-ffffffff81ebe4f0 T utwitch_set_mode
-ffffffff81ebe5a0 T utwitch_read_value_request
-ffffffff81ebe640 T utwitch_write_value_request
-ffffffff81ebf000 T aue_match
-ffffffff81ebf070 T aue_attach
-ffffffff81ebf400 T aue_detach
-ffffffff81ebf520 T aue_csr_read_1
-ffffffff81ebf5b0 T aue_csr_read_2
-ffffffff81ebf640 T aue_csr_write_1
-ffffffff81ebf6d0 T aue_csr_write_2
-ffffffff81ebf760 T aue_eeprom_getword
-ffffffff81ebf8f0 T aue_read_mac
-ffffffff81ebf960 T aue_lock_mii
-ffffffff81ebf980 T aue_unlock_mii
-ffffffff81ebf9e0 T aue_miibus_readreg
-ffffffff81ebfbe0 T aue_miibus_writereg
-ffffffff81ebfda0 T aue_miibus_statchg
-ffffffff81ec00d0 T aue_crc
-ffffffff81ec01f0 T aue_iff
-ffffffff81ec05b0 T aue_reset_pegasus_II
-ffffffff81ec06a0 T aue_reset
-ffffffff81ec08c0 T aue_tick_task
-ffffffff81ec0990 T aue_stop
-ffffffff81ec0bf0 T aue_ioctl
-ffffffff81ec0d90 T aue_start
-ffffffff81ec0e90 T aue_watchdog
-ffffffff81ec0f40 T aue_ifmedia_upd
-ffffffff81ec0fd0 T aue_ifmedia_sts
-ffffffff81ec1030 T aue_tick
-ffffffff81ec10a0 T aue_newbuf
-ffffffff81ec11a0 T aue_rx_list_init
-ffffffff81ec1250 T aue_tx_list_init
-ffffffff81ec12f0 T aue_intr
-ffffffff81ec1400 T aue_rxeof
-ffffffff81ec15f0 T aue_txeof
-ffffffff81ec1710 T aue_send
-ffffffff81ec1850 T aue_init
-ffffffff81ec1cf0 T aue_openpipes
-ffffffff81ec2000 T axe_match
-ffffffff81ec2070 T axe_attach
-ffffffff81ec2590 T axe_detach
-ffffffff81ec26f0 T axe_lock_mii
-ffffffff81ec2710 T axe_unlock_mii
-ffffffff81ec2770 T axe_cmd
-ffffffff81ec2820 T axe_miibus_readreg
-ffffffff81ec29b0 T axe_miibus_writereg
-ffffffff81ec2b20 T axe_miibus_statchg
-ffffffff81ec2c50 T axe_ifmedia_upd
-ffffffff81ec2cd0 T axe_ifmedia_sts
-ffffffff81ec2d30 T axe_iff
-ffffffff81ec2f10 T axe_reset
-ffffffff81ec2f70 T axe_ax88178_init
-ffffffff81ec3350 T axe_ax88772b_nodeid
-ffffffff81ec34c0 T axe_ax88772_init
-ffffffff81ec36f0 T axe_tick_task
-ffffffff81ec37a0 T axe_stop
-ffffffff81ec39a0 T axe_ioctl
-ffffffff81ec3af0 T axe_start
-ffffffff81ec3bd0 T axe_watchdog
-ffffffff81ec3c80 T axe_tick
-ffffffff81ec3cf0 T axe_newbuf
-ffffffff81ec3d80 T axe_rx_list_init
-ffffffff81ec3e30 T axe_tx_list_init
-ffffffff81ec3ee0 T axe_rxeof
-ffffffff81ec4180 T axe_txeof
-ffffffff81ec42a0 T axe_encap
-ffffffff81ec4400 T axe_init
-ffffffff81ec5000 T axen_match
-ffffffff81ec5070 T axen_attach
-ffffffff81ec5490 T axen_detach
-ffffffff81ec55f0 T axen_lock_mii
-ffffffff81ec5610 T axen_unlock_mii
-ffffffff81ec5670 T axen_cmd
-ffffffff81ec5720 T axen_miibus_readreg
-ffffffff81ec5840 T axen_miibus_writereg
-ffffffff81ec5940 T axen_miibus_statchg
-ffffffff81ec5aa0 T axen_ifmedia_upd
-ffffffff81ec5b30 T axen_ifmedia_sts
-ffffffff81ec5b90 T axen_iff
-ffffffff81ec5d90 T axen_reset
-ffffffff81ec5df0 T axen_ax88179_init
-ffffffff81ec64a0 T axen_tick_task
-ffffffff81ec6550 T axen_stop
-ffffffff81ec6750 T axen_ioctl
-ffffffff81ec68a0 T axen_start
-ffffffff81ec6980 T axen_watchdog
-ffffffff81ec6a30 T axen_tick
-ffffffff81ec6aa0 T axen_newbuf
-ffffffff81ec6b30 T axen_rx_list_init
-ffffffff81ec6be0 T axen_tx_list_init
-ffffffff81ec6c90 T axen_rxeof
-ffffffff81ec6ff0 T axen_txeof
-ffffffff81ec7110 T axen_encap
-ffffffff81ec7260 T axen_init
-ffffffff81ec8000 T smsc_match
-ffffffff81ec8070 T smsc_attach
-ffffffff81ec8440 T smsc_detach
-ffffffff81ec85a0 T smsc_read_reg
-ffffffff81ec8640 T smsc_write_reg
-ffffffff81ec86d0 T smsc_wait_for_bits
-ffffffff81ec87a0 T smsc_miibus_readreg
-ffffffff81ec89d0 T smsc_lock_mii
-ffffffff81ec89f0 T smsc_unlock_mii
-ffffffff81ec8a50 T smsc_miibus_writereg
-ffffffff81ec8cb0 T smsc_miibus_statchg
-ffffffff81ec8f10 T smsc_ifmedia_upd
-ffffffff81ec8f60 T smsc_ifmedia_sts
-ffffffff81ec8fc0 T smsc_iff
-ffffffff81ec91c0 T smsc_sethwcsum
-ffffffff81ec92e0 T smsc_setmacaddress
-ffffffff81ec93d0 T smsc_reset
-ffffffff81ec9430 T smsc_chip_init
-ffffffff81ec9b60 T smsc_init
-ffffffff81ec9dc0 T smsc_stop
-ffffffff81ec9fb0 T smsc_rx_list_init
-ffffffff81eca060 T smsc_tx_list_init
-ffffffff81eca110 T smsc_rxeof
-ffffffff81eca310 T smsc_start
-ffffffff81eca3d0 T smsc_encap
-ffffffff81eca4e0 T smsc_tick
-ffffffff81eca540 T smsc_ioctl
-ffffffff81eca690 T smsc_tick_task
-ffffffff81eca740 T smsc_txeof
-ffffffff81ecb000 T cue_match
-ffffffff81ecb070 T cue_attach
-ffffffff81ecb300 T cue_detach
-ffffffff81ecb3f0 T cue_csr_read_1
-ffffffff81ecb480 T cue_csr_read_2
-ffffffff81ecb510 T cue_csr_write_1
-ffffffff81ecb5a0 T cue_mem
-ffffffff81ecb620 T cue_getmac
-ffffffff81ecb6a0 T cue_setmulti
-ffffffff81ecb810 T cue_reset
-ffffffff81ecb8b0 T cue_tick_task
-ffffffff81ecba40 T cue_stop
-ffffffff81ecbc90 T cue_ioctl
-ffffffff81ecbf00 T cue_start
-ffffffff81ecbfe0 T cue_watchdog
-ffffffff81ecc0a0 T cue_tick
-ffffffff81ecc110 T cue_newbuf
-ffffffff81ecc210 T cue_rx_list_init
-ffffffff81ecc2d0 T cue_tx_list_init
-ffffffff81ecc380 T cue_rxeof
-ffffffff81ecc570 T cue_txeof
-ffffffff81ecc690 T cue_send
-ffffffff81ecc7d0 T cue_init
-ffffffff81eccd00 T cue_open_pipes
-ffffffff81ecd000 T kue_match
-ffffffff81ecd070 T kue_attach
-ffffffff81ecd100 T kue_detach
-ffffffff81ecd1f0 T kue_setword
-ffffffff81ecd250 T kue_ctl
-ffffffff81ecd2c0 T kue_load_fw
-ffffffff81ecd560 T kue_reset
-ffffffff81ecd5d0 T kue_setmulti
-ffffffff81ecd790 T kue_attachhook
-ffffffff81ecda60 T kue_ioctl
-ffffffff81ecdc50 T kue_start
-ffffffff81ecdd30 T kue_watchdog
-ffffffff81ecddf0 T kue_stop
-ffffffff81ecdfb0 T kue_newbuf
-ffffffff81ece0a0 T kue_rx_list_init
-ffffffff81ece1c0 T kue_tx_list_init
-ffffffff81ece260 T kue_rxeof
-ffffffff81ece4c0 T kue_txeof
-ffffffff81ece5e0 T kue_send
-ffffffff81ece720 T kue_init
-ffffffff81ece8d0 T kue_open_pipes
-ffffffff81ecf000 T cdce_match
-ffffffff81ecf0a0 T cdce_attach
-ffffffff81ecf650 T cdce_detach
-ffffffff81ecf6e0 T cdce_ioctl
-ffffffff81ecf7f0 T cdce_start
-ffffffff81ecf8d0 T cdce_watchdog
-ffffffff81ecf950 T cdce_stop
-ffffffff81ecfb10 T cdce_encap
-ffffffff81ecfc30 T cdce_txeof
-ffffffff81ecfd60 T cdce_init
-ffffffff81ecfff0 T cdce_intr
-ffffffff81ed0050 T cdce_tx_list_init
-ffffffff81ed00f0 T cdce_rx_list_init
-ffffffff81ed01a0 T cdce_rxeof
-ffffffff81ed03d0 T cdce_newbuf
-ffffffff81ed1000 T urndis_match
-ffffffff81ed10c0 T urndis_attach
-ffffffff81ed14e0 T urndis_detach
-ffffffff81ed1560 T urndis_ctrl_msg
-ffffffff81ed15d0 T urndis_ctrl_send
-ffffffff81ed1690 T urndis_ctrl_recv
-ffffffff81ed17b0 T urndis_ctrl_handle
-ffffffff81ed19e0 T urndis_ctrl_handle_init
-ffffffff81ed1a80 T urndis_ctrl_handle_query
-ffffffff81ed1bb0 T urndis_ctrl_handle_reset
-ffffffff81ed1c60 T urndis_ctrl_handle_status
-ffffffff81ed1cd0 T urndis_ctrl_set
-ffffffff81ed1eb0 T urndis_ctrl_init
-ffffffff81ed2030 T urndis_ctrl_halt
-ffffffff81ed2170 T urndis_ctrl_query
-ffffffff81ed2330 T urndis_ctrl_set_param
-ffffffff81ed24a0 T urndis_encap
-ffffffff81ed25e0 T urndis_txeof
-ffffffff81ed26f0 T urndis_stop
-ffffffff81ed2860 T urndis_decap
-ffffffff81ed2a80 T urndis_newbuf
-ffffffff81ed2b50 T urndis_rx_list_init
-ffffffff81ed2c00 T urndis_tx_list_init
-ffffffff81ed2ca0 T urndis_ioctl
-ffffffff81ed2db0 T urndis_init
-ffffffff81ed2ff0 T urndis_rxeof
-ffffffff81ed3100 T urndis_start
-ffffffff81ed31e0 T urndis_lookup
-ffffffff81ed4000 T mos_match
-ffffffff81ed4070 T mos_attach
-ffffffff81ed4440 T mos_detach
-ffffffff81ed45a0 T mos_lock_mii
-ffffffff81ed45c0 T mos_unlock_mii
-ffffffff81ed4620 T mos_reg_read_1
-ffffffff81ed46b0 T mos_reg_read_2
-ffffffff81ed4740 T mos_reg_write_1
-ffffffff81ed47c0 T mos_reg_write_2
-ffffffff81ed4840 T mos_readmac
-ffffffff81ed48c0 T mos_writemac
-ffffffff81ed4940 T mos_write_mcast
-ffffffff81ed49c0 T mos_miibus_readreg
-ffffffff81ed4be0 T mos_miibus_writereg
-ffffffff81ed4dc0 T mos_miibus_statchg
-ffffffff81ed4fa0 T mos_ifmedia_upd
-ffffffff81ed5030 T mos_ifmedia_sts
-ffffffff81ed5090 T mos_iff
-ffffffff81ed5280 T mos_reset
-ffffffff81ed53a0 T mos_chip_init
-ffffffff81ed54e0 T mos_tick_task
-ffffffff81ed55b0 T mos_stop
-ffffffff81ed5790 T mos_ioctl
-ffffffff81ed58e0 T mos_start
-ffffffff81ed5a30 T mos_watchdog
-ffffffff81ed5ae0 T mos_tick
-ffffffff81ed5b50 T mos_newbuf
-ffffffff81ed5be0 T mos_rx_list_init
-ffffffff81ed5c90 T mos_tx_list_init
-ffffffff81ed5d40 T mos_rxeof
-ffffffff81ed5f70 T mos_txeof
-ffffffff81ed6090 T mos_encap
-ffffffff81ed6170 T mos_init
-ffffffff81ed7000 T mue_match
-ffffffff81ed7070 T mue_attach
-ffffffff81ed7470 T mue_detach
-ffffffff81ed75a0 T mue_csr_read
-ffffffff81ed7630 T mue_csr_write
-ffffffff81ed76c0 T mue_lock_mii
-ffffffff81ed76e0 T mue_unlock_mii
-ffffffff81ed7740 T mue_mii_wait
-ffffffff81ed7820 T mue_miibus_readreg
-ffffffff81ed7aa0 T mue_miibus_writereg
-ffffffff81ed7d10 T mue_miibus_statchg
-ffffffff81ed8010 T mue_ifmedia_upd
-ffffffff81ed8060 T mue_ifmedia_sts
-ffffffff81ed80c0 T mue_eeprom_wait
-ffffffff81ed81a0 T mue_eeprom_getbyte
-ffffffff81ed83c0 T mue_read_eeprom
-ffffffff81ed85a0 T mue_dataport_wait
-ffffffff81ed8690 T mue_dataport_write
-ffffffff81ed8990 T mue_init_ltm
-ffffffff81ed8c10 T mue_chip_init
-ffffffff81ed98d0 T mue_set_macaddr
-ffffffff81ed9a50 T mue_tick_task
-ffffffff81ed9b00 T mue_stop
-ffffffff81ed9cd0 T mue_ioctl
-ffffffff81ed9e20 T mue_start
-ffffffff81ed9f00 T mue_watchdog
-ffffffff81ed9fb0 T mue_tick
-ffffffff81eda020 T mue_rx_list_init
-ffffffff81eda0d0 T mue_tx_list_init
-ffffffff81eda180 T mue_open_pipes
-ffffffff81eda290 T mue_rxeof
-ffffffff81eda490 T mue_encap
-ffffffff81eda5a0 T mue_txeof
-ffffffff81eda6c0 T mue_iff
-ffffffff81eda8f0 T mue_init
-ffffffff81edaaa0 T mue_reset
-ffffffff81edb000 T udav_match
-ffffffff81edb070 T udav_attach
-ffffffff81edb450 T udav_detach
-ffffffff81edb5a0 T udav_tick_task
-ffffffff81edb710 T udav_stop_task
-ffffffff81edb730 T udav_reset
-ffffffff81edb9a0 T udav_csr_read
-ffffffff81edba50 T udav_start
-ffffffff81edbb30 T udav_ioctl
-ffffffff81edbcd0 T udav_watchdog
-ffffffff81edbd80 T udav_miibus_readreg
-ffffffff81edc000 T udav_miibus_writereg
-ffffffff81edc270 T udav_miibus_statchg
-ffffffff81edc2a0 T udav_ifmedia_change
-ffffffff81edc350 T udav_ifmedia_status
-ffffffff81edc410 T udav_tick
-ffffffff81edc450 T udav_stop
-ffffffff81edc5c0 T udav_csr_write
-ffffffff81edc670 T udav_csr_read1
-ffffffff81edc730 T udav_csr_write1
-ffffffff81edc7e0 T udav_init
-ffffffff81edcde0 T udav_tx_list_init
-ffffffff81edce90 T udav_rx_list_init
-ffffffff81edcf50 T udav_iff
-ffffffff81edd2e0 T udav_openpipes
-ffffffff81edd410 T udav_rxeof
-ffffffff81edd650 T udav_newbuf
-ffffffff81edd750 T udav_send
-ffffffff81edd8c0 T udav_txeof
-ffffffff81edda00 T udav_lock_mii
-ffffffff81edda20 T udav_unlock_mii
-ffffffff81ede000 T upl_match
-ffffffff81ede070 T upl_attach
-ffffffff81ede280 T upl_detach
-ffffffff81ede330 T upl_ioctl
-ffffffff81ede450 T upl_start
-ffffffff81ede530 T upl_watchdog
-ffffffff81ede5d0 T upl_output
-ffffffff81ede5e0 T upl_stop
-ffffffff81ede7a0 T upl_newbuf
-ffffffff81ede890 T upl_rx_list_init
-ffffffff81ede9c0 T upl_tx_list_init
-ffffffff81edea70 T upl_rxeof
-ffffffff81edeca0 T upl_txeof
-ffffffff81ededc0 T upl_send
-ffffffff81edeed0 T upl_init
-ffffffff81edf010 T upl_openpipes
-ffffffff81edf170 T upl_intr
-ffffffff81ee0000 T ugl_match
-ffffffff81ee0070 T ugl_attach
-ffffffff81ee0230 T ugl_detach
-ffffffff81ee02e0 T ugl_ioctl
-ffffffff81ee03f0 T ugl_start
-ffffffff81ee04d0 T ugl_watchdog
-ffffffff81ee0550 T ugl_stop
-ffffffff81ee0680 T ugl_newbuf
-ffffffff81ee0770 T ugl_rx_list_init
-ffffffff81ee08a0 T ugl_tx_list_init
-ffffffff81ee0950 T ugl_rxeof
-ffffffff81ee0c00 T ugl_txeof
-ffffffff81ee0d20 T ugl_send
-ffffffff81ee0e50 T ugl_init
-ffffffff81ee0f90 T ugl_openpipes
-ffffffff81ee10f0 T ugl_intr
-ffffffff81ee2000 T url_match
-ffffffff81ee2070 T url_attach
-ffffffff81ee2490 T url_detach
-ffffffff81ee25e0 T url_tick_task
-ffffffff81ee26b0 T url_stop_task
-ffffffff81ee26d0 T url_reset
-ffffffff81ee2870 T url_mem
-ffffffff81ee2930 T url_start
-ffffffff81ee2a10 T url_ioctl
-ffffffff81ee2bb0 T url_watchdog
-ffffffff81ee2c60 T url_int_miibus_readreg
-ffffffff81ee2e90 T url_int_miibus_writereg
-ffffffff81ee3050 T url_miibus_statchg
-ffffffff81ee3080 T url_ifmedia_change
-ffffffff81ee3130 T url_ifmedia_status
-ffffffff81ee31c0 T url_tick
-ffffffff81ee3220 T url_stop
-ffffffff81ee3390 T url_csr_read_1
-ffffffff81ee3450 T url_csr_read_2
-ffffffff81ee3510 T url_csr_write_1
-ffffffff81ee35b0 T url_csr_write_2
-ffffffff81ee3650 T url_csr_write_4
-ffffffff81ee36f0 T url_init
-ffffffff81ee3bb0 T url_tx_list_init
-ffffffff81ee3c60 T url_rx_list_init
-ffffffff81ee3d20 T url_iff
-ffffffff81ee3fa0 T url_openpipes
-ffffffff81ee40d0 T url_rxeof
-ffffffff81ee42e0 T url_newbuf
-ffffffff81ee43e0 T url_send
-ffffffff81ee4530 T url_txeof
-ffffffff81ee4670 T url_lock_mii
-ffffffff81ee4690 T url_unlock_mii
-ffffffff81ee5000 T ure_match
-ffffffff81ee5070 T ure_attach
-ffffffff81ee5660 T ure_detach
-ffffffff81ee5780 T ure_ctl
-ffffffff81ee5830 T ure_read_mem
-ffffffff81ee58c0 T ure_write_mem
-ffffffff81ee5950 T ure_read_1
-ffffffff81ee59f0 T ure_read_2
-ffffffff81ee5a90 T ure_read_4
-ffffffff81ee5b10 T ure_write_1
-ffffffff81ee5bd0 T ure_write_2
-ffffffff81ee5c90 T ure_write_4
-ffffffff81ee5d20 T ure_ocp_reg_read
-ffffffff81ee5e10 T ure_ocp_reg_write
-ffffffff81ee5f10 T ure_miibus_readreg
-ffffffff81ee6000 T ure_lock_mii
-ffffffff81ee6020 T ure_unlock_mii
-ffffffff81ee6080 T ure_miibus_writereg
-ffffffff81ee6130 T ure_miibus_statchg
-ffffffff81ee61b0 T ure_ifmedia_upd
-ffffffff81ee6390 T ure_ifmedia_sts
-ffffffff81ee6500 T ure_get_link_status
-ffffffff81ee65a0 T ure_add_media_types
-ffffffff81ee6650 T ure_link_state
-ffffffff81ee6710 T ure_iff
-ffffffff81ee68e0 T ure_rxvlan
-ffffffff81ee6a20 T ure_reset
-ffffffff81ee6b30 T ure_watchdog
-ffffffff81ee6bb0 T ure_init
-ffffffff81ee7310 T ure_stop
-ffffffff81ee74b0 T ure_rtl8152_nic_reset
-ffffffff81ee7b30 T ure_rtl8153_nic_reset
-ffffffff81ee8790 T ure_rx_list_init
-ffffffff81ee8840 T ure_tx_list_init
-ffffffff81ee8920 T ure_rxeof
-ffffffff81ee8bc0 T ure_start
-ffffffff81ee8cd0 T ure_encap
-ffffffff81ee8e30 T ure_tick
-ffffffff81ee8e90 T ure_rtl8152_init
-ffffffff81ee9230 T ure_rtl8153_init
-ffffffff81ee9bb0 T ure_rtl8153_phy_status
-ffffffff81ee9c70 T ure_rtl8153b_init
-ffffffff81eea9c0 T ure_disable_teredo
-ffffffff81eeab40 T ure_reset_bmu
-ffffffff81eeac60 T ure_ioctl
-ffffffff81eeadc0 T ure_tick_task
-ffffffff81eeaf50 T ure_txeof
-ffffffff81eec000 T umodem_get_status
-ffffffff81eec040 T umodem_set
-ffffffff81eec100 T umodem_param
-ffffffff81eec1e0 T umodem_open
-ffffffff81eec270 T umodem_close
-ffffffff81eec300 T umodem_match
-ffffffff81eec3e0 T umodem_attach
-ffffffff81eec750 T umodem_detach
-ffffffff81eec7e0 T umodem_get_caps
-ffffffff81eec970 T umodem_set_comm_feature
-ffffffff81eec9e0 T umodem_intr
-ffffffff81eecaf0 T umodem_set_line_coding
-ffffffff81eecb90 T umodem_dtr
-ffffffff81eecc10 T umodem_set_line_state
-ffffffff81eecc80 T umodem_rts
-ffffffff81eecd00 T umodem_break
-ffffffff81eed000 T uftdi_get_status
-ffffffff81eed040 T uftdi_set
-ffffffff81eed0f0 T uftdi_param
-ffffffff81eed4b0 T uftdi_open
-ffffffff81eed580 T uftdi_read
-ffffffff81eed600 T uftdi_write
-ffffffff81eed680 T uftdi_match
-ffffffff81eed720 T uftdi_attach
-ffffffff81eed980 T uftdi_detach
-ffffffff81eed9d0 T uftdi_break
-ffffffff81eeda30 T uftdi_8u232am_getrate
-ffffffff81eedb20 T uftdi_2232h_getrate
-ffffffff81eee000 T uplcom_get_status
-ffffffff81eee040 T uplcom_set
-ffffffff81eee180 T uplcom_param
-ffffffff81eee330 T uplcom_open
-ffffffff81eee4a0 T uplcom_close
-ffffffff81eee540 T uplcom_match
-ffffffff81eee5b0 T uplcom_attach
-ffffffff81eee950 T uplcom_detach
-ffffffff81eee9e0 T uplcom_reset
-ffffffff81eeea40 T uplcom_set_line_state
-ffffffff81eeeae0 T uplcom_dtr
-ffffffff81eeeb90 T uplcom_rts
-ffffffff81eeec30 T uplcom_break
-ffffffff81eeec90 T uplcom_set_crtscts
-ffffffff81eeecf0 T uplcom_set_line_coding
-ffffffff81eeed90 T uplcom_intr
-ffffffff81eef000 T umct_get_status
-ffffffff81eef040 T umct_set
-ffffffff81eef120 T umct_param
-ffffffff81eef200 T umct_open
-ffffffff81eef2f0 T umct_close
-ffffffff81eef390 T umct_match
-ffffffff81eef400 T umct_attach
-ffffffff81eef6d0 T umct_detach
-ffffffff81eef760 T umct_init
-ffffffff81eef7d0 T umct_set_line_state
-ffffffff81eef850 T umct_dtr
-ffffffff81eef8d0 T umct_rts
-ffffffff81eef950 T umct_break
-ffffffff81eef9c0 T umct_set_lcr
-ffffffff81eefa20 T umct_set_baudrate
-ffffffff81eefc10 T umct_intr
-ffffffff81ef0000 T uvscom_get_status
-ffffffff81ef0040 T uvscom_set
-ffffffff81ef0150 T uvscom_param
-ffffffff81ef02b0 T uvscom_open
-ffffffff81ef0520 T uvscom_close
-ffffffff81ef0610 T uvscom_match
-ffffffff81ef0680 T uvscom_attach
-ffffffff81ef08f0 T uvscom_detach
-ffffffff81ef0980 T uvscom_reset
-ffffffff81ef09b0 T uvscom_readstat
-ffffffff81ef0a40 T uvscom_shutdown
-ffffffff81ef0ad0 T uvscom_set_crtscts
-ffffffff81ef0b00 T uvscom_set_line
-ffffffff81ef0b90 T uvscom_set_line_coding
-ffffffff81ef0c80 T uvscom_dtr
-ffffffff81ef0d30 T uvscom_rts
-ffffffff81ef0de0 T uvscom_break
-ffffffff81ef0e80 T uvscom_intr
-ffffffff81ef1000 T ubsa_get_status
-ffffffff81ef1040 T ubsa_set
-ffffffff81ef1130 T ubsa_param
-ffffffff81ef1330 T ubsa_open
-ffffffff81ef1410 T ubsa_close
-ffffffff81ef14b0 T ubsa_match
-ffffffff81ef1520 T ubsa_attach
-ffffffff81ef17d0 T ubsa_detach
-ffffffff81ef1860 T ubsa_request
-ffffffff81ef1910 T ubsa_dtr
-ffffffff81ef19b0 T ubsa_rts
-ffffffff81ef1a50 T ubsa_break
-ffffffff81ef1af0 T ubsa_baudrate
-ffffffff81ef1cf0 T ubsa_flow
-ffffffff81ef1db0 T ubsa_parity
-ffffffff81ef1e60 T ubsa_databits
-ffffffff81ef1ef0 T ubsa_stopbits
-ffffffff81ef1f80 T ubsa_intr
-ffffffff81ef3000 T ukspan_match
-ffffffff81ef3070 T ukspan_attach
-ffffffff81ef3450 T ukspan_detach
-ffffffff81ef3500 T ukspan_incb
-ffffffff81ef3680 T ukspan_destroy
-ffffffff81ef3710 T ukspan_outcb
-ffffffff81ef3780 T ukspan_get_status
-ffffffff81ef37c0 T ukspan_cmsg_init
-ffffffff81ef3830 T ukspan_cmsg_send
-ffffffff81ef38c0 T ukspan_set
-ffffffff81ef39a0 T ukspan_param
-ffffffff81ef3bc0 T ukspan_open
-ffffffff81ef3cd0 T ukspan_close
-ffffffff81ef4000 T uslcom_get_status
-ffffffff81ef4040 T uslcom_set
-ffffffff81ef40d0 T uslcom_param
-ffffffff81ef4220 T uslcom_open
-ffffffff81ef42a0 T uslcom_close
-ffffffff81ef4310 T uslcom_match
-ffffffff81ef4380 T uslcom_attach
-ffffffff81ef4590 T uslcom_detach
-ffffffff81ef45e0 T uslcom_break
-ffffffff81ef5000 T uark_get_status
-ffffffff81ef5040 T uark_set
-ffffffff81ef5070 T uark_param
-ffffffff81ef5270 T uark_match
-ffffffff81ef52e0 T uark_attach
-ffffffff81ef54f0 T uark_detach
-ffffffff81ef5540 T uark_break
-ffffffff81ef5570 T uark_cmd
-ffffffff81ef6000 T moscom_set
-ffffffff81ef60b0 T moscom_param
-ffffffff81ef6220 T moscom_open
-ffffffff81ef62f0 T moscom_match
-ffffffff81ef6360 T moscom_attach
-ffffffff81ef6570 T moscom_detach
-ffffffff81ef65c0 T moscom_cmd
-ffffffff81ef7000 T umcs_get_status
-ffffffff81ef70f0 T umcs_set
-ffffffff81ef7270 T umcs_param
-ffffffff81ef7440 T umcs_open
-ffffffff81ef79a0 T umcs_close
-ffffffff81ef7b10 T umcs_match
-ffffffff81ef7b80 T umcs_attach
-ffffffff81ef7ef0 T umcs_detach
-ffffffff81ef7f70 T umcs_get_reg
-ffffffff81ef7fd0 T umcs_intr
-ffffffff81ef8110 T umcs_status_task
-ffffffff81ef8190 T umcs_set_reg
-ffffffff81ef81f0 T umcs_get_uart_reg
-ffffffff81ef8270 T umcs_set_uart_reg
-ffffffff81ef82e0 T umcs_set_baudrate
-ffffffff81ef85d0 T umcs_calc_baudrate
-ffffffff81ef86c0 T umcs_dtr
-ffffffff81ef8770 T umcs_rts
-ffffffff81ef8820 T umcs_break
-ffffffff81ef9000 T uscom_match
-ffffffff81ef9070 T uscom_attach
-ffffffff81ef9280 T uscom_detach
-ffffffff81efa000 T ucrcom_match
-ffffffff81efa090 T ucrcom_attach
-ffffffff81efa2a0 T ucrcom_detach
-ffffffff81efb000 T uxrcom_get_status
-ffffffff81efb040 T uxrcom_set
-ffffffff81efb0e0 T uxrcom_param
-ffffffff81efb200 T uxrcom_open
-ffffffff81efb280 T uxrcom_close
-ffffffff81efb310 T uxrcom_match
-ffffffff81efb380 T uxrcom_attach
-ffffffff81efb620 T uxrcom_detach
-ffffffff81efb6a0 T uxrcom_intr
-ffffffff81efb780 T uxrcom_break
-ffffffff81efb7e0 T uxrcom_set_line_coding
-ffffffff81efc000 T uipaq_set
-ffffffff81efc1c0 T uipaq_match
-ffffffff81efc230 T uipaq_attach
-ffffffff81efc440 T uipaq_detach
-ffffffff81efc490 T uipaq_dtr
-ffffffff81efc540 T uipaq_rts
-ffffffff81efc5f0 T uipaq_break
-ffffffff81efd000 T umsm_get_status
-ffffffff81efd040 T umsm_set
-ffffffff81efd0f0 T umsm_open
-ffffffff81efd1d0 T umsm_close
-ffffffff81efd270 T umsm_match
-ffffffff81efd3a0 T umsm_attach
-ffffffff81efd6d0 T umsm_detach
-ffffffff81efd770 T umsm_huawei_changemode
-ffffffff81efd7d0 T umsm_truinstall_changemode
-ffffffff81efd830 T umsm_umass_changemode
-ffffffff81efdbd0 T umsm_intr
-ffffffff81efe000 T uchcom_get_status
-ffffffff81efe060 T uchcom_set
-ffffffff81efe120 T uchcom_param
-ffffffff81efe1c0 T uchcom_open
-ffffffff81efe220 T uchcom_close
-ffffffff81efe2b0 T uchcom_match
-ffffffff81efe320 T uchcom_attach
-ffffffff81efe480 T uchcom_detach
-ffffffff81efe530 T uchcom_find_ifaces
-ffffffff81efe5b0 T uchcom_find_endpoints
-ffffffff81efe770 T uchcom_close_intr_pipe
-ffffffff81efe800 T uchcom_generic_control_out
-ffffffff81efe860 T uchcom_generic_control_in
-ffffffff81efe8e0 T uchcom_write_reg
-ffffffff81efe950 T uchcom_read_reg
-ffffffff81efe9f0 T uchcom_get_version
-ffffffff81efea70 T uchcom_read_status
-ffffffff81efeaf0 T uchcom_set_dtrrts_10
-ffffffff81efeb50 T uchcom_set_dtrrts_20
-ffffffff81efeba0 T uchcom_update_version
-ffffffff81efec50 T uchcom_convert_status
-ffffffff81efecb0 T uchcom_update_status
-ffffffff81efeda0 T uchcom_set_dtrrts
-ffffffff81efee70 T uchcom_set_break
-ffffffff81efef60 T uchcom_calc_divider_settings
-ffffffff81eff070 T uchcom_set_dte_rate
-ffffffff81eff230 T uchcom_set_line_control
-ffffffff81eff280 T uchcom_clear_chip
-ffffffff81eff310 T uchcom_reset_chip
-ffffffff81eff3a0 T uchcom_setup_comm
-ffffffff81eff520 T uchcom_setup_intr_pipe
-ffffffff81eff5f0 T uchcom_intr
-ffffffff81f00000 t uticom_get_status
-ffffffff81f00030 t uticom_set
-ffffffff81f00190 t uticom_param
-ffffffff81f003e0 t uticom_open
-ffffffff81f004c0 t uticom_close
-ffffffff81f005b0 T uticom_match
-ffffffff81f00620 T uticom_attach
-ffffffff81f00650 T uticom_detach
-ffffffff81f006d0 T uticom_attach_hook
-ffffffff81f00d40 t uticom_intr
-ffffffff81f01000 T wi_cmd_usb
-ffffffff81f01290 T wi_read_record_usb
-ffffffff81f015c0 T wi_write_record_usb
-ffffffff81f01ae0 T wi_alloc_nicmem_usb
-ffffffff81f01b90 T wi_read_data_usb
-ffffffff81f01c70 T wi_write_data_usb
-ffffffff81f01cf0 T wi_get_fid_usb
-ffffffff81f01d30 T wi_init_usb
-ffffffff81f01db0 T wi_start_usb
-ffffffff81f01e50 T wi_ioctl_usb
-ffffffff81f01f20 T wi_watchdog_usb
-ffffffff81f01f70 T wi_inquire_usb
-ffffffff81f01fc0 T wi_usb_match
-ffffffff81f02030 T wi_usb_attach
-ffffffff81f02280 T wi_usb_detach
-ffffffff81f024d0 T wi_usb_rx_list_init
-ffffffff81f02580 T wi_usb_tx_list_init
-ffffffff81f02640 T wi_usb_open_pipes
-ffffffff81f027d0 T wi_usb_start_thread
-ffffffff81f027f0 T wi_send_packet
-ffffffff81f02990 T wi_usb_txeof_frm
-ffffffff81f02af0 T wi_usb_stop
-ffffffff81f02b20 T wi_usb_ctl_lock
-ffffffff81f02be0 T wi_usb_tx_lock
-ffffffff81f02c70 T wi_usb_txeof
-ffffffff81f02d60 T wi_usb_do_transmit_sync
-ffffffff81f02e40 T wi_usb_tx_unlock
-ffffffff81f02ea0 T wi_usb_ctl_unlock
-ffffffff81f02f00 T wi_usb_intr
-ffffffff81f02f90 T wi_usb_rxeof
-ffffffff81f03300 T wi_usb_rxfrm
-ffffffff81f03350 T wi_usb_txfrm
-ffffffff81f03400 T wi_usb_infofrm
-ffffffff81f03450 T wi_usb_cmdresp
-ffffffff81f034c0 T wi_usb_wridresp
-ffffffff81f03500 T wi_usb_rridresp
-ffffffff81f035c0 T wi_usb_thread
-ffffffff81f03840 T wi_usb_tx_lock_try
-ffffffff81f04000 T atu_match
-ffffffff81f04090 T atu_attach
-ffffffff81f04350 T atu_detach
-ffffffff81f043f0 T atu_usb_request
-ffffffff81f044e0 T atu_send_command
-ffffffff81f045d0 T atu_get_cmd_status
-ffffffff81f046b0 T atu_wait_completion
-ffffffff81f047f0 T atu_send_mib
-ffffffff81f049d0 T atu_get_mib
-ffffffff81f04ac0 T atu_start_scan
-ffffffff81f04c40 T atu_switch_radio
-ffffffff81f04d80 T atu_initial_config
-ffffffff81f051b0 T atu_join
-ffffffff81f05340 T atu_get_dfu_state
-ffffffff81f05430 T atu_get_opmode
-ffffffff81f05520 T atu_internal_firmware
-ffffffff81f05a50 T atu_external_firmware
-ffffffff81f05da0 T atu_complete_attach
-ffffffff81f062c0 T atu_get_card_config
-ffffffff81f064a0 T atu_media_change
-ffffffff81f06510 T atu_init
-ffffffff81f06750 T atu_media_status
-ffffffff81f06760 T atu_task
-ffffffff81f06830 T atu_newstate
-ffffffff81f069a0 T atu_start
-ffffffff81f06bf0 T atu_ioctl
-ffffffff81f06d50 T atu_watchdog
-ffffffff81f06e50 T atu_stop
-ffffffff81f06fb0 T atu_newbuf
-ffffffff81f07070 T atu_rx_list_init
-ffffffff81f07160 T atu_tx_list_init
-ffffffff81f07240 T atu_xfer_list_free
-ffffffff81f072d0 T atu_rxeof
-ffffffff81f075c0 T atu_txeof
-ffffffff81f076b0 T atu_calculate_padding
-ffffffff81f07700 T atu_tx_start
-ffffffff81f08000 T ural_match
-ffffffff81f08070 T ural_attach
-ffffffff81f08610 T ural_detach
-ffffffff81f08760 T ural_task
-ffffffff81f08ab0 T ural_next_scan
-ffffffff81f08b20 T ural_amrr_timeout
-ffffffff81f08bf0 T ural_read
-ffffffff81f08c90 T ural_read_eeprom
-ffffffff81f08ed0 T ural_get_rf
-ffffffff81f08f10 T ural_ioctl
-ffffffff81f090c0 T ural_start
-ffffffff81f09280 T ural_watchdog
-ffffffff81f09300 T ural_newassoc
-ffffffff81f09330 T ural_newstate
-ffffffff81f093d0 T ural_media_change
-ffffffff81f09430 T ural_free_rx_list
-ffffffff81f094a0 T ural_free_tx_list
-ffffffff81f09610 T ural_alloc_tx_list
-ffffffff81f096e0 T ural_alloc_rx_list
-ffffffff81f09810 T ural_init
-ffffffff81f09f30 T ural_write
-ffffffff81f09fc0 T ural_set_chan
-ffffffff81f0a380 T ural_update_slot
-ffffffff81f0a500 T ural_set_txpreamble
-ffffffff81f0a610 T ural_set_basicrates
-ffffffff81f0a6b0 T ural_set_bssid
-ffffffff81f0a800 T ural_tx_bcn
-ffffffff81f0a970 T ural_enable_tsf_sync
-ffffffff81f0ab10 T ural_amrr_start
-ffffffff81f0ac20 T ural_txeof
-ffffffff81f0ad30 T ural_rxeof
-ffffffff81f0b060 T ural_rxrate
-ffffffff81f0b0d0 T ural_ack_rate
-ffffffff81f0b170 T ural_txtime
-ffffffff81f0b1e0 T ural_plcp_signal
-ffffffff81f0b280 T ural_setup_tx_desc
-ffffffff81f0b400 T ural_tx_data
-ffffffff81f0bb40 T ural_update_promisc
-ffffffff81f0bc60 T ural_stop
-ffffffff81f0be70 T ural_eeprom_read
-ffffffff81f0bef0 T ural_read_multi
-ffffffff81f0bf70 T ural_write_multi
-ffffffff81f0bff0 T ural_bbp_write
-ffffffff81f0c210 T ural_bbp_read
-ffffffff81f0c490 T ural_rf_write
-ffffffff81f0c710 T ural_disable_rf_tune
-ffffffff81f0c760 T ural_set_macaddr
-ffffffff81f0c8b0 T ural_bbp_init
-ffffffff81f0c960 T ural_set_txantenna
-ffffffff81f0cb90 T ural_set_rxantenna
-ffffffff81f0cbf0 T ural_amrr_update
-ffffffff81f0d000 T rum_match
-ffffffff81f0d070 T rum_attach
-ffffffff81f0da50 T rum_detach
-ffffffff81f0dba0 T rum_attachhook
-ffffffff81f0dc50 T rum_load_microcode
-ffffffff81f0dd80 T rum_task
-ffffffff81f0e010 T rum_next_scan
-ffffffff81f0e080 T rum_amrr_timeout
-ffffffff81f0e120 T rum_read
-ffffffff81f0e1b0 T rum_read_eeprom
-ffffffff81f0e5e0 T rum_get_rf
-ffffffff81f0e620 T rum_ioctl
-ffffffff81f0e7d0 T rum_start
-ffffffff81f0e990 T rum_watchdog
-ffffffff81f0ea10 T rum_newassoc
-ffffffff81f0ea40 T rum_newstate
-ffffffff81f0eae0 T rum_media_change
-ffffffff81f0eb40 T rum_free_rx_list
-ffffffff81f0ebb0 T rum_free_tx_list
-ffffffff81f0ed20 T rum_alloc_tx_list
-ffffffff81f0ee00 T rum_alloc_rx_list
-ffffffff81f0ef30 T rum_init
-ffffffff81f0f580 T rum_write
-ffffffff81f0f610 T rum_set_chan
-ffffffff81f0f880 T rum_update_slot
-ffffffff81f0f9a0 T rum_enable_mrr
-ffffffff81f0fac0 T rum_set_txpreamble
-ffffffff81f0fbc0 T rum_set_basicrates
-ffffffff81f0fc80 T rum_set_bssid
-ffffffff81f0fd90 T rum_prepare_beacon
-ffffffff81f0ff40 T rum_enable_tsf_sync
-ffffffff81f100b0 T rum_amrr_start
-ffffffff81f101c0 T rum_txeof
-ffffffff81f102d0 T rum_rxeof
-ffffffff81f105f0 T rum_rxrate
-ffffffff81f10660 T rum_ack_rate
-ffffffff81f10700 T rum_txtime
-ffffffff81f10770 T rum_plcp_signal
-ffffffff81f10810 T rum_setup_tx_desc
-ffffffff81f109a0 T rum_tx_data
-ffffffff81f110e0 T rum_update_promisc
-ffffffff81f111f0 T rum_stop
-ffffffff81f11470 T rum_eeprom_read
-ffffffff81f114f0 T rum_read_multi
-ffffffff81f11570 T rum_write_multi
-ffffffff81f11650 T rum_bbp_write
-ffffffff81f118e0 T rum_bbp_read
-ffffffff81f11bf0 T rum_rf_write
-ffffffff81f11e80 T rum_select_antenna
-ffffffff81f12010 T rum_select_band
-ffffffff81f12270 T rum_set_macaddr
-ffffffff81f12380 T rum_bbp_init
-ffffffff81f12690 T rum_amrr_update
-ffffffff81f13000 T run_match
-ffffffff81f13070 T run_attach
-ffffffff81f13810 T run_detach
-ffffffff81f13950 T run_task
-ffffffff81f13a60 T run_next_scan
-ffffffff81f13ad0 T run_calibrate_to
-ffffffff81f13bc0 T run_read
-ffffffff81f13c30 T run_read_eeprom
-ffffffff81f14970 T run_get_rf
-ffffffff81f14a90 T run_ioctl
-ffffffff81f14c30 T run_start
-ffffffff81f14dc0 T run_watchdog
-ffffffff81f14e40 T run_node_alloc
-ffffffff81f14e60 T run_newassoc
-ffffffff81f15000 T run_updateslot
-ffffffff81f150f0 T run_updateedca
-ffffffff81f151e0 T run_set_key
-ffffffff81f15350 T run_delete_key
-ffffffff81f154c0 T run_newstate
-ffffffff81f155c0 T run_media_change
-ffffffff81f15700 T run_free_tx_ring
-ffffffff81f158a0 T run_free_rx_ring
-ffffffff81f15920 T run_alloc_rx_ring
-ffffffff81f15a10 T run_alloc_tx_ring
-ffffffff81f15b60 T run_load_microcode
-ffffffff81f15f40 T run_write_region_1
-ffffffff81f16020 T run_write
-ffffffff81f160d0 T run_mcu_cmd
-ffffffff81f16220 T run_reset
-ffffffff81f16270 T run_read_region_1
-ffffffff81f162c0 T run_write_2
-ffffffff81f16320 T run_set_region_4
-ffffffff81f16410 T run_efuse_read
-ffffffff81f165f0 T run_efuse_read_2
-ffffffff81f167e0 T run_eeprom_read_2
-ffffffff81f16850 T run_rt2870_rf_write
-ffffffff81f16960 T run_rt3070_rf_read
-ffffffff81f16ad0 T run_rt3070_rf_write
-ffffffff81f16bd0 T run_bbp_read
-ffffffff81f16d40 T run_bbp_write
-ffffffff81f16e40 T run_rt3593_get_txpower
-ffffffff81f170a0 T run_get_txpower
-ffffffff81f17300 T run_stop
-ffffffff81f177b0 T run_init
-ffffffff81f188f0 T run_do_async
-ffffffff81f18a30 T run_newstate_cb
-ffffffff81f18e40 T run_set_leds
-ffffffff81f18e60 T run_set_chan
-ffffffff81f18f80 T run_enable_mrr
-ffffffff81f19070 T run_set_txpreamble
-ffffffff81f19150 T run_set_basicrates
-ffffffff81f19210 T run_set_bssid
-ffffffff81f19330 T run_enable_tsf_sync
-ffffffff81f19440 T run_updateedca_cb
-ffffffff81f197c0 T run_set_key_cb
-ffffffff81f19cc0 T run_delete_key_cb
-ffffffff81f19e80 T run_calibrate_cb
-ffffffff81f19f60 T run_rx_frame
-ffffffff81f1a3e0 T run_rssi2dbm
-ffffffff81f1a490 T run_rxeof
-ffffffff81f1a610 T run_txeof
-ffffffff81f1a6c0 T run_tx
-ffffffff81f1ab00 T run_iq_calib
-ffffffff81f1add0 T run_select_chan_group
-ffffffff81f1b5b0 T run_set_agc
-ffffffff81f1b680 T run_rt2870_set_chan
-ffffffff81f1b870 T run_rt3070_set_chan
-ffffffff81f1bac0 T run_rt3572_set_chan
-ffffffff81f1c060 T run_rt3593_set_chan
-ffffffff81f1c6a0 T run_adjust_freq_offset
-ffffffff81f1c730 T run_rt5390_set_chan
-ffffffff81f1cb10 T run_rt5592_set_chan
-ffffffff81f1d130 T run_set_rx_antenna
-ffffffff81f1d2c0 T run_set_macaddr
-ffffffff81f1d3e0 T run_updateslot_cb
-ffffffff81f1d4c0 T run_rt5390_bbp_init
-ffffffff81f1d730 T run_bbp_init
-ffffffff81f1da20 T run_rt3070_rf_init
-ffffffff81f1e220 T run_rt3070_filter_calib
-ffffffff81f1e420 T run_rt3593_rf_init
-ffffffff81f1e7c0 T run_rt5390_rf_init
-ffffffff81f1eb70 T run_rt3070_rf_setup
-ffffffff81f1f020 T run_rt3593_rf_setup
-ffffffff81f1f410 T run_rt5390_rf_setup
-ffffffff81f1f690 T run_txrx_enable
-ffffffff81f20000 T zyd_match
-ffffffff81f20070 T zyd_attach
-ffffffff81f20110 T zyd_detach
-ffffffff81f20230 T zyd_attachhook
-ffffffff81f203d0 T zyd_loadfirmware
-ffffffff81f204c0 T zyd_complete_attach
-ffffffff81f20a10 T zyd_task
-ffffffff81f20db0 T zyd_next_scan
-ffffffff81f20df0 T zyd_amrr_timeout
-ffffffff81f20e70 T zyd_open_pipes
-ffffffff81f21030 T zyd_read_eeprom
-ffffffff81f21350 T zyd_rf_attach
-ffffffff81f21560 T zyd_hw_init
-ffffffff81f21e00 T zyd_rf_name
-ffffffff81f21e40 T zyd_ioctl
-ffffffff81f22040 T zyd_start
-ffffffff81f221d0 T zyd_watchdog
-ffffffff81f22250 T zyd_node_alloc
-ffffffff81f22270 T zyd_newassoc
-ffffffff81f222f0 T zyd_newstate
-ffffffff81f22390 T zyd_media_change
-ffffffff81f223f0 T zyd_close_pipes
-ffffffff81f224f0 T zyd_free_rx_list
-ffffffff81f22540 T zyd_free_tx_list
-ffffffff81f225b0 T zyd_intr
-ffffffff81f226e0 T zyd_alloc_tx_list
-ffffffff81f227d0 T zyd_alloc_rx_list
-ffffffff81f22890 T zyd_init
-ffffffff81f22c90 T zyd_set_led
-ffffffff81f22d50 T zyd_write32
-ffffffff81f22dc0 T zyd_set_chan
-ffffffff81f230f0 T zyd_set_bssid
-ffffffff81f231a0 T zyd_cmd_read
-ffffffff81f233d0 T zyd_read16
-ffffffff81f23440 T zyd_read32
-ffffffff81f234d0 T zyd_cmd_write
-ffffffff81f23620 T zyd_write16
-ffffffff81f23670 T zyd_rfwrite
-ffffffff81f237a0 T zyd_lock_phy
-ffffffff81f23840 T zyd_unlock_phy
-ffffffff81f238f0 T zyd_rfmd_init
-ffffffff81f23ac0 T zyd_rfmd_switch_radio
-ffffffff81f23b60 T zyd_rfmd_set_channel
-ffffffff81f23db0 T zyd_al2230_init
-ffffffff81f24100 T zyd_al2230_init_b
-ffffffff81f242d0 T zyd_al2230_switch_radio
-ffffffff81f24380 T zyd_al2230_set_channel
-ffffffff81f24710 T zyd_al7230B_init
-ffffffff81f24d00 T zyd_al7230B_switch_radio
-ffffffff81f24da0 T zyd_al7230B_set_channel
-ffffffff81f25350 T zyd_al2210_init
-ffffffff81f25690 T zyd_al2210_switch_radio
-ffffffff81f256c0 T zyd_al2210_set_channel
-ffffffff81f259e0 T zyd_gct_init
-ffffffff81f25bb0 T zyd_gct_switch_radio
-ffffffff81f25be0 T zyd_gct_set_channel
-ffffffff81f25f40 T zyd_maxim_init
-ffffffff81f261b0 T zyd_maxim_switch_radio
-ffffffff81f261e0 T zyd_maxim_set_channel
-ffffffff81f26660 T zyd_maxim2_init
-ffffffff81f268d0 T zyd_maxim2_switch_radio
-ffffffff81f26900 T zyd_maxim2_set_channel
-ffffffff81f26d80 T zyd_set_beacon_interval
-ffffffff81f26e70 T zyd_set_multi
-ffffffff81f26fc0 T zyd_set_macaddr
-ffffffff81f27070 T zyd_switch_radio
-ffffffff81f271c0 T zyd_set_rxfilter
-ffffffff81f27240 T zyd_plcp_signal
-ffffffff81f272e0 T zyd_rx_data
-ffffffff81f27500 T zyd_rxeof
-ffffffff81f276f0 T zyd_txeof
-ffffffff81f27800 T zyd_tx
-ffffffff81f27c10 T zyd_stop
-ffffffff81f27d50 T zyd_iter_func
-ffffffff81f28000 T upgt_match
-ffffffff81f280a0 T upgt_attach
-ffffffff81f28420 T upgt_detach
-ffffffff81f28580 T upgt_device_type
-ffffffff81f28610 T upgt_newstate_task
-ffffffff81f28710 T upgt_tx_task
-ffffffff81f28a90 T upgt_next_scan
-ffffffff81f28ad0 T upgt_set_led_blink
-ffffffff81f28af0 T upgt_alloc_tx
-ffffffff81f28d10 T upgt_alloc_rx
-ffffffff81f28dc0 T upgt_alloc_cmd
-ffffffff81f28e70 T upgt_attach_hook
-ffffffff81f29470 T upgt_fw_alloc
-ffffffff81f29500 T upgt_device_init
-ffffffff81f29600 T upgt_fw_verify
-ffffffff81f29830 T upgt_mem_init
-ffffffff81f29950 T upgt_fw_load
-ffffffff81f29dd0 T upgt_rx_cb
-ffffffff81f29f10 T upgt_eeprom_read
-ffffffff81f2a0f0 T upgt_eeprom_parse
-ffffffff81f2a460 T upgt_ioctl
-ffffffff81f2a620 T upgt_start
-ffffffff81f2a880 T upgt_watchdog
-ffffffff81f2a8e0 T upgt_newassoc
-ffffffff81f2a910 T upgt_newstate
-ffffffff81f2a990 T upgt_media_change
-ffffffff81f2aa00 T upgt_free_tx
-ffffffff81f2ab20 T upgt_free_rx
-ffffffff81f2ab80 T upgt_free_cmd
-ffffffff81f2abd0 T upgt_fw_free
-ffffffff81f2ac30 T upgt_bulk_xmit
-ffffffff81f2acf0 T upgt_mem_alloc
-ffffffff81f2ad60 T upgt_mem_free
-ffffffff81f2ade0 T upgt_crc32_le
-ffffffff81f2ae20 T upgt_fw_copy
-ffffffff81f2aee0 T upgt_chksum_le
-ffffffff81f2af50 T upgt_eeprom_parse_hwrx
-ffffffff81f2af90 T upgt_eeprom_parse_freq3
-ffffffff81f2b020 T upgt_eeprom_parse_freq4
-ffffffff81f2b1d0 T upgt_eeprom_parse_freq6
-ffffffff81f2b280 T upgt_init
-ffffffff81f2b420 T upgt_stop
-ffffffff81f2b470 T upgt_set_channel
-ffffffff81f2b680 T upgt_setup_rates
-ffffffff81f2b750 T upgt_set_macfilter
-ffffffff81f2b9f0 T upgt_set_led
-ffffffff81f2bbd0 T upgt_get_stats
-ffffffff81f2bd20 T upgt_tx_done
-ffffffff81f2beb0 T upgt_rx
-ffffffff81f2c060 T upgt_rx_rate
-ffffffff81f2c0c0 T upgt_hexdump
-ffffffff81f2d000 T urtw_match
-ffffffff81f2d070 T urtw_attach
-ffffffff81f2d740 T urtw_detach
-ffffffff81f2d930 T urtw_read32_c
-ffffffff81f2d990 T urtw_read8_c
-ffffffff81f2d9f0 T urtw_get_rfchip
-ffffffff81f2db30 T urtw_get_macaddr
-ffffffff81f2dbd0 T urtw_get_txpwr
-ffffffff81f2df40 T urtw_led_init
-ffffffff81f2dff0 T urtw_task
-ffffffff81f2e2a0 T urtw_ledusbtask
-ffffffff81f2e2e0 T urtw_next_scan
-ffffffff81f2e350 T urtw_ledtask
-ffffffff81f2e370 T urtw_init
-ffffffff81f2e960 T urtw_8187b_init
-ffffffff81f2f1a0 T urtw_ioctl
-ffffffff81f2f3f0 T urtw_start
-ffffffff81f2f5d0 T urtw_watchdog
-ffffffff81f2f650 T urtw_newstate
-ffffffff81f2f6e0 T urtw_media_change
-ffffffff81f2f760 T urtw_free_tx_data_list
-ffffffff81f2f820 T urtw_free_rx_data_list
-ffffffff81f2f8a0 T urtw_close_pipes
-ffffffff81f2f940 T urtw_open_pipes
-ffffffff81f2fad0 T urtw_alloc_rx_data_list
-ffffffff81f2fc10 T urtw_alloc_tx_data_list
-ffffffff81f2fd60 T urtw_eprom_read32
-ffffffff81f30170 T urtw_8225_write_s16
-ffffffff81f301e0 T urtw_8225_read
-ffffffff81f30990 T urtw_read16_c
-ffffffff81f309f0 T urtw_write16_c
-ffffffff81f30a60 T urtw_8225_write_c
-ffffffff81f30d60 T urtw_8225_isv2
-ffffffff81f30ed0 T urtw_8225_rf_init
-ffffffff81f31550 T urtw_8225_rf_set_chan
-ffffffff81f317a0 T urtw_8225_rf_set_sens
-ffffffff81f31860 T urtw_8225v2_rf_init
-ffffffff81f31f60 T urtw_8225v2_rf_set_chan
-ffffffff81f321b0 T urtw_8225v2_b_rf_init
-ffffffff81f329c0 T urtw_8225v2_b_rf_set_chan
-ffffffff81f32b20 T urtw_write8_c
-ffffffff81f32b90 T urtw_eprom_cs
-ffffffff81f32c60 T urtw_eprom_ck
-ffffffff81f32d80 T urtw_eprom_sendbits
-ffffffff81f32e00 T urtw_eprom_writebit
-ffffffff81f32ed0 T urtw_eprom_readbit
-ffffffff81f32f60 T urtw_read8e
-ffffffff81f32fc0 T urtw_write8e
-ffffffff81f33030 T urtw_write32_c
-ffffffff81f330a0 T urtw_8180_set_anaparam
-ffffffff81f332f0 T urtw_8185_set_anaparam2
-ffffffff81f33540 T urtw_intr_disable
-ffffffff81f335a0 T urtw_reset
-ffffffff81f338c0 T urtw_led_on
-ffffffff81f33980 T urtw_led_mode0
-ffffffff81f33c00 T urtw_led_mode1
-ffffffff81f33c30 T urtw_led_mode2
-ffffffff81f33c60 T urtw_led_mode3
-ffffffff81f33c90 T urtw_led_blink
-ffffffff81f33f70 T urtw_led_ctl
-ffffffff81f33fd0 T urtw_update_msr
-ffffffff81f340a0 T urtw_rate2rtl
-ffffffff81f34170 T urtw_rtl2rate
-ffffffff81f341b0 T urtw_set_rate
-ffffffff81f34280 T urtw_intr_enable
-ffffffff81f342e0 T urtw_rx_setconf
-ffffffff81f343e0 T urtw_rx_enable
-ffffffff81f34510 T urtw_rxeof
-ffffffff81f348c0 T urtw_tx_enable
-ffffffff81f34ad0 T urtw_stop
-ffffffff81f34c10 T urtw_set_macaddr
-ffffffff81f34cc0 T urtw_set_multi
-ffffffff81f34cf0 T urtw_set_chan
-ffffffff81f34e30 T urtw_tx_start
-ffffffff81f35360 T urtw_txeof_low
-ffffffff81f35470 T urtw_txeof_normal
-ffffffff81f35580 T urtw_8225_usb_init
-ffffffff81f357c0 T urtw_8185_rf_pins_enable
-ffffffff81f35820 T urtw_8187_write_phy
-ffffffff81f35930 T urtw_8187_write_phy_ofdm_c
-ffffffff81f35950 T urtw_8187_write_phy_cck_c
-ffffffff81f35970 T urtw_8225_setgain
-ffffffff81f35a40 T urtw_8225_set_txpwrlvl
-ffffffff81f35da0 T urtw_8185_tx_antenna
-ffffffff81f35e30 T urtw_isbmode
-ffffffff81f35eb0 T urtw_8225v2_setgain
-ffffffff81f35fa0 T urtw_8225v2_set_txpwrlvl
-ffffffff81f36290 T urtw_set_bssid
-ffffffff81f36340 T urtw_8187b_update_wmm
-ffffffff81f36460 T urtw_8187b_reset
-ffffffff81f36930 T urtw_8225v2_b_config_mac
-ffffffff81f36b30 T urtw_8225v2_b_init_rfe
-ffffffff81f36c10 T urtw_8225v2_b_update_chan
-ffffffff81f36e40 T u